diff --git a/TP1/.cproject b/TP1/.cproject
index b2c79b2..d0a18ac 100644
--- a/TP1/.cproject
+++ b/TP1/.cproject
@@ -22,7 +22,7 @@
-
+
@@ -95,26 +95,26 @@
-
-
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diff --git a/TP1/.project b/TP1/.project
index 31e5576..87f9fec 100644
--- a/TP1/.project
+++ b/TP1/.project
@@ -1,6 +1,6 @@
- TP1
+ TP1_somme
diff --git a/TP1/TP1.ioc b/TP1/TP1_somme.ioc
similarity index 100%
rename from TP1/TP1.ioc
rename to TP1/TP1_somme.ioc
diff --git a/TP1_BPLED1/.cproject b/TP1_BPLED1/.cproject
new file mode 100644
index 0000000..6834bdc
--- /dev/null
+++ b/TP1_BPLED1/.cproject
@@ -0,0 +1,172 @@
+
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\ No newline at end of file
diff --git a/TP1_BPLED1/.mxproject b/TP1_BPLED1/.mxproject
new file mode 100644
index 0000000..3d41537
--- /dev/null
+++ b/TP1_BPLED1/.mxproject
@@ -0,0 +1,25 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/stm32l1xx_it.c;Core/Src/stm32l1xx_hal_msp.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Core/Src/system_stm32l1xx.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Core/Src/system_stm32l1xx.c;;;
+HeaderPath=Drivers/STM32L1xx_HAL_Driver/Inc;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32L1xx/Include;Drivers/CMSIS/Include;Core/Inc;
+CDefines=USE_HAL_DRIVER;STM32L152xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=../Core/Inc/stm32l1xx_it.h
+HeaderFiles#1=../Core/Inc/stm32l1xx_hal_conf.h
+HeaderFiles#2=../Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=../Core/Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=../Core/Src/stm32l1xx_it.c
+SourceFiles#1=../Core/Src/stm32l1xx_hal_msp.c
+SourceFiles#2=../Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=../Core/Src
+SourceFiles=;
+
diff --git a/TP1_BPLED1/.project b/TP1_BPLED1/.project
new file mode 100644
index 0000000..89a19b6
--- /dev/null
+++ b/TP1_BPLED1/.project
@@ -0,0 +1,32 @@
+
+
+ TP1_BPLED1
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs b/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
new file mode 100644
index 0000000..98a69fc
--- /dev/null
+++ b/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
diff --git a/TP1_BPLED1/.settings/language.settings.xml b/TP1_BPLED1/.settings/language.settings.xml
new file mode 100644
index 0000000..5928689
--- /dev/null
+++ b/TP1_BPLED1/.settings/language.settings.xml
@@ -0,0 +1,25 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs b/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs
new file mode 100644
index 0000000..99f26c0
--- /dev/null
+++ b/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+encoding/=UTF-8
diff --git a/TP1_BPLED1/.settings/stm32cubeide.project.prefs b/TP1_BPLED1/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..2ee3478
--- /dev/null
+++ b/TP1_BPLED1/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,5 @@
+635E684B79701B039C64EA45C3F84D30=20408E19A1D483CC68E7BF859CC595B4
+66BE74F758C12D739921AEA421D593D3=1
+8DF89ED150041C4CBC7CB9A9CAA90856=787343FA0477F66DEA4B2B86368887F5
+DC22A860405A8BF2F2C095E5B6529F12=787343FA0477F66DEA4B2B86368887F5
+eclipse.preferences.version=1
diff --git a/TP1_BPLED1/Core/Inc/main.h b/TP1_BPLED1/Core/Inc/main.h
new file mode 100644
index 0000000..f645caf
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h b/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h
new file mode 100644
index 0000000..df67bc1
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h
@@ -0,0 +1,318 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_hal_conf.h
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_HAL_CONF_H
+#define __STM32L1xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_I2C_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SD_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE ((uint32_t)2097000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)15) /*!< tick interrupt priority */
+#define USE_RTOS 0
+#define PREFETCH_ENABLE 0
+#define INSTRUCTION_CACHE_ENABLE 1
+#define DATA_CACHE_ENABLE 1
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+ * @brief Set below the peripheral configuration to "1U" to add the support
+ * of HAL callback registration/deregistration feature for the HAL
+ * driver(s). This allows user application to provide specific callback
+ * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+ * the default weak callback functions (see each stm32l0xx_hal_ppp.h file
+ * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+ * for each PPP peripheral).
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32l1xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32l1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32l1xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32l1xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32l1xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32l1xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32l1xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32l1xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32l1xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32l1xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32l1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32l1xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32l1xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32l1xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32l1xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32l1xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+ #include "stm32l1xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32l1xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32l1xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32l1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32l1xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32l1xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32l1xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32l1xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32l1xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32l1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32l1xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32l1xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32l1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_HAL_CONF_H */
+
diff --git a/TP1_BPLED1/Core/Inc/stm32l1xx_it.h b/TP1_BPLED1/Core/Inc/stm32l1xx_it.h
new file mode 100644
index 0000000..2c5eb24
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/stm32l1xx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_IT_H
+#define __STM32L1xx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_IT_H */
diff --git a/TP1_BPLED1/Core/Src/main.c b/TP1_BPLED1/Core/Src/main.c
new file mode 100644
index 0000000..495ab08
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/main.c
@@ -0,0 +1,252 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+//#define V1
+#define V2
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+void init_ports_LED(void);
+void init_ports_BP(void);
+void allume_LED(void);
+void eteint_LED(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+void init_ports_LED(void) {
+ GPIOB->ODR |= 1<<0;
+}
+
+void init_ports_BP(void) {
+ GPIOA->MODER &= ~(1<<11);
+}
+
+void allume_LED(void) {
+ GPIOB->ODR |= (1<<0);
+}
+
+void eteint_LED(void) {
+ GPIOB->ODR &= ~(1<<0);
+}
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ /* USER CODE BEGIN 2 */
+ init_ports_LED();
+ init_ports_BP();
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+#ifdef V1
+ if ((GPIOA->IDR & (1 << 11)) == 0) {
+ allume_LED();
+ HAL_Delay(1000);
+ } else {
+ eteint_LED();
+ HAL_Delay(1000);
+ }
+#endif
+#ifdef V2
+ uint32_t bit_state = (GPIOA->IDR >> 11) & 1;
+
+ GPIOB->BSRR = (1 << 16) | (bit_state << 0);
+#endif
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+ /* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin : PB0 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PA11 */
+ GPIO_InitStruct.Pin = GPIO_PIN_11;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+ /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c b/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c
new file mode 100644
index 0000000..869ce28
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c
@@ -0,0 +1,83 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_COMP_CLK_ENABLE();
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/TP1_BPLED1/Core/Src/stm32l1xx_it.c b/TP1_BPLED1/Core/Src/stm32l1xx_it.c
new file mode 100644
index 0000000..afd5dcc
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/stm32l1xx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l1xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M3 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVC_IRQn 0 */
+
+ /* USER CODE END SVC_IRQn 0 */
+ /* USER CODE BEGIN SVC_IRQn 1 */
+
+ /* USER CODE END SVC_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L1xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32l1xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/TP1_BPLED1/Core/Src/syscalls.c b/TP1_BPLED1/Core/Src/syscalls.c
new file mode 100644
index 0000000..8884b5a
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/TP1_BPLED1/Core/Src/sysmem.c b/TP1_BPLED1/Core/Src/sysmem.c
new file mode 100644
index 0000000..5d9f7e6
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/TP1_BPLED1/Core/Src/system_stm32l1xx.c b/TP1_BPLED1/Core/Src/system_stm32l1xx.c
new file mode 100644
index 0000000..093a38b
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/system_stm32l1xx.c
@@ -0,0 +1,428 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l1xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l1xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32l1xx_system
+ * @{
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32l1xx.h"
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Defines
+ * @{
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Default value of the Internal oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSI_VALUE */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+ on STM32L152D_EVAL board as data memory */
+/* #define DATA_IN_ExtSRAM */
+
+/* Note: Following vector table addresses must be defined in line with linker
+ configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+ anywhere in Flash or Sram, else the vector table is kept at the automatic
+ remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+ in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
+
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 2097000U;
+const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
+const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * Initialize the Embedded Flash Interface, the PLL and update the
+ * SystemCoreClock variable.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+#ifdef DATA_IN_ExtSRAM
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM */
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+ * @brief Update SystemCoreClock according to Clock Register Values
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
+ * value as defined by the MSI range.
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate (void)
+{
+ uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00: /* MSI used as system clock */
+ msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+ SystemCoreClock = (32768 * (1 << (msirange + 1)));
+ break;
+ case 0x04: /* HSI used as system clock */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x08: /* HSE used as system clock */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x0C: /* PLL used as system clock */
+ /* Get PLL clock source and multiplication factor ----------------------*/
+ pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
+ plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
+ pllmul = PLLMulTable[(pllmul >> 18)];
+ plldiv = (plldiv >> 22) + 1;
+
+ pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+
+ if (pllsource == 0x00)
+ {
+ /* HSI oscillator clock selected as PLL clock entry */
+ SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
+ }
+ else
+ {
+ /* HSE selected as PLL clock entry */
+ SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
+ }
+ break;
+ default: /* MSI used as system clock */
+ msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+ SystemCoreClock = (32768 * (1 << (msirange + 1)));
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+/**
+ * @brief Setup the external memory controller.
+ * Called in SystemInit() function before jump to main.
+ * This function configures the external SRAM mounted on STM32L152D_EVAL board
+ * This SRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmpreg = 0;
+
+ /* Flash 1 wait state */
+ FLASH->ACR |= FLASH_ACR_LATENCY;
+
+ /* Power enable */
+ RCC->APB1ENR |= RCC_APB1ENR_PWREN;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
+
+ /* Select the Voltage Range 1 (1.8 V) */
+ PWR->CR = PWR_CR_VOS_0;
+
+ /* Wait Until the Voltage Regulator is ready */
+ while((PWR->CSR & PWR_CSR_VOSF) != RESET)
+ {
+ }
+
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ + SRAM pins assignment +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
+ | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
+ | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
+ | PD15 <-> FSMC_D1 |--------------------+
+ +-------------------+
+*/
+
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+ RCC->AHBENR = 0x000080D8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
+
+ /* Connect PDx pins to FSMC Alternate function */
+ GPIOD->AFR[0] = 0x00CC00CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A0A;
+ /* Configure PDx pins speed to 40 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0F0F;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FSMC Alternate function */
+ GPIOE->AFR[0] = 0xC00000CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA800A;
+ /* Configure PEx pins speed to 40 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC00F;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FSMC Alternate function */
+ GPIOF->AFR[0] = 0x00CCCCCC;
+ GPIOF->AFR[1] = 0xCCCC0000;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA000AAA;
+ /* Configure PFx pins speed to 40 MHz */
+ GPIOF->OSPEEDR = 0xFF000FFF;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FSMC Alternate function */
+ GPIOG->AFR[0] = 0x00CCCCCC;
+ GPIOG->AFR[1] = 0x00000C00;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0x00200AAA;
+ /* Configure PGx pins speed to 40 MHz */
+ GPIOG->OSPEEDR = 0x00300FFF;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+/*-- FSMC Configuration ------------------------------------------------------*/
+ /* Enable the FSMC interface clock */
+ RCC->AHBENR = 0x400080D8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
+
+ (void)(tmpreg);
+
+ /* Configure and enable Bank1_SRAM3 */
+ FSMC_Bank1->BTCR[4] = 0x00001011;
+ FSMC_Bank1->BTCR[5] = 0x00000300;
+ FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
+/*
+ Bank1_SRAM3 is configured as follow:
+
+ p.FSMC_AddressSetupTime = 0;
+ p.FSMC_AddressHoldTime = 0;
+ p.FSMC_DataSetupTime = 3;
+ p.FSMC_BusTurnAroundDuration = 0;
+ p.FSMC_CLKDivision = 0;
+ p.FSMC_DataLatency = 0;
+ p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+ FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
+ FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+ FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+ FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+ FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+ FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+
+ FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
+
+ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
+*/
+
+}
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s b/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s
new file mode 100644
index 0000000..d3dd841
--- /dev/null
+++ b/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s
@@ -0,0 +1,413 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32l152xe.s
+ * @author MCD Application Team
+ * @brief STM32L152XE Devices vector table for GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M3 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF108F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_IRQHandler
+ .word TAMPER_STAMP_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word DAC_IRQHandler
+ .word COMP_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word LCD_IRQHandler
+ .word TIM9_IRQHandler
+ .word TIM10_IRQHandler
+ .word TIM11_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USB_FS_WKUP_IRQHandler
+ .word TIM6_IRQHandler
+ .word TIM7_IRQHandler
+ .word 0
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word 0
+ .word COMP_ACQ_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word BootRAM /* @0x108. This is for boot in RAM mode for
+ STM32L152XE devices. */
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_IRQHandler
+ .thumb_set PVD_IRQHandler,Default_Handler
+
+ .weak TAMPER_STAMP_IRQHandler
+ .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak DAC_IRQHandler
+ .thumb_set DAC_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak LCD_IRQHandler
+ .thumb_set LCD_IRQHandler,Default_Handler
+
+ .weak TIM9_IRQHandler
+ .thumb_set TIM9_IRQHandler,Default_Handler
+
+ .weak TIM10_IRQHandler
+ .thumb_set TIM10_IRQHandler,Default_Handler
+
+ .weak TIM11_IRQHandler
+ .thumb_set TIM11_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USB_FS_WKUP_IRQHandler
+ .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
+
+ .weak TIM6_IRQHandler
+ .thumb_set TIM6_IRQHandler,Default_Handler
+
+ .weak TIM7_IRQHandler
+ .thumb_set TIM7_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak COMP_ACQ_IRQHandler
+ .thumb_set COMP_ACQ_IRQHandler,Default_Handler
+
+
+
diff --git a/TP1_BPLED1/Debug/Core/Src/main.cyclo b/TP1_BPLED1/Debug/Core/Src/main.cyclo
new file mode 100644
index 0000000..4bdfdfa
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/main.cyclo
@@ -0,0 +1,8 @@
+../Core/Src/main.c:63:6:init_ports_LED 1
+../Core/Src/main.c:67:6:init_ports_BP 1
+../Core/Src/main.c:71:6:allume_LED 1
+../Core/Src/main.c:75:6:eteint_LED 1
+../Core/Src/main.c:84:5:main 1
+../Core/Src/main.c:144:6:SystemClock_Config 3
+../Core/Src/main.c:186:13:MX_GPIO_Init 1
+../Core/Src/main.c:226:6:Error_Handler 1
diff --git a/TP1_BPLED1/Debug/Core/Src/main.d b/TP1_BPLED1/Debug/Core/Src/main.d
new file mode 100644
index 0000000..6776fdf
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/main.d
@@ -0,0 +1,50 @@
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Core/Inc/main.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Core/Src/main.o b/TP1_BPLED1/Debug/Core/Src/main.o
new file mode 100644
index 0000000..da9a65e
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/main.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/main.su b/TP1_BPLED1/Debug/Core/Src/main.su
new file mode 100644
index 0000000..9d2435c
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/main.su
@@ -0,0 +1,8 @@
+../Core/Src/main.c:63:6:init_ports_LED 4 static
+../Core/Src/main.c:67:6:init_ports_BP 4 static
+../Core/Src/main.c:71:6:allume_LED 4 static
+../Core/Src/main.c:75:6:eteint_LED 4 static
+../Core/Src/main.c:84:5:main 16 static
+../Core/Src/main.c:144:6:SystemClock_Config 80 static
+../Core/Src/main.c:186:13:MX_GPIO_Init 40 static
+../Core/Src/main.c:226:6:Error_Handler 4 static,ignoring_inline_asm
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.cyclo b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.cyclo
new file mode 100644
index 0000000..5427753
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.cyclo
@@ -0,0 +1 @@
+../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 1
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.d b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.d
new file mode 100644
index 0000000..b86bed9
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.d
@@ -0,0 +1,50 @@
+Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c \
+ ../Core/Inc/main.h ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Core/Inc/main.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.o b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.o
new file mode 100644
index 0000000..84daefa
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.su b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.su
new file mode 100644
index 0000000..fc8ad2b
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.su
@@ -0,0 +1 @@
+../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 24 static
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.cyclo b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.cyclo
new file mode 100644
index 0000000..79351de
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.cyclo
@@ -0,0 +1,9 @@
+../Core/Src/stm32l1xx_it.c:69:6:NMI_Handler 1
+../Core/Src/stm32l1xx_it.c:84:6:HardFault_Handler 1
+../Core/Src/stm32l1xx_it.c:99:6:MemManage_Handler 1
+../Core/Src/stm32l1xx_it.c:114:6:BusFault_Handler 1
+../Core/Src/stm32l1xx_it.c:129:6:UsageFault_Handler 1
+../Core/Src/stm32l1xx_it.c:144:6:SVC_Handler 1
+../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 1
+../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 1
+../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 1
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.d b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.d
new file mode 100644
index 0000000..ab16ec3
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.d
@@ -0,0 +1,52 @@
+Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c ../Core/Inc/main.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
+ ../Core/Inc/stm32l1xx_it.h
+../Core/Inc/main.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
+../Core/Inc/stm32l1xx_it.h:
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.o b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.o
new file mode 100644
index 0000000..7693d87
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.su b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.su
new file mode 100644
index 0000000..affde81
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.su
@@ -0,0 +1,9 @@
+../Core/Src/stm32l1xx_it.c:69:6:NMI_Handler 4 static
+../Core/Src/stm32l1xx_it.c:84:6:HardFault_Handler 4 static
+../Core/Src/stm32l1xx_it.c:99:6:MemManage_Handler 4 static
+../Core/Src/stm32l1xx_it.c:114:6:BusFault_Handler 4 static
+../Core/Src/stm32l1xx_it.c:129:6:UsageFault_Handler 4 static
+../Core/Src/stm32l1xx_it.c:144:6:SVC_Handler 4 static
+../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 4 static
+../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 4 static
+../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 8 static
diff --git a/TP1_BPLED1/Debug/Core/Src/subdir.mk b/TP1_BPLED1/Debug/Core/Src/subdir.mk
new file mode 100644
index 0000000..397cf6f
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/subdir.mk
@@ -0,0 +1,42 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Core/Src/main.c \
+../Core/Src/stm32l1xx_hal_msp.c \
+../Core/Src/stm32l1xx_it.c \
+../Core/Src/syscalls.c \
+../Core/Src/sysmem.c \
+../Core/Src/system_stm32l1xx.c
+
+OBJS += \
+./Core/Src/main.o \
+./Core/Src/stm32l1xx_hal_msp.o \
+./Core/Src/stm32l1xx_it.o \
+./Core/Src/syscalls.o \
+./Core/Src/sysmem.o \
+./Core/Src/system_stm32l1xx.o
+
+C_DEPS += \
+./Core/Src/main.d \
+./Core/Src/stm32l1xx_hal_msp.d \
+./Core/Src/stm32l1xx_it.d \
+./Core/Src/syscalls.d \
+./Core/Src/sysmem.d \
+./Core/Src/system_stm32l1xx.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32L152xE -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Core-2f-Src
+
+clean-Core-2f-Src:
+ -$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32l1xx_hal_msp.cyclo ./Core/Src/stm32l1xx_hal_msp.d ./Core/Src/stm32l1xx_hal_msp.o ./Core/Src/stm32l1xx_hal_msp.su ./Core/Src/stm32l1xx_it.cyclo ./Core/Src/stm32l1xx_it.d ./Core/Src/stm32l1xx_it.o ./Core/Src/stm32l1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32l1xx.cyclo ./Core/Src/system_stm32l1xx.d ./Core/Src/system_stm32l1xx.o ./Core/Src/system_stm32l1xx.su
+
+.PHONY: clean-Core-2f-Src
+
diff --git a/TP1_BPLED1/Debug/Core/Src/syscalls.cyclo b/TP1_BPLED1/Debug/Core/Src/syscalls.cyclo
new file mode 100644
index 0000000..6cbfdd0
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/syscalls.cyclo
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
+../Core/Src/syscalls.c:48:5:_getpid 1
+../Core/Src/syscalls.c:53:5:_kill 1
+../Core/Src/syscalls.c:61:6:_exit 1
+../Core/Src/syscalls.c:67:27:_read 2
+../Core/Src/syscalls.c:80:27:_write 2
+../Core/Src/syscalls.c:92:5:_close 1
+../Core/Src/syscalls.c:99:5:_fstat 1
+../Core/Src/syscalls.c:106:5:_isatty 1
+../Core/Src/syscalls.c:112:5:_lseek 1
+../Core/Src/syscalls.c:120:5:_open 1
+../Core/Src/syscalls.c:128:5:_wait 1
+../Core/Src/syscalls.c:135:5:_unlink 1
+../Core/Src/syscalls.c:142:5:_times 1
+../Core/Src/syscalls.c:148:5:_stat 1
+../Core/Src/syscalls.c:155:5:_link 1
+../Core/Src/syscalls.c:163:5:_fork 1
+../Core/Src/syscalls.c:169:5:_execve 1
diff --git a/TP1_BPLED1/Debug/Core/Src/syscalls.d b/TP1_BPLED1/Debug/Core/Src/syscalls.d
new file mode 100644
index 0000000..8667c70
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/syscalls.d
@@ -0,0 +1 @@
+Core/Src/syscalls.o: ../Core/Src/syscalls.c
diff --git a/TP1_BPLED1/Debug/Core/Src/syscalls.o b/TP1_BPLED1/Debug/Core/Src/syscalls.o
new file mode 100644
index 0000000..72fd5c9
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/syscalls.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/syscalls.su b/TP1_BPLED1/Debug/Core/Src/syscalls.su
new file mode 100644
index 0000000..50b547a
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/syscalls.su
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
+../Core/Src/syscalls.c:48:5:_getpid 4 static
+../Core/Src/syscalls.c:53:5:_kill 16 static
+../Core/Src/syscalls.c:61:6:_exit 16 static
+../Core/Src/syscalls.c:67:27:_read 32 static
+../Core/Src/syscalls.c:80:27:_write 32 static
+../Core/Src/syscalls.c:92:5:_close 16 static
+../Core/Src/syscalls.c:99:5:_fstat 16 static
+../Core/Src/syscalls.c:106:5:_isatty 16 static
+../Core/Src/syscalls.c:112:5:_lseek 24 static
+../Core/Src/syscalls.c:120:5:_open 12 static
+../Core/Src/syscalls.c:128:5:_wait 16 static
+../Core/Src/syscalls.c:135:5:_unlink 16 static
+../Core/Src/syscalls.c:142:5:_times 16 static
+../Core/Src/syscalls.c:148:5:_stat 16 static
+../Core/Src/syscalls.c:155:5:_link 16 static
+../Core/Src/syscalls.c:163:5:_fork 8 static
+../Core/Src/syscalls.c:169:5:_execve 24 static
diff --git a/TP1_BPLED1/Debug/Core/Src/sysmem.cyclo b/TP1_BPLED1/Debug/Core/Src/sysmem.cyclo
new file mode 100644
index 0000000..0090c10
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/sysmem.cyclo
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk 3
diff --git a/TP1_BPLED1/Debug/Core/Src/sysmem.d b/TP1_BPLED1/Debug/Core/Src/sysmem.d
new file mode 100644
index 0000000..74fecf9
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/sysmem.d
@@ -0,0 +1 @@
+Core/Src/sysmem.o: ../Core/Src/sysmem.c
diff --git a/TP1_BPLED1/Debug/Core/Src/sysmem.o b/TP1_BPLED1/Debug/Core/Src/sysmem.o
new file mode 100644
index 0000000..f6d55fc
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/sysmem.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/sysmem.su b/TP1_BPLED1/Debug/Core/Src/sysmem.su
new file mode 100644
index 0000000..12d5f17
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/sysmem.su
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk 32 static
diff --git a/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.cyclo b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.cyclo
new file mode 100644
index 0000000..4f4c23e
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.cyclo
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32l1xx.c:161:6:SystemInit 1
+../Core/Src/system_stm32l1xx.c:211:6:SystemCoreClockUpdate 6
diff --git a/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.d b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.d
new file mode 100644
index 0000000..a101aff
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.d
@@ -0,0 +1,49 @@
+Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.o b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.o
new file mode 100644
index 0000000..5a2a5e5
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.o differ
diff --git a/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.su b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.su
new file mode 100644
index 0000000..7b26053
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.su
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32l1xx.c:161:6:SystemInit 4 static
+../Core/Src/system_stm32l1xx.c:211:6:SystemCoreClockUpdate 32 static
diff --git a/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.d b/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.d
new file mode 100644
index 0000000..98bd1c7
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.d
@@ -0,0 +1,2 @@
+Core/Startup/startup_stm32l152retx.o: \
+ ../Core/Startup/startup_stm32l152retx.s
diff --git a/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.o b/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.o
new file mode 100644
index 0000000..0420599
Binary files /dev/null and b/TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.o differ
diff --git a/TP1_BPLED1/Debug/Core/Startup/subdir.mk b/TP1_BPLED1/Debug/Core/Startup/subdir.mk
new file mode 100644
index 0000000..2bd1fed
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Startup/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+S_SRCS += \
+../Core/Startup/startup_stm32l152retx.s
+
+OBJS += \
+./Core/Startup/startup_stm32l152retx.o
+
+S_DEPS += \
+./Core/Startup/startup_stm32l152retx.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
+ arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
+
+clean: clean-Core-2f-Startup
+
+clean-Core-2f-Startup:
+ -$(RM) ./Core/Startup/startup_stm32l152retx.d ./Core/Startup/startup_stm32l152retx.o
+
+.PHONY: clean-Core-2f-Startup
+
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo
new file mode 100644
index 0000000..8184382
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo
@@ -0,0 +1,25 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:140:19:HAL_Init 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:173:19:HAL_DeInit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:196:13:HAL_MspInit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:207:13:HAL_MspDeInit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:230:26:HAL_InitTick 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:298:13:HAL_IncTick 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:309:17:HAL_GetTick 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:318:10:HAL_GetTickPrio 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:328:19:HAL_SetTickFreq 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:361:10:HAL_GetTickFreq 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:377:13:HAL_Delay 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:403:13:HAL_SuspendTick 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:419:13:HAL_ResumeTick 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:429:10:HAL_GetHalVersion 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:438:10:HAL_GetREVID 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:447:10:HAL_GetDEVID 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:456:10:HAL_GetUIDw0 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:465:10:HAL_GetUIDw1 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:474:10:HAL_GetUIDw2 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:503:6:HAL_DBGMCU_EnableDBGSleepMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:512:6:HAL_DBGMCU_DisableDBGSleepMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:521:6:HAL_DBGMCU_EnableDBGStopMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:530:6:HAL_DBGMCU_DisableDBGStopMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:539:6:HAL_DBGMCU_EnableDBGStandbyMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:548:6:HAL_DBGMCU_DisableDBGStandbyMode 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d
new file mode 100644
index 0000000..7ac3f25
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
new file mode 100644
index 0000000..9cb97e0
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su
new file mode 100644
index 0000000..dec4a76
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su
@@ -0,0 +1,25 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:140:19:HAL_Init 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:173:19:HAL_DeInit 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:196:13:HAL_MspInit 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:207:13:HAL_MspDeInit 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:230:26:HAL_InitTick 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:298:13:HAL_IncTick 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:309:17:HAL_GetTick 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:318:10:HAL_GetTickPrio 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:328:19:HAL_SetTickFreq 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:361:10:HAL_GetTickFreq 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:377:13:HAL_Delay 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:403:13:HAL_SuspendTick 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:419:13:HAL_ResumeTick 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:429:10:HAL_GetHalVersion 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:438:10:HAL_GetREVID 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:447:10:HAL_GetDEVID 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:456:10:HAL_GetUIDw0 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:465:10:HAL_GetUIDw1 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:474:10:HAL_GetUIDw2 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:503:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:512:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:521:6:HAL_DBGMCU_EnableDBGStopMode 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:530:6:HAL_DBGMCU_DisableDBGStopMode 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:539:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:548:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo
new file mode 100644
index 0000000..7f5d6ef
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo
@@ -0,0 +1,34 @@
+../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 1
+../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 1
+../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ 2
+../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ 2
+../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive 2
+../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority 2
+../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority 2
+../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority 2
+../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority 2
+../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 1
+../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:212:6:HAL_NVIC_EnableIRQ 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:228:6:HAL_NVIC_DisableIRQ 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:241:6:HAL_NVIC_SystemReset 0
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:254:10:HAL_SYSTICK_Config 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:290:6:HAL_MPU_Enable 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:304:6:HAL_MPU_Disable 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:317:6:HAL_MPU_EnableRegion 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:333:6:HAL_MPU_DisableRegion 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:351:6:HAL_MPU_ConfigRegion 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:389:10:HAL_NVIC_GetPriorityGrouping 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:416:6:HAL_NVIC_GetPriority 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:431:6:HAL_NVIC_SetPendingIRQ 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:446:10:HAL_NVIC_GetPendingIRQ 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:459:6:HAL_NVIC_ClearPendingIRQ 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:473:10:HAL_NVIC_GetActive 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:487:6:HAL_SYSTICK_CLKSourceConfig 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:505:6:HAL_SYSTICK_IRQHandler 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:514:13:HAL_SYSTICK_Callback 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d
new file mode 100644
index 0000000..78c7a4a
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
new file mode 100644
index 0000000..9610a5a
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su
new file mode 100644
index 0000000..131741d
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su
@@ -0,0 +1,34 @@
+../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 24 static
+../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 4 static
+../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority 16 static
+../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority 40 static
+../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority 40 static
+../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:212:6:HAL_NVIC_EnableIRQ 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:228:6:HAL_NVIC_DisableIRQ 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:241:6:HAL_NVIC_SystemReset 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:254:10:HAL_SYSTICK_Config 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:290:6:HAL_MPU_Enable 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:304:6:HAL_MPU_Disable 4 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:317:6:HAL_MPU_EnableRegion 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:333:6:HAL_MPU_DisableRegion 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:351:6:HAL_MPU_ConfigRegion 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:389:10:HAL_NVIC_GetPriorityGrouping 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:416:6:HAL_NVIC_GetPriority 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:431:6:HAL_NVIC_SetPendingIRQ 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:446:10:HAL_NVIC_GetPendingIRQ 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:459:6:HAL_NVIC_ClearPendingIRQ 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:473:10:HAL_NVIC_GetActive 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:487:6:HAL_SYSTICK_CLKSourceConfig 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:505:6:HAL_SYSTICK_IRQHandler 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:514:13:HAL_SYSTICK_Callback 4 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.cyclo
new file mode 100644
index 0000000..7a3ffe2
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.cyclo
@@ -0,0 +1,13 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:144:19:HAL_DMA_Init 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:223:19:HAL_DMA_DeInit 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:315:19:HAL_DMA_Start 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:358:19:HAL_DMA_Start_IT 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:413:19:HAL_DMA_Abort 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:454:19:HAL_DMA_Abort_IT 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:499:19:HAL_DMA_PollForTransfer 10
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:600:6:HAL_DMA_IRQHandler 12
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:697:19:HAL_DMA_RegisterCallback 7
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:748:19:HAL_DMA_UnRegisterCallback 8
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:826:22:HAL_DMA_GetState 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:838:10:HAL_DMA_GetError 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:864:13:DMA_SetConfig 2
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d
new file mode 100644
index 0000000..0ffe504
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o
new file mode 100644
index 0000000..ba333b6
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su
new file mode 100644
index 0000000..623b836
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su
@@ -0,0 +1,13 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:144:19:HAL_DMA_Init 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:223:19:HAL_DMA_DeInit 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:315:19:HAL_DMA_Start 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:358:19:HAL_DMA_Start_IT 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:413:19:HAL_DMA_Abort 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:454:19:HAL_DMA_Abort_IT 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:499:19:HAL_DMA_PollForTransfer 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:600:6:HAL_DMA_IRQHandler 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:697:19:HAL_DMA_RegisterCallback 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:748:19:HAL_DMA_UnRegisterCallback 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:826:22:HAL_DMA_GetState 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:838:10:HAL_DMA_GetError 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c:864:13:DMA_SetConfig 24 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.cyclo
new file mode 100644
index 0000000..c8dc847
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 9
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 9
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:466:10:HAL_EXTI_GetPending 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d
new file mode 100644
index 0000000..522bc6b
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o
new file mode 100644
index 0000000..ad1a60d
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su
new file mode 100644
index 0000000..60ab396
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su
@@ -0,0 +1,9 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:466:10:HAL_EXTI_GetPending 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 24 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.cyclo
new file mode 100644
index 0000000..f6e8b03
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.cyclo
@@ -0,0 +1,13 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:229:19:HAL_FLASH_Program 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:271:19:HAL_FLASH_Program_IT 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:302:6:HAL_FLASH_IRQHandler 12
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:417:13:HAL_FLASH_EndOfOperationCallback 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:434:13:HAL_FLASH_OperationErrorCallback 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:467:19:HAL_FLASH_Unlock 5
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:502:19:HAL_FLASH_Lock 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:514:19:HAL_FLASH_OB_Unlock 5
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:550:19:HAL_FLASH_OB_Lock 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:563:19:HAL_FLASH_OB_Launch 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:595:10:HAL_FLASH_GetError 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:617:19:FLASH_WaitForLastOperation 11
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:668:13:FLASH_SetErrorCode 6
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d
new file mode 100644
index 0000000..6d305a9
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o
new file mode 100644
index 0000000..db15f16
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su
new file mode 100644
index 0000000..e235edd
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su
@@ -0,0 +1,13 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:229:19:HAL_FLASH_Program 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:271:19:HAL_FLASH_Program_IT 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:302:6:HAL_FLASH_IRQHandler 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:417:13:HAL_FLASH_EndOfOperationCallback 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:434:13:HAL_FLASH_OperationErrorCallback 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:467:19:HAL_FLASH_Unlock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:502:19:HAL_FLASH_Lock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:514:19:HAL_FLASH_OB_Unlock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:550:19:HAL_FLASH_OB_Lock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:563:19:HAL_FLASH_OB_Launch 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:595:10:HAL_FLASH_GetError 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:617:19:FLASH_WaitForLastOperation 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c:668:13:FLASH_SetErrorCode 16 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.cyclo
new file mode 100644
index 0000000..8ebac3a
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.cyclo
@@ -0,0 +1,31 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:185:19:HAL_FLASHEx_Erase 5
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:281:19:HAL_FLASHEx_Erase_IT 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:404:19:HAL_FLASHEx_OBProgram 11
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:486:6:HAL_FLASHEx_OBGetConfig 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:540:19:HAL_FLASHEx_AdvOBProgram 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:597:6:HAL_FLASHEx_AdvOBGetConfig 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:749:19:HAL_FLASHEx_DATAEEPROM_Unlock 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:768:19:HAL_FLASHEx_DATAEEPROM_Lock 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:788:19:HAL_FLASHEx_DATAEEPROM_Erase 5
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:846:21:HAL_FLASHEx_DATAEEPROM_Program 9
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:911:6:HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:920:6:HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:956:26:FLASH_OB_RDPConfig 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1020:26:FLASH_OB_BORConfig 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1058:16:FLASH_OB_GetUser 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1072:16:FLASH_OB_GetRDP 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1090:16:FLASH_OB_GetBOR 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1104:26:FLASH_OB_WRPConfig 6
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1235:13:FLASH_OB_WRPConfigWRP1OrPCROP1 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1281:13:FLASH_OB_WRPConfigWRP2OrPCROP2 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1327:13:FLASH_OB_WRPConfigWRP3 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1372:13:FLASH_OB_WRPConfigWRP4 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1422:26:FLASH_OB_UserConfig 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1475:26:FLASH_OB_BootConfig 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1524:26:FLASH_DATAEEPROM_FastProgramByte 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1584:26:FLASH_DATAEEPROM_FastProgramHalfWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1652:26:FLASH_DATAEEPROM_FastProgramWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1683:26:FLASH_DATAEEPROM_ProgramByte 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1737:26:FLASH_DATAEEPROM_ProgramHalfWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1798:26:FLASH_DATAEEPROM_ProgramWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1843:6:FLASH_PageErase 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d
new file mode 100644
index 0000000..3b13729
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o
new file mode 100644
index 0000000..ac043c3
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su
new file mode 100644
index 0000000..2d287b1
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su
@@ -0,0 +1,31 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:185:19:HAL_FLASHEx_Erase 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:281:19:HAL_FLASHEx_Erase_IT 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:404:19:HAL_FLASHEx_OBProgram 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:486:6:HAL_FLASHEx_OBGetConfig 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:540:19:HAL_FLASHEx_AdvOBProgram 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:597:6:HAL_FLASHEx_AdvOBGetConfig 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:749:19:HAL_FLASHEx_DATAEEPROM_Unlock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:768:19:HAL_FLASHEx_DATAEEPROM_Lock 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:788:19:HAL_FLASHEx_DATAEEPROM_Erase 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:846:21:HAL_FLASHEx_DATAEEPROM_Program 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:911:6:HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:920:6:HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:956:26:FLASH_OB_RDPConfig 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1020:26:FLASH_OB_BORConfig 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1058:16:FLASH_OB_GetUser 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1072:16:FLASH_OB_GetRDP 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1090:16:FLASH_OB_GetBOR 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1104:26:FLASH_OB_WRPConfig 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1235:13:FLASH_OB_WRPConfigWRP1OrPCROP1 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1281:13:FLASH_OB_WRPConfigWRP2OrPCROP2 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1327:13:FLASH_OB_WRPConfigWRP3 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1372:13:FLASH_OB_WRPConfigWRP4 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1422:26:FLASH_OB_UserConfig 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1475:26:FLASH_OB_BootConfig 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1524:26:FLASH_DATAEEPROM_FastProgramByte 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1584:26:FLASH_DATAEEPROM_FastProgramHalfWord 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1652:26:FLASH_DATAEEPROM_FastProgramWord 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1683:26:FLASH_DATAEEPROM_ProgramByte 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1737:26:FLASH_DATAEEPROM_ProgramHalfWord 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1798:26:FLASH_DATAEEPROM_ProgramWord 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c:1843:6:FLASH_PageErase 16 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.cyclo
new file mode 100644
index 0000000..569838d
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.cyclo
@@ -0,0 +1,10 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:113:30:HAL_FLASHEx_EnableRunPowerDown 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:126:30:HAL_FLASHEx_DisableRunPowerDown 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:163:30:HAL_FLASHEx_EraseParallelPage 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:224:30:HAL_FLASHEx_ProgramParallelHalfPage 4
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:302:30:HAL_FLASHEx_HalfPageProgram 3
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:394:30:HAL_FLASHEx_GetError 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:426:30:HAL_FLASHEx_DATAEEPROM_EraseDoubleWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:486:30:HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:586:37:FLASHRAM_WaitForLastOperation 9
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:540:37:FLASHRAM_SetErrorCode 5
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d
new file mode 100644
index 0000000..ba3f808
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o
new file mode 100644
index 0000000..53d8076
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su
new file mode 100644
index 0000000..09e2138
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su
@@ -0,0 +1,10 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:113:30:HAL_FLASHEx_EnableRunPowerDown 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:126:30:HAL_FLASHEx_DisableRunPowerDown 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:163:30:HAL_FLASHEx_EraseParallelPage 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:224:30:HAL_FLASHEx_ProgramParallelHalfPage 48 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:302:30:HAL_FLASHEx_HalfPageProgram 40 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:394:30:HAL_FLASHEx_GetError 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:426:30:HAL_FLASHEx_DATAEEPROM_EraseDoubleWord 32 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:486:30:HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord 40 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:586:37:FLASHRAM_WaitForLastOperation 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:540:37:FLASHRAM_SetErrorCode 16 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.cyclo
new file mode 100644
index 0000000..e47145d
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:170:6:HAL_GPIO_Init 19
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:301:6:HAL_GPIO_DeInit 11
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:381:15:HAL_GPIO_ReadPin 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:413:6:HAL_GPIO_WritePin 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:435:6:HAL_GPIO_TogglePin 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:469:19:HAL_GPIO_LockPin 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:504:6:HAL_GPIO_EXTI_IRQHandler 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:519:13:HAL_GPIO_EXTI_Callback 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d
new file mode 100644
index 0000000..8c34861
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
new file mode 100644
index 0000000..5eb5dd6
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su
new file mode 100644
index 0000000..0081dee
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su
@@ -0,0 +1,8 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:170:6:HAL_GPIO_Init 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:301:6:HAL_GPIO_DeInit 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:381:15:HAL_GPIO_ReadPin 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:413:6:HAL_GPIO_WritePin 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:435:6:HAL_GPIO_TogglePin 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:469:19:HAL_GPIO_LockPin 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:504:6:HAL_GPIO_EXTI_IRQHandler 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:519:13:HAL_GPIO_EXTI_Callback 16 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo
new file mode 100644
index 0000000..31779a7
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo
@@ -0,0 +1,17 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:84:6:HAL_PWR_DeInit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:97:6:HAL_PWR_EnableBkUpAccess 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:110:6:HAL_PWR_DisableBkUpAccess 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:338:6:HAL_PWR_ConfigPVD 5
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:380:6:HAL_PWR_EnablePVD 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:390:6:HAL_PWR_DisablePVD 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:405:6:HAL_PWR_EnableWakeUpPin 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:422:6:HAL_PWR_DisableWakeUpPin 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:445:6:HAL_PWR_EnterSLEEPMode 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:494:6:HAL_PWR_EnterSTOPMode 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:534:6:HAL_PWR_EnterSTANDBYMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:559:6:HAL_PWR_EnableSleepOnExit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:572:6:HAL_PWR_DisableSleepOnExit 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:585:6:HAL_PWR_EnableSEVOnPend 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:598:6:HAL_PWR_DisableSEVOnPend 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:611:6:HAL_PWR_PVD_IRQHandler 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:628:13:HAL_PWR_PVDCallback 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d
new file mode 100644
index 0000000..5c32e72
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o
new file mode 100644
index 0000000..350c534
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su
new file mode 100644
index 0000000..0927141
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su
@@ -0,0 +1,17 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:84:6:HAL_PWR_DeInit 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:97:6:HAL_PWR_EnableBkUpAccess 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:110:6:HAL_PWR_DisableBkUpAccess 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:338:6:HAL_PWR_ConfigPVD 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:380:6:HAL_PWR_EnablePVD 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:390:6:HAL_PWR_DisablePVD 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:405:6:HAL_PWR_EnableWakeUpPin 24 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:422:6:HAL_PWR_DisableWakeUpPin 24 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:445:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:494:6:HAL_PWR_EnterSTOPMode 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:534:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:559:6:HAL_PWR_EnableSleepOnExit 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:572:6:HAL_PWR_DisableSleepOnExit 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:585:6:HAL_PWR_EnableSEVOnPend 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:598:6:HAL_PWR_DisableSEVOnPend 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:611:6:HAL_PWR_PVD_IRQHandler 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:628:13:HAL_PWR_PVDCallback 4 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.cyclo
new file mode 100644
index 0000000..67dc12f
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.cyclo
@@ -0,0 +1,7 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:65:10:HAL_PWREx_GetVoltageRange 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:78:6:HAL_PWREx_EnableFastWakeUp 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:88:6:HAL_PWREx_DisableFastWakeUp 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:98:6:HAL_PWREx_EnableUltraLowPower 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:108:6:HAL_PWREx_DisableUltraLowPower 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:124:6:HAL_PWREx_EnableLowPowerRunMode 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:135:19:HAL_PWREx_DisableLowPowerRunMode 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d
new file mode 100644
index 0000000..5e111f2
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o
new file mode 100644
index 0000000..9e88f83
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su
new file mode 100644
index 0000000..b425b1d
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su
@@ -0,0 +1,7 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:65:10:HAL_PWREx_GetVoltageRange 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:78:6:HAL_PWREx_EnableFastWakeUp 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:88:6:HAL_PWREx_DisableFastWakeUp 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:98:6:HAL_PWREx_EnableUltraLowPower 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:108:6:HAL_PWREx_DisableUltraLowPower 16 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:124:6:HAL_PWREx_EnableLowPowerRunMode 24 static,ignoring_inline_asm
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:135:19:HAL_PWREx_DisableLowPowerRunMode 24 static,ignoring_inline_asm
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.cyclo
new file mode 100644
index 0000000..f4e8746
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.cyclo
@@ -0,0 +1,15 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:226:19:HAL_RCC_DeInit 8
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:322:19:HAL_RCC_OscConfig 73
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:797:19:HAL_RCC_ClockConfig 30
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1003:6:HAL_RCC_MCOConfig 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1040:6:HAL_RCC_EnableCSS 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1049:6:HAL_RCC_DisableCSS 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1084:10:HAL_RCC_GetSysClockFreq 6
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1140:10:HAL_RCC_GetHCLKFreq 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1151:10:HAL_RCC_GetPCLK1Freq 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1163:10:HAL_RCC_GetPCLK2Freq 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1176:6:HAL_RCC_GetOscConfig 9
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1272:6:HAL_RCC_GetClockConfig 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1302:6:HAL_RCC_NMI_IRQHandler 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1319:13:HAL_RCC_CSSCallback 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1344:26:RCC_SetFlashLatencyFromMSIRange 7
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d
new file mode 100644
index 0000000..a68b3f3
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
new file mode 100644
index 0000000..53153b5
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su
new file mode 100644
index 0000000..1364a7f
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su
@@ -0,0 +1,15 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:226:19:HAL_RCC_DeInit 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:322:19:HAL_RCC_OscConfig 40 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:797:19:HAL_RCC_ClockConfig 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1003:6:HAL_RCC_MCOConfig 48 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1040:6:HAL_RCC_EnableCSS 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1049:6:HAL_RCC_DisableCSS 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1084:10:HAL_RCC_GetSysClockFreq 88 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1140:10:HAL_RCC_GetHCLKFreq 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1151:10:HAL_RCC_GetPCLK1Freq 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1163:10:HAL_RCC_GetPCLK2Freq 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1176:6:HAL_RCC_GetOscConfig 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1272:6:HAL_RCC_GetClockConfig 16 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1302:6:HAL_RCC_NMI_IRQHandler 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1319:13:HAL_RCC_CSSCallback 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c:1344:26:RCC_SetFlashLatencyFromMSIRange 32 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.cyclo b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.cyclo
new file mode 100644
index 0000000..e67d81f
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:90:19:HAL_RCCEx_PeriphCLKConfig 24
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:229:6:HAL_RCCEx_GetPeriphCLKConfig 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:266:10:HAL_RCCEx_GetPeriphCLKFreq 12
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:358:6:HAL_RCCEx_EnableLSECSS 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:371:6:HAL_RCCEx_DisableLSECSS 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:385:6:HAL_RCCEx_EnableLSECSS_IT 1
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:402:6:HAL_RCCEx_LSECSS_IRQHandler 2
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:419:13:HAL_RCCEx_LSECSS_Callback 1
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d
new file mode 100644
index 0000000..fe64189
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d
@@ -0,0 +1,50 @@
+Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o: \
+ ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o
new file mode 100644
index 0000000..e2cc3cc
Binary files /dev/null and b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o differ
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su
new file mode 100644
index 0000000..fd9bbc1
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su
@@ -0,0 +1,8 @@
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:90:19:HAL_RCCEx_PeriphCLKConfig 32 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:229:6:HAL_RCCEx_GetPeriphCLKConfig 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:266:10:HAL_RCCEx_GetPeriphCLKFreq 24 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:358:6:HAL_RCCEx_EnableLSECSS 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:371:6:HAL_RCCEx_DisableLSECSS 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:385:6:HAL_RCCEx_EnableLSECSS_IT 4 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:402:6:HAL_RCCEx_LSECSS_IRQHandler 8 static
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c:419:13:HAL_RCCEx_LSECSS_Callback 4 static
diff --git a/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
new file mode 100644
index 0000000..3749973
--- /dev/null
+++ b/TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
@@ -0,0 +1,60 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c \
+../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c
+
+OBJS += \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o
+
+C_DEPS += \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d \
+./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Drivers/STM32L1xx_HAL_Driver/Src/%.o Drivers/STM32L1xx_HAL_Driver/Src/%.su Drivers/STM32L1xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32L1xx_HAL_Driver/Src/%.c Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32L152xE -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Drivers-2f-STM32L1xx_HAL_Driver-2f-Src
+
+clean-Drivers-2f-STM32L1xx_HAL_Driver-2f-Src:
+ -$(RM) ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.cyclo ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su
+
+.PHONY: clean-Drivers-2f-STM32L1xx_HAL_Driver-2f-Src
+
diff --git a/TP1_BPLED1/Debug/TP1_BPLED1.elf b/TP1_BPLED1/Debug/TP1_BPLED1.elf
new file mode 100755
index 0000000..eaf028d
Binary files /dev/null and b/TP1_BPLED1/Debug/TP1_BPLED1.elf differ
diff --git a/TP1_BPLED1/Debug/TP1_BPLED1.list b/TP1_BPLED1/Debug/TP1_BPLED1.list
new file mode 100644
index 0000000..5e2df4e
--- /dev/null
+++ b/TP1_BPLED1/Debug/TP1_BPLED1.list
@@ -0,0 +1,4045 @@
+
+TP1_BPLED1.elf: file format elf32-littlearm
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .isr_vector 0000013c 08000000 08000000 00001000 2**0
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 1 .text 00001794 0800013c 0800013c 0000113c 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 .rodata 0000001c 080018d0 080018d0 000028d0 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 3 .ARM.extab 00000000 080018ec 080018ec 0000300c 2**0
+ CONTENTS, READONLY
+ 4 .ARM 00000008 080018ec 080018ec 000028ec 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 5 .preinit_array 00000000 080018f4 080018f4 0000300c 2**0
+ CONTENTS, ALLOC, LOAD, DATA
+ 6 .init_array 00000004 080018f4 080018f4 000028f4 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 7 .fini_array 00000004 080018f8 080018f8 000028f8 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 8 .data 0000000c 20000000 080018fc 00003000 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 9 .bss 00000020 2000000c 08001908 0000300c 2**2
+ ALLOC
+ 10 ._user_heap_stack 00000604 2000002c 08001908 0000302c 2**0
+ ALLOC
+ 11 .ARM.attributes 00000029 00000000 00000000 0000300c 2**0
+ CONTENTS, READONLY
+ 12 .debug_info 00002e9c 00000000 00000000 00003035 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 13 .debug_abbrev 00000eaa 00000000 00000000 00005ed1 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_aranges 00000418 00000000 00000000 00006d80 2**3
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_rnglists 000002f0 00000000 00000000 00007198 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_macro 00014388 00000000 00000000 00007488 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_line 00004ac1 00000000 00000000 0001b810 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_str 0007f0f0 00000000 00000000 000202d1 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .comment 00000043 00000000 00000000 0009f3c1 2**0
+ CONTENTS, READONLY
+ 20 .debug_frame 00000ee4 00000000 00000000 0009f404 2**2
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_line_str 0000006a 00000000 00000000 000a02e8 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+
+Disassembly of section .text:
+
+0800013c <__do_global_dtors_aux>:
+ 800013c: b510 push {r4, lr}
+ 800013e: 4c05 ldr r4, [pc, #20] @ (8000154 <__do_global_dtors_aux+0x18>)
+ 8000140: 7823 ldrb r3, [r4, #0]
+ 8000142: b933 cbnz r3, 8000152 <__do_global_dtors_aux+0x16>
+ 8000144: 4b04 ldr r3, [pc, #16] @ (8000158 <__do_global_dtors_aux+0x1c>)
+ 8000146: b113 cbz r3, 800014e <__do_global_dtors_aux+0x12>
+ 8000148: 4804 ldr r0, [pc, #16] @ (800015c <__do_global_dtors_aux+0x20>)
+ 800014a: f3af 8000 nop.w
+ 800014e: 2301 movs r3, #1
+ 8000150: 7023 strb r3, [r4, #0]
+ 8000152: bd10 pop {r4, pc}
+ 8000154: 2000000c .word 0x2000000c
+ 8000158: 00000000 .word 0x00000000
+ 800015c: 080018b8 .word 0x080018b8
+
+08000160 :
+ 8000160: b508 push {r3, lr}
+ 8000162: 4b03 ldr r3, [pc, #12] @ (8000170 )
+ 8000164: b11b cbz r3, 800016e
+ 8000166: 4903 ldr r1, [pc, #12] @ (8000174 )
+ 8000168: 4803 ldr r0, [pc, #12] @ (8000178 )
+ 800016a: f3af 8000 nop.w
+ 800016e: bd08 pop {r3, pc}
+ 8000170: 00000000 .word 0x00000000
+ 8000174: 20000010 .word 0x20000010
+ 8000178: 080018b8 .word 0x080018b8
+
+0800017c <__aeabi_uldivmod>:
+ 800017c: b953 cbnz r3, 8000194 <__aeabi_uldivmod+0x18>
+ 800017e: b94a cbnz r2, 8000194 <__aeabi_uldivmod+0x18>
+ 8000180: 2900 cmp r1, #0
+ 8000182: bf08 it eq
+ 8000184: 2800 cmpeq r0, #0
+ 8000186: bf1c itt ne
+ 8000188: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
+ 800018c: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
+ 8000190: f000 b98c b.w 80004ac <__aeabi_idiv0>
+ 8000194: f1ad 0c08 sub.w ip, sp, #8
+ 8000198: e96d ce04 strd ip, lr, [sp, #-16]!
+ 800019c: f000 f806 bl 80001ac <__udivmoddi4>
+ 80001a0: f8dd e004 ldr.w lr, [sp, #4]
+ 80001a4: e9dd 2302 ldrd r2, r3, [sp, #8]
+ 80001a8: b004 add sp, #16
+ 80001aa: 4770 bx lr
+
+080001ac <__udivmoddi4>:
+ 80001ac: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 80001b0: 9d08 ldr r5, [sp, #32]
+ 80001b2: 468e mov lr, r1
+ 80001b4: 4604 mov r4, r0
+ 80001b6: 4688 mov r8, r1
+ 80001b8: 2b00 cmp r3, #0
+ 80001ba: d14a bne.n 8000252 <__udivmoddi4+0xa6>
+ 80001bc: 428a cmp r2, r1
+ 80001be: 4617 mov r7, r2
+ 80001c0: d962 bls.n 8000288 <__udivmoddi4+0xdc>
+ 80001c2: fab2 f682 clz r6, r2
+ 80001c6: b14e cbz r6, 80001dc <__udivmoddi4+0x30>
+ 80001c8: f1c6 0320 rsb r3, r6, #32
+ 80001cc: fa01 f806 lsl.w r8, r1, r6
+ 80001d0: fa20 f303 lsr.w r3, r0, r3
+ 80001d4: 40b7 lsls r7, r6
+ 80001d6: ea43 0808 orr.w r8, r3, r8
+ 80001da: 40b4 lsls r4, r6
+ 80001dc: ea4f 4e17 mov.w lr, r7, lsr #16
+ 80001e0: fbb8 f1fe udiv r1, r8, lr
+ 80001e4: fa1f fc87 uxth.w ip, r7
+ 80001e8: fb0e 8811 mls r8, lr, r1, r8
+ 80001ec: fb01 f20c mul.w r2, r1, ip
+ 80001f0: 0c23 lsrs r3, r4, #16
+ 80001f2: ea43 4308 orr.w r3, r3, r8, lsl #16
+ 80001f6: 429a cmp r2, r3
+ 80001f8: d909 bls.n 800020e <__udivmoddi4+0x62>
+ 80001fa: 18fb adds r3, r7, r3
+ 80001fc: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff
+ 8000200: f080 80eb bcs.w 80003da <__udivmoddi4+0x22e>
+ 8000204: 429a cmp r2, r3
+ 8000206: f240 80e8 bls.w 80003da <__udivmoddi4+0x22e>
+ 800020a: 3902 subs r1, #2
+ 800020c: 443b add r3, r7
+ 800020e: 1a9a subs r2, r3, r2
+ 8000210: fbb2 f0fe udiv r0, r2, lr
+ 8000214: fb0e 2210 mls r2, lr, r0, r2
+ 8000218: fb00 fc0c mul.w ip, r0, ip
+ 800021c: b2a3 uxth r3, r4
+ 800021e: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 8000222: 459c cmp ip, r3
+ 8000224: d909 bls.n 800023a <__udivmoddi4+0x8e>
+ 8000226: 18fb adds r3, r7, r3
+ 8000228: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff
+ 800022c: f080 80d7 bcs.w 80003de <__udivmoddi4+0x232>
+ 8000230: 459c cmp ip, r3
+ 8000232: f240 80d4 bls.w 80003de <__udivmoddi4+0x232>
+ 8000236: 443b add r3, r7
+ 8000238: 3802 subs r0, #2
+ 800023a: ea40 4001 orr.w r0, r0, r1, lsl #16
+ 800023e: 2100 movs r1, #0
+ 8000240: eba3 030c sub.w r3, r3, ip
+ 8000244: b11d cbz r5, 800024e <__udivmoddi4+0xa2>
+ 8000246: 2200 movs r2, #0
+ 8000248: 40f3 lsrs r3, r6
+ 800024a: e9c5 3200 strd r3, r2, [r5]
+ 800024e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8000252: 428b cmp r3, r1
+ 8000254: d905 bls.n 8000262 <__udivmoddi4+0xb6>
+ 8000256: b10d cbz r5, 800025c <__udivmoddi4+0xb0>
+ 8000258: e9c5 0100 strd r0, r1, [r5]
+ 800025c: 2100 movs r1, #0
+ 800025e: 4608 mov r0, r1
+ 8000260: e7f5 b.n 800024e <__udivmoddi4+0xa2>
+ 8000262: fab3 f183 clz r1, r3
+ 8000266: 2900 cmp r1, #0
+ 8000268: d146 bne.n 80002f8 <__udivmoddi4+0x14c>
+ 800026a: 4573 cmp r3, lr
+ 800026c: d302 bcc.n 8000274 <__udivmoddi4+0xc8>
+ 800026e: 4282 cmp r2, r0
+ 8000270: f200 8108 bhi.w 8000484 <__udivmoddi4+0x2d8>
+ 8000274: 1a84 subs r4, r0, r2
+ 8000276: eb6e 0203 sbc.w r2, lr, r3
+ 800027a: 2001 movs r0, #1
+ 800027c: 4690 mov r8, r2
+ 800027e: 2d00 cmp r5, #0
+ 8000280: d0e5 beq.n 800024e <__udivmoddi4+0xa2>
+ 8000282: e9c5 4800 strd r4, r8, [r5]
+ 8000286: e7e2 b.n 800024e <__udivmoddi4+0xa2>
+ 8000288: 2a00 cmp r2, #0
+ 800028a: f000 8091 beq.w 80003b0 <__udivmoddi4+0x204>
+ 800028e: fab2 f682 clz r6, r2
+ 8000292: 2e00 cmp r6, #0
+ 8000294: f040 80a5 bne.w 80003e2 <__udivmoddi4+0x236>
+ 8000298: 1a8a subs r2, r1, r2
+ 800029a: 2101 movs r1, #1
+ 800029c: 0c03 lsrs r3, r0, #16
+ 800029e: ea4f 4e17 mov.w lr, r7, lsr #16
+ 80002a2: b280 uxth r0, r0
+ 80002a4: b2bc uxth r4, r7
+ 80002a6: fbb2 fcfe udiv ip, r2, lr
+ 80002aa: fb0e 221c mls r2, lr, ip, r2
+ 80002ae: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 80002b2: fb04 f20c mul.w r2, r4, ip
+ 80002b6: 429a cmp r2, r3
+ 80002b8: d907 bls.n 80002ca <__udivmoddi4+0x11e>
+ 80002ba: 18fb adds r3, r7, r3
+ 80002bc: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff
+ 80002c0: d202 bcs.n 80002c8 <__udivmoddi4+0x11c>
+ 80002c2: 429a cmp r2, r3
+ 80002c4: f200 80e3 bhi.w 800048e <__udivmoddi4+0x2e2>
+ 80002c8: 46c4 mov ip, r8
+ 80002ca: 1a9b subs r3, r3, r2
+ 80002cc: fbb3 f2fe udiv r2, r3, lr
+ 80002d0: fb0e 3312 mls r3, lr, r2, r3
+ 80002d4: fb02 f404 mul.w r4, r2, r4
+ 80002d8: ea40 4303 orr.w r3, r0, r3, lsl #16
+ 80002dc: 429c cmp r4, r3
+ 80002de: d907 bls.n 80002f0 <__udivmoddi4+0x144>
+ 80002e0: 18fb adds r3, r7, r3
+ 80002e2: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff
+ 80002e6: d202 bcs.n 80002ee <__udivmoddi4+0x142>
+ 80002e8: 429c cmp r4, r3
+ 80002ea: f200 80cd bhi.w 8000488 <__udivmoddi4+0x2dc>
+ 80002ee: 4602 mov r2, r0
+ 80002f0: 1b1b subs r3, r3, r4
+ 80002f2: ea42 400c orr.w r0, r2, ip, lsl #16
+ 80002f6: e7a5 b.n 8000244 <__udivmoddi4+0x98>
+ 80002f8: f1c1 0620 rsb r6, r1, #32
+ 80002fc: 408b lsls r3, r1
+ 80002fe: fa22 f706 lsr.w r7, r2, r6
+ 8000302: 431f orrs r7, r3
+ 8000304: fa2e fa06 lsr.w sl, lr, r6
+ 8000308: ea4f 4917 mov.w r9, r7, lsr #16
+ 800030c: fbba f8f9 udiv r8, sl, r9
+ 8000310: fa0e fe01 lsl.w lr, lr, r1
+ 8000314: fa20 f306 lsr.w r3, r0, r6
+ 8000318: fb09 aa18 mls sl, r9, r8, sl
+ 800031c: fa1f fc87 uxth.w ip, r7
+ 8000320: ea43 030e orr.w r3, r3, lr
+ 8000324: fa00 fe01 lsl.w lr, r0, r1
+ 8000328: fb08 f00c mul.w r0, r8, ip
+ 800032c: 0c1c lsrs r4, r3, #16
+ 800032e: ea44 440a orr.w r4, r4, sl, lsl #16
+ 8000332: 42a0 cmp r0, r4
+ 8000334: fa02 f201 lsl.w r2, r2, r1
+ 8000338: d90a bls.n 8000350 <__udivmoddi4+0x1a4>
+ 800033a: 193c adds r4, r7, r4
+ 800033c: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff
+ 8000340: f080 809e bcs.w 8000480 <__udivmoddi4+0x2d4>
+ 8000344: 42a0 cmp r0, r4
+ 8000346: f240 809b bls.w 8000480 <__udivmoddi4+0x2d4>
+ 800034a: f1a8 0802 sub.w r8, r8, #2
+ 800034e: 443c add r4, r7
+ 8000350: 1a24 subs r4, r4, r0
+ 8000352: b298 uxth r0, r3
+ 8000354: fbb4 f3f9 udiv r3, r4, r9
+ 8000358: fb09 4413 mls r4, r9, r3, r4
+ 800035c: fb03 fc0c mul.w ip, r3, ip
+ 8000360: ea40 4404 orr.w r4, r0, r4, lsl #16
+ 8000364: 45a4 cmp ip, r4
+ 8000366: d909 bls.n 800037c <__udivmoddi4+0x1d0>
+ 8000368: 193c adds r4, r7, r4
+ 800036a: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff
+ 800036e: f080 8085 bcs.w 800047c <__udivmoddi4+0x2d0>
+ 8000372: 45a4 cmp ip, r4
+ 8000374: f240 8082 bls.w 800047c <__udivmoddi4+0x2d0>
+ 8000378: 3b02 subs r3, #2
+ 800037a: 443c add r4, r7
+ 800037c: ea43 4008 orr.w r0, r3, r8, lsl #16
+ 8000380: eba4 040c sub.w r4, r4, ip
+ 8000384: fba0 8c02 umull r8, ip, r0, r2
+ 8000388: 4564 cmp r4, ip
+ 800038a: 4643 mov r3, r8
+ 800038c: 46e1 mov r9, ip
+ 800038e: d364 bcc.n 800045a <__udivmoddi4+0x2ae>
+ 8000390: d061 beq.n 8000456 <__udivmoddi4+0x2aa>
+ 8000392: b15d cbz r5, 80003ac <__udivmoddi4+0x200>
+ 8000394: ebbe 0203 subs.w r2, lr, r3
+ 8000398: eb64 0409 sbc.w r4, r4, r9
+ 800039c: fa04 f606 lsl.w r6, r4, r6
+ 80003a0: fa22 f301 lsr.w r3, r2, r1
+ 80003a4: 431e orrs r6, r3
+ 80003a6: 40cc lsrs r4, r1
+ 80003a8: e9c5 6400 strd r6, r4, [r5]
+ 80003ac: 2100 movs r1, #0
+ 80003ae: e74e b.n 800024e <__udivmoddi4+0xa2>
+ 80003b0: fbb1 fcf2 udiv ip, r1, r2
+ 80003b4: 0c01 lsrs r1, r0, #16
+ 80003b6: ea41 410e orr.w r1, r1, lr, lsl #16
+ 80003ba: b280 uxth r0, r0
+ 80003bc: ea40 4201 orr.w r2, r0, r1, lsl #16
+ 80003c0: 463b mov r3, r7
+ 80003c2: fbb1 f1f7 udiv r1, r1, r7
+ 80003c6: 4638 mov r0, r7
+ 80003c8: 463c mov r4, r7
+ 80003ca: 46b8 mov r8, r7
+ 80003cc: 46be mov lr, r7
+ 80003ce: 2620 movs r6, #32
+ 80003d0: eba2 0208 sub.w r2, r2, r8
+ 80003d4: ea41 410c orr.w r1, r1, ip, lsl #16
+ 80003d8: e765 b.n 80002a6 <__udivmoddi4+0xfa>
+ 80003da: 4601 mov r1, r0
+ 80003dc: e717 b.n 800020e <__udivmoddi4+0x62>
+ 80003de: 4610 mov r0, r2
+ 80003e0: e72b b.n 800023a <__udivmoddi4+0x8e>
+ 80003e2: f1c6 0120 rsb r1, r6, #32
+ 80003e6: fa2e fc01 lsr.w ip, lr, r1
+ 80003ea: 40b7 lsls r7, r6
+ 80003ec: fa0e fe06 lsl.w lr, lr, r6
+ 80003f0: fa20 f101 lsr.w r1, r0, r1
+ 80003f4: ea41 010e orr.w r1, r1, lr
+ 80003f8: ea4f 4e17 mov.w lr, r7, lsr #16
+ 80003fc: fbbc f8fe udiv r8, ip, lr
+ 8000400: b2bc uxth r4, r7
+ 8000402: fb0e cc18 mls ip, lr, r8, ip
+ 8000406: fb08 f904 mul.w r9, r8, r4
+ 800040a: 0c0a lsrs r2, r1, #16
+ 800040c: ea42 420c orr.w r2, r2, ip, lsl #16
+ 8000410: 40b0 lsls r0, r6
+ 8000412: 4591 cmp r9, r2
+ 8000414: ea4f 4310 mov.w r3, r0, lsr #16
+ 8000418: b280 uxth r0, r0
+ 800041a: d93e bls.n 800049a <__udivmoddi4+0x2ee>
+ 800041c: 18ba adds r2, r7, r2
+ 800041e: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff
+ 8000422: d201 bcs.n 8000428 <__udivmoddi4+0x27c>
+ 8000424: 4591 cmp r9, r2
+ 8000426: d81f bhi.n 8000468 <__udivmoddi4+0x2bc>
+ 8000428: eba2 0209 sub.w r2, r2, r9
+ 800042c: fbb2 f9fe udiv r9, r2, lr
+ 8000430: fb09 f804 mul.w r8, r9, r4
+ 8000434: fb0e 2a19 mls sl, lr, r9, r2
+ 8000438: b28a uxth r2, r1
+ 800043a: ea42 420a orr.w r2, r2, sl, lsl #16
+ 800043e: 4542 cmp r2, r8
+ 8000440: d229 bcs.n 8000496 <__udivmoddi4+0x2ea>
+ 8000442: 18ba adds r2, r7, r2
+ 8000444: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff
+ 8000448: d2c2 bcs.n 80003d0 <__udivmoddi4+0x224>
+ 800044a: 4542 cmp r2, r8
+ 800044c: d2c0 bcs.n 80003d0 <__udivmoddi4+0x224>
+ 800044e: f1a9 0102 sub.w r1, r9, #2
+ 8000452: 443a add r2, r7
+ 8000454: e7bc b.n 80003d0 <__udivmoddi4+0x224>
+ 8000456: 45c6 cmp lr, r8
+ 8000458: d29b bcs.n 8000392 <__udivmoddi4+0x1e6>
+ 800045a: ebb8 0302 subs.w r3, r8, r2
+ 800045e: eb6c 0c07 sbc.w ip, ip, r7
+ 8000462: 3801 subs r0, #1
+ 8000464: 46e1 mov r9, ip
+ 8000466: e794 b.n 8000392 <__udivmoddi4+0x1e6>
+ 8000468: eba7 0909 sub.w r9, r7, r9
+ 800046c: 444a add r2, r9
+ 800046e: fbb2 f9fe udiv r9, r2, lr
+ 8000472: f1a8 0c02 sub.w ip, r8, #2
+ 8000476: fb09 f804 mul.w r8, r9, r4
+ 800047a: e7db b.n 8000434 <__udivmoddi4+0x288>
+ 800047c: 4603 mov r3, r0
+ 800047e: e77d b.n 800037c <__udivmoddi4+0x1d0>
+ 8000480: 46d0 mov r8, sl
+ 8000482: e765 b.n 8000350 <__udivmoddi4+0x1a4>
+ 8000484: 4608 mov r0, r1
+ 8000486: e6fa b.n 800027e <__udivmoddi4+0xd2>
+ 8000488: 443b add r3, r7
+ 800048a: 3a02 subs r2, #2
+ 800048c: e730 b.n 80002f0 <__udivmoddi4+0x144>
+ 800048e: f1ac 0c02 sub.w ip, ip, #2
+ 8000492: 443b add r3, r7
+ 8000494: e719 b.n 80002ca <__udivmoddi4+0x11e>
+ 8000496: 4649 mov r1, r9
+ 8000498: e79a b.n 80003d0 <__udivmoddi4+0x224>
+ 800049a: eba2 0209 sub.w r2, r2, r9
+ 800049e: fbb2 f9fe udiv r9, r2, lr
+ 80004a2: 46c4 mov ip, r8
+ 80004a4: fb09 f804 mul.w r8, r9, r4
+ 80004a8: e7c4 b.n 8000434 <__udivmoddi4+0x288>
+ 80004aa: bf00 nop
+
+080004ac <__aeabi_idiv0>:
+ 80004ac: 4770 bx lr
+ 80004ae: bf00 nop
+
+080004b0 :
+void eteint_LED(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+void init_ports_LED(void) {
+ 80004b0: b480 push {r7}
+ 80004b2: af00 add r7, sp, #0
+ GPIOB->ODR |= 1<<0;
+ 80004b4: 4b04 ldr r3, [pc, #16] @ (80004c8 )
+ 80004b6: 695b ldr r3, [r3, #20]
+ 80004b8: 4a03 ldr r2, [pc, #12] @ (80004c8 )
+ 80004ba: f043 0301 orr.w r3, r3, #1
+ 80004be: 6153 str r3, [r2, #20]
+}
+ 80004c0: bf00 nop
+ 80004c2: 46bd mov sp, r7
+ 80004c4: bc80 pop {r7}
+ 80004c6: 4770 bx lr
+ 80004c8: 40020400 .word 0x40020400
+
+080004cc :
+
+void init_ports_BP(void) {
+ 80004cc: b480 push {r7}
+ 80004ce: af00 add r7, sp, #0
+ GPIOA->MODER &= ~(1<<11);
+ 80004d0: 4b04 ldr r3, [pc, #16] @ (80004e4 )
+ 80004d2: 681b ldr r3, [r3, #0]
+ 80004d4: 4a03 ldr r2, [pc, #12] @ (80004e4 )
+ 80004d6: f423 6300 bic.w r3, r3, #2048 @ 0x800
+ 80004da: 6013 str r3, [r2, #0]
+}
+ 80004dc: bf00 nop
+ 80004de: 46bd mov sp, r7
+ 80004e0: bc80 pop {r7}
+ 80004e2: 4770 bx lr
+ 80004e4: 40020000 .word 0x40020000
+
+080004e8 :
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ 80004e8: b580 push {r7, lr}
+ 80004ea: b082 sub sp, #8
+ 80004ec: af00 add r7, sp, #0
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+ 80004ee: f000 f93a bl 8000766
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+ 80004f2: f000 f817 bl 8000524
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ 80004f6: f000 f85d bl 80005b4
+ /* USER CODE BEGIN 2 */
+ init_ports_LED();
+ 80004fa: f7ff ffd9 bl 80004b0
+ init_ports_BP();
+ 80004fe: f7ff ffe5 bl 80004cc
+ eteint_LED();
+ HAL_Delay(1000);
+ }
+#endif
+#ifdef V2
+ uint32_t bit_state = (GPIOA->IDR >> 11) & 1;
+ 8000502: 4b06 ldr r3, [pc, #24] @ (800051c )
+ 8000504: 691b ldr r3, [r3, #16]
+ 8000506: 0adb lsrs r3, r3, #11
+ 8000508: f003 0301 and.w r3, r3, #1
+ 800050c: 607b str r3, [r7, #4]
+
+ GPIOB->BSRR = (1 << 16) | (bit_state << 0);
+ 800050e: 4a04 ldr r2, [pc, #16] @ (8000520 )
+ 8000510: 687b ldr r3, [r7, #4]
+ 8000512: f443 3380 orr.w r3, r3, #65536 @ 0x10000
+ 8000516: 6193 str r3, [r2, #24]
+ {
+ 8000518: bf00 nop
+ 800051a: e7f2 b.n 8000502
+ 800051c: 40020000 .word 0x40020000
+ 8000520: 40020400 .word 0x40020400
+
+08000524 :
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ 8000524: b580 push {r7, lr}
+ 8000526: b092 sub sp, #72 @ 0x48
+ 8000528: af00 add r7, sp, #0
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 800052a: f107 0314 add.w r3, r7, #20
+ 800052e: 2234 movs r2, #52 @ 0x34
+ 8000530: 2100 movs r1, #0
+ 8000532: 4618 mov r0, r3
+ 8000534: f001 f994 bl 8001860
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 8000538: 463b mov r3, r7
+ 800053a: 2200 movs r2, #0
+ 800053c: 601a str r2, [r3, #0]
+ 800053e: 605a str r2, [r3, #4]
+ 8000540: 609a str r2, [r3, #8]
+ 8000542: 60da str r2, [r3, #12]
+ 8000544: 611a str r2, [r3, #16]
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 8000546: 4b1a ldr r3, [pc, #104] @ (80005b0 )
+ 8000548: 681b ldr r3, [r3, #0]
+ 800054a: f423 53c0 bic.w r3, r3, #6144 @ 0x1800
+ 800054e: 4a18 ldr r2, [pc, #96] @ (80005b0 )
+ 8000550: f443 6300 orr.w r3, r3, #2048 @ 0x800
+ 8000554: 6013 str r3, [r2, #0]
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ 8000556: 2310 movs r3, #16
+ 8000558: 617b str r3, [r7, #20]
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ 800055a: 2301 movs r3, #1
+ 800055c: 62fb str r3, [r7, #44] @ 0x2c
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ 800055e: 2300 movs r3, #0
+ 8000560: 633b str r3, [r7, #48] @ 0x30
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
+ 8000562: f44f 4320 mov.w r3, #40960 @ 0xa000
+ 8000566: 637b str r3, [r7, #52] @ 0x34
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ 8000568: 2300 movs r3, #0
+ 800056a: 63bb str r3, [r7, #56] @ 0x38
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 800056c: f107 0314 add.w r3, r7, #20
+ 8000570: 4618 mov r0, r3
+ 8000572: f000 fbf3 bl 8000d5c
+ 8000576: 4603 mov r3, r0
+ 8000578: 2b00 cmp r3, #0
+ 800057a: d001 beq.n 8000580
+ {
+ Error_Handler();
+ 800057c: f000 f868 bl 8000650
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 8000580: 230f movs r3, #15
+ 8000582: 603b str r3, [r7, #0]
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ 8000584: 2300 movs r3, #0
+ 8000586: 607b str r3, [r7, #4]
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 8000588: 2300 movs r3, #0
+ 800058a: 60bb str r3, [r7, #8]
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ 800058c: 2300 movs r3, #0
+ 800058e: 60fb str r3, [r7, #12]
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 8000590: 2300 movs r3, #0
+ 8000592: 613b str r3, [r7, #16]
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+ 8000594: 463b mov r3, r7
+ 8000596: 2100 movs r1, #0
+ 8000598: 4618 mov r0, r3
+ 800059a: f000 ff0f bl 80013bc
+ 800059e: 4603 mov r3, r0
+ 80005a0: 2b00 cmp r3, #0
+ 80005a2: d001 beq.n 80005a8
+ {
+ Error_Handler();
+ 80005a4: f000 f854 bl 8000650
+ }
+}
+ 80005a8: bf00 nop
+ 80005aa: 3748 adds r7, #72 @ 0x48
+ 80005ac: 46bd mov sp, r7
+ 80005ae: bd80 pop {r7, pc}
+ 80005b0: 40007000 .word 0x40007000
+
+080005b4 :
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ 80005b4: b580 push {r7, lr}
+ 80005b6: b088 sub sp, #32
+ 80005b8: af00 add r7, sp, #0
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80005ba: f107 030c add.w r3, r7, #12
+ 80005be: 2200 movs r2, #0
+ 80005c0: 601a str r2, [r3, #0]
+ 80005c2: 605a str r2, [r3, #4]
+ 80005c4: 609a str r2, [r3, #8]
+ 80005c6: 60da str r2, [r3, #12]
+ 80005c8: 611a str r2, [r3, #16]
+ /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+ /* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 80005ca: 4b1e ldr r3, [pc, #120] @ (8000644 )
+ 80005cc: 69db ldr r3, [r3, #28]
+ 80005ce: 4a1d ldr r2, [pc, #116] @ (8000644 )
+ 80005d0: f043 0302 orr.w r3, r3, #2
+ 80005d4: 61d3 str r3, [r2, #28]
+ 80005d6: 4b1b ldr r3, [pc, #108] @ (8000644 )
+ 80005d8: 69db ldr r3, [r3, #28]
+ 80005da: f003 0302 and.w r3, r3, #2
+ 80005de: 60bb str r3, [r7, #8]
+ 80005e0: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ 80005e2: 4b18 ldr r3, [pc, #96] @ (8000644 )
+ 80005e4: 69db ldr r3, [r3, #28]
+ 80005e6: 4a17 ldr r2, [pc, #92] @ (8000644 )
+ 80005e8: f043 0301 orr.w r3, r3, #1
+ 80005ec: 61d3 str r3, [r2, #28]
+ 80005ee: 4b15 ldr r3, [pc, #84] @ (8000644 )
+ 80005f0: 69db ldr r3, [r3, #28]
+ 80005f2: f003 0301 and.w r3, r3, #1
+ 80005f6: 607b str r3, [r7, #4]
+ 80005f8: 687b ldr r3, [r7, #4]
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);
+ 80005fa: 2200 movs r2, #0
+ 80005fc: 2101 movs r1, #1
+ 80005fe: 4812 ldr r0, [pc, #72] @ (8000648 )
+ 8000600: f000 fb94 bl 8000d2c
+
+ /*Configure GPIO pin : PB0 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ 8000604: 2301 movs r3, #1
+ 8000606: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000608: 2301 movs r3, #1
+ 800060a: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800060c: 2300 movs r3, #0
+ 800060e: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000610: 2300 movs r3, #0
+ 8000612: 61bb str r3, [r7, #24]
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 8000614: f107 030c add.w r3, r7, #12
+ 8000618: 4619 mov r1, r3
+ 800061a: 480b ldr r0, [pc, #44] @ (8000648 )
+ 800061c: f000 f9f6 bl 8000a0c
+
+ /*Configure GPIO pin : PA11 */
+ GPIO_InitStruct.Pin = GPIO_PIN_11;
+ 8000620: f44f 6300 mov.w r3, #2048 @ 0x800
+ 8000624: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8000626: 2300 movs r3, #0
+ 8000628: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800062a: 2300 movs r3, #0
+ 800062c: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 800062e: f107 030c add.w r3, r7, #12
+ 8000632: 4619 mov r1, r3
+ 8000634: 4805 ldr r0, [pc, #20] @ (800064c )
+ 8000636: f000 f9e9 bl 8000a0c
+
+ /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+ /* USER CODE END MX_GPIO_Init_2 */
+}
+ 800063a: bf00 nop
+ 800063c: 3720 adds r7, #32
+ 800063e: 46bd mov sp, r7
+ 8000640: bd80 pop {r7, pc}
+ 8000642: bf00 nop
+ 8000644: 40023800 .word 0x40023800
+ 8000648: 40020400 .word 0x40020400
+ 800064c: 40020000 .word 0x40020000
+
+08000650 :
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ 8000650: b480 push {r7}
+ 8000652: af00 add r7, sp, #0
+ \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+ __ASM volatile ("cpsid i" : : : "memory");
+ 8000654: b672 cpsid i
+}
+ 8000656: bf00 nop
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ 8000658: bf00 nop
+ 800065a: e7fd b.n 8000658
+
+0800065c :
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ 800065c: b480 push {r7}
+ 800065e: b085 sub sp, #20
+ 8000660: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_COMP_CLK_ENABLE();
+ 8000662: 4b14 ldr r3, [pc, #80] @ (80006b4 )
+ 8000664: 6a5b ldr r3, [r3, #36] @ 0x24
+ 8000666: 4a13 ldr r2, [pc, #76] @ (80006b4 )
+ 8000668: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000
+ 800066c: 6253 str r3, [r2, #36] @ 0x24
+ 800066e: 4b11 ldr r3, [pc, #68] @ (80006b4 )
+ 8000670: 6a5b ldr r3, [r3, #36] @ 0x24
+ 8000672: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
+ 8000676: 60fb str r3, [r7, #12]
+ 8000678: 68fb ldr r3, [r7, #12]
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 800067a: 4b0e ldr r3, [pc, #56] @ (80006b4 )
+ 800067c: 6a1b ldr r3, [r3, #32]
+ 800067e: 4a0d ldr r2, [pc, #52] @ (80006b4 )
+ 8000680: f043 0301 orr.w r3, r3, #1
+ 8000684: 6213 str r3, [r2, #32]
+ 8000686: 4b0b ldr r3, [pc, #44] @ (80006b4 )
+ 8000688: 6a1b ldr r3, [r3, #32]
+ 800068a: f003 0301 and.w r3, r3, #1
+ 800068e: 60bb str r3, [r7, #8]
+ 8000690: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 8000692: 4b08 ldr r3, [pc, #32] @ (80006b4 )
+ 8000694: 6a5b ldr r3, [r3, #36] @ 0x24
+ 8000696: 4a07 ldr r2, [pc, #28] @ (80006b4 )
+ 8000698: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
+ 800069c: 6253 str r3, [r2, #36] @ 0x24
+ 800069e: 4b05 ldr r3, [pc, #20] @ (80006b4 )
+ 80006a0: 6a5b ldr r3, [r3, #36] @ 0x24
+ 80006a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
+ 80006a6: 607b str r3, [r7, #4]
+ 80006a8: 687b ldr r3, [r7, #4]
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+ 80006aa: bf00 nop
+ 80006ac: 3714 adds r7, #20
+ 80006ae: 46bd mov sp, r7
+ 80006b0: bc80 pop {r7}
+ 80006b2: 4770 bx lr
+ 80006b4: 40023800 .word 0x40023800
+
+080006b8 :
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ 80006b8: b480 push {r7}
+ 80006ba: af00 add r7, sp, #0
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ 80006bc: bf00 nop
+ 80006be: e7fd b.n 80006bc
+
+080006c0 :
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ 80006c0: b480 push {r7}
+ 80006c2: af00 add r7, sp, #0
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ 80006c4: bf00 nop
+ 80006c6: e7fd b.n 80006c4
+
+080006c8 :
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ 80006c8: b480 push {r7}
+ 80006ca: af00 add r7, sp, #0
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ 80006cc: bf00 nop
+ 80006ce: e7fd b.n 80006cc
+
+080006d0 :
+
+/**
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ 80006d0: b480 push {r7}
+ 80006d2: af00 add r7, sp, #0
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ 80006d4: bf00 nop
+ 80006d6: e7fd b.n 80006d4
+
+080006d8 :
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ 80006d8: b480 push {r7}
+ 80006da: af00 add r7, sp, #0
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ 80006dc: bf00 nop
+ 80006de: e7fd b.n 80006dc
+
+080006e0 :
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ 80006e0: b480 push {r7}
+ 80006e2: af00 add r7, sp, #0
+
+ /* USER CODE END SVC_IRQn 0 */
+ /* USER CODE BEGIN SVC_IRQn 1 */
+
+ /* USER CODE END SVC_IRQn 1 */
+}
+ 80006e4: bf00 nop
+ 80006e6: 46bd mov sp, r7
+ 80006e8: bc80 pop {r7}
+ 80006ea: 4770 bx lr
+
+080006ec :
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ 80006ec: b480 push {r7}
+ 80006ee: af00 add r7, sp, #0
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 80006f0: bf00 nop
+ 80006f2: 46bd mov sp, r7
+ 80006f4: bc80 pop {r7}
+ 80006f6: 4770 bx lr
+
+080006f8 :
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ 80006f8: b480 push {r7}
+ 80006fa: af00 add r7, sp, #0
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+ 80006fc: bf00 nop
+ 80006fe: 46bd mov sp, r7
+ 8000700: bc80 pop {r7}
+ 8000702: 4770 bx lr
+
+08000704 :
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ 8000704: b580 push {r7, lr}
+ 8000706: af00 add r7, sp, #0
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ 8000708: f000 f880 bl 800080c
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+ 800070c: bf00 nop
+ 800070e: bd80 pop {r7, pc}
+
+08000710 :
+ * SystemCoreClock variable.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+ 8000710: b480 push {r7}
+ 8000712: af00 add r7, sp, #0
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+ 8000714: bf00 nop
+ 8000716: 46bd mov sp, r7
+ 8000718: bc80 pop {r7}
+ 800071a: 4770 bx lr
+
+0800071c :
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+ 800071c: f7ff fff8 bl 8000710
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ 8000720: 480b ldr r0, [pc, #44] @ (8000750 )
+ ldr r1, =_edata
+ 8000722: 490c ldr r1, [pc, #48] @ (8000754 )
+ ldr r2, =_sidata
+ 8000724: 4a0c ldr r2, [pc, #48] @ (8000758 )
+ movs r3, #0
+ 8000726: 2300 movs r3, #0
+ b LoopCopyDataInit
+ 8000728: e002 b.n 8000730
+
+0800072a :
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ 800072a: 58d4 ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ 800072c: 50c4 str r4, [r0, r3]
+ adds r3, r3, #4
+ 800072e: 3304 adds r3, #4
+
+08000730 :
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ 8000730: 18c4 adds r4, r0, r3
+ cmp r4, r1
+ 8000732: 428c cmp r4, r1
+ bcc CopyDataInit
+ 8000734: d3f9 bcc.n 800072a
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ 8000736: 4a09 ldr r2, [pc, #36] @ (800075c )
+ ldr r4, =_ebss
+ 8000738: 4c09 ldr r4, [pc, #36] @ (8000760 )
+ movs r3, #0
+ 800073a: 2300 movs r3, #0
+ b LoopFillZerobss
+ 800073c: e001 b.n 8000742
+
+0800073e :
+
+FillZerobss:
+ str r3, [r2]
+ 800073e: 6013 str r3, [r2, #0]
+ adds r2, r2, #4
+ 8000740: 3204 adds r2, #4
+
+08000742 :
+
+LoopFillZerobss:
+ cmp r2, r4
+ 8000742: 42a2 cmp r2, r4
+ bcc FillZerobss
+ 8000744: d3fb bcc.n 800073e
+
+/* Call static constructors */
+ bl __libc_init_array
+ 8000746: f001 f893 bl 8001870 <__libc_init_array>
+/* Call the application's entry point.*/
+ bl main
+ 800074a: f7ff fecd bl 80004e8
+ bx lr
+ 800074e: 4770 bx lr
+ ldr r0, =_sdata
+ 8000750: 20000000 .word 0x20000000
+ ldr r1, =_edata
+ 8000754: 2000000c .word 0x2000000c
+ ldr r2, =_sidata
+ 8000758: 080018fc .word 0x080018fc
+ ldr r2, =_sbss
+ 800075c: 2000000c .word 0x2000000c
+ ldr r4, =_ebss
+ 8000760: 2000002c .word 0x2000002c
+
+08000764 :
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ 8000764: e7fe b.n 8000764
+
+08000766 :
+ * In the default implementation,Systick is used as source of time base.
+ * the tick variable is incremented each 1ms in its ISR.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 8000766: b580 push {r7, lr}
+ 8000768: b082 sub sp, #8
+ 800076a: af00 add r7, sp, #0
+ HAL_StatusTypeDef status = HAL_OK;
+ 800076c: 2300 movs r3, #0
+ 800076e: 71fb strb r3, [r7, #7]
+#if (PREFETCH_ENABLE != 0)
+ __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+#endif /* PREFETCH_ENABLE */
+
+ /* Set Interrupt Group Priority */
+ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 8000770: 2003 movs r0, #3
+ 8000772: f000 f917 bl 80009a4
+
+ /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
+ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
+ 8000776: 200f movs r0, #15
+ 8000778: f000 f80e bl 8000798
+ 800077c: 4603 mov r3, r0
+ 800077e: 2b00 cmp r3, #0
+ 8000780: d002 beq.n 8000788
+ {
+ status = HAL_ERROR;
+ 8000782: 2301 movs r3, #1
+ 8000784: 71fb strb r3, [r7, #7]
+ 8000786: e001 b.n 800078c
+ }
+ else
+ {
+ /* Init the low level hardware */
+ HAL_MspInit();
+ 8000788: f7ff ff68 bl 800065c
+ }
+
+ /* Return function status */
+ return status;
+ 800078c: 79fb ldrb r3, [r7, #7]
+}
+ 800078e: 4618 mov r0, r3
+ 8000790: 3708 adds r7, #8
+ 8000792: 46bd mov sp, r7
+ 8000794: bd80 pop {r7, pc}
+ ...
+
+08000798 :
+ * implementation in user file.
+ * @param TickPriority Tick interrupt priority.
+ * @retval HAL status
+ */
+__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 8000798: b580 push {r7, lr}
+ 800079a: b084 sub sp, #16
+ 800079c: af00 add r7, sp, #0
+ 800079e: 6078 str r0, [r7, #4]
+ HAL_StatusTypeDef status = HAL_OK;
+ 80007a0: 2300 movs r3, #0
+ 80007a2: 73fb strb r3, [r7, #15]
+
+ if (uwTickFreq != 0U)
+ 80007a4: 4b16 ldr r3, [pc, #88] @ (8000800 )
+ 80007a6: 681b ldr r3, [r3, #0]
+ 80007a8: 2b00 cmp r3, #0
+ 80007aa: d022 beq.n 80007f2
+ {
+ /*Configure the SysTick to have interrupt in 1ms time basis*/
+ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
+ 80007ac: 4b15 ldr r3, [pc, #84] @ (8000804 )
+ 80007ae: 681a ldr r2, [r3, #0]
+ 80007b0: 4b13 ldr r3, [pc, #76] @ (8000800 )
+ 80007b2: 681b ldr r3, [r3, #0]
+ 80007b4: f44f 717a mov.w r1, #1000 @ 0x3e8
+ 80007b8: fbb1 f3f3 udiv r3, r1, r3
+ 80007bc: fbb2 f3f3 udiv r3, r2, r3
+ 80007c0: 4618 mov r0, r3
+ 80007c2: f000 f916 bl 80009f2
+ 80007c6: 4603 mov r3, r0
+ 80007c8: 2b00 cmp r3, #0
+ 80007ca: d10f bne.n 80007ec
+ {
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 80007cc: 687b ldr r3, [r7, #4]
+ 80007ce: 2b0f cmp r3, #15
+ 80007d0: d809 bhi.n 80007e6
+ {
+ HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
+ 80007d2: 2200 movs r2, #0
+ 80007d4: 6879 ldr r1, [r7, #4]
+ 80007d6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
+ 80007da: f000 f8ee bl 80009ba
+ uwTickPrio = TickPriority;
+ 80007de: 4a0a ldr r2, [pc, #40] @ (8000808 )
+ 80007e0: 687b ldr r3, [r7, #4]
+ 80007e2: 6013 str r3, [r2, #0]
+ 80007e4: e007 b.n 80007f6
+ }
+ else
+ {
+ status = HAL_ERROR;
+ 80007e6: 2301 movs r3, #1
+ 80007e8: 73fb strb r3, [r7, #15]
+ 80007ea: e004 b.n 80007f6
+ }
+ }
+ else
+ {
+ status = HAL_ERROR;
+ 80007ec: 2301 movs r3, #1
+ 80007ee: 73fb strb r3, [r7, #15]
+ 80007f0: e001 b.n 80007f6
+ }
+ }
+ else
+ {
+ status = HAL_ERROR;
+ 80007f2: 2301 movs r3, #1
+ 80007f4: 73fb strb r3, [r7, #15]
+ }
+
+ /* Return function status */
+ return status;
+ 80007f6: 7bfb ldrb r3, [r7, #15]
+}
+ 80007f8: 4618 mov r0, r3
+ 80007fa: 3710 adds r7, #16
+ 80007fc: 46bd mov sp, r7
+ 80007fe: bd80 pop {r7, pc}
+ 8000800: 20000008 .word 0x20000008
+ 8000804: 20000000 .word 0x20000000
+ 8000808: 20000004 .word 0x20000004
+
+0800080c :
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval None
+ */
+__weak void HAL_IncTick(void)
+{
+ 800080c: b480 push {r7}
+ 800080e: af00 add r7, sp, #0
+ uwTick += uwTickFreq;
+ 8000810: 4b05 ldr r3, [pc, #20] @ (8000828 )
+ 8000812: 681a ldr r2, [r3, #0]
+ 8000814: 4b05 ldr r3, [pc, #20] @ (800082c )
+ 8000816: 681b ldr r3, [r3, #0]
+ 8000818: 4413 add r3, r2
+ 800081a: 4a03 ldr r2, [pc, #12] @ (8000828 )
+ 800081c: 6013 str r3, [r2, #0]
+}
+ 800081e: bf00 nop
+ 8000820: 46bd mov sp, r7
+ 8000822: bc80 pop {r7}
+ 8000824: 4770 bx lr
+ 8000826: bf00 nop
+ 8000828: 20000028 .word 0x20000028
+ 800082c: 20000008 .word 0x20000008
+
+08000830 :
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval tick value
+ */
+__weak uint32_t HAL_GetTick(void)
+{
+ 8000830: b480 push {r7}
+ 8000832: af00 add r7, sp, #0
+ return uwTick;
+ 8000834: 4b02 ldr r3, [pc, #8] @ (8000840 )
+ 8000836: 681b ldr r3, [r3, #0]
+}
+ 8000838: 4618 mov r0, r3
+ 800083a: 46bd mov sp, r7
+ 800083c: bc80 pop {r7}
+ 800083e: 4770 bx lr
+ 8000840: 20000028 .word 0x20000028
+
+08000844 <__NVIC_SetPriorityGrouping>:
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000844: b480 push {r7}
+ 8000846: b085 sub sp, #20
+ 8000848: af00 add r7, sp, #0
+ 800084a: 6078 str r0, [r7, #4]
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 800084c: 687b ldr r3, [r7, #4]
+ 800084e: f003 0307 and.w r3, r3, #7
+ 8000852: 60fb str r3, [r7, #12]
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ 8000854: 4b0c ldr r3, [pc, #48] @ (8000888 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000856: 68db ldr r3, [r3, #12]
+ 8000858: 60bb str r3, [r7, #8]
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ 800085a: 68ba ldr r2, [r7, #8]
+ 800085c: f64f 03ff movw r3, #63743 @ 0xf8ff
+ 8000860: 4013 ands r3, r2
+ 8000862: 60bb str r3, [r7, #8]
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
+ 8000864: 68fb ldr r3, [r7, #12]
+ 8000866: 021a lsls r2, r3, #8
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 8000868: 68bb ldr r3, [r7, #8]
+ 800086a: 4313 orrs r3, r2
+ reg_value = (reg_value |
+ 800086c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
+ 8000870: f443 3300 orr.w r3, r3, #131072 @ 0x20000
+ 8000874: 60bb str r3, [r7, #8]
+ SCB->AIRCR = reg_value;
+ 8000876: 4a04 ldr r2, [pc, #16] @ (8000888 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000878: 68bb ldr r3, [r7, #8]
+ 800087a: 60d3 str r3, [r2, #12]
+}
+ 800087c: bf00 nop
+ 800087e: 3714 adds r7, #20
+ 8000880: 46bd mov sp, r7
+ 8000882: bc80 pop {r7}
+ 8000884: 4770 bx lr
+ 8000886: bf00 nop
+ 8000888: e000ed00 .word 0xe000ed00
+
+0800088c <__NVIC_GetPriorityGrouping>:
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 800088c: b480 push {r7}
+ 800088e: af00 add r7, sp, #0
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 8000890: 4b04 ldr r3, [pc, #16] @ (80008a4 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000892: 68db ldr r3, [r3, #12]
+ 8000894: 0a1b lsrs r3, r3, #8
+ 8000896: f003 0307 and.w r3, r3, #7
+}
+ 800089a: 4618 mov r0, r3
+ 800089c: 46bd mov sp, r7
+ 800089e: bc80 pop {r7}
+ 80008a0: 4770 bx lr
+ 80008a2: bf00 nop
+ 80008a4: e000ed00 .word 0xe000ed00
+
+080008a8 <__NVIC_SetPriority>:
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 80008a8: b480 push {r7}
+ 80008aa: b083 sub sp, #12
+ 80008ac: af00 add r7, sp, #0
+ 80008ae: 4603 mov r3, r0
+ 80008b0: 6039 str r1, [r7, #0]
+ 80008b2: 71fb strb r3, [r7, #7]
+ if ((int32_t)(IRQn) >= 0)
+ 80008b4: f997 3007 ldrsb.w r3, [r7, #7]
+ 80008b8: 2b00 cmp r3, #0
+ 80008ba: db0a blt.n 80008d2 <__NVIC_SetPriority+0x2a>
+ {
+ NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 80008bc: 683b ldr r3, [r7, #0]
+ 80008be: b2da uxtb r2, r3
+ 80008c0: 490c ldr r1, [pc, #48] @ (80008f4 <__NVIC_SetPriority+0x4c>)
+ 80008c2: f997 3007 ldrsb.w r3, [r7, #7]
+ 80008c6: 0112 lsls r2, r2, #4
+ 80008c8: b2d2 uxtb r2, r2
+ 80008ca: 440b add r3, r1
+ 80008cc: f883 2300 strb.w r2, [r3, #768] @ 0x300
+ }
+ else
+ {
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+ 80008d0: e00a b.n 80008e8 <__NVIC_SetPriority+0x40>
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 80008d2: 683b ldr r3, [r7, #0]
+ 80008d4: b2da uxtb r2, r3
+ 80008d6: 4908 ldr r1, [pc, #32] @ (80008f8 <__NVIC_SetPriority+0x50>)
+ 80008d8: 79fb ldrb r3, [r7, #7]
+ 80008da: f003 030f and.w r3, r3, #15
+ 80008de: 3b04 subs r3, #4
+ 80008e0: 0112 lsls r2, r2, #4
+ 80008e2: b2d2 uxtb r2, r2
+ 80008e4: 440b add r3, r1
+ 80008e6: 761a strb r2, [r3, #24]
+}
+ 80008e8: bf00 nop
+ 80008ea: 370c adds r7, #12
+ 80008ec: 46bd mov sp, r7
+ 80008ee: bc80 pop {r7}
+ 80008f0: 4770 bx lr
+ 80008f2: bf00 nop
+ 80008f4: e000e100 .word 0xe000e100
+ 80008f8: e000ed00 .word 0xe000ed00
+
+080008fc :
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 80008fc: b480 push {r7}
+ 80008fe: b089 sub sp, #36 @ 0x24
+ 8000900: af00 add r7, sp, #0
+ 8000902: 60f8 str r0, [r7, #12]
+ 8000904: 60b9 str r1, [r7, #8]
+ 8000906: 607a str r2, [r7, #4]
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 8000908: 68fb ldr r3, [r7, #12]
+ 800090a: f003 0307 and.w r3, r3, #7
+ 800090e: 61fb str r3, [r7, #28]
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 8000910: 69fb ldr r3, [r7, #28]
+ 8000912: f1c3 0307 rsb r3, r3, #7
+ 8000916: 2b04 cmp r3, #4
+ 8000918: bf28 it cs
+ 800091a: 2304 movcs r3, #4
+ 800091c: 61bb str r3, [r7, #24]
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 800091e: 69fb ldr r3, [r7, #28]
+ 8000920: 3304 adds r3, #4
+ 8000922: 2b06 cmp r3, #6
+ 8000924: d902 bls.n 800092c
+ 8000926: 69fb ldr r3, [r7, #28]
+ 8000928: 3b03 subs r3, #3
+ 800092a: e000 b.n 800092e
+ 800092c: 2300 movs r3, #0
+ 800092e: 617b str r3, [r7, #20]
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000930: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
+ 8000934: 69bb ldr r3, [r7, #24]
+ 8000936: fa02 f303 lsl.w r3, r2, r3
+ 800093a: 43da mvns r2, r3
+ 800093c: 68bb ldr r3, [r7, #8]
+ 800093e: 401a ands r2, r3
+ 8000940: 697b ldr r3, [r7, #20]
+ 8000942: 409a lsls r2, r3
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ 8000944: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
+ 8000948: 697b ldr r3, [r7, #20]
+ 800094a: fa01 f303 lsl.w r3, r1, r3
+ 800094e: 43d9 mvns r1, r3
+ 8000950: 687b ldr r3, [r7, #4]
+ 8000952: 400b ands r3, r1
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000954: 4313 orrs r3, r2
+ );
+}
+ 8000956: 4618 mov r0, r3
+ 8000958: 3724 adds r7, #36 @ 0x24
+ 800095a: 46bd mov sp, r7
+ 800095c: bc80 pop {r7}
+ 800095e: 4770 bx lr
+
+08000960 :
+ \note When the variable __Vendor_SysTickConfig is set to 1, then the
+ function SysTick_Config is not included. In this case, the file device.h
+ must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ 8000960: b580 push {r7, lr}
+ 8000962: b082 sub sp, #8
+ 8000964: af00 add r7, sp, #0
+ 8000966: 6078 str r0, [r7, #4]
+ if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ 8000968: 687b ldr r3, [r7, #4]
+ 800096a: 3b01 subs r3, #1
+ 800096c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
+ 8000970: d301 bcc.n 8000976
+ {
+ return (1UL); /* Reload value impossible */
+ 8000972: 2301 movs r3, #1
+ 8000974: e00f b.n 8000996
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ 8000976: 4a0a ldr r2, [pc, #40] @ (80009a0 )
+ 8000978: 687b ldr r3, [r7, #4]
+ 800097a: 3b01 subs r3, #1
+ 800097c: 6053 str r3, [r2, #4]
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ 800097e: 210f movs r1, #15
+ 8000980: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
+ 8000984: f7ff ff90 bl 80008a8 <__NVIC_SetPriority>
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ 8000988: 4b05 ldr r3, [pc, #20] @ (80009a0 )
+ 800098a: 2200 movs r2, #0
+ 800098c: 609a str r2, [r3, #8]
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ 800098e: 4b04 ldr r3, [pc, #16] @ (80009a0 )
+ 8000990: 2207 movs r2, #7
+ 8000992: 601a str r2, [r3, #0]
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+ 8000994: 2300 movs r3, #0
+}
+ 8000996: 4618 mov r0, r3
+ 8000998: 3708 adds r7, #8
+ 800099a: 46bd mov sp, r7
+ 800099c: bd80 pop {r7, pc}
+ 800099e: bf00 nop
+ 80009a0: e000e010 .word 0xe000e010
+
+080009a4 :
+ * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
+ * The pending IRQ priority will be managed only by the subpriority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 80009a4: b580 push {r7, lr}
+ 80009a6: b082 sub sp, #8
+ 80009a8: af00 add r7, sp, #0
+ 80009aa: 6078 str r0, [r7, #4]
+ /* Check the parameters */
+ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+
+ /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+ NVIC_SetPriorityGrouping(PriorityGroup);
+ 80009ac: 6878 ldr r0, [r7, #4]
+ 80009ae: f7ff ff49 bl 8000844 <__NVIC_SetPriorityGrouping>
+}
+ 80009b2: bf00 nop
+ 80009b4: 3708 adds r7, #8
+ 80009b6: 46bd mov sp, r7
+ 80009b8: bd80 pop {r7, pc}
+
+080009ba :
+ * This parameter can be a value between 0 and 15
+ * A lower priority value indicates a higher priority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 80009ba: b580 push {r7, lr}
+ 80009bc: b086 sub sp, #24
+ 80009be: af00 add r7, sp, #0
+ 80009c0: 4603 mov r3, r0
+ 80009c2: 60b9 str r1, [r7, #8]
+ 80009c4: 607a str r2, [r7, #4]
+ 80009c6: 73fb strb r3, [r7, #15]
+ uint32_t prioritygroup = 0x00;
+ 80009c8: 2300 movs r3, #0
+ 80009ca: 617b str r3, [r7, #20]
+
+ /* Check the parameters */
+ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+
+ prioritygroup = NVIC_GetPriorityGrouping();
+ 80009cc: f7ff ff5e bl 800088c <__NVIC_GetPriorityGrouping>
+ 80009d0: 6178 str r0, [r7, #20]
+
+ NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 80009d2: 687a ldr r2, [r7, #4]
+ 80009d4: 68b9 ldr r1, [r7, #8]
+ 80009d6: 6978 ldr r0, [r7, #20]
+ 80009d8: f7ff ff90 bl 80008fc
+ 80009dc: 4602 mov r2, r0
+ 80009de: f997 300f ldrsb.w r3, [r7, #15]
+ 80009e2: 4611 mov r1, r2
+ 80009e4: 4618 mov r0, r3
+ 80009e6: f7ff ff5f bl 80008a8 <__NVIC_SetPriority>
+}
+ 80009ea: bf00 nop
+ 80009ec: 3718 adds r7, #24
+ 80009ee: 46bd mov sp, r7
+ 80009f0: bd80 pop {r7, pc}
+
+080009f2 :
+ * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
+ * @retval status: - 0 Function succeeded.
+ * - 1 Function failed.
+ */
+uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
+{
+ 80009f2: b580 push {r7, lr}
+ 80009f4: b082 sub sp, #8
+ 80009f6: af00 add r7, sp, #0
+ 80009f8: 6078 str r0, [r7, #4]
+ return SysTick_Config(TicksNumb);
+ 80009fa: 6878 ldr r0, [r7, #4]
+ 80009fc: f7ff ffb0 bl 8000960
+ 8000a00: 4603 mov r3, r0
+}
+ 8000a02: 4618 mov r0, r3
+ 8000a04: 3708 adds r7, #8
+ 8000a06: 46bd mov sp, r7
+ 8000a08: bd80 pop {r7, pc}
+ ...
+
+08000a0c :
+ * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
+ * the configuration information for the specified GPIO peripheral.
+ * @retval None
+ */
+void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+{
+ 8000a0c: b480 push {r7}
+ 8000a0e: b087 sub sp, #28
+ 8000a10: af00 add r7, sp, #0
+ 8000a12: 6078 str r0, [r7, #4]
+ 8000a14: 6039 str r1, [r7, #0]
+ uint32_t position = 0x00;
+ 8000a16: 2300 movs r3, #0
+ 8000a18: 617b str r3, [r7, #20]
+ uint32_t iocurrent = 0x00;
+ 8000a1a: 2300 movs r3, #0
+ 8000a1c: 60fb str r3, [r7, #12]
+ uint32_t temp = 0x00;
+ 8000a1e: 2300 movs r3, #0
+ 8000a20: 613b str r3, [r7, #16]
+ assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
+ assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
+ assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
+
+ /* Configure the port pins */
+ while (((GPIO_Init->Pin) >> position) != 0)
+ 8000a22: e160 b.n 8000ce6
+ {
+ /* Get current io position */
+ iocurrent = (GPIO_Init->Pin) & (1U << position);
+ 8000a24: 683b ldr r3, [r7, #0]
+ 8000a26: 681a ldr r2, [r3, #0]
+ 8000a28: 2101 movs r1, #1
+ 8000a2a: 697b ldr r3, [r7, #20]
+ 8000a2c: fa01 f303 lsl.w r3, r1, r3
+ 8000a30: 4013 ands r3, r2
+ 8000a32: 60fb str r3, [r7, #12]
+
+ if (iocurrent)
+ 8000a34: 68fb ldr r3, [r7, #12]
+ 8000a36: 2b00 cmp r3, #0
+ 8000a38: f000 8152 beq.w 8000ce0
+ {
+ /*--------------------- GPIO Mode Configuration ------------------------*/
+ /* In case of Output or Alternate function mode selection */
+ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
+ 8000a3c: 683b ldr r3, [r7, #0]
+ 8000a3e: 685b ldr r3, [r3, #4]
+ 8000a40: f003 0303 and.w r3, r3, #3
+ 8000a44: 2b01 cmp r3, #1
+ 8000a46: d005 beq.n 8000a54
+ ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
+ 8000a48: 683b ldr r3, [r7, #0]
+ 8000a4a: 685b ldr r3, [r3, #4]
+ 8000a4c: f003 0303 and.w r3, r3, #3
+ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
+ 8000a50: 2b02 cmp r3, #2
+ 8000a52: d130 bne.n 8000ab6
+ {
+ /* Check the Speed parameter */
+ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
+ /* Configure the IO Speed */
+ temp = GPIOx->OSPEEDR;
+ 8000a54: 687b ldr r3, [r7, #4]
+ 8000a56: 689b ldr r3, [r3, #8]
+ 8000a58: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
+ 8000a5a: 697b ldr r3, [r7, #20]
+ 8000a5c: 005b lsls r3, r3, #1
+ 8000a5e: 2203 movs r2, #3
+ 8000a60: fa02 f303 lsl.w r3, r2, r3
+ 8000a64: 43db mvns r3, r3
+ 8000a66: 693a ldr r2, [r7, #16]
+ 8000a68: 4013 ands r3, r2
+ 8000a6a: 613b str r3, [r7, #16]
+ SET_BIT(temp, GPIO_Init->Speed << (position * 2));
+ 8000a6c: 683b ldr r3, [r7, #0]
+ 8000a6e: 68da ldr r2, [r3, #12]
+ 8000a70: 697b ldr r3, [r7, #20]
+ 8000a72: 005b lsls r3, r3, #1
+ 8000a74: fa02 f303 lsl.w r3, r2, r3
+ 8000a78: 693a ldr r2, [r7, #16]
+ 8000a7a: 4313 orrs r3, r2
+ 8000a7c: 613b str r3, [r7, #16]
+ GPIOx->OSPEEDR = temp;
+ 8000a7e: 687b ldr r3, [r7, #4]
+ 8000a80: 693a ldr r2, [r7, #16]
+ 8000a82: 609a str r2, [r3, #8]
+
+ /* Configure the IO Output Type */
+ temp = GPIOx->OTYPER;
+ 8000a84: 687b ldr r3, [r7, #4]
+ 8000a86: 685b ldr r3, [r3, #4]
+ 8000a88: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
+ 8000a8a: 2201 movs r2, #1
+ 8000a8c: 697b ldr r3, [r7, #20]
+ 8000a8e: fa02 f303 lsl.w r3, r2, r3
+ 8000a92: 43db mvns r3, r3
+ 8000a94: 693a ldr r2, [r7, #16]
+ 8000a96: 4013 ands r3, r2
+ 8000a98: 613b str r3, [r7, #16]
+ SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
+ 8000a9a: 683b ldr r3, [r7, #0]
+ 8000a9c: 685b ldr r3, [r3, #4]
+ 8000a9e: 091b lsrs r3, r3, #4
+ 8000aa0: f003 0201 and.w r2, r3, #1
+ 8000aa4: 697b ldr r3, [r7, #20]
+ 8000aa6: fa02 f303 lsl.w r3, r2, r3
+ 8000aaa: 693a ldr r2, [r7, #16]
+ 8000aac: 4313 orrs r3, r2
+ 8000aae: 613b str r3, [r7, #16]
+ GPIOx->OTYPER = temp;
+ 8000ab0: 687b ldr r3, [r7, #4]
+ 8000ab2: 693a ldr r2, [r7, #16]
+ 8000ab4: 605a str r2, [r3, #4]
+ }
+
+ if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
+ 8000ab6: 683b ldr r3, [r7, #0]
+ 8000ab8: 685b ldr r3, [r3, #4]
+ 8000aba: f003 0303 and.w r3, r3, #3
+ 8000abe: 2b03 cmp r3, #3
+ 8000ac0: d017 beq.n 8000af2
+ {
+ /* Check the Pull parameter */
+ assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
+
+ /* Activate the Pull-up or Pull down resistor for the current IO */
+ temp = GPIOx->PUPDR;
+ 8000ac2: 687b ldr r3, [r7, #4]
+ 8000ac4: 68db ldr r3, [r3, #12]
+ 8000ac6: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
+ 8000ac8: 697b ldr r3, [r7, #20]
+ 8000aca: 005b lsls r3, r3, #1
+ 8000acc: 2203 movs r2, #3
+ 8000ace: fa02 f303 lsl.w r3, r2, r3
+ 8000ad2: 43db mvns r3, r3
+ 8000ad4: 693a ldr r2, [r7, #16]
+ 8000ad6: 4013 ands r3, r2
+ 8000ad8: 613b str r3, [r7, #16]
+ SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
+ 8000ada: 683b ldr r3, [r7, #0]
+ 8000adc: 689a ldr r2, [r3, #8]
+ 8000ade: 697b ldr r3, [r7, #20]
+ 8000ae0: 005b lsls r3, r3, #1
+ 8000ae2: fa02 f303 lsl.w r3, r2, r3
+ 8000ae6: 693a ldr r2, [r7, #16]
+ 8000ae8: 4313 orrs r3, r2
+ 8000aea: 613b str r3, [r7, #16]
+ GPIOx->PUPDR = temp;
+ 8000aec: 687b ldr r3, [r7, #4]
+ 8000aee: 693a ldr r2, [r7, #16]
+ 8000af0: 60da str r2, [r3, #12]
+ }
+
+ /* In case of Alternate function mode selection */
+ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
+ 8000af2: 683b ldr r3, [r7, #0]
+ 8000af4: 685b ldr r3, [r3, #4]
+ 8000af6: f003 0303 and.w r3, r3, #3
+ 8000afa: 2b02 cmp r3, #2
+ 8000afc: d123 bne.n 8000b46
+ assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
+ assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+
+ /* Configure Alternate function mapped with the current IO */
+ /* Identify AFRL or AFRH register based on IO position*/
+ temp = GPIOx->AFR[position >> 3];
+ 8000afe: 697b ldr r3, [r7, #20]
+ 8000b00: 08da lsrs r2, r3, #3
+ 8000b02: 687b ldr r3, [r7, #4]
+ 8000b04: 3208 adds r2, #8
+ 8000b06: f853 3022 ldr.w r3, [r3, r2, lsl #2]
+ 8000b0a: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
+ 8000b0c: 697b ldr r3, [r7, #20]
+ 8000b0e: f003 0307 and.w r3, r3, #7
+ 8000b12: 009b lsls r3, r3, #2
+ 8000b14: 220f movs r2, #15
+ 8000b16: fa02 f303 lsl.w r3, r2, r3
+ 8000b1a: 43db mvns r3, r3
+ 8000b1c: 693a ldr r2, [r7, #16]
+ 8000b1e: 4013 ands r3, r2
+ 8000b20: 613b str r3, [r7, #16]
+ SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
+ 8000b22: 683b ldr r3, [r7, #0]
+ 8000b24: 691a ldr r2, [r3, #16]
+ 8000b26: 697b ldr r3, [r7, #20]
+ 8000b28: f003 0307 and.w r3, r3, #7
+ 8000b2c: 009b lsls r3, r3, #2
+ 8000b2e: fa02 f303 lsl.w r3, r2, r3
+ 8000b32: 693a ldr r2, [r7, #16]
+ 8000b34: 4313 orrs r3, r2
+ 8000b36: 613b str r3, [r7, #16]
+ GPIOx->AFR[position >> 3] = temp;
+ 8000b38: 697b ldr r3, [r7, #20]
+ 8000b3a: 08da lsrs r2, r3, #3
+ 8000b3c: 687b ldr r3, [r7, #4]
+ 8000b3e: 3208 adds r2, #8
+ 8000b40: 6939 ldr r1, [r7, #16]
+ 8000b42: f843 1022 str.w r1, [r3, r2, lsl #2]
+ }
+
+ /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+ temp = GPIOx->MODER;
+ 8000b46: 687b ldr r3, [r7, #4]
+ 8000b48: 681b ldr r3, [r3, #0]
+ 8000b4a: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
+ 8000b4c: 697b ldr r3, [r7, #20]
+ 8000b4e: 005b lsls r3, r3, #1
+ 8000b50: 2203 movs r2, #3
+ 8000b52: fa02 f303 lsl.w r3, r2, r3
+ 8000b56: 43db mvns r3, r3
+ 8000b58: 693a ldr r2, [r7, #16]
+ 8000b5a: 4013 ands r3, r2
+ 8000b5c: 613b str r3, [r7, #16]
+ SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
+ 8000b5e: 683b ldr r3, [r7, #0]
+ 8000b60: 685b ldr r3, [r3, #4]
+ 8000b62: f003 0203 and.w r2, r3, #3
+ 8000b66: 697b ldr r3, [r7, #20]
+ 8000b68: 005b lsls r3, r3, #1
+ 8000b6a: fa02 f303 lsl.w r3, r2, r3
+ 8000b6e: 693a ldr r2, [r7, #16]
+ 8000b70: 4313 orrs r3, r2
+ 8000b72: 613b str r3, [r7, #16]
+ GPIOx->MODER = temp;
+ 8000b74: 687b ldr r3, [r7, #4]
+ 8000b76: 693a ldr r2, [r7, #16]
+ 8000b78: 601a str r2, [r3, #0]
+
+ /*--------------------- EXTI Mode Configuration ------------------------*/
+ /* Configure the External Interrupt or event for the current IO */
+ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
+ 8000b7a: 683b ldr r3, [r7, #0]
+ 8000b7c: 685b ldr r3, [r3, #4]
+ 8000b7e: f403 3340 and.w r3, r3, #196608 @ 0x30000
+ 8000b82: 2b00 cmp r3, #0
+ 8000b84: f000 80ac beq.w 8000ce0
+ {
+ /* Enable SYSCFG Clock */
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8000b88: 4b5e ldr r3, [pc, #376] @ (8000d04 )
+ 8000b8a: 6a1b ldr r3, [r3, #32]
+ 8000b8c: 4a5d ldr r2, [pc, #372] @ (8000d04 )
+ 8000b8e: f043 0301 orr.w r3, r3, #1
+ 8000b92: 6213 str r3, [r2, #32]
+ 8000b94: 4b5b ldr r3, [pc, #364] @ (8000d04 )
+ 8000b96: 6a1b ldr r3, [r3, #32]
+ 8000b98: f003 0301 and.w r3, r3, #1
+ 8000b9c: 60bb str r3, [r7, #8]
+ 8000b9e: 68bb ldr r3, [r7, #8]
+
+ temp = SYSCFG->EXTICR[position >> 2];
+ 8000ba0: 4a59 ldr r2, [pc, #356] @ (8000d08 )
+ 8000ba2: 697b ldr r3, [r7, #20]
+ 8000ba4: 089b lsrs r3, r3, #2
+ 8000ba6: 3302 adds r3, #2
+ 8000ba8: f852 3023 ldr.w r3, [r2, r3, lsl #2]
+ 8000bac: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
+ 8000bae: 697b ldr r3, [r7, #20]
+ 8000bb0: f003 0303 and.w r3, r3, #3
+ 8000bb4: 009b lsls r3, r3, #2
+ 8000bb6: 220f movs r2, #15
+ 8000bb8: fa02 f303 lsl.w r3, r2, r3
+ 8000bbc: 43db mvns r3, r3
+ 8000bbe: 693a ldr r2, [r7, #16]
+ 8000bc0: 4013 ands r3, r2
+ 8000bc2: 613b str r3, [r7, #16]
+ SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
+ 8000bc4: 687b ldr r3, [r7, #4]
+ 8000bc6: 4a51 ldr r2, [pc, #324] @ (8000d0c )
+ 8000bc8: 4293 cmp r3, r2
+ 8000bca: d025 beq.n 8000c18
+ 8000bcc: 687b ldr r3, [r7, #4]
+ 8000bce: 4a50 ldr r2, [pc, #320] @ (8000d10 )
+ 8000bd0: 4293 cmp r3, r2
+ 8000bd2: d01f beq.n 8000c14
+ 8000bd4: 687b ldr r3, [r7, #4]
+ 8000bd6: 4a4f ldr r2, [pc, #316] @ (8000d14 )
+ 8000bd8: 4293 cmp r3, r2
+ 8000bda: d019 beq.n 8000c10
+ 8000bdc: 687b ldr r3, [r7, #4]
+ 8000bde: 4a4e ldr r2, [pc, #312] @ (8000d18 )
+ 8000be0: 4293 cmp r3, r2
+ 8000be2: d013 beq.n 8000c0c
+ 8000be4: 687b ldr r3, [r7, #4]
+ 8000be6: 4a4d ldr r2, [pc, #308] @ (8000d1c )
+ 8000be8: 4293 cmp r3, r2
+ 8000bea: d00d beq.n 8000c08
+ 8000bec: 687b ldr r3, [r7, #4]
+ 8000bee: 4a4c ldr r2, [pc, #304] @ (8000d20 )
+ 8000bf0: 4293 cmp r3, r2
+ 8000bf2: d007 beq.n 8000c04
+ 8000bf4: 687b ldr r3, [r7, #4]
+ 8000bf6: 4a4b ldr r2, [pc, #300] @ (8000d24 )
+ 8000bf8: 4293 cmp r3, r2
+ 8000bfa: d101 bne.n 8000c00
+ 8000bfc: 2306 movs r3, #6
+ 8000bfe: e00c b.n 8000c1a
+ 8000c00: 2307 movs r3, #7
+ 8000c02: e00a b.n 8000c1a
+ 8000c04: 2305 movs r3, #5
+ 8000c06: e008 b.n 8000c1a
+ 8000c08: 2304 movs r3, #4
+ 8000c0a: e006 b.n 8000c1a
+ 8000c0c: 2303 movs r3, #3
+ 8000c0e: e004 b.n 8000c1a
+ 8000c10: 2302 movs r3, #2
+ 8000c12: e002 b.n 8000c1a
+ 8000c14: 2301 movs r3, #1
+ 8000c16: e000 b.n 8000c1a
+ 8000c18: 2300 movs r3, #0
+ 8000c1a: 697a ldr r2, [r7, #20]
+ 8000c1c: f002 0203 and.w r2, r2, #3
+ 8000c20: 0092 lsls r2, r2, #2
+ 8000c22: 4093 lsls r3, r2
+ 8000c24: 693a ldr r2, [r7, #16]
+ 8000c26: 4313 orrs r3, r2
+ 8000c28: 613b str r3, [r7, #16]
+ SYSCFG->EXTICR[position >> 2] = temp;
+ 8000c2a: 4937 ldr r1, [pc, #220] @ (8000d08 )
+ 8000c2c: 697b ldr r3, [r7, #20]
+ 8000c2e: 089b lsrs r3, r3, #2
+ 8000c30: 3302 adds r3, #2
+ 8000c32: 693a ldr r2, [r7, #16]
+ 8000c34: f841 2023 str.w r2, [r1, r3, lsl #2]
+
+ /* Clear Rising Falling edge configuration */
+ temp = EXTI->RTSR;
+ 8000c38: 4b3b ldr r3, [pc, #236] @ (8000d28 )
+ 8000c3a: 689b ldr r3, [r3, #8]
+ 8000c3c: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, (uint32_t)iocurrent);
+ 8000c3e: 68fb ldr r3, [r7, #12]
+ 8000c40: 43db mvns r3, r3
+ 8000c42: 693a ldr r2, [r7, #16]
+ 8000c44: 4013 ands r3, r2
+ 8000c46: 613b str r3, [r7, #16]
+ if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
+ 8000c48: 683b ldr r3, [r7, #0]
+ 8000c4a: 685b ldr r3, [r3, #4]
+ 8000c4c: f403 1380 and.w r3, r3, #1048576 @ 0x100000
+ 8000c50: 2b00 cmp r3, #0
+ 8000c52: d003 beq.n 8000c5c
+ {
+ SET_BIT(temp, iocurrent);
+ 8000c54: 693a ldr r2, [r7, #16]
+ 8000c56: 68fb ldr r3, [r7, #12]
+ 8000c58: 4313 orrs r3, r2
+ 8000c5a: 613b str r3, [r7, #16]
+ }
+ EXTI->RTSR = temp;
+ 8000c5c: 4a32 ldr r2, [pc, #200] @ (8000d28 )
+ 8000c5e: 693b ldr r3, [r7, #16]
+ 8000c60: 6093 str r3, [r2, #8]
+
+ temp = EXTI->FTSR;
+ 8000c62: 4b31 ldr r3, [pc, #196] @ (8000d28 )
+ 8000c64: 68db ldr r3, [r3, #12]
+ 8000c66: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, (uint32_t)iocurrent);
+ 8000c68: 68fb ldr r3, [r7, #12]
+ 8000c6a: 43db mvns r3, r3
+ 8000c6c: 693a ldr r2, [r7, #16]
+ 8000c6e: 4013 ands r3, r2
+ 8000c70: 613b str r3, [r7, #16]
+ if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
+ 8000c72: 683b ldr r3, [r7, #0]
+ 8000c74: 685b ldr r3, [r3, #4]
+ 8000c76: f403 1300 and.w r3, r3, #2097152 @ 0x200000
+ 8000c7a: 2b00 cmp r3, #0
+ 8000c7c: d003 beq.n 8000c86
+ {
+ SET_BIT(temp, iocurrent);
+ 8000c7e: 693a ldr r2, [r7, #16]
+ 8000c80: 68fb ldr r3, [r7, #12]
+ 8000c82: 4313 orrs r3, r2
+ 8000c84: 613b str r3, [r7, #16]
+ }
+ EXTI->FTSR = temp;
+ 8000c86: 4a28 ldr r2, [pc, #160] @ (8000d28 )
+ 8000c88: 693b ldr r3, [r7, #16]
+ 8000c8a: 60d3 str r3, [r2, #12]
+
+ temp = EXTI->EMR;
+ 8000c8c: 4b26 ldr r3, [pc, #152] @ (8000d28 )
+ 8000c8e: 685b ldr r3, [r3, #4]
+ 8000c90: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, (uint32_t)iocurrent);
+ 8000c92: 68fb ldr r3, [r7, #12]
+ 8000c94: 43db mvns r3, r3
+ 8000c96: 693a ldr r2, [r7, #16]
+ 8000c98: 4013 ands r3, r2
+ 8000c9a: 613b str r3, [r7, #16]
+ if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
+ 8000c9c: 683b ldr r3, [r7, #0]
+ 8000c9e: 685b ldr r3, [r3, #4]
+ 8000ca0: f403 3300 and.w r3, r3, #131072 @ 0x20000
+ 8000ca4: 2b00 cmp r3, #0
+ 8000ca6: d003 beq.n 8000cb0
+ {
+ SET_BIT(temp, iocurrent);
+ 8000ca8: 693a ldr r2, [r7, #16]
+ 8000caa: 68fb ldr r3, [r7, #12]
+ 8000cac: 4313 orrs r3, r2
+ 8000cae: 613b str r3, [r7, #16]
+ }
+ EXTI->EMR = temp;
+ 8000cb0: 4a1d ldr r2, [pc, #116] @ (8000d28 )
+ 8000cb2: 693b ldr r3, [r7, #16]
+ 8000cb4: 6053 str r3, [r2, #4]
+
+ /* Clear EXTI line configuration */
+ temp = EXTI->IMR;
+ 8000cb6: 4b1c ldr r3, [pc, #112] @ (8000d28 )
+ 8000cb8: 681b ldr r3, [r3, #0]
+ 8000cba: 613b str r3, [r7, #16]
+ CLEAR_BIT(temp, (uint32_t)iocurrent);
+ 8000cbc: 68fb ldr r3, [r7, #12]
+ 8000cbe: 43db mvns r3, r3
+ 8000cc0: 693a ldr r2, [r7, #16]
+ 8000cc2: 4013 ands r3, r2
+ 8000cc4: 613b str r3, [r7, #16]
+ if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
+ 8000cc6: 683b ldr r3, [r7, #0]
+ 8000cc8: 685b ldr r3, [r3, #4]
+ 8000cca: f403 3380 and.w r3, r3, #65536 @ 0x10000
+ 8000cce: 2b00 cmp r3, #0
+ 8000cd0: d003 beq.n 8000cda
+ {
+ SET_BIT(temp, iocurrent);
+ 8000cd2: 693a ldr r2, [r7, #16]
+ 8000cd4: 68fb ldr r3, [r7, #12]
+ 8000cd6: 4313 orrs r3, r2
+ 8000cd8: 613b str r3, [r7, #16]
+ }
+ EXTI->IMR = temp;
+ 8000cda: 4a13 ldr r2, [pc, #76] @ (8000d28 )
+ 8000cdc: 693b ldr r3, [r7, #16]
+ 8000cde: 6013 str r3, [r2, #0]
+ }
+ }
+
+ position++;
+ 8000ce0: 697b ldr r3, [r7, #20]
+ 8000ce2: 3301 adds r3, #1
+ 8000ce4: 617b str r3, [r7, #20]
+ while (((GPIO_Init->Pin) >> position) != 0)
+ 8000ce6: 683b ldr r3, [r7, #0]
+ 8000ce8: 681a ldr r2, [r3, #0]
+ 8000cea: 697b ldr r3, [r7, #20]
+ 8000cec: fa22 f303 lsr.w r3, r2, r3
+ 8000cf0: 2b00 cmp r3, #0
+ 8000cf2: f47f ae97 bne.w 8000a24
+ }
+}
+ 8000cf6: bf00 nop
+ 8000cf8: bf00 nop
+ 8000cfa: 371c adds r7, #28
+ 8000cfc: 46bd mov sp, r7
+ 8000cfe: bc80 pop {r7}
+ 8000d00: 4770 bx lr
+ 8000d02: bf00 nop
+ 8000d04: 40023800 .word 0x40023800
+ 8000d08: 40010000 .word 0x40010000
+ 8000d0c: 40020000 .word 0x40020000
+ 8000d10: 40020400 .word 0x40020400
+ 8000d14: 40020800 .word 0x40020800
+ 8000d18: 40020c00 .word 0x40020c00
+ 8000d1c: 40021000 .word 0x40021000
+ 8000d20: 40021400 .word 0x40021400
+ 8000d24: 40021800 .word 0x40021800
+ 8000d28: 40010400 .word 0x40010400
+
+08000d2c :
+ * @arg GPIO_PIN_RESET: to clear the port pin
+ * @arg GPIO_PIN_SET: to set the port pin
+ * @retval None
+ */
+void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
+{
+ 8000d2c: b480 push {r7}
+ 8000d2e: b083 sub sp, #12
+ 8000d30: af00 add r7, sp, #0
+ 8000d32: 6078 str r0, [r7, #4]
+ 8000d34: 460b mov r3, r1
+ 8000d36: 807b strh r3, [r7, #2]
+ 8000d38: 4613 mov r3, r2
+ 8000d3a: 707b strb r3, [r7, #1]
+ /* Check the parameters */
+ assert_param(IS_GPIO_PIN(GPIO_Pin));
+ assert_param(IS_GPIO_PIN_ACTION(PinState));
+
+ if (PinState != GPIO_PIN_RESET)
+ 8000d3c: 787b ldrb r3, [r7, #1]
+ 8000d3e: 2b00 cmp r3, #0
+ 8000d40: d003 beq.n 8000d4a
+ {
+ GPIOx->BSRR = (uint32_t)GPIO_Pin;
+ 8000d42: 887a ldrh r2, [r7, #2]
+ 8000d44: 687b ldr r3, [r7, #4]
+ 8000d46: 619a str r2, [r3, #24]
+ }
+ else
+ {
+ GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
+ }
+}
+ 8000d48: e003 b.n 8000d52
+ GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
+ 8000d4a: 887b ldrh r3, [r7, #2]
+ 8000d4c: 041a lsls r2, r3, #16
+ 8000d4e: 687b ldr r3, [r7, #4]
+ 8000d50: 619a str r2, [r3, #24]
+}
+ 8000d52: bf00 nop
+ 8000d54: 370c adds r7, #12
+ 8000d56: 46bd mov sp, r7
+ 8000d58: bc80 pop {r7}
+ 8000d5a: 4770 bx lr
+
+08000d5c :
+ * supported by this macro. User should request a transition to HSE Off
+ * first and then HSE On or HSE Bypass.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
+{
+ 8000d5c: b580 push {r7, lr}
+ 8000d5e: b088 sub sp, #32
+ 8000d60: af00 add r7, sp, #0
+ 8000d62: 6078 str r0, [r7, #4]
+ uint32_t tickstart;
+ HAL_StatusTypeDef status;
+ uint32_t sysclk_source, pll_config;
+
+ /* Check the parameters */
+ if(RCC_OscInitStruct == NULL)
+ 8000d64: 687b ldr r3, [r7, #4]
+ 8000d66: 2b00 cmp r3, #0
+ 8000d68: d101 bne.n 8000d6e
+ {
+ return HAL_ERROR;
+ 8000d6a: 2301 movs r3, #1
+ 8000d6c: e31d b.n 80013aa
+ }
+
+ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+
+ sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
+ 8000d6e: 4b94 ldr r3, [pc, #592] @ (8000fc0 )
+ 8000d70: 689b ldr r3, [r3, #8]
+ 8000d72: f003 030c and.w r3, r3, #12
+ 8000d76: 61bb str r3, [r7, #24]
+ pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
+ 8000d78: 4b91 ldr r3, [pc, #580] @ (8000fc0 )
+ 8000d7a: 689b ldr r3, [r3, #8]
+ 8000d7c: f403 3380 and.w r3, r3, #65536 @ 0x10000
+ 8000d80: 617b str r3, [r7, #20]
+
+ /*------------------------------- HSE Configuration ------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 8000d82: 687b ldr r3, [r7, #4]
+ 8000d84: 681b ldr r3, [r3, #0]
+ 8000d86: f003 0301 and.w r3, r3, #1
+ 8000d8a: 2b00 cmp r3, #0
+ 8000d8c: d07b beq.n 8000e86
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+
+ /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
+ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
+ 8000d8e: 69bb ldr r3, [r7, #24]
+ 8000d90: 2b08 cmp r3, #8
+ 8000d92: d006 beq.n 8000da2
+ || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
+ 8000d94: 69bb ldr r3, [r7, #24]
+ 8000d96: 2b0c cmp r3, #12
+ 8000d98: d10f bne.n 8000dba
+ 8000d9a: 697b ldr r3, [r7, #20]
+ 8000d9c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
+ 8000da0: d10b bne.n 8000dba
+ {
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8000da2: 4b87 ldr r3, [pc, #540] @ (8000fc0 )
+ 8000da4: 681b ldr r3, [r3, #0]
+ 8000da6: f403 3300 and.w r3, r3, #131072 @ 0x20000
+ 8000daa: 2b00 cmp r3, #0
+ 8000dac: d06a beq.n 8000e84
+ 8000dae: 687b ldr r3, [r7, #4]
+ 8000db0: 685b ldr r3, [r3, #4]
+ 8000db2: 2b00 cmp r3, #0
+ 8000db4: d166 bne.n 8000e84
+ {
+ return HAL_ERROR;
+ 8000db6: 2301 movs r3, #1
+ 8000db8: e2f7 b.n 80013aa
+ }
+ }
+ else
+ {
+ /* Set the new HSE configuration ---------------------------------------*/
+ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8000dba: 687b ldr r3, [r7, #4]
+ 8000dbc: 685b ldr r3, [r3, #4]
+ 8000dbe: 2b01 cmp r3, #1
+ 8000dc0: d106 bne.n 8000dd0
+ 8000dc2: 4b7f ldr r3, [pc, #508] @ (8000fc0 )
+ 8000dc4: 681b ldr r3, [r3, #0]
+ 8000dc6: 4a7e ldr r2, [pc, #504] @ (8000fc0 )
+ 8000dc8: f443 3380 orr.w r3, r3, #65536 @ 0x10000
+ 8000dcc: 6013 str r3, [r2, #0]
+ 8000dce: e02d b.n 8000e2c
+ 8000dd0: 687b ldr r3, [r7, #4]
+ 8000dd2: 685b ldr r3, [r3, #4]
+ 8000dd4: 2b00 cmp r3, #0
+ 8000dd6: d10c bne.n 8000df2
+ 8000dd8: 4b79 ldr r3, [pc, #484] @ (8000fc0 )
+ 8000dda: 681b ldr r3, [r3, #0]
+ 8000ddc: 4a78 ldr r2, [pc, #480] @ (8000fc0 )
+ 8000dde: f423 3380 bic.w r3, r3, #65536 @ 0x10000
+ 8000de2: 6013 str r3, [r2, #0]
+ 8000de4: 4b76 ldr r3, [pc, #472] @ (8000fc0 )
+ 8000de6: 681b ldr r3, [r3, #0]
+ 8000de8: 4a75 ldr r2, [pc, #468] @ (8000fc0 )
+ 8000dea: f423 2380 bic.w r3, r3, #262144 @ 0x40000
+ 8000dee: 6013 str r3, [r2, #0]
+ 8000df0: e01c b.n 8000e2c
+ 8000df2: 687b ldr r3, [r7, #4]
+ 8000df4: 685b ldr r3, [r3, #4]
+ 8000df6: 2b05 cmp r3, #5
+ 8000df8: d10c bne.n 8000e14
+ 8000dfa: 4b71 ldr r3, [pc, #452] @ (8000fc0 )
+ 8000dfc: 681b ldr r3, [r3, #0]
+ 8000dfe: 4a70 ldr r2, [pc, #448] @ (8000fc0 )
+ 8000e00: f443 2380 orr.w r3, r3, #262144 @ 0x40000
+ 8000e04: 6013 str r3, [r2, #0]
+ 8000e06: 4b6e ldr r3, [pc, #440] @ (8000fc0 )
+ 8000e08: 681b ldr r3, [r3, #0]
+ 8000e0a: 4a6d ldr r2, [pc, #436] @ (8000fc0 )
+ 8000e0c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
+ 8000e10: 6013 str r3, [r2, #0]
+ 8000e12: e00b b.n 8000e2c
+ 8000e14: 4b6a ldr r3, [pc, #424] @ (8000fc0 )
+ 8000e16: 681b ldr r3, [r3, #0]
+ 8000e18: 4a69 ldr r2, [pc, #420] @ (8000fc0 )
+ 8000e1a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
+ 8000e1e: 6013 str r3, [r2, #0]
+ 8000e20: 4b67 ldr r3, [pc, #412] @ (8000fc0 )
+ 8000e22: 681b ldr r3, [r3, #0]
+ 8000e24: 4a66 ldr r2, [pc, #408] @ (8000fc0 )
+ 8000e26: f423 2380 bic.w r3, r3, #262144 @ 0x40000
+ 8000e2a: 6013 str r3, [r2, #0]
+
+ /* Check the HSE State */
+ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
+ 8000e2c: 687b ldr r3, [r7, #4]
+ 8000e2e: 685b ldr r3, [r3, #4]
+ 8000e30: 2b00 cmp r3, #0
+ 8000e32: d013 beq.n 8000e5c
+ {
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 8000e34: f7ff fcfc bl 8000830
+ 8000e38: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is ready */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
+ 8000e3a: e008 b.n 8000e4e
+ {
+ if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
+ 8000e3c: f7ff fcf8 bl 8000830
+ 8000e40: 4602 mov r2, r0
+ 8000e42: 693b ldr r3, [r7, #16]
+ 8000e44: 1ad3 subs r3, r2, r3
+ 8000e46: 2b64 cmp r3, #100 @ 0x64
+ 8000e48: d901 bls.n 8000e4e
+ {
+ return HAL_TIMEOUT;
+ 8000e4a: 2303 movs r3, #3
+ 8000e4c: e2ad b.n 80013aa
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
+ 8000e4e: 4b5c ldr r3, [pc, #368] @ (8000fc0 )
+ 8000e50: 681b ldr r3, [r3, #0]
+ 8000e52: f403 3300 and.w r3, r3, #131072 @ 0x20000
+ 8000e56: 2b00 cmp r3, #0
+ 8000e58: d0f0 beq.n 8000e3c
+ 8000e5a: e014 b.n 8000e86
+ }
+ }
+ else
+ {
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 8000e5c: f7ff fce8 bl 8000830
+ 8000e60: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is disabled */
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
+ 8000e62: e008 b.n 8000e76
+ {
+ if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
+ 8000e64: f7ff fce4 bl 8000830
+ 8000e68: 4602 mov r2, r0
+ 8000e6a: 693b ldr r3, [r7, #16]
+ 8000e6c: 1ad3 subs r3, r2, r3
+ 8000e6e: 2b64 cmp r3, #100 @ 0x64
+ 8000e70: d901 bls.n 8000e76
+ {
+ return HAL_TIMEOUT;
+ 8000e72: 2303 movs r3, #3
+ 8000e74: e299 b.n 80013aa
+ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
+ 8000e76: 4b52 ldr r3, [pc, #328] @ (8000fc0 )
+ 8000e78: 681b ldr r3, [r3, #0]
+ 8000e7a: f403 3300 and.w r3, r3, #131072 @ 0x20000
+ 8000e7e: 2b00 cmp r3, #0
+ 8000e80: d1f0 bne.n 8000e64
+ 8000e82: e000 b.n 8000e86
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8000e84: bf00 nop
+ }
+ }
+ }
+ }
+ /*----------------------------- HSI Configuration --------------------------*/
+ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8000e86: 687b ldr r3, [r7, #4]
+ 8000e88: 681b ldr r3, [r3, #0]
+ 8000e8a: f003 0302 and.w r3, r3, #2
+ 8000e8e: 2b00 cmp r3, #0
+ 8000e90: d05a beq.n 8000f48
+ /* Check the parameters */
+ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+ assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+ /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
+ 8000e92: 69bb ldr r3, [r7, #24]
+ 8000e94: 2b04 cmp r3, #4
+ 8000e96: d005 beq.n 8000ea4
+ || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
+ 8000e98: 69bb ldr r3, [r7, #24]
+ 8000e9a: 2b0c cmp r3, #12
+ 8000e9c: d119 bne.n 8000ed2
+ 8000e9e: 697b ldr r3, [r7, #20]
+ 8000ea0: 2b00 cmp r3, #0
+ 8000ea2: d116 bne.n 8000ed2
+ {
+ /* When HSI is used as system clock it will not disabled */
+ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8000ea4: 4b46 ldr r3, [pc, #280] @ (8000fc0 )
+ 8000ea6: 681b ldr r3, [r3, #0]
+ 8000ea8: f003 0302 and.w r3, r3, #2
+ 8000eac: 2b00 cmp r3, #0
+ 8000eae: d005 beq.n 8000ebc
+ 8000eb0: 687b ldr r3, [r7, #4]
+ 8000eb2: 68db ldr r3, [r3, #12]
+ 8000eb4: 2b01 cmp r3, #1
+ 8000eb6: d001 beq.n 8000ebc
+ {
+ return HAL_ERROR;
+ 8000eb8: 2301 movs r3, #1
+ 8000eba: e276 b.n 80013aa