From 06bcff95c0411907214f8a3e7dc46d5bb20615d0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?F=C3=A9lix=20MARQUET?=
<72651575+BreizhHardware@users.noreply.github.com>
Date: Tue, 17 Jun 2025 16:59:14 +0200
Subject: [PATCH] TP1 Exo 2
---
TP1/.cproject | 32 +-
TP1/.project | 2 +-
TP1/{TP1.ioc => TP1_somme.ioc} | 0
TP1_BPLED1/.cproject | 172 +
TP1_BPLED1/.mxproject | 25 +
TP1_BPLED1/.project | 32 +
.../com.st.stm32cube.ide.mcu.sfrview.prefs | 2 +
TP1_BPLED1/.settings/language.settings.xml | 25 +
.../org.eclipse.core.resources.prefs | 2 +
.../.settings/stm32cubeide.project.prefs | 5 +
TP1_BPLED1/Core/Inc/main.h | 69 +
TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h | 318 +
TP1_BPLED1/Core/Inc/stm32l1xx_it.h | 66 +
TP1_BPLED1/Core/Src/main.c | 252 +
TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c | 83 +
TP1_BPLED1/Core/Src/stm32l1xx_it.c | 203 +
TP1_BPLED1/Core/Src/syscalls.c | 176 +
TP1_BPLED1/Core/Src/sysmem.c | 79 +
TP1_BPLED1/Core/Src/system_stm32l1xx.c | 428 +
.../Core/Startup/startup_stm32l152retx.s | 413 +
TP1_BPLED1/Debug/Core/Src/main.cyclo | 8 +
TP1_BPLED1/Debug/Core/Src/main.d | 50 +
TP1_BPLED1/Debug/Core/Src/main.o | Bin 0 -> 705660 bytes
TP1_BPLED1/Debug/Core/Src/main.su | 8 +
.../Debug/Core/Src/stm32l1xx_hal_msp.cyclo | 1 +
TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.d | 50 +
TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.o | Bin 0 -> 700308 bytes
.../Debug/Core/Src/stm32l1xx_hal_msp.su | 1 +
TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.cyclo | 9 +
TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.d | 52 +
TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.o | Bin 0 -> 701968 bytes
TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.su | 9 +
TP1_BPLED1/Debug/Core/Src/subdir.mk | 42 +
TP1_BPLED1/Debug/Core/Src/syscalls.cyclo | 18 +
TP1_BPLED1/Debug/Core/Src/syscalls.d | 1 +
TP1_BPLED1/Debug/Core/Src/syscalls.o | Bin 0 -> 83420 bytes
TP1_BPLED1/Debug/Core/Src/syscalls.su | 18 +
TP1_BPLED1/Debug/Core/Src/sysmem.cyclo | 1 +
TP1_BPLED1/Debug/Core/Src/sysmem.d | 1 +
TP1_BPLED1/Debug/Core/Src/sysmem.o | Bin 0 -> 55888 bytes
TP1_BPLED1/Debug/Core/Src/sysmem.su | 1 +
.../Debug/Core/Src/system_stm32l1xx.cyclo | 2 +
TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.d | 49 +
TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.o | Bin 0 -> 702152 bytes
TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.su | 2 +
.../Core/Startup/startup_stm32l152retx.d | 2 +
.../Core/Startup/startup_stm32l152retx.o | Bin 0 -> 6028 bytes
TP1_BPLED1/Debug/Core/Startup/subdir.mk | 27 +
.../Src/stm32l1xx_hal.cyclo | 25 +
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d | 50 +
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o | Bin 0 -> 713236 bytes
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su | 25 +
.../Src/stm32l1xx_hal_cortex.cyclo | 34 +
.../Src/stm32l1xx_hal_cortex.d | 50 +
.../Src/stm32l1xx_hal_cortex.o | Bin 0 -> 719332 bytes
.../Src/stm32l1xx_hal_cortex.su | 34 +
.../Src/stm32l1xx_hal_dma.cyclo | 13 +
.../Src/stm32l1xx_hal_dma.d | 50 +
.../Src/stm32l1xx_hal_dma.o | Bin 0 -> 710204 bytes
.../Src/stm32l1xx_hal_dma.su | 13 +
.../Src/stm32l1xx_hal_exti.cyclo | 9 +
.../Src/stm32l1xx_hal_exti.d | 50 +
.../Src/stm32l1xx_hal_exti.o | Bin 0 -> 705908 bytes
.../Src/stm32l1xx_hal_exti.su | 9 +
.../Src/stm32l1xx_hal_flash.cyclo | 13 +
.../Src/stm32l1xx_hal_flash.d | 50 +
.../Src/stm32l1xx_hal_flash.o | Bin 0 -> 707900 bytes
.../Src/stm32l1xx_hal_flash.su | 13 +
.../Src/stm32l1xx_hal_flash_ex.cyclo | 31 +
.../Src/stm32l1xx_hal_flash_ex.d | 50 +
.../Src/stm32l1xx_hal_flash_ex.o | Bin 0 -> 721168 bytes
.../Src/stm32l1xx_hal_flash_ex.su | 31 +
.../Src/stm32l1xx_hal_flash_ramfunc.cyclo | 10 +
.../Src/stm32l1xx_hal_flash_ramfunc.d | 50 +
.../Src/stm32l1xx_hal_flash_ramfunc.o | Bin 0 -> 706768 bytes
.../Src/stm32l1xx_hal_flash_ramfunc.su | 10 +
.../Src/stm32l1xx_hal_gpio.cyclo | 8 +
.../Src/stm32l1xx_hal_gpio.d | 50 +
.../Src/stm32l1xx_hal_gpio.o | Bin 0 -> 706540 bytes
.../Src/stm32l1xx_hal_gpio.su | 8 +
.../Src/stm32l1xx_hal_pwr.cyclo | 17 +
.../Src/stm32l1xx_hal_pwr.d | 50 +
.../Src/stm32l1xx_hal_pwr.o | Bin 0 -> 708784 bytes
.../Src/stm32l1xx_hal_pwr.su | 17 +
.../Src/stm32l1xx_hal_pwr_ex.cyclo | 7 +
.../Src/stm32l1xx_hal_pwr_ex.d | 50 +
.../Src/stm32l1xx_hal_pwr_ex.o | Bin 0 -> 703444 bytes
.../Src/stm32l1xx_hal_pwr_ex.su | 7 +
.../Src/stm32l1xx_hal_rcc.cyclo | 15 +
.../Src/stm32l1xx_hal_rcc.d | 50 +
.../Src/stm32l1xx_hal_rcc.o | Bin 0 -> 715684 bytes
.../Src/stm32l1xx_hal_rcc.su | 15 +
.../Src/stm32l1xx_hal_rcc_ex.cyclo | 8 +
.../Src/stm32l1xx_hal_rcc_ex.d | 50 +
.../Src/stm32l1xx_hal_rcc_ex.o | Bin 0 -> 705432 bytes
.../Src/stm32l1xx_hal_rcc_ex.su | 8 +
.../STM32L1xx_HAL_Driver/Src/subdir.mk | 60 +
TP1_BPLED1/Debug/TP1_BPLED1.elf | Bin 0 -> 664300 bytes
TP1_BPLED1/Debug/TP1_BPLED1.list | 4045 ++++++++
TP1_BPLED1/Debug/TP1_BPLED1.map | 2546 +++++
TP1_BPLED1/Debug/makefile | 94 +
TP1_BPLED1/Debug/objects.list | 19 +
TP1_BPLED1/Debug/objects.mk | 9 +
TP1_BPLED1/Debug/sources.mk | 28 +
.../Device/ST/STM32L1xx/Include/stm32l152xe.h | 9022 +++++++++++++++++
.../Device/ST/STM32L1xx/Include/stm32l1xx.h | 299 +
.../ST/STM32L1xx/Include/system_stm32l1xx.h | 107 +
.../CMSIS/Device/ST/STM32L1xx/LICENSE.txt | 6 +
.../CMSIS/Device/ST/STM32L1xx/License.md | 83 +
.../Drivers/CMSIS/Include/cmsis_armcc.h | 865 ++
.../Drivers/CMSIS/Include/cmsis_armclang.h | 1869 ++++
.../Drivers/CMSIS/Include/cmsis_compiler.h | 266 +
TP1_BPLED1/Drivers/CMSIS/Include/cmsis_gcc.h | 2085 ++++
.../Drivers/CMSIS/Include/cmsis_iccarm.h | 935 ++
.../Drivers/CMSIS/Include/cmsis_version.h | 39 +
.../Drivers/CMSIS/Include/core_armv8mbl.h | 1918 ++++
.../Drivers/CMSIS/Include/core_armv8mml.h | 2927 ++++++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm0.h | 949 ++
.../Drivers/CMSIS/Include/core_cm0plus.h | 1083 ++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm1.h | 976 ++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm23.h | 1993 ++++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm3.h | 1941 ++++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm33.h | 3002 ++++++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm4.h | 2129 ++++
TP1_BPLED1/Drivers/CMSIS/Include/core_cm7.h | 2671 +++++
TP1_BPLED1/Drivers/CMSIS/Include/core_sc000.h | 1022 ++
TP1_BPLED1/Drivers/CMSIS/Include/core_sc300.h | 1915 ++++
TP1_BPLED1/Drivers/CMSIS/Include/mpu_armv7.h | 270 +
TP1_BPLED1/Drivers/CMSIS/Include/mpu_armv8.h | 333 +
TP1_BPLED1/Drivers/CMSIS/Include/tz_context.h | 70 +
TP1_BPLED1/Drivers/CMSIS/LICENSE.txt | 201 +
.../Inc/Legacy/stm32_hal_legacy.h | 4422 ++++++++
.../STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h | 995 ++
.../Inc/stm32l1xx_hal_cortex.h | 437 +
.../Inc/stm32l1xx_hal_def.h | 199 +
.../Inc/stm32l1xx_hal_dma.h | 651 ++
.../Inc/stm32l1xx_hal_exti.h | 315 +
.../Inc/stm32l1xx_hal_flash.h | 411 +
.../Inc/stm32l1xx_hal_flash_ex.h | 965 ++
.../Inc/stm32l1xx_hal_flash_ramfunc.h | 116 +
.../Inc/stm32l1xx_hal_gpio.h | 333 +
.../Inc/stm32l1xx_hal_gpio_ex.h | 203 +
.../Inc/stm32l1xx_hal_pwr.h | 483 +
.../Inc/stm32l1xx_hal_pwr_ex.h | 115 +
.../Inc/stm32l1xx_hal_rcc.h | 1895 ++++
.../Inc/stm32l1xx_hal_rcc_ex.h | 1027 ++
.../Inc/stm32l1xx_ll_bus.h | 1100 ++
.../Inc/stm32l1xx_ll_cortex.h | 637 ++
.../Inc/stm32l1xx_ll_dma.h | 1996 ++++
.../Inc/stm32l1xx_ll_exti.h | 1015 ++
.../Inc/stm32l1xx_ll_gpio.h | 987 ++
.../Inc/stm32l1xx_ll_pwr.h | 718 ++
.../Inc/stm32l1xx_ll_rcc.h | 1796 ++++
.../Inc/stm32l1xx_ll_system.h | 2007 ++++
.../Inc/stm32l1xx_ll_utils.h | 270 +
.../Drivers/STM32L1xx_HAL_Driver/LICENSE.txt | 6 +
.../Drivers/STM32L1xx_HAL_Driver/License.md | 3 +
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c | 570 ++
.../Src/stm32l1xx_hal_cortex.c | 537 +
.../Src/stm32l1xx_hal_dma.c | 909 ++
.../Src/stm32l1xx_hal_exti.c | 547 +
.../Src/stm32l1xx_hal_flash.c | 723 ++
.../Src/stm32l1xx_hal_flash_ex.c | 1870 ++++
.../Src/stm32l1xx_hal_flash_ramfunc.c | 640 ++
.../Src/stm32l1xx_hal_gpio.c | 546 +
.../Src/stm32l1xx_hal_pwr.c | 650 ++
.../Src/stm32l1xx_hal_pwr_ex.c | 158 +
.../Src/stm32l1xx_hal_rcc.c | 1394 +++
.../Src/stm32l1xx_hal_rcc_ex.c | 447 +
TP1_BPLED1/STM32L152RETX_FLASH.ld | 187 +
TP1_BPLED1/STM32L152RETX_RAM.ld | 187 +
TP1_BPLED1/TP1_BPLED1 Debug.launch | 85 +
TP1_BPLED1/TP1_BPLED1.ioc | 89 +
173 files changed, 82117 insertions(+), 17 deletions(-)
rename TP1/{TP1.ioc => TP1_somme.ioc} (100%)
create mode 100644 TP1_BPLED1/.cproject
create mode 100644 TP1_BPLED1/.mxproject
create mode 100644 TP1_BPLED1/.project
create mode 100644 TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
create mode 100644 TP1_BPLED1/.settings/language.settings.xml
create mode 100644 TP1_BPLED1/.settings/org.eclipse.core.resources.prefs
create mode 100644 TP1_BPLED1/.settings/stm32cubeide.project.prefs
create mode 100644 TP1_BPLED1/Core/Inc/main.h
create mode 100644 TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h
create mode 100644 TP1_BPLED1/Core/Inc/stm32l1xx_it.h
create mode 100644 TP1_BPLED1/Core/Src/main.c
create mode 100644 TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c
create mode 100644 TP1_BPLED1/Core/Src/stm32l1xx_it.c
create mode 100644 TP1_BPLED1/Core/Src/syscalls.c
create mode 100644 TP1_BPLED1/Core/Src/sysmem.c
create mode 100644 TP1_BPLED1/Core/Src/system_stm32l1xx.c
create mode 100644 TP1_BPLED1/Core/Startup/startup_stm32l152retx.s
create mode 100644 TP1_BPLED1/Debug/Core/Src/main.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/main.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/main.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/main.su
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_hal_msp.su
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/stm32l1xx_it.su
create mode 100644 TP1_BPLED1/Debug/Core/Src/subdir.mk
create mode 100644 TP1_BPLED1/Debug/Core/Src/syscalls.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/syscalls.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/syscalls.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/syscalls.su
create mode 100644 TP1_BPLED1/Debug/Core/Src/sysmem.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/sysmem.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/sysmem.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/sysmem.su
create mode 100644 TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.cyclo
create mode 100644 TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.d
create mode 100644 TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.o
create mode 100644 TP1_BPLED1/Debug/Core/Src/system_stm32l1xx.su
create mode 100644 TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.d
create mode 100644 TP1_BPLED1/Debug/Core/Startup/startup_stm32l152retx.o
create mode 100644 TP1_BPLED1/Debug/Core/Startup/subdir.mk
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.cyclo
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su
create mode 100644 TP1_BPLED1/Debug/Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
create mode 100755 TP1_BPLED1/Debug/TP1_BPLED1.elf
create mode 100644 TP1_BPLED1/Debug/TP1_BPLED1.list
create mode 100644 TP1_BPLED1/Debug/TP1_BPLED1.map
create mode 100644 TP1_BPLED1/Debug/makefile
create mode 100644 TP1_BPLED1/Debug/objects.list
create mode 100644 TP1_BPLED1/Debug/objects.mk
create mode 100644 TP1_BPLED1/Debug/sources.mk
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Device/ST/STM32L1xx/LICENSE.txt
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Device/ST/STM32L1xx/License.md
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_armcc.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_armclang.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_compiler.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_gcc.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_iccarm.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/cmsis_version.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_armv8mbl.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_armv8mml.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm0.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm0plus.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm1.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm23.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm3.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm33.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm4.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_cm7.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_sc000.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/core_sc300.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/mpu_armv7.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/mpu_armv8.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/Include/tz_context.h
create mode 100644 TP1_BPLED1/Drivers/CMSIS/LICENSE.txt
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/LICENSE.txt
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/License.md
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c
create mode 100644 TP1_BPLED1/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c
create mode 100644 TP1_BPLED1/STM32L152RETX_FLASH.ld
create mode 100644 TP1_BPLED1/STM32L152RETX_RAM.ld
create mode 100644 TP1_BPLED1/TP1_BPLED1 Debug.launch
create mode 100644 TP1_BPLED1/TP1_BPLED1.ioc
diff --git a/TP1/.cproject b/TP1/.cproject
index b2c79b2..d0a18ac 100644
--- a/TP1/.cproject
+++ b/TP1/.cproject
@@ -22,7 +22,7 @@
-
+
@@ -95,26 +95,26 @@
-
-
-
-
-
-
+
+
+
+
+
+
-
+
-
+
-
-
-
+
+
-
-
-
+
+
-
+
diff --git a/TP1/.project b/TP1/.project
index 31e5576..87f9fec 100644
--- a/TP1/.project
+++ b/TP1/.project
@@ -1,6 +1,6 @@
- TP1
+ TP1_somme
diff --git a/TP1/TP1.ioc b/TP1/TP1_somme.ioc
similarity index 100%
rename from TP1/TP1.ioc
rename to TP1/TP1_somme.ioc
diff --git a/TP1_BPLED1/.cproject b/TP1_BPLED1/.cproject
new file mode 100644
index 0000000..6834bdc
--- /dev/null
+++ b/TP1_BPLED1/.cproject
@@ -0,0 +1,172 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/TP1_BPLED1/.mxproject b/TP1_BPLED1/.mxproject
new file mode 100644
index 0000000..3d41537
--- /dev/null
+++ b/TP1_BPLED1/.mxproject
@@ -0,0 +1,25 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/stm32l1xx_it.c;Core/Src/stm32l1xx_hal_msp.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Core/Src/system_stm32l1xx.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Core/Src/system_stm32l1xx.c;;;
+HeaderPath=Drivers/STM32L1xx_HAL_Driver/Inc;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32L1xx/Include;Drivers/CMSIS/Include;Core/Inc;
+CDefines=USE_HAL_DRIVER;STM32L152xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=../Core/Inc/stm32l1xx_it.h
+HeaderFiles#1=../Core/Inc/stm32l1xx_hal_conf.h
+HeaderFiles#2=../Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=../Core/Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=../Core/Src/stm32l1xx_it.c
+SourceFiles#1=../Core/Src/stm32l1xx_hal_msp.c
+SourceFiles#2=../Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=../Core/Src
+SourceFiles=;
+
diff --git a/TP1_BPLED1/.project b/TP1_BPLED1/.project
new file mode 100644
index 0000000..89a19b6
--- /dev/null
+++ b/TP1_BPLED1/.project
@@ -0,0 +1,32 @@
+
+
+ TP1_BPLED1
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs b/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
new file mode 100644
index 0000000..98a69fc
--- /dev/null
+++ b/TP1_BPLED1/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
diff --git a/TP1_BPLED1/.settings/language.settings.xml b/TP1_BPLED1/.settings/language.settings.xml
new file mode 100644
index 0000000..5928689
--- /dev/null
+++ b/TP1_BPLED1/.settings/language.settings.xml
@@ -0,0 +1,25 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs b/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs
new file mode 100644
index 0000000..99f26c0
--- /dev/null
+++ b/TP1_BPLED1/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+encoding/=UTF-8
diff --git a/TP1_BPLED1/.settings/stm32cubeide.project.prefs b/TP1_BPLED1/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..2ee3478
--- /dev/null
+++ b/TP1_BPLED1/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,5 @@
+635E684B79701B039C64EA45C3F84D30=20408E19A1D483CC68E7BF859CC595B4
+66BE74F758C12D739921AEA421D593D3=1
+8DF89ED150041C4CBC7CB9A9CAA90856=787343FA0477F66DEA4B2B86368887F5
+DC22A860405A8BF2F2C095E5B6529F12=787343FA0477F66DEA4B2B86368887F5
+eclipse.preferences.version=1
diff --git a/TP1_BPLED1/Core/Inc/main.h b/TP1_BPLED1/Core/Inc/main.h
new file mode 100644
index 0000000..f645caf
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h b/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h
new file mode 100644
index 0000000..df67bc1
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/stm32l1xx_hal_conf.h
@@ -0,0 +1,318 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_hal_conf.h
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_HAL_CONF_H
+#define __STM32L1xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_I2C_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SD_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE ((uint32_t)2097000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)15) /*!< tick interrupt priority */
+#define USE_RTOS 0
+#define PREFETCH_ENABLE 0
+#define INSTRUCTION_CACHE_ENABLE 1
+#define DATA_CACHE_ENABLE 1
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+ * @brief Set below the peripheral configuration to "1U" to add the support
+ * of HAL callback registration/deregistration feature for the HAL
+ * driver(s). This allows user application to provide specific callback
+ * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+ * the default weak callback functions (see each stm32l0xx_hal_ppp.h file
+ * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+ * for each PPP peripheral).
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32l1xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32l1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32l1xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32l1xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32l1xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32l1xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32l1xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32l1xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32l1xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32l1xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32l1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32l1xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32l1xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32l1xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32l1xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32l1xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+ #include "stm32l1xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32l1xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32l1xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32l1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32l1xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32l1xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32l1xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32l1xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32l1xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32l1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32l1xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32l1xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32l1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_HAL_CONF_H */
+
diff --git a/TP1_BPLED1/Core/Inc/stm32l1xx_it.h b/TP1_BPLED1/Core/Inc/stm32l1xx_it.h
new file mode 100644
index 0000000..2c5eb24
--- /dev/null
+++ b/TP1_BPLED1/Core/Inc/stm32l1xx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_IT_H
+#define __STM32L1xx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_IT_H */
diff --git a/TP1_BPLED1/Core/Src/main.c b/TP1_BPLED1/Core/Src/main.c
new file mode 100644
index 0000000..495ab08
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/main.c
@@ -0,0 +1,252 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+//#define V1
+#define V2
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+void init_ports_LED(void);
+void init_ports_BP(void);
+void allume_LED(void);
+void eteint_LED(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+void init_ports_LED(void) {
+ GPIOB->ODR |= 1<<0;
+}
+
+void init_ports_BP(void) {
+ GPIOA->MODER &= ~(1<<11);
+}
+
+void allume_LED(void) {
+ GPIOB->ODR |= (1<<0);
+}
+
+void eteint_LED(void) {
+ GPIOB->ODR &= ~(1<<0);
+}
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ /* USER CODE BEGIN 2 */
+ init_ports_LED();
+ init_ports_BP();
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+#ifdef V1
+ if ((GPIOA->IDR & (1 << 11)) == 0) {
+ allume_LED();
+ HAL_Delay(1000);
+ } else {
+ eteint_LED();
+ HAL_Delay(1000);
+ }
+#endif
+#ifdef V2
+ uint32_t bit_state = (GPIOA->IDR >> 11) & 1;
+
+ GPIOB->BSRR = (1 << 16) | (bit_state << 0);
+#endif
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+ /* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin : PB0 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PA11 */
+ GPIO_InitStruct.Pin = GPIO_PIN_11;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+ /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c b/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c
new file mode 100644
index 0000000..869ce28
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/stm32l1xx_hal_msp.c
@@ -0,0 +1,83 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_COMP_CLK_ENABLE();
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/TP1_BPLED1/Core/Src/stm32l1xx_it.c b/TP1_BPLED1/Core/Src/stm32l1xx_it.c
new file mode 100644
index 0000000..afd5dcc
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/stm32l1xx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l1xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l1xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M3 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVC_IRQn 0 */
+
+ /* USER CODE END SVC_IRQn 0 */
+ /* USER CODE BEGIN SVC_IRQn 1 */
+
+ /* USER CODE END SVC_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L1xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32l1xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/TP1_BPLED1/Core/Src/syscalls.c b/TP1_BPLED1/Core/Src/syscalls.c
new file mode 100644
index 0000000..8884b5a
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/TP1_BPLED1/Core/Src/sysmem.c b/TP1_BPLED1/Core/Src/sysmem.c
new file mode 100644
index 0000000..5d9f7e6
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/TP1_BPLED1/Core/Src/system_stm32l1xx.c b/TP1_BPLED1/Core/Src/system_stm32l1xx.c
new file mode 100644
index 0000000..093a38b
--- /dev/null
+++ b/TP1_BPLED1/Core/Src/system_stm32l1xx.c
@@ -0,0 +1,428 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l1xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l1xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32l1xx_system
+ * @{
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32l1xx.h"
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Defines
+ * @{
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Default value of the Internal oscillator in Hz.
+ This value can be provided and adapted by the user application. */
+#endif /* HSI_VALUE */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+ on STM32L152D_EVAL board as data memory */
+/* #define DATA_IN_ExtSRAM */
+
+/* Note: Following vector table addresses must be defined in line with linker
+ configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+ anywhere in Flash or Sram, else the vector table is kept at the automatic
+ remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+ in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
+
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 2097000U;
+const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
+const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+ static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L1xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * Initialize the Embedded Flash Interface, the PLL and update the
+ * SystemCoreClock variable.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+#ifdef DATA_IN_ExtSRAM
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM */
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+ * @brief Update SystemCoreClock according to Clock Register Values
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
+ * value as defined by the MSI range.
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate (void)
+{
+ uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00: /* MSI used as system clock */
+ msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+ SystemCoreClock = (32768 * (1 << (msirange + 1)));
+ break;
+ case 0x04: /* HSI used as system clock */
+ SystemCoreClock = HSI_VALUE;
+ break;
+ case 0x08: /* HSE used as system clock */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ case 0x0C: /* PLL used as system clock */
+ /* Get PLL clock source and multiplication factor ----------------------*/
+ pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
+ plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
+ pllmul = PLLMulTable[(pllmul >> 18)];
+ plldiv = (plldiv >> 22) + 1;
+
+ pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+
+ if (pllsource == 0x00)
+ {
+ /* HSI oscillator clock selected as PLL clock entry */
+ SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
+ }
+ else
+ {
+ /* HSE selected as PLL clock entry */
+ SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
+ }
+ break;
+ default: /* MSI used as system clock */
+ msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+ SystemCoreClock = (32768 * (1 << (msirange + 1)));
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+/**
+ * @brief Setup the external memory controller.
+ * Called in SystemInit() function before jump to main.
+ * This function configures the external SRAM mounted on STM32L152D_EVAL board
+ * This SRAM will be used as program data memory (including heap and stack).
+ * @param None
+ * @retval None
+ */
+void SystemInit_ExtMemCtl(void)
+{
+ __IO uint32_t tmpreg = 0;
+
+ /* Flash 1 wait state */
+ FLASH->ACR |= FLASH_ACR_LATENCY;
+
+ /* Power enable */
+ RCC->APB1ENR |= RCC_APB1ENR_PWREN;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
+
+ /* Select the Voltage Range 1 (1.8 V) */
+ PWR->CR = PWR_CR_VOS_0;
+
+ /* Wait Until the Voltage Regulator is ready */
+ while((PWR->CSR & PWR_CSR_VOSF) != RESET)
+ {
+ }
+
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ + SRAM pins assignment +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
+ | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
+ | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
+ | PD15 <-> FSMC_D1 |--------------------+
+ +-------------------+
+*/
+
+ /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+ RCC->AHBENR = 0x000080D8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
+
+ /* Connect PDx pins to FSMC Alternate function */
+ GPIOD->AFR[0] = 0x00CC00CC;
+ GPIOD->AFR[1] = 0xCCCCCCCC;
+ /* Configure PDx pins in Alternate function mode */
+ GPIOD->MODER = 0xAAAA0A0A;
+ /* Configure PDx pins speed to 40 MHz */
+ GPIOD->OSPEEDR = 0xFFFF0F0F;
+ /* Configure PDx pins Output type to push-pull */
+ GPIOD->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PDx pins */
+ GPIOD->PUPDR = 0x00000000;
+
+ /* Connect PEx pins to FSMC Alternate function */
+ GPIOE->AFR[0] = 0xC00000CC;
+ GPIOE->AFR[1] = 0xCCCCCCCC;
+ /* Configure PEx pins in Alternate function mode */
+ GPIOE->MODER = 0xAAAA800A;
+ /* Configure PEx pins speed to 40 MHz */
+ GPIOE->OSPEEDR = 0xFFFFC00F;
+ /* Configure PEx pins Output type to push-pull */
+ GPIOE->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PEx pins */
+ GPIOE->PUPDR = 0x00000000;
+
+ /* Connect PFx pins to FSMC Alternate function */
+ GPIOF->AFR[0] = 0x00CCCCCC;
+ GPIOF->AFR[1] = 0xCCCC0000;
+ /* Configure PFx pins in Alternate function mode */
+ GPIOF->MODER = 0xAA000AAA;
+ /* Configure PFx pins speed to 40 MHz */
+ GPIOF->OSPEEDR = 0xFF000FFF;
+ /* Configure PFx pins Output type to push-pull */
+ GPIOF->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PFx pins */
+ GPIOF->PUPDR = 0x00000000;
+
+ /* Connect PGx pins to FSMC Alternate function */
+ GPIOG->AFR[0] = 0x00CCCCCC;
+ GPIOG->AFR[1] = 0x00000C00;
+ /* Configure PGx pins in Alternate function mode */
+ GPIOG->MODER = 0x00200AAA;
+ /* Configure PGx pins speed to 40 MHz */
+ GPIOG->OSPEEDR = 0x00300FFF;
+ /* Configure PGx pins Output type to push-pull */
+ GPIOG->OTYPER = 0x00000000;
+ /* No pull-up, pull-down for PGx pins */
+ GPIOG->PUPDR = 0x00000000;
+
+/*-- FSMC Configuration ------------------------------------------------------*/
+ /* Enable the FSMC interface clock */
+ RCC->AHBENR = 0x400080D8;
+
+ /* Delay after an RCC peripheral clock enabling */
+ tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
+
+ (void)(tmpreg);
+
+ /* Configure and enable Bank1_SRAM3 */
+ FSMC_Bank1->BTCR[4] = 0x00001011;
+ FSMC_Bank1->BTCR[5] = 0x00000300;
+ FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
+/*
+ Bank1_SRAM3 is configured as follow:
+
+ p.FSMC_AddressSetupTime = 0;
+ p.FSMC_AddressHoldTime = 0;
+ p.FSMC_DataSetupTime = 3;
+ p.FSMC_BusTurnAroundDuration = 0;
+ p.FSMC_CLKDivision = 0;
+ p.FSMC_DataLatency = 0;
+ p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+ FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
+ FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+ FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+ FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+ FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+ FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+ FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+ FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+ FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+
+ FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
+
+ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
+*/
+
+}
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s b/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s
new file mode 100644
index 0000000..d3dd841
--- /dev/null
+++ b/TP1_BPLED1/Core/Startup/startup_stm32l152retx.s
@@ -0,0 +1,413 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32l152xe.s
+ * @author MCD Application Team
+ * @brief STM32L152XE Devices vector table for GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M3 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m3
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF108F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_IRQHandler
+ .word TAMPER_STAMP_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word DAC_IRQHandler
+ .word COMP_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word LCD_IRQHandler
+ .word TIM9_IRQHandler
+ .word TIM10_IRQHandler
+ .word TIM11_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USB_FS_WKUP_IRQHandler
+ .word TIM6_IRQHandler
+ .word TIM7_IRQHandler
+ .word 0
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word 0
+ .word COMP_ACQ_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word BootRAM /* @0x108. This is for boot in RAM mode for
+ STM32L152XE devices. */
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_IRQHandler
+ .thumb_set PVD_IRQHandler,Default_Handler
+
+ .weak TAMPER_STAMP_IRQHandler
+ .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak DAC_IRQHandler
+ .thumb_set DAC_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak LCD_IRQHandler
+ .thumb_set LCD_IRQHandler,Default_Handler
+
+ .weak TIM9_IRQHandler
+ .thumb_set TIM9_IRQHandler,Default_Handler
+
+ .weak TIM10_IRQHandler
+ .thumb_set TIM10_IRQHandler,Default_Handler
+
+ .weak TIM11_IRQHandler
+ .thumb_set TIM11_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USB_FS_WKUP_IRQHandler
+ .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
+
+ .weak TIM6_IRQHandler
+ .thumb_set TIM6_IRQHandler,Default_Handler
+
+ .weak TIM7_IRQHandler
+ .thumb_set TIM7_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak COMP_ACQ_IRQHandler
+ .thumb_set COMP_ACQ_IRQHandler,Default_Handler
+
+
+
diff --git a/TP1_BPLED1/Debug/Core/Src/main.cyclo b/TP1_BPLED1/Debug/Core/Src/main.cyclo
new file mode 100644
index 0000000..4bdfdfa
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/main.cyclo
@@ -0,0 +1,8 @@
+../Core/Src/main.c:63:6:init_ports_LED 1
+../Core/Src/main.c:67:6:init_ports_BP 1
+../Core/Src/main.c:71:6:allume_LED 1
+../Core/Src/main.c:75:6:eteint_LED 1
+../Core/Src/main.c:84:5:main 1
+../Core/Src/main.c:144:6:SystemClock_Config 3
+../Core/Src/main.c:186:13:MX_GPIO_Init 1
+../Core/Src/main.c:226:6:Error_Handler 1
diff --git a/TP1_BPLED1/Debug/Core/Src/main.d b/TP1_BPLED1/Debug/Core/Src/main.d
new file mode 100644
index 0000000..6776fdf
--- /dev/null
+++ b/TP1_BPLED1/Debug/Core/Src/main.d
@@ -0,0 +1,50 @@
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
+ ../Core/Inc/stm32l1xx_hal_conf.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
+ ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
+../Core/Inc/main.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
+../Core/Inc/stm32l1xx_hal_conf.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
+../Drivers/CMSIS/Include/core_cm3.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
+../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
diff --git a/TP1_BPLED1/Debug/Core/Src/main.o b/TP1_BPLED1/Debug/Core/Src/main.o
new file mode 100644
index 0000000000000000000000000000000000000000..da9a65e2770638378de8c5967873770f61c7983e
GIT binary patch
literal 705660
zcmaI82V51`_Afqj&Y608$6jOaCAL@+dx^cp5^Ib`6OA>ND4-yUB8XB1=_pmPE25~_
z5G#lx*aZ|tK>>St-*w>r-hKc7|NZ@3X6@D2%$eDHt+jXVn!ZE&u`J8{=O4>7Vg5J9
zFfEc~VsRZD0!K(!47>~eNVY5fx>b#T0PJ2h?g7}dYTOI($Exv9fW526eE|Db
zjr#%iuNn^k99T6T1UR^AJOuFPs_{_3VO8VdfFr8LBLPQMjYk8HsTz+399K0S5BN*f
zcmm+Ws_`Vi$yMWD0jE@rrvgr^8czqDQ8k_k_*>O@7U1tyXi+&aE2H1N^gU
z{1@Q-s__EAzpKUz0T)$`7XvP-8ZQN0hCkov2v@Ax#~wMJR3pW4A2hWn|Einx^=
z&cR_)>sCgT%5<)LPV~I!w_A9aNo7*MJXP`d=onVT;Ga3wrebO>icvAQ+Nc-}k^bwS
zg5@t51xCS&`nN2jP;mc@;~DOfGtVfyRHM&Ep%B(Lf`E#9)l*=&AJ!-t<*;h>(kfKK
z!xaifA#&TULqHUw>hO$3#m)I^G4WFHp>ZGHvy7^tg}!4>e8n@WHWvDBblY%|TX3V<
zZkPhtQX71ZWsPB=GVGTYN`@O(iK$qhe-#Wjz7iAJse?F%`=t`oC%d4ef}nVq-HaPkh^jMXDn{QHPla#ngF6(i&*gCS8K+`c!4ArH5k@7ANma{F%^3ftBKI45);`_JMOJ%C8lBHKZDnz5;HJT7d$%cnFNxQ~3}U9Y3PjcMyyU$6<#N2KQ3n_2*X4RWafKWjinod)#oR>^uy4
z$K`K~81-vJ6mwHMPmCdYL?eI}gVu7pmjJlqRIGR>W
z&uahCuE#g7W@Jr#FQ*mN@N!ovAr6Ol!*o~~gzTD0*ma4}iGK`glBQj;H
z2luUUyY@zoIGn1Uo8zYGnO3X16~|+4T#Y>8RjmquB31wIyCZ`&YB6o$-NcVq|DqlT
z12tQ*j$i4&Bv(1^qE=RhDtw0_5aXLur(@&%F}G+Ggm3^u(c}Xt}1F*F|R4=aF)d)
zaxj(h16#L}9ipsP$yO<&74<8J++oF)gAl7?unotytBcBi`tvzJnkKrWA4590yS0s7ejU@Y+XuLj+uA?zQb4)`#
zL5>-PN|Iwrw~}t7CM21EhIIR{C&~E>>H6Jn@|(P$B!~P%DvG-`=PPs;Q&Sa6VvMFSLmWJrBx{;l;sWk5Qg|w8*h;s2e
zvgUM&$IgXhb
zOBQZXYRhmzMA>wlD6eD5?UbV
z+eR^XtR-tJZWG<39*qMQlH?zb->7qKveUl<(Z^pRJJ+_;c-u3wphVurF$+;^Ba-W+
z^{zF^7d0ZwJvg3{YX)jr>
z*h}2oH%W5MHHvCFIv5;N9zxugO)1*6g)}bmCHmebBq@z2N}~$mHgfzH^Ewgt*Ud!9
z?n5%2`jX{)O^7m8L6*NokX93i%t=QK4;}AqBUieMgFlkY7)SiI+R!+s3q||w3R$ae
zC2PeG$xDqHG``q{=*|Bo$u^hC3wM&}?*oXkI)kn!kC4ZTUSy}ffw+73kk$n^x?ZKi
zg_-x3uJ0Y+?{+t`qwptPMKsa>(ok%vj+saIp0pbMMwFD!WVv1+x~kkMs(q0pKlck+
zSTdZh@>-JIHI=TBc@CQiBr_k?9mi}rO7X;>pz$`x{jQ~=jxmiTn`<0#PCZPPXE}bU
zwm*|@?G|LYmt$tD=6D~9W{`!+&**y8kL24qX4>^nNxs`(bp4~8v<9WpwQMX!vVRfD
zw|C4HBV_UzfR&MBp8iPkcL&kc6?HnsP83y*TST!SS>>3zkBDAWlk7OxCAt+!Hpd*F
zPTZjlDTZOlRypQCZ}QS&1X(`jN7oP}qIkA7NWSb6af_#twO@PCm_zpoZ%!I<)fVzw
z?3k;|Pmtx|YNC7mLiCpJY5Z~#(Z?PjtyKqT+|V(5_a8#O>N?)N)zfI)xh2W(u1Vux
zGe}Z>ne61Br1Ac#G+xn;xZ_Y-;%T%eo1-0fl(d8*jM_<(UPZ*sm`CzIA^FA|HIyQ^
zC(t$S2vNFhBAMkAiPC8m>CVihtB>O=p1zUB{cDgfpAw3y);OYEHj(^~OUZIOXSyys
zN7n}X$XbPoEC)Fj*0sB7JoOQA4MQlZUmBCOW$Wqs#j)~6p@!j@^rLhgSWMSH+mhsV
z$Cvx5l*WGlk{!2D8h<`cxtEzvYCa(rbAb`WJqEKy1v^YhHR6kD$2UGiy0Hv5Vsv*r)F
z=HDW}FU#mDeVI+;aaZZ8*iII@AXmX$>i9*TjwYFr_bHNBy@}p;5?Szf%zJe<(Y-8j
z%%#^vvT(Q;U5i$e_l$)!j{c6kzdA}5TK`M*`Y&j_c@0_qdV(k}Ey?ots34J1)TV2N
zeWL~n)m3(tI0()BauE1sFx
zgy<0ilo+3jSKvA}j@vB!5Fy$}@xCu(&D^1J7*SLs5+xO7une
zzIf(T09iObmd2}$BsmCc7SEg)Xe>=8YgvgDTM`-+_-f`mDE`E~wui>M95Z}Gd*Ujd
z5q(-DMPj-__p515)<(D!{p2e0as$0Oo(V@D!ZWiSbIZY56s@O?EFAiSbeB7RmW0~0u3&1(ZhSNv)a51+%>)E%XDUoB>)%pDb0bd
ztoRfHYuSi+V1Dd@-w}d8`#tJ0E`ZJL3SuC8c^JSB_S-lZ3}Sb?z+W(XgaO#eR$mBW
z2(y5S)X4{?z*u!q{LC1z3K_hSa
zP&)Kjir8j%r(|$W$P9@5!RLWKcll=6nCGzs)gnnZJlF}mwoTEy;o4=rLwN18QX$b{
z#sZW>B%!Le5rOdo+!3Wv&=+#z>T0-31yRJt|LTpPhu%c=!B6MGCeuu^f&CS|9DXzV
z%nD^M_Uk+R#9P>@M}T>=Ef(PAie!g(hguZtO3i5(#pD4nwO+9*0r6~6e50(zUont=
zfC$BuGz7LwQH*=!5)>}K0;DLa86bICu`dWB_Z4gER^5@lDH?`c^%hyMT5l$mB&|11
zg6Zz9QH*ku9lQE<{?^!F$NJDy*ks6s@U0&bP_#iQ8;jPy%kdv^of{ef()$J7~JX
za>q4PaeV)t!?n{k`j$KQ*bQ!%OsX}y-gyl#z1JVXbx;Il<0HQfgyiHNlOQvDUm#@u
zZr1?UfBu~ft_!=8-Y^fgfGRLwHX#~!?evEYl
zpUgUuyCdl>NItBUzH(=`JMm;!>u`~ODzCIUr@&W)?
z_E&mg0@$0QU?q_KI}2uZuxsf7tIxJqKTyaMqk
zyR9)qj^Id;-~7(34%rE>Nr+Ywz9E}PAzDfJfH{x*n(Z01}<
z_LO}=na4AB<0tUmvXNuJd&f?2gR%GQBl@-76>fHjtXFKwfN2lKmJtx~Q>ecK(O+?F
z4X^-(q7ATJicaV}aJv;_x58MAV)k-?!-}u8Iv-IeR)BX@F@)B-^9qjA-3toSN`PyM
z+(l5ot=LYp{XK=fErP$Vc<~(m9xI|o!Ahax8m*=;6em_woQj14fU~l$C)C}PDMul>
zNxAO;u+7S*RPzKVGk!<#fy$*cQ${K8eUE1rt<3)o*goZ#Nf6nue2@olTDg-xurtbu
zwW}tly39WyG-&iYR2t63B*c9;B)RIt{V949JojFtghZbUo`|Xc%V=DOjCfx4a#Sx%
zfJD>#fw0{o{TXPU%CV&+FfE}_Y_yIJ{oaMiq1GvN&
z&w`muzGNxD9sa^+5HAaiE40gmE(Hj~McU9Bc73Ef_;4NH(3<|}^mDt}36yQbveP<4
zCyqVy3fx4tZ&UF0uqiEZ?|a#1hvE4iYf1sQ&xSXL!b8@Bvi(PF>`Y)!*cGRM<+Eyf
zUklmQl>Izq%jo?nV*jcIW6#;9-2gtZTVnt|vqy5k^HcP?kKp_jbx%McP~r6_h&vQR
zD}V(n!hVCXor*S;2!$%Kjl#DK5+iZ247)1P)mkO8MhfNS;=DQWGmpdEhp%vr0A;ybPu56i8lH-Za6(Rps}zAYM~8
zcZ0|cWqxh=%T(^W3+$$n{RzBmr7x{zx0U^=ddX298w-EA%Ih?B<|!2lVE2^6hXUMJ
z?ym#lBc+%D$;ZmtH2>x+mraM;0_BPZ;5}7-rIq)YGL=g57s}h%595lJ1AlDI-@v(nS^K3K3V;#EBrTQyB-~{@hf@(ZA=`tJ?Yk^H90b%)e1pooaAT)f#%9
zn^oqnz`RtuTw&T<#npnOkLu^~0KTflRA+5dwTJ`o!>WaF{Z*4vU?otMpA3;5ssd`s
z1gpGk@V-;^;ve`6Rq2`lgsD0=1Bg(KZveeW)f37cqE-4J=FKn5_e3Mz6W~A
zs=24^cmTCvRA-7etsK~#g
z+8G4NT-9JLu)C^b+kxFv-9V0(huuOO3q8sypkU_eAxwJwSnK9`#HMRdt8M
zbdl;d&c<-hRR^h6SFAex4RO9yJ!u9|qWVV3K&fiZ?~p80EqVlExoUkE5Z|g;`oiC-
zIvs=e52^$EfqhgN>BIZ1+K>y$FRDXSgnv`r{R<+_+(eWcToC8f4a8vXP#mm;aet?R
z7|y-D01uJe_zFZF#hvp2aTn*Y9wF`K+?K&+DwnqzBB!{2YXdvO?WXD~jcY({v~!&I
z2>3hCRZymJk#pG%k#ugf2$9QN$S`16xcE3oUgzrc2Jr?LKL?I(a+71g%jTSh!ryJ~
zB)tVW+XaR?$?__Sn*c=PA5*m1tRYd(VC#-FCb&5z%n2A)6v(HD||
z{Oc_c*};d;gOyBD$V*4{4GkOBKZa-kc{SAUjVj?Uq2C8
z4F8;R$5{SDEqI9Mt$za~@JlI`*vk*-2uDf$=TaCuzzF1(6TDQ+Mcnl_?fR524i3N3JUNWUu=PhvtUIz
z%()7gKJd3zs9OV=o6ztCVsRI^x-jh_yd>TRA(PsVo`Pl&tZWi;BLKXFs{>$ci!k*Y
zfR7MJugzAW6V)`^gx&NGZWnreg`U4KvKK&rka8Mehp=!eM1q7>G#%~~My`Thh)^&D
z#4w?iJM_YZ9rJ-j3G6b26fG=Vg;-*Q99j`#g=y*VmmtIr2S^mEeUDg@gg;V%?Gy58
z4L>NXD}d=kLKCzWxTAtJ2Of?I(E@lW!uV^DJRt;9s-G(KKrzLg5*DKs!JQGNP}e0*
zNd6wgb3$j7VcdCP?n^>QEPwrw1?6z?m#EvpVHj4dnVS1C;
zo!0Qp;-Xf-wuprv0ldY*ts$~iT#TJH&Q~086TnaGLRS36P$R+(6o2>u#&(DyG2rbK
z*L?vmM0`38AY5EPUrvOm?*x%3@z=T_MvHSObKNa2`VIbK#3*Vo#fica@Z!b4DC$H}
z(Hqzv@f41da7p4%lc2CqTtHvW0dY_gj2#ru&;)-(>`qJ1QSlm%@^Q)Ho7LbQ7niWm
zJ1IVC0$!@%fY|
zlC^O3N_?M+082!yLs-1U<&@Z$iJyOg=?c-6vXZx=TOPo6sXZ;U0a7APrf`AMMw)4Z
zBn34lf~A|yVKYS9^%p>>RHG2aBBZO-YL1j9{sIs!9l8myOX`B77F>+yA259xU`5S
zxf9ZgbYLf?urgq$q_0h(a9Zk2v7|{g7eeo>bfP*;pO?l{&2T|#OK*9)REwIZmn7XX
zs9%=cX^p!g#n8fVO>+H=Ag)Wt$X}-Pnzl2tq`~w#WlQaP1G^<*S#x
zNCeSa{`)43`N%)^0&klyF8b64E*K#RN4l}m#9_@lI#8fUa;KqH|T}PO_x9<
zRL*GzVz?|E0u~`(mS8$c{*&6n(ejW|V7ujsUWg?|9z_XcoGepj6)!haf|n>SqPyKA
zAEj9;NltGCY@b|86Yc>yXBWUhIT9@&?y%fr7O*37I(_}eaFinVqp$IV
zJpXSzf>c>O2jQNQqiD|}Q_fulkSl*rY130#N9E%)Ih^*-isYe
z#d6G77<(zFQF`}E-ai>OOXX|ygTI#RQ-}YJeCs=aGWp>QD3r@H8iQ9Me=Y-fD~~-6
z@J{YbGy6xm(PMb{B)?n?DapsbKf%L(^)Z_A4yga67Rq7u$bJCHYVTz5
zj;rfmhRqapCUyuNg=F0tlmylc{A(d4cZRY
zYX*#mvMv4rF^b)=4dSsZLpkOiHn=_y8T@Z87DHHD#|fE`cH`Fcgdca#+8@02oOU{N
zJ-Eg=yuoeY{H8#6BUi5-Fi-Am5%e~3qo)Ad%;nL3syFAC1ELSNY7dNU<#rtdww-&7
zo;v5peWTX5KezZIOb2jdXfrmDyNzZWw}V^$7B>*Y4fzX_!Q5~C2?K@AhM6^-x0in-0UH+d5H5p4D2vBWIeDW+~8thM>!wb
z>^#PGq9>8e1zZ5{IQJM2}gFtAi^2?{Fi6sNfX$ZWVQ|(z)pEz%FrT+W^bp>d>uR=G5PycZCa>0_-Z+
zi59VI+?SPz>^kQh3vh$Wp;l%lSN0fK7I(b}9&U0Msi?~4ek7Z>xREbGyv@yO0b@B_
z>!!f&aQ*1L%jJ4dPM^npxddVX7pDiYkh@U>&-y9%nHKP8++nI%
zOzz~n(-vL`-!>7(Liu}r0mArNr@#y6|MmtJ!B6fA5Xo<&O{gf|iS}8e`8hiPcJUdl
z;C(lL;T*ij@WCS>63btB0%9D0cnPe;^M6nxoWKuCfk+}hz6E}e_4F1i_p8pCkMjxZNA135OerG)RDcz
zKOX>IF7HMii#%Qt1)F#I1{)F5J$}O95V_AE{RHd*Z=hYuhkWamPjMS#17InTk15$aPx87uU71YVqAs1KX*LSzVt34-rHSlJ^~uMV(Rc(Mp?lZ0lk
zz}qK$N&?s~?9_pHP}qMOdWVDzs)G&-fBpdv$AleJ#3c(AWcq|KlM2z3LfLMJqzX%)
z0XrqU{25kG3qKn`JR|g=25y@06}v~=S)p?fi06dcr667qLQjHtQFyco3h6@EdmvsC
z7B_~63{-EByo@vH;9V77QQz^JP(mNqbwNdo>-xr&A3@!dcp1d@j7BI`4(>(gPwd
zg%9mcf$kBVYNxVdRzh2_rb+EDp#UFUy;@9uM
z^AW>nz1=EaNd?bW3^)nmc5(hsQ1BB+Q6Iuz>_pwt05QG}K%jVhEWi%20d??##ZGkS
zXQvn&jF3XaTEk!^RIFozdYIUg4v2+|_0pjbDR#aOg(z_vy;9L)U7Doboc-SlE#UZkNV(<${?iW|;fE^H5
z`T-miAJW@%NPMvc;IQZ(0KKE4JP+WQ*!~xYB#ZS9AhP3PgIs_VaV8z&I3do)&xtC!
z8YO3^M2ZdS}EYDZtXi22_xo71z>E%>{8Mt&JB&w_eao7iV6Bze{3yA+QW_
zrzgN=acww=SH%&7fL#-P9>LLdvGxN5aYKB17gjRGuIm7@#6wZwWs9jaE8Y@QX;Qr{
zcBPHi9I-G9j_!z)8spw`#lPHv-4(y`;N26?^nr)_;(}@b55#phL3}7q{|iw+5q4=2gXrGGDX_y||Iep$}pb
zov!^T{<#2_Z{qgF@a`<#qSmX6l`@!>-j#FoPyOc~hn4cuNfafp$r3VO*R?UG(pj1Xn-41CmB|O1WI`!{&
zN^z73hDceoQ4lIsr&%LRI$i`~xU`femPjez0$!B#?H}->r3=)N*(Fua!cFg%D!xO2
zG1AUH2tH17r@SX#+C#0^1SysBiA1S503v&&fpoWfrL-o9WuG)*26+3W`cxPmkRDMN
zYA6iR+K
zV6#XnoDPxak}oA7FQjQS7rc`4sC8ZU4AwWdh6xB1+eKMkEWk$gFN~T)Hli>XwLGK7i2(T
zlN`GeB3^Q6Unp#mb>kr7EnB;Q=Of>vrDv-=n)<4~veyN;-6p@?2yD9?5DT~da!1;f
z36Pu8=24)W<^hEra{JC82Fa?SPzaWD=mXj*7aai>BG;$FFI;{X4lF{hL*3v=`N&A<
zMahw|(2JHYo&|50oJkAjZn=6-h{VWWsEHXTH=@TAFV`k4LGJS%c!~16UqRd>Gqeq}
zSFYI=#3Xqs9q-;J_cy@%0eR^|5D&`xsMT~xj=utbhvi?F!NU=`U>d+tc^Ks{$7HY5
zz>?+04}qn~7TWnbAxF_Z%1Jqmjyj~u$9aHLvb62ml4h+L9e$AFh1_dWnem*q`MfL)dE9faOB`OhebT$h)g
z#68@Q>+J-{l>fX5UY2}}P7K_Xlf!{!%j>9a%#rUV;l}RBq4n`3a^>s2faS?kX%W6F
zADaea_vF5>pm1OQ770fWI&1(<+`*Gy^s%IM`Xov1Qh@;<$q~Q=#~7}edv|QHP%9*R9;7!@oV|a
zFHk6x3+T8&x%^KcY*xq#bROodJZe3_JGnX?U4Abw6@Yz^*HW+Vqg=NxV)-mvcERlz
z`GgAKtK5MaGT-DbR4qBHg{8n;)Q@TJ!c~2*8-iG?MvaE=LA}`@M0YhZdwdV-3TF^K
z)J1e6afA9MeY0-=Z?C7=B!+G4NB$VXRQ?L;b|3>JHTYf2LmD4dA(Y)Hs>B
zSFBb%g8EB!UoQ|}saG@wR-%rg38_?lsRYJet0&T%T&8|W>q@!$BkjdjsPpMNdaJIW
zF2_6doo7&ZukP6g#1HD+{lGq|hn@%cs&4u(M82tAW&?B9gi|u>qQRyEz5vaJK-gTX
zIe!b-I!)jWNV;jxCPHMrrsM`3d1$uMDVq(N20jR4qvmufL_9S&9zbuCW+i3Yn>FvK
zui>T1ro6{nv#lk7k7hfSfm<~y>c{$O{_udpHjRQp+OGLPOSzxsAl0}2niXAPI#4s}
zHbi!4%#T0}(mbd9C0J8Pr?YozN+>f9(X66{Jyhdf3@l9Zg9fogXy#FKB~mkW2_&O5
zwd(NZp43$L0G6s5M$6zC&Cnsh(llP=
z@2p0m4Dg($GgX-9H8Xw!xS+|I1Y)}8XJ44Ur1@MAdKsF{?P2V)=4Uq$uW0Jf$-t|c
zr(zMoSK6j1(%?To#Vf42OEcz6%^PaQz0%w`3|@(5^mu?$O~@I9^jcGg
zrr$T3HXi`WH1%oA`Ljm52O?iI=jcWGsyRo+!8c8Hs=%DJNx_hG(OzRA>8ed^f?s8=
z*60Swb=tPn4{_7(@da?#28{t&uXTA0o`<%^WJJ9|+x-EE8?^;5V9ZmypXQLw+VeOQ
z&3S2yDO=m39YcE%KHBa*V0x?e7ZZrS+Q}XWVw*Nfg0byd8#M#`w25?o{@SkeH4ZF2nXqzcU8}u7&#%kS;gBYi6um%e8+AR&iOVHkZ2`o`N&kmb=wEkluvR6By
zJ9zuFQzGDRzg9`@=mXkXH9qa1k^8RbB4)se~|GUu3
z&>p2{c3JyA5B{!bU*f1fcU8M?0kCV@^|b-6Yunz1%^TX@VUWz!zBvcIEN!<^fScMF
zDuuGOElxr5mNt_nx!c<9^jYL+?RNq0Xw5UAm#ghR8c#4!dp``u?rM|!0^HMvFi^O!
z?H>$d540;t@1b^<5|WR!s^<`StZhtX{1a`rFYu7B?L+TUfws#5=oM;T(D{m|+E9A=
zo@s~BR%em6eN!kr*Pfzg&I@hCV_?PF(VZdrQkzcI(kt!cYfvcBem@e#Qth@+F!oxD
z#Tak7wxJtD%Cx@@!i|+{6X-3k(C(sz;jNZ8!q_|QE$Rim*Ur{~_W^eV-bd|Rn!P`1
z2h{`iS$p^>z!&ZKOc1|nr=sn^ebf5YMS#w_(2>AgboF`wxau@x;N4BvFdGW)x|dIZ
zt=AyOUr>(%Px|_6=`|4^_h2p1MM?GqPUB6-&3();TMPZ<>-Z+3Ay5K^9Al<#0&pm5M7^iz{frofqwQMLP==PI`y}GM(oFGXz
z>^^Mn(;0pNc2GBs*7rlYi2lG1>)vKSGF9g_0@x{?HrL=<37*%hcUi3Xr8MI|N5Jb?&y-Jjh3rh
zat$JRy2Z4(-PL_h=UndVex$kQflfFA$%nd4bkggQZdwAsW8FGqU
zT7hoHN?0k>J*V&Qsct_drO$Np>F8pSuERQD&vg?=0(+q=qaU?c_x?Prywau8K6HuB
znQo<2cZ=qp*SeaGVe^gd<uPZqOV;^*}SqT1<
z?sqEOKkLE+VC9SM0v!E}bB4IQtpJl
z=Unhk>8DZQa9V$#qCTU4L+2LK^lb-$cvioRHv7-%8&g(!QSU={l&04&Om^rdY_HJUh6m0Py9w7^cVEX^#1Mu<@&+&
zvRCNa)CYL0*FOdLpg-yhg^&7v)Cl>cKe7u}KI=0m@%*A6nG5h$|CK7?Z+a&>e(7u|
zyb9AUh7e~ET@4yKZL!vHq!Wni3?9_HbvLBYlV5L0_yC(8hCTm+x4~f2Kw+a{;$;9Y
zL#<@E-C}sx6AIo2=f+U*F+|g@>{dfGopJRw*zdvgHp7Cc2x+?^kM>jj46#&%`Wqsm
zfdv?*bO9D0naJw38?ljz{zD9^)LLrEuhVRHxm|X-N7RaYh+drh^x4NX>(>T?Q}e+U_<~n+=f|!!lYlVhuY^ffr}kHxa~m
zL!(+CCKwjcWR+-W@FzU%F|brx?l&Y&g8Bi&7wWnnG+Y!B?jgglHsBpL=w+xMF$|S~
z9W}VP!0j=^(sfWzHk^~7mu85k&4sguE14jkGd$=7N9PUhg;2O)=+A?A(ZJ9gl5Ut!
zKfoo!Pjq7$h6bg;E*q-TTzw9
z0`1VdY4D?^F557b%FbJcSei9%8`g#Z%Q18v357d`C8L4m8m6g%Wr*ln&I~
zGpwNh`u)D)Z3!GbFpQ->`$NM>+WmiIIM^ECv7ulkz!SqC)HBXE{QLr-z;Ka%)I!6`
zme6}@n6exq&kVyUXD>30r}oWrgQ^#JFAR-J0g4S)1N^--e4={#m0|k|NS5G-11L32
zrIpg!IV}d=4Hy8xBtc_+mIgmHt=59I9Hs8G@IdhW&SR?7}!;%xAOjAy9K4L0tl$!e$3?II*Yj2S0kGt}6X3dS&FrzGfw8^>A!B8&@e
zK{C?lehHFM#_838MH|cd0PHeeqH1ur@#_^x#uzuzDjIA2LUm)DF}nbc;*ISoJxDP2
z7z@cnqewlnJ;p7RqwF=Vq)9x<_>{V#`;66YLUO+`Cwq0}spw*v99vEM61cExyTBh;@NFSG-=W-RUl;&o$Rng?$f&r_#6(^&Ew
zK$dY5-QP{)y;|^)ZCpfWByJhU-GR;9#+5-J<`@;!{=Q@EvL7JVxOf~KP@9o92cC3o!j#3%nhs+4Qi2Oh$UygH2y(
zrVTX>y$g{rlM^ir;ilH@ahp-5{2IWbO+$9V(JoUW?c>FoewqnloT+vzD8!pwRv@H3
zrcGM`_L>f5gO_BoQNDD*WTZPfXqx^C>W56?c7UU%={D#cGsV_K5XmM}1ZrX{PMoAad3eu^-q4(|Nk-i>7AFW-
zZqvD$N2Z@BJA7;!whJLWF|}6$6q;Vpp^B%bybDlxX8N8QFU6+E)Tn!DnqC2gSEfX&
zr(c^^G=k(CQ!LGVWu_ric^xjm*8&*D<#?X1G&!+L!q434D&+eM7xOSHs88f+?(GVjo6K1u@UYpuY7>aw=A(%a
z@iDhQ4P#r)tujE|ZccUw(a(I48fX6Iam}C?X7;A_J>0xe17d{vBh|i`aZi-RAvts4~XfmFCu1vq&wrIP)-PsK=YX(Sn&^?nDb%qPa2cyzVg{
zrU$v#JkkrnCz;D@L1CYH=1zpP-<-#Rcfg$e2;iXEi}oK5nNwVV9X1<|LH&q%&?opi
zYOY2b%*V_xDJ@Jk|4c2*aITGl&J|p49a#H2+4s3Qx_OYXCeq
zFKh`%FU*CMG8UV!)P&?qb0l?tUYRe^fA3XdZcK?%skuW#5MP_Uy`lHUyecl4s>m>{7Kc)
zMvKd2sC!zLYy)wVrPDQ7*=!j@S(lfk3lEVk7QqBPZ;L7xR(ve^lzeTqL|p>#wY=*G
zf7>jWr}2?kZqmBqXF2y0x8iTvPkBLrQC&p
z1m-|5#*$}%UaaLPwY=gih1bE0w=|%}S%M|V9U_UAgfv*$V~MBYXRqbB3LwdHIt9k|
zSyDd&?6-tJ061V7xf{HLmRtiA4p~_Gjt*POj=<&-%Xv!3k6LOqMAXMDQ8bAsTYf18
z@3_Tx46qc7JEaFFENx~&T?dqjkzAb^xQL_i)sd&9)IZg*kGA!qZ0bI5$r3&SWWkMOi
zRm+qfuyW1f+Z(ZDS{7(vI?Liq3(-x>1G>#@%OKi@xMdM|h}^auqslwSvWR~EJC^>m
zhUZ$^s6ouLtoRqiyOunfckfvqBtq}L#X>dS150nJLLOQUy@QoUmJdDvk1b8RLH&uP
z+hq95xAdk1ECrU)R0$Va&gh}=)UxLuz%xsR1)#|C!Unx!%Pv~`Us{I#1@Ov(lgjv<
zEPETlN~xt*DMVgdZj6H4HZd4vs?`X_TDn}
z5wH)I5xG$KXmO?Y<&!0n4hny^IHdr5vFxWh{HvwGT43KSn4WvOHrWhp
zleGzJ>#I~A|ntbb7!wB4#Y
z3E*d4Lo>9$HDDdE0ING?+kw`5YvE{z)m{!>kaarc*TGf|oo?7^jU&?`)_6L<6l%TH
z4+>${Su#Yzt#0(+2t-(?%t8>6*8WRDjItJ3fkj*Yp+3Vd>zp?r?zWDjFFeMYPpfFG
z_3dCdinA`KgM9JU+O&n8V7-(EkZ7$<>+~LLKWeb=wXUZ5EXi6*@6tZ2OpWXP)-T5(
zdB7S*J1U2*qbQL-VjYkN;!*2P+FUqh{Y1-dvUQLZ3dgOJsMnQZjZFjbg!MI5&?l`4
zHF1Bb)^Bv6@|0EA5WLgYKJ+S{v0533q*-IAJNpB
zRzF&x)2-dN!0jcgNLh1+wLB9xFIzRsAacc;RRV?U*6(ESZdjYqGLdNwehiRhok%+s
zH?7&d;5OUJ(wuzDx{Xrs+g8{106A9OLm0bbji&T2*E+BUV#%|bXovrz@bKK4LUF#Zei{X=*gE|V?)Ihi!7^a4tlPqXm010#nkcnKPX>5x
zoircdjkQ`5tdv=cGoW5>-A`FUg|$I@@ZMS%Q*HmwI$|Nz-&?y-AM=A%-~c{a4SrDg
zWNq6H;IlQ}4dH&VPKgHZtM&R`5WiVZzK5Q(Ezljn#Wt%EfUE88S%9^+pLKAw&Q?DH
zn44`VO~&rF@KJP%tuO|ctn6DNYV(e~{JNP6139fQaw+w$-6TsGTw()m^|
z+azjyZn3TZ4GP}2Wz!(yV^cf6F`Mc)V7@kn3bAdr6;%Fjw_Q&{fPS`Z^8x&A*$bh*
z!`9&hctN(%B4EKbR}o;R?U&kc6k^Nn1k<6mAeu45Y+fs&7j7$}-!{S)L9Z3#6@kJz5R1$NYyPSeFP
zThr&TnQS{k-|cam>pu`lvEBX%;tAV4noUpI`V0X`wGI3M{!ZDJO@ZWT+afymbjJ3z
z2;S3dIoTkdwOzc1;Lq6@n%&OZR#2&a!PdtQyo)vuYTBpUywX9uWP3jWL1fr&QQmXe
zmP{Gh6`Mr4{#Bd1C$MX_8JSSHZY!mv`-UyE8T@71ysm(kWpkq=PB(39PQiP&?R+74
zw`}|SgLvCE(*+7SHm3z3-m&G31Toh(@gVf_Y!ySHaM$+BDPZ?(|Iil2ecOh=L4064
zMw>1VZS6k7?IYXm;}CgllShE~#I`LJ_mFSX(@R@mYdi?VLR&N)Dtv0wO%UK$
z+v?#^_-1>23T~b4HCiDS7kg|Hh_3d#4WO{r{>MfT*V+5f=AN6q(OeMS?djBsT5pe~
z4!MW@>qFSwVE3dsWTXA}so;6q8wLT}WN&&0*k*e{D|qm-n?}Oz7P}w)mnYu#9`hjL
zV^`6Xx7Ggm4&3_MYiYsTW-lHL-gdk1dSC(e->57Lw1?5TpdI#ko!~FX-ry*R!S*OW
zU_0%n=m!X~Pp9NE)LwiCHpA>6C}Rn?KR6Czgndvrj78eJZUr&Q{!1qqi?&~;6W+V*
zTRQ>lws%VaF~;s}hWA)|U+Nmg*`GE97H==6RVKkcoN}o|`|@od?y<+MhugjO(^Ro1
z+1qQu+h_Nt8FRmV6@57e?87&Jc+md78cZLux2*-@Vf&0Z&^uxuN}u*odm2?|$LyN-50~sNv@?=n&!$fBW&2Om
znZ06n?*@^p_D1x~uGwd&LH)YD8Woy1>@{i1%d{(efMwZ>slRm7?mZq@w*4(lI=Aev
zf}nTX-s3S$=h$660Pfhm>A$_owRfi}A{{sds7(;uaf
z^mOV?W#A^K%k7}P+3E8wNP0OjTfy7n)WHs(w-dhs3O-I93qjoKG~pI7Unh6kSlQ-O
zzbC+UrzTfG3~)-Q3oOtnhtzjCUCu^;K~9?wffwvFqanafr~k##b;ng*cJVUHY+F`$
z@4ffExzciEWy3T_X?ts#rPZ4jOOOo;DuM!n2(px|AWH#d$&?|oMA;&Opa}SWPk)`y
z8Q*iB-@U*4JZC)U6O=X`Wn@yLC!8^hE;&Rn&aVP4lJN!Q<;NJxJ9x|}#sb<#qZv=r
z&-XZENf<~BW1tP>1j9tei7nN718O?N7r7$?u4ohXk(ng)eX!rwMI^*^OILlz@j3Ai|&Wo_j
zV!YM`+!=-o_59B=>aswx8RZ*5av6DaQ6rBL@+e3?Bb*Y6^9-M_;qwBcd>!CLj4OJO
ziwtfP$R&nzDlAJGCC*r91!Kp0gso)c(q?>_F=m0ThOsRUx?0Bizu~No@h9o(8S`QQ
zzruK;8YT@4Lov8UM$2aCnizAE;iZ{Tp#knHV;7wPEsS?pfxE_F)7I6-SUCqK?F_%y
zAnaglBGSoF-vYVLcsn1G=O#d2>mp3en*m@%{#E;rtAJwjF5xirWvXPczMWps~wh3
z%=XVAbY^~_f=?G_QYkoB=FGWRpd0g_B@lWr-?l=ym#KIk08i#u3-Bmj%)6)I)0_D_
z-QDtGCeUpdU*>~q5I<%MHIn_ATPaBlUpz
zvrKq7!sJ|o?kF>_79@iCPcd|n%=O>H@)+|K`WuHRW)J<|qnRHCgTyeOr)NLGtkMGz
z%Z#DwC5|bg0m(_`)EgiPOd${OM5Z5YGfB*5+Fz2H)l~JIVs^a&HSAPhBeIDiQsCPZVFh|F;^Hst}vgYD@P5?
zY--pvGMCXt*2K)pfUueQ-Nzs;%vyiIuQ9Jg!K9V>H~kvhnBz`x*3O(u_vAX6f6j#P
zI@5=K9bL?{=diLH%!ich-DGyt?S>v^&?f-&GB?D+q>s6}0F4jyUSdb2;CU-&&R=yGk4U0yT{bf8SsF~
zp~Gg9*+R|fDQ484&`mSvt_FF?+*JkQ#In)l4`&uH8cT9veYOOgD=Wee5!_hgZt${)
zb-)Wcch*AssytX5zl6zNRv(p!o~%#kOZ8%%S3&5@V$n1Bu@V*n=g(S1FIWKU&t`Ce
ztmBmF>}PGHc6$*10tA3y*6kvg9ANFBa^N5<^bDMZunMV#ahTQc4{)KZ8Gl0<#+tni
zxFf8scM&$6wTK0i2v)~?;38T3UWM)$%Y82ZQLLxv6+X@~UxYA*HBSTh3Dzz;CSqBu
zCPCs@I+}sSv#fz239R4f@<1X>dI0bwRvrDFVlpef3Gmabaq6a}u=K51U@9xL3zlgt
z_3t3*tXXovGg*zVL6^mfc^twstUCeV&ayn|?@+Q?+Gs5B9BVKfK66=TsA9-teY*f$
zKI;N)YXz)Rq&v^j(#kHd`aVItB9_u0&Wc&JG!rgi1<|>3iRD3WPbur>QsBy1Zge)5
zvz#d1s$eD3(R!IR?@e%3tWRm3eTw#Zmpx#@dhtTnEc<1pu9_9;zF!vv{;Y
zbg_=n6^k3J{he4#H)}p6r9CX&VtDCgv8lb-$67`+lz!GE4S8;{uG8Nt46%O6h3+=%
z_z?()Sw1=Nd55)@4*e0<6qWI#ECy}~Y!>_Off{z^5mBRSY;U_BzVeyxD;p0QX_{eE>^ec78jE
zAN#paK>XQvzs7O{*i%$`1+q73;d&o?G#g|;d;et!gV+<)DhpaAE9=Uqg6=y^MOCN7-If*oLzkPs4Qt`^Q7D
zjAZ*$JNg*=MHQSyu|t~>A)2kB>g+iC;l}{PushNqJi+#)?KhS!co*TnJ0qbJ-x}
z?A0GYSiyc@fe4lCUy>2_GW!?mjaIP}Iv}iJNB;p*%l?jDqB^#jcFcNq0ZoCguz#j)
zw2|#Zt=US8@q=cyBnmB{pYu^>}P*Hja3h@zjz!bgY2m{KyI-=
zqDIecw(0`NFnbgI8t*(s&J$7*+g!kFybgoRW
zGw2AJWUnzpH^uhIhL>r!M>!%qWGm9aIdNXUk43m};%H3m$_Xll(2cXf0Kgv3axN_0
zIoqrd?&VyjveT3E2mLv%7YC<2ejS`2XmI4i33tcG>c??&0N~GAM6-|p&V3qp1#+a+
zq}<1Ou?vq9#QBD{%3#hxdY2AxHqvzNAjfSTxI>)IC9n+P7@r63FlTlpgrS^)HNb^&
zGCu=%gfnYD!bWf=YY;Y)^NtMhj&Xhog-H}=y$UALoG~T1;0N`1Z)oDVj^
zGL{ocX?+~WpLVH}9G`z-8PDmWgD-(|@)PJ1IWPBsBysjo13H-_qi;He!{C5R<@`j`
zvNX=tYglJGC$ktNgQKA~MJDHz175N?2dLaR!k^V@k8HbJ8hizsY%)u6}iMhN#5o
z;Yg{|*2_u!3&K9msd#YxoORTL7~t$2hj5TnMf>$F&TYDqGsKCaoZ&XdJqE&I&hfth
zxWn0h1Huu`kPPugIbN>;ewX9_6UZ2cLEGUtCoK*p_c&|m`@7Hif&PGYf@7wF{{iRe
z%~;ta=Q>TRr#R_!-cEBCHiA6le4z%;iTlt1FV0;38hkD;+$~gnx^g)rbmLwKhHwwJ
zkGk3J+(lHAcyI*{tYt4(NLSQ6xnCZIr5ATY4Z?bJ`GYX=;kwW)(wDo2h8cd`w-aFE
z&n=^_UjVoDHJAi)^Q*z_$%f5zGaznMS%;IVtFge4W
zP5aqd?h3kZn$5jK`CtzBS$f^haX+OzB$vC^7bK7S;V4Y;>+VG$bhERu;grn0qS(x)Sb(u^<<@d6aHl;yz9*E9KU2#uJrs|B3*hoLk-r
zz-8_?n_*eSWz&0I%`MmnQp4R&nOrS*12qlnxQ5+;*K<$OQFn#wF&kV1w~`5Gjof5v
zw>NQ{>56DG_aDkQuW}hh@Y%vG_#WIfuI4wyYvrEshOnC}(85a(x0BkEy<9UDuYKJ0
zUt*p8+~SPfx(h6!-WG
z;HJ4R(b4*l`z)2DPP`(z^yAE1a~38pyj7uqyYfo@0q4ehhW=}ZJ-qRmaP7{!z8sbw
zynksru$MQFHUUpw6{Q?rJkLY`ym{f&Rq^2+kHE@&dGCG;;>Y`eT37zOM^*tBz;1{GAnyrs7QKfv2Wv+IMrFX@MHh}TbhRtRst2_}bms<%NxdALM_p9OEh
zXMi8&t(;YE;>Jp8w6_*wAweF`p#cjFx3$-H?^5US}YL6+CG-NF|R&MMV|wk)?=N&70Q@
z%NpJa8Y0*80;sUP!YiEzu7US8&E^|<8?CTx;uY5;LNo7=Wzb#YedPo%tvnkgN^QJ_
z@4=*#S3zaqbzZ?DtgMUo7`=lxcr)mCdz1GFmAT!#UsJ*L@Givy(93&o2wWfUbDB8x
z^XzK49^l#cfDH1Ur7iXr?^`;uhIk8>f!yXXeDOrXyhU_%;SMk2QwT?Rzij|F%G)l5
z&%3-f4+zJ2e^8b;&SN)%+~aMackn(h@=+{sf)~0O5B7j3Oa^X}w}4ufQ@jmy=VY1}
z`3ZCnc~9EFIq@UuqLed#HBGi$_(u-Fiz`2J8eZJ^HFRj~;cxl}59ZE4?}q3e{EfeZ
z+sprxnmL~QKdA!q;@397(wl!d6U2}IHFX{Q`Ds*l1n@&CNetxsQuKZNHAN8a=Z`;x
zWe|U<9VD3lfbNkU;QQ0%frI?2FbEIv&rAS-XpNA=OdKU4Z8>VPf)M<7Jo}RxFPaLV<$BmtnF`&?bh@{enaq90duEQbKS*&}M|mLBV}GVGjwO
z`~r^|B1jGaIV?EzBuqjD?@Z
z1)tM4dR%bkF}RKq9J&IN6N2BUlNc*lR|pa>_}_0>M1mmqUzj8c-u4EUBxt3dTC(7M
zs?JUc#EU>q3vz4_rU-r+fX`IHu5oZ_0yi3Wr3=QqfXfi9rEDfsV5Rfs
zAc^X~i-OiyK`sgQQ8`d8_=vXqI>9_DUh4%SJzQTAETJpK4TATCAdP}1n&&hLJhy^t
z7Q8zjuCEGast~qC@VXkpYl0Pr!L>s#=oSRO1JWaKe*wB)!B2leHy~K~E4V?ykDuTJxg{{HK%gPPMh0}Z
z1#i>AJ}k&+f$omLn{tK`!D-rU?g}Pnf{Y2Cq;bNy;5{k>?+J3~1-mc!jta2}K{X}8
z4+M`gdg?7dFzWuLzHRj6e;-8#7?pEPS4Nj#q`rKY+9dg%)_ZCR{_s
zR;%!rJ;1dIyJA5)gt1gib_&8^Vlk_`E3;QkLE=Y@*GhNBGYV
zh|nuMOYPb|p?48{_6w8l0x%%lK@G)0;f_dnxh34a1!PG0>lD1)7H(M#G9rAFhHaz5
zE4{$o6|R!N=a_Il2fA_LR!WT~gtJC~dmzlC`O2j5>qlWSC2ap0!iU0PErd>@6>V_2@QXemt`
z{6uwqApWAw2Ota(ou@fvpy)ES*n&hkw6h0`R4efv9T1tmLA-;a)kCm6BvMkL5+a)Y
z9k|1yk3WY=sHlp(go#$tUUyVd0oGYB>Z5B7jUosAV4FlQ
ztpL|7dfyDot0G@I)mlWYG*oIA?aYQrhbWW^zfRGHUU1h%Td0ia5`9A5ksG27v<2N1
zMN=Z*Evnf9(jyAa0iahjb^#^>qJJsEph!uX@h#D^uVFGI+UE-|w?&epSnjY$x)#eF
z75V!>cUSZb^_s^-lP`gci^4RpyeGx(A|X=?s_@%`5L1o#V4+V^AJD7
z1h-dQNJAb^vCB1BdW%y(L_8nySRlOkikm1&^b>#Qj0pbX`kw&^5PwJq-+uA*6VL^T
zXZ{3Tu=v{!_&gw<4uI~U*tHSlusDN0f>3cdRkUH^ebkdXA{Ox=JSvXNL%eWt{C;?e
z5SP(W9x1N73opmSA5niIN?d&smeJz4YD73Lj`V;qM!bo3usHDmT}L`8&QQZ=yf~#7
zmI>mGbfX|qtfZb?lKAbb5GIS8X_Gr8-c1F-X|ZDybSYx#2?$fgy={P}iQoDh!gR5F
z2ml%4{{Pw{;_W>!$r67Sg6L<&E8m03S@BzRKxd1q>35qWeuw_L>zr8i5^%ZVyZf;C
zJn@XxFv%BxN`VT++4L(uFaCmL=j{0&o|_muN$}B;HTo
zd#N~(TAgL$FE|jEi%%+HSs{+i##$=HQ{HnN!ZY;HkQ*&W*O&k#nVXOF1
z78c(oj(Zt^c5wmaFCF6HzY(ZYe1~4e>*5V;kS=j-1p?g=pZO79Zi=_l@zO0W(1Ys{
zKP&<173VyFmp<_tdiDFoyWH?#1LDRr;0DE2r=Ytf?xuQWNIZNF!aL$kIs_UKuX+({
z85M6EfzP|*J0_4Z@oqXM#>IhjxZM+9@&&ms=DmzS6Jnoo=pKl(FF-gczD(K0l=wBe
zN;fTjrU&GqSkwd)CrMc*h_htv=P+@RWdDoku9Bf#tjtYPMz_QENS<@TTHGaz*1^(4
z^40+e_ev_?1m`I!qBG7*vT!+ww`72JHy_E?7MS=-mQ&Z=Pja~e@%$zAR+t1xcKrep
zC>gv3vQJX_3BvA|ywe9RNb(j{gTay{Y7HEc^izQoBAHtP;bF;WBe+n>@J)~~$x0=@aw4LmkNXpm!yke86o*96h0#*e-A-;Oyar}fGEjpT5!>lIVD)qamiygz+)tf
zYXLYR`RNmoSjm@<RJS@+7qe@+HxSVObyvp&xpoL`3KNdC6z={aujosO?iE
z$(@ft#S$b>_&G_w%L4qO8cetK<`ExV1^P4MW&2DQy9+L*jNDq*D@}
z2y$KWM;UZolDxx!-;hMs!skuNO*3@elCAH9>yb>Ig0o)9r|bkFI+nQ09=Gr^#uTt(m6Dy
zJ|;c#1-wK_T}0rbrSCIAj!Ru>@){$JRsnZHstAU&Sn0t(0gsnzT>wasenEerktp3n
z?dT+F@GBt6()}x;J0;DCfbO)k?JRI9(&f}ON|kPV8m`l%j-}A0OLfnKWJoLM9n6%z
zN-e!C>2n4=!x<^ZAG)*B#9zQ=OYI*4o+E8W*Z1*r(l=sZnJW#U;wMiUxE5T#)RW$V
z0;zKf;uT7l-oxj4Ub;99Yq=o(<7ZeFNj+#FQ!IU=8Nw2&_FtG>l-AInzukWzxJLn3PKyJHS;)Gd@GuO6j|wVo8^!S7<<4CEZ3ZX0`NV`pjyi+i1hBm3p?q
zXPtBw6+iXTFZTd`MS9^OoHa;yc7rrZ$3`J+lE%-4Nwf6ma*(T1X9aLAQe7dOU6V2v
z!?IPn{Rl{#^i4`p+och7^`t|p{1RNJR1yx|b!os}a9z?pY4CDGs(%6|H>HD5VJ*GV
zd8a`7q<{YilYZ&nw7(2UU!Z3glv7bbV42WV11
zB3(@)l$Qz95HdyLvz5wfgLu-r%)la_Q$7I_nZDA{7#JfdYj&w@KHYdHpZjO^7#5T1~I
zNQq~x?Am3Jc-eBAJ|@UIsN0k%TT01#l5Ff1;F4wXa>P3&3#R7gY1tM!`%`3JQ$3a{
z^LGG{CR<7ML%K}0873LBOAX*MW$k8gS+c#+0GyHay$7FXW$xFo&TQEq10XrF+~@G@
z=VS}z0OZQfZiFyTW~PZ|zD$t`c!5l?3h+YN$Y;=OB?7P6mK0mc9KG
zyp+gR*}+|uJx2qQOR^n*z-Os!Hy7(HlU-|v&vKcTqF2cBQ$Z?aWhpSZEDNr{%Bp0)
z-GY~DSvL)%YGiYih+ZrEk+!ZnnNbSY^|J5jr+q~hH5?RrV%Lo!eyky)bE)&8K^@9kN!MuXM_06@pxsH7x+H
zOLo}<+zr`R3t@Rv*2BT#du37=N%p}Q*!YXupTg;5W8Ty~4vg!g3a^h6V~>+b{bK<4~k
zLrTWHf{$lPW?2Yl)3OHz;2z2jehHkjyo2^+7kLpKHm>pjs)*d=N5eq&$o-ze;`hqy
zXddS&pQ3J)mwY{S@4V#?UWd*{-un~c`O0-vmift>$fv)Y_X9|P{1#1<0_B_Nv)(UH
zXv5-zy&B!{pJ_4>=-NBm;g_
zeqa}b;qoqOZ$!wa*&vbfSjxzb$q!J=IZ8hFA}pij-^YR+m+y>1pcuJ~+CC@b52!sA
zEB{;qpKU!+M)liX5;EZ!~%QeUDUzqlP{eMK)>9dGJyg4hCT>~
zw?95Zzrd_6CTD;!8T2_bT3@c%F)buY>baJiH5lx8hT35cw$f
z&{)-1F?JY2KgH{7u}*(QG^Jtz3e^($3{?EH6DIoSzWyEpCjpGOuqv$w-Cpw{+=!RviqD%(MIK?~Ey*sIRmin~u
z3LE`tc7h_7O6NocVk^~7VADJ1j~l`DQ(3{s(}eHQRaMYtHa%ZjB70jN^c{{~&PVl4xJ
z8b!%hAhin3f8~zinM^!Uz2Y8~vR4!>omf(XVzU#tM#XdIfNN41=;LWt9H#d0RmC5!
zAT5ege?+*Z;JpAqt6~jhu^oyDYDae}SX5J9S5(h}wfC;CdA%
zI(_>TQSV@Z{fd%JfDb4V)?;OZia%+laZ9n7YSq
z8>TFJ113k5pHr1}R5|61u;I#@2YBcRW#eNIMk#BlbdFYTJ_Mh~mETah6{|cz8+@Gd
z2|9sJDuq$-60iJmKX3`kbn28QDkrH^dP+G?h309cd>Kqqlp9V0kg9xp9(<-LFVaSq
zuJoeAJ44BDhA>mv`xY#-l-H*b;fylV2HjcZv&-NmTX~zB7CFjARK1*2o;?kctMqS!
zWuDT-6YzZH=NADlP!3Z*QK+=jK5H2tJ_9rz@$0$~iRpzNI|02HcSH$QF>>
z%2hO^8&(QF1n!Pfum{2srL`TxF(r@M4dY6|V<7jG@&AC_S3Y(G(I=F((EvP9nyGM@
zRPLjFa7vlfjmSmM>S&>
zbndE;SHjXmt)w4{*M!piMZ
z$O=$ZmI4r{Do+7mpQ?oRto^DdDSru4S)PJ0Sk2vuc7Kp3VvM5)6ORlzJ+9#t)U6ei)SmuXBEp~|K#AyTz;F`OM!b^Z+3
zQ7T~>Orlj^(;s{uSFNU>Q;e$W7)(y6^5%exRW;K&7N`1r5b%>K)fD2zt9)-mn4n@W
z1(&Fj(L63mb%Wa9$*PChaCS=7wg!OHs-_?D5u~W{)4cF&Y3i>@1
zt0L$YREa8W1HxWZWiEr|C6(C+&Pr8!%1X*q+F2l#Dz+!cW!0PRu&h$${Q**~nkW(US3h)tC-VMYXRW;I~e^=#11>>0NAtfjGRp~x3nNZ!%
zgYJQ82CUE~HYsp^ieAWT#H7C@M;&Mm@PGSpVOrI4wP7Xg>0woqH-jJi1zv|eK!Xt
zm(|f!YgehAD&e|Xeez$J)TnE2V1c#jq%YyRPQ933+In>^^{=m}D;@)BPE_&6KG^^`VhpmI_ezi*mmOG$M%s{*$_08pY
zqTA}%egrqHp0fzt9rgCP;6~J`HaHtqGpQ!It3GUomofG1a*%PgDFd$WsaHJ%?t%IT
z8XQfkzoZe`lsc74btlc}ix4_%@;`^rMf2lwSnkopvk}2v^QaO+56#3|;Jh@CWFU~Y
zW(MUwKAM?Juugx?;R&oWKr>wlVW6grdxV8_BlZG!K;uF_Lo}sy&>q&X>6HrA
zytooRk818y^%<_2_ZLWnhC@E1G*8mZCR%fZQrqL2>*O<56H^8+aheTu2%pp(CZCC#
z*JOH2U8_
z&S_rKLYJ#4Yz0@K@!1Mzg_;%AKsm43c@Dy2jf!%q63qolV=ihGVGx#Su6_!xT(gP}
z{R&ON-w;-5{#}7jsamskGkn%)d|V)`*W9Ig`if@D4)|=)*r@B*tohY}bzarf{{pT>
zlSWrM+B8}k*|lq)(m>atSxozNm*%Yr2ybXS7J$2{Nfv|jYOb{a*Qd#$GqqpyD5crA
zG&9-|eMs}+8j#zXl4h8UXkxA*`lyCQ7eDW6!l+?-PjfmG+x(k#q?
zmuXD{-3WQ8dCwg}7wvu8!CbZB9`Na=-TNVkhxW04!1roDp?bwr`xd?PK3aYRaK74m
zp#b=4|71fLsJ-!D?yVK92e)7API>DAZU4t02er*K;W(rnl7b7>>YvBQ6QhmFhA>XM
z`AG;*Y9Fo!iPxsmU8)4_1bwWDS`PixlC&$xb+UHz-_V`XKKByHY3&#J5Twb>DmGVgc;f=Cc$ND(+0t1Y5(m&ptIU+$|th5APRgNc*SgVm(VMLTkF*W
zK#%rIDja&XSr?(})27mU-LFkyfg8{|s5djH70_h)mi7P*hlaJcsZ_tC-AdoXi1tAX
zgrnL=sPew6z4k9wHm1${8Mtw+{{ralX*20I;eBmc7q|&+-ao)S&@N9#ph+$M%>lfv
z+F7#!nARQ%lGK!eFmYsZeb`m
z58d8W1lp^sK8Uq=>Ugwcdg&%;@A1}s)(M=SZvQ%1`s=>kgFpegFxo@*>rPwXB}jLl
z-s@o9v@-yQbW45!JVZB^0Pe8vdukdU(fLx7>!@z^DG0-L$D|M*(`DO0qI9*pA&k~N
z%7d2}T@0m+Cv?kK01&H7@<#MH-O@0u?4<6ME6^qA{`>-#i8}jH;F5Gh?hu~RdC=)}
zTIc&ImXxCNngd~~Zt0T{rs?|V59%^>ZjXY?)OFAtJxjMk1(UP7k16xd)_HBmT5@!k
z=!W7soplZ(Ci9GJ=l%46zZB}5T4f^z60)p&htI2tVqY^fV-$$R{+lg=**
zfM%VI`m|SdI|C7+MK|mW*VlCU4sflySMp)frgNhvP`mE>e2@+u{<$!`w7NnX3*6Aj
zW&&_icj`2R-MSvika~32D?xg7;z{WGbW?v}o&CD41KSZ2S2uq@;A6UvKLR(dn@NL!dpglHaQAfwsl`2^`}QbS
z_CU9q2``hnbF?8j>)p?TbJ4G<0^C)9k7_PAeG7fzd-S|wEW%wM`6h^mUPv$4Uj6_4
zfb-R7b;8n5e{cvofBnI6gbmQQKY&S~-q-})K0TYxfc^TH8xS@~zqSOp5d9TuFdWw3
z5mixcTykmHgNI!n{?(R=@%^lAX#stUGbED7Nw!5^>430ycB(51y+`-&!M}a
zX?ho`Mbq_ut3WdJ8);|H)PG+Nc$U83fp};1`n>?;>eDGn%+pWN+nTTM{tiA1^na#6
zSExTpU9t1}`L6H`mFYuhv{9~KPWKrq^h?-qU8#TR36RVB
zcR6rYr~mf|;Pv_$Ghul}@1QTPLEjP$(x{)Ly{<|B54{Y{`h_(hZTgSr0N1WBrOs@J
z{yb&=o%+wJK(6ZryAZug{|q&VZs?CF0PoR1+5};*{_k@T_UXgvN7Ap)Wk5Kf@16ml
zgL+pwi*M-@X2R!?{wFsq{o?NoF`-X5
z4QCJZS7~pZ)PGL9#*}{VWpLAa$1~8m8ocP|>t@(V_0b-~z2D%)-5~oD5j+fA10dXM
zxbO)8o`#^!0QebB&}DUh!@C^GFs84zT6ltwTi2JSZ?
zhYf$z5fW+`ejK_mLj%<$M-2IOAV&=+dms!qbkgtkm_ha_qDL8?rt81ahUw?Ah~tJ`
zKfyA_5J5eb69!WYQX4rYTUSVXgqWEW_cS061r;x(<_ELwPB5d4~B^|K%GdF2SV0
zFhH4Aq2Wb3XwMsFL;`Tp5JI`|CByJ>kWxd^4UjU!y7@3EHyox)s=_e#-+N|wZ5sf!
zhJWKg>I~j=l-C_>kaFyQq>xN(H!MY4(F)+Dd
zc-0EsO~YJDZMzL?7Qm#(Fia+WhFlj2`wjn6aW`N%OB?*4;X7(2-7;*@;v*k2RMRJa
z+wcLsgLe#$lQ0=EoUDYGQNufQ-rhCrqfK?p@c0OPjvHKKu)uo;<96UC489JSJTOer
zUq($DZc-jHWytyqWZJ-_OMVXx=iWv<8S{I6@`9oAGliO!gQL{14IH
zjq~q8xYwv2fY8$zq5+VbsjLr(Jp+@c=DKq9!Q?1-+?}f0!c#58{(zt{+_{+xQ
z^v4@j#=1Z_t2XX@0`Y2$Jr^LXH7=Y7pLNDaI+^Q@`9DK<#ps}+b%XH^9Vm^)U+FDx
zGOnRNaBDX9Q0aWt_|zg;wiqijL9Q9s*MPJdM_(DgMh)0^Y);%&N6gy=q|
zBXqv|nx^TRou5fE2F~BqNo8PwDUAAVfu(fd_TBolY)i|$4x$Tw<5-*7eRNzbnbU>v8J~lhc3>veG9mgrgKjqUc4#C
z2%ib2!?h45nzmiVl9EhWw5^>oy_^rgY123VK$v2hLvKN<=@K6#%~VgV)pV2fYrr#1
zYw5hrG(E-zAj=fh0NoiAM~EezHGM5-S`3nBs-Z+a
z-?W3~_64SaFCi>63HTsIrYcH?icL#tZeL>JQ_gVFG(;uhCDZG4#kbVtNn@)rQy)1i
zH%V4NSYcwk24|I~FglrHpv
zK(3gsoPe;w^y5FkHJYwaZP8>pLszt$O_xQ0Up49I_-rv9rx)d#Dc%<*t)|~;oo%KL
znvS=dqPZX)rprIWOQ&h26Li;2KTyusWg3nIcf&Lo1e2Sl!GGbU+f+{_caP~leSf{C
zt1m*=XR4izM;S2fq?dNkG}9BpTc)D*fDf5|rSsvoDMk(4u<8CbnA|ZDA?0^?%bK?i#T+C%Y(7BpD>4)xSJ}?4qk2z6^mARXri38ljtUe0My=L2L;5^Os
zjnH|SpQj|>+x+8h#Pc!hKLO6yyqo^{5kK=N_2>P~AMA%Pz#L3pK%hB}zN&p@&&Bu%
z_M0VlfIDE0r%dOddHs9@I%NLemoN!2XK#baVY4@l!a~gtykQb%W((o$h*?h&j+)yj
z3ko+Mpg&xRFn>tpYNYwtV(5;Ue|{2xD6=!Ae$nPkN|2A63#ojJG2i)6pZpubv*ySAV3}>!&xA0?EEEE8&iqFy
zBIKLxM*t`=^Qf0sXkI}t`+4)fK8SF^oPHRVMP{BDxMH)I8WSbv=k?$&nh#NKddWQJ
zJ#eLF7ur$E%+kwNGF2fxB)FIs~rE{CgtE4KtIr*qdf&x`NPcen<_|KC^x<
z;`N&!r9Sk4c^PdbgXZo$aJS4|YXBHBXX_!nZGJ2k!eO)07q~m-RrDw$=0Q2&qvkdN
z7I@eE=oC!G%z1QiY1|x6Gq8K++mv|TH-}N7Ibp7+?#Ki4Iv;S8=4JGrJv48=3AmHx
z>O&A`OB;PIE|%SFSh`wTKZl8%h4~(Ydn|!WaPF2|+EhI({udzJYbm1w&eO8<7YMy9
z3unQLw`HdQ5qvD4(mU^K`QjCDewIc7O#ChHc!3MB9H4$(pk*I5AA&5YtDy_FZ2cD8
z0m~os3Lmue*1_bErSWA%2(cWX3v!1ohMmxbTIMz4!NM%h(>{O1vLzlSM=dLhnY-7MO&EhG>
zBGN5+)C$b71TBKIOiK#AAz7ABXt;jHlJ+|QXDxHXz-3zwc7e;a4A7OTJj?UTz~x)2
zOu!XbKBJaGq2&yvY3D715|9g)1y5nsMV1|O+q~EkNt22aOV9}jFIo!rAnYZJn2C6$
z77yy4msw`hpT?A1W>U6RVQHtnO{K-V1}2v+`zZIWvV2v8N2#?u(+*voW%m_$skc~Z
zFm}cAgcEcPmO}an8ZCFJ-OyyoqB^eGvWbRtS1mK>;!BHV9ZjgNSw5h=uGMml#++@I
zEwqERTRxot*I|jKY_!wD_lC)JOZ|7yby;rhh46+Y^;Nj;u^8Tg>t4&ENdWpR12h%t
zw|rj=-GJreC!rg(9Hs>8mgN%7eTOW*Q*d_MqM#~r*fOsJYq?`7Ndg(MM1Bq3sHJuj
zaCa@~bkA|j(k2BrZdtz=Cig5V>eSq~Y~BfO!t%i`xSq1irGK1Y+VTxud3b2)Jq4kY
zbxjwelW-^Rs@hgwEgk6759$tefew*M93}O7?=Rcc~{3Y<-lP
z+6Syv)B!nYtv3L0$hz(aScX_<(jQA6wi>7$2(`BU4<=#OMF)X9V%-%C-BD{FHCMu|
z9wu-R*1>qVju$Q{6K$QQ&-#S*6y3UtwayHONt|^XZE`2A&s0Dc
zZ{0iuIuTA;gBD}Cr>(Q;El9EcNrhjkRoViRG^^!X
z1WLEc=)=me?)VeBOlu!qzRI#Le;l|o))|y^7g`f^2z1`+83)S?)*x@-imZRpjhAAp
zjtYPhYn}}z7p}&b&ndP()t(eV3)1FzXMQZ
zU7`h`#(FdtT&?wgbbG4K`YqkYuD9yw9lT<7(0T(BOrmbJh0{o%1Jsq5rZ6*^sXB(G3
zc^6w8J*}(lW(CL|+u2^2xZ8Gq4}gbl`&n3e+73{s&C6CtS(mr%5cQ>eY(L3h;%j@K
zZWQ?03g|Ydzin3`78qzNe-Ye1+iJSGx!)FJfR`X!j~cpQ+jo?s9JJl1q0%AS*D_d!
z*y=XJY)9y|3AcUtF)Sl&FVJ@sXmOl(8MapH+Gg5DX|u|*
zjlT=s8Cy1eac6C1w6ka1uJ1*>9NYWUmON)0dk)LZwLQHBYss@YC^yZwWqN=V*m9Qw
zP-xR+!}7c>fO-kVw#Bp|mDu9w!7kdq=0kYNh8Z?qeOp*7T$kCFjX_v$J3u|F3R@+m
znw2)@dHB3+yGCBBY`f??s4jwzz3L$~D_ZH0Erz9eW&J+H8~aVA*cd&4jSS
z_6VJgowmU|e+w}Y3x@`yPlq0^1vP26G{L^Y;*U)^{8zo^~mnpR`|hk%vP2J
zlX2T{FoYAf=cx7Zz}Bz^@g{8y=4yA3
zfr*=4cNWg}*lm>Ld)U3h!R@uLuz>TlhttZu?5>OOS$o?*X#nSAFQB_Pe)jhDApZ7J
zY8?mI-7z6~e4qUmWrzFivLpzD?DkkV3$};fgYba;eQJFivQJTd9b$Km2RUpX+K-PQ
z)c!n;n8NI78xZJ-y)_^Pn>>Rp5n`yVa2-jKm_o**@)}BCv&1}1P10v+u$Eg>4&i+4o-E!>#OW`Ho
zE?EPU0(%o>C585b3qa1>uh5V3f<37l%Pq2R7Xnah&&YxBlKrP0;7aXHx51U!AEQ&I
z+#=v(CPgntxa9lhhGxu)q5c
zgpKy_o8X%4M|T3(Y|o@!@v8ktY8PFz`_=&7YL`=K*=GNlj@=IXsbBF#o%SzYg~@e0
zGXbQ_ex7<=H|!a79kAP8HUq*Qd&pTVqSv0?1)qI(=l#I-+jpdb4A|eHG3PD&2=zaQ
z?7x~3=(hbFO_qo4OR4{P$DTncXb%1lI-A)J3gfSI>wPfU+M|R7k|Ps*5UOc
zgmI2=Dl|_z8Ym%;cSuJdOmL)8Zzj=khfbg*$MZYEB|ALd19!?XMWyU%M;(>;DURMm
z=u#cOP{okuc!b9H>5doZa!ZC|K`%(A~Z0!(Tg`=_9*byS}~^g72I$q+U;KD>rNjgFM}VcFy;^M^@`D4z>}(8xAFHGdCSOX%XFycd7L1ag>h&*XM99
z!s7cK!LuM7aO~a>;h>|D5|>*J$14yHIcjNRx$VgK9L|Ov^)y!-b-bPp-CYOw|14bx
zRFqfKc6Wi@Wf56nJ1by`#*%2N+nXiP#MlyJs);okHHjt~jg2C`*g#P%h;&6nK&td!
zL{MphG*M6lMO38x&wS@UC&zKhGc#|yckbM~#vg!zxf2?pdo%Y>cQ_lI`%V_f+qvG`
za1BFqhpACMJU5FT)#%)p^jp${3R`M*9#Ra^&sdxlSyXtsC@N>dnX4jmCIIdV@899m
zLvi3OI8VjS%?RtG_?8+WzKX-N#P?HVP6qslqURw@jw(K%0CG&R*&pPr;?x{CJEz#5
z19D!GmIQJ^v70t>LKOuxU0+mKQ>_uE7+C<}B}HvMk_cB+P-i_taXt~cNQHkZgi(r_
z)Z>g+aA>I>qnMSB=&_1()YZJK!2i|*Z=It30|4R_XQzT(RZO7)B3_~4!sMEQO`Vzq
zMFAC2*A@Bch@Plu`3NZ`DW+5VJ6Vxt50e`TKJ5*rC{*+&rz*}+ahawVSr2EKis|&N
z+*IuP4_uZajXwKa#i5me=PACXTb{3oq3^apv8@^r3Ke<>0E!fQ3&E8t#P`9KDSmr_
z2<3`EE`*heS-wdAmSTf7NR{F}I&xd1I6&K0cN9M!N1(fkpkBDXr`SLX&058$^o;5h
z5g8!$is9uT4T||xyEQ7J_rmhNV&^$38wK~r*@
zLYxUHkv9noEt1JUr}rc7N1z+q(@9r1Nn&V2&TLutu`Pfw*V7%6!v4;(2QRv@(>TiPgz3~k-yS-7bHMASOd!=%J@8RN0q0k^L$MCG2Myd%D;XB{DgAz
zJKzG9XU-x*kg~lR!c)rY@xTQu=Mem~a_~QpGs>x}p$k#^&|b(n+{O}G{0X^
z-l0J}OnEE-5uhH$oV#Or!f5qijwG7pt_VvrU(k
zaUS5VC_QNxDo%N93UF7I%W0sFS4!xJ#Wkg5GQ1=xJLu!OuGH>@Fj1LAZHgqNY8Bwg
z$`7lN;0ZZbVuF_ZuE>HPyD&YA_T{Zv(%69`n3YGEQa9yJOl{U0XmBwa}GNqE{
zfO2I96;Tz+oB(82shmj7@LNjdbvUb1wuqp+tyFyvK(%uGI_PSYyg-n<%JZ}jbWa(Y
z2VAW(f=1I;r32lpHf53@xOQd3WL#f|GKdc0JXCJ9hptok5xx@hM@oBFkjF~zyU;yR
zb{$8cr^+8_9_vwNNI;$`(`XUXs~lMYu1~42!(~2KenQ7%UnqCdYuc}DdI0iLIqL>=
z1Im|oKwc@I)5gkcr5U}uZwO^=*WSyGj%S;-Q-H5<*W^
zj|y-f)lIrgKb2PneEO?0lb{PwdD8E>j;K1VpgXEkM8nxJ)h|@DA6M0X3+{yKI5q!*
zRHza0maCMp$TL{=_%g2Hv}!$VW}Hz?pjCN@>Zt=VJF8;bLU&Fz_!j^dRJn5?3{{nX
z17{ai9}yr-wR#bBmsI;Ng9}$VQ?(YMn)D5X(W;(*;4DU!MF&k|RkMEpxuOcB$}vt=
zL?ho-)iHYj;#DhhVR=n;WhuDps!h}dPgDib_Dqs$JspHjR>jfv-B3B0V40%Y{yE~M
zs?Pri%QV$0T3V*7cG2z0RQ+NL?xyOug8*cywklwft*R}8vmBL>nyGoJBzidcDyI~f
z6sQC{fh$t|LDOfk%3cX!iAp;gxKdT%QUJz3^!?IfSWi{Y;Rgo4*;-2bvs>EwmB06SXuX^19lLl1}9b#-$sVL9;DrahkHK`&#
z#$`TGjVy<=7S*LRShlKut%I{R)d&?e?W!`Wo;p(bgJH`UgaazDIow|
zs#Ptp>{clbz~qVQ5BjGco~jsBc=o6&{)DhsH3bWx8hfooT_-6fF2>d)7}wY$2Vj(2&e)lv{o^=B3cQAqM98v%J3YJIJp){HvQ+v}Ka9q9lFK~hCSS(x3gVgcE@N!c9
zJ#CkqQj2KP4_2=@1#(8c@O4
z*VH4`@RFd;ISAo(b>lKzU!vM#7T`&0XD^uCQ2$ByGevEnRe7qqV+eY^Wp=(grQ)S$!J~{%fNj?4{?sc>Jc?3)zsMWLq
z+oHa48(gdUP7*BJ)mg2u>`;G9yLu1R8@E8$sSc$v6NQrmYz*R96=
z!0WBH)&Sn4{_rd=<(Yap4}p5sCA5I+Q}6o{me18PI_uZ3zTyTiFV%PGEb4&TGY8lA
zTK$r?XWpm}pM`Kxy)O_ZZ`B?&eGaL^euc@1I%o<^M%91Q8+lOEMC+qNnjSj9>8!yS
z0KDazNk4%*toe_oL3fRP0Fv;~_|w|nOVdrGqPM1nssta+*EB8pYMM47ke}wLIr0q9
ztfPMG5lzW*0FG*2(YJX_vx27b2w3DsPs`x2)4m=+b6G$*1#!ZnAZ
zAdJwonZYtrlT1zYXw8|Qp^MS9_COb_d1nI1WzDItAiSd4L`P5JG}Vy^bWJn;6od(y
z)eM+i*M!nyBuQgNy^Cbcq&?tnXzo#eB1LnX%7avmpA>*}P3m!Q8Je~<#LLuheno;e
zHD{>A$4>Hz*TFS>3gWr4AFFbR}+5;
z+&#_QT;y4+`IFv)I?XtLc&XR?&WA~ZMn_B1Ce1`TkkG7Yr=jwJCV>tnw`zV(1J|b6
zNIM7Z8Vee%Iy4WdsClTdm=E$uvyn#A$C|G`1nJW3phal6#wG?npJ-OnR?1V2IklC0
zG$pi_d8R4ej3jzBvtJGMJYD;A8sx3GI;-;M`
zhnK_JbRT$e*Y2Tx1aGaz6G9*D;)B5XYIoB{ho3f@8hrj*3wk4uYlmmT*$J)SC3JyW
zPb$-bv{}6{IjKE;0pyf6gu0Bu+GtnYv(s7!>X)C<&RT@bLbO}S^;xZZDabkPQ5vDo
zYh!8PyrBK}0)(O3?Ds$}YFARR7p4`hMW9RCl_T&HuC3NX7op|717W203ca6E+P`gJ
z8LjozAeR{J2;M34SnaYMxb{B1yUei|n2Gbmd-@nip7t~gUh=hDPJk3>7tj*8P#Y$L&myfO
zt;dSBPu<|UL|bMBu2ehcI&fv$eLKOGYlC^vRcIB|HmKCjosJ8;rG0Nd;8ohD8_?a>
zn)X3ht-Zbpq((bFA1U3@uBI)KyV_6p!`VG;#1=TK)qZRZVV$;ub|dPw1=M$I)c!@U
z_kHbndPYs!QAZ@$tZlss-2-jmPtdh!4<7>8sy$6j-!^S#D4ca_J*b8MNc&WWTpnv5
z`~+c_R!@a>w{~ALoITOj(jw-m)@cB^9_^%UxQ1t1?nIdMYTu_4u1~v~#=7TPn+$k)
zp>3wtc)ylKN0DD@9jJ78t?hdTlQ-JANyueTn?c{-TP@E9WJv3F3%X%##$_ZpqWzve
z!%;2U3fw`RcQK+L(s_iy(phJuUk$tHZv73Nt1go^R@`*I*&?&Ux|nX5xa%SlAoS49
zcZSeY7e%|4Ub-&oWO(Z;)F3{(l)HfY>b|@H&QI6!AL9Azyr^tCq7xV)JgWQ51mQ8=
zxBb5oFiq7bqXg&(jEjj?eSskYh4s_aPS%-bf~4x2BB4vuap{Fl*L~*&z)ju1QP5@SY!<_Hw$AGmTo>q;%>pUZ
zt&9esNH>d`#ihEv5#Y*ndD$T4x*ar1-O^>G16QT{i)NYIy0i5lcXY%5!S!9;JM_ui
z)A`agSg&)UZbgIc=`nDPx`@k2uvu5L736`gf$naL?oa9uw(B;{2d+ccNdwYDT`d#w
z9_!AoL=s)PwbZTe*8N12aIfwWEx=#swosq}o&8e?-{@vi*I`Ka+in0xb-M=BJU9ZgqJVQT^CXFop#(Chf^~bgY
zkfWdD36p%iB^O+QzJqoq3-v$HFCNPD|I&$`a{c?OVN#(_vd2Z=(!VzjUaItN;~~7Q
z|Ctt()%riFma5Tz+lR1s^gGT%cvrvk7r^i7t*M(`rw{lZ@Ou4Uv}e4ZkFK4J~x_33kK0eG(WYl4@4eP=0zFZE@V(t!T$Um&ma
zF+IS&)}#EyOI0Ko=#+J-o7_-zQfGlqBC
z;X1_NLsigOgIOb-oips9(*_p|+y8<|sNr3D;1>-R^wxzN;y*;72*Uwum_!;JKY=jX
zFq!6@7=!j0bg_ox5|GP=cs_(z49hAJJiuA1+B8K8;%f3
zG+c9r$qmC?6>uqrbyWzPYA|a-gmi}>*9Yp^&BQfCN^fn}2+n}(nV
zhA${yi-Av@`K^YFK5*S;n6U#XwHumgitI4Fq4J>9@HySHF2gjsOHT~5-QeY^!9)+B
z$B^p+-7`boyRhsvq`N`bXZY3tlNW}C^!5xGF4On-+OU|)yEldzUjZ;^@Uw)ow+2B2
zEQbtR|AlbaaEQ7wqlVDk$jsSjHVd4qk*9`FH)GWgfFCyAI1Qn@@q<#}Jd6iR;lR)m
zrKaH-WBoRG2{Goa0e99|_c>gjGuloB?!2*P7jPGhLlZzQ8UtzfD%@B`U7Sc`8Vx#8
z#+Jv37j4v1-4kQXH3t`KwD}o6FB?PXCzo-?y$b=qW(;M)