diff --git a/TD-1-test/Core/Src/main.c b/TD-1-test/Core/Src/main.c index 9a5330d..61bc38d 100644 --- a/TD-1-test/Core/Src/main.c +++ b/TD-1-test/Core/Src/main.c @@ -129,7 +129,7 @@ int main(void) if(v == 0) { led ^= (1 << 5); *(volatile uint32_t *)0x40020014 = led; - HAL_DELAY(500); + HAL_Delay(500); } @@ -138,7 +138,7 @@ int main(void) v = (GPIOC->IDR&(1 << 13)) >> 13; if(v == 0) { GPIOA->ODR ^= (1 << 5); - HAL_DELAY(500); + HAL_Delay(500); } */ } diff --git a/TD-1-test/Debug/Core/Src/main.o b/TD-1-test/Debug/Core/Src/main.o index e80c43d..404b60c 100644 Binary files a/TD-1-test/Debug/Core/Src/main.o and b/TD-1-test/Debug/Core/Src/main.o differ diff --git a/TD-1-test/Debug/TD-1-test.elf b/TD-1-test/Debug/TD-1-test.elf new file mode 100755 index 0000000..10e6177 Binary files /dev/null and b/TD-1-test/Debug/TD-1-test.elf differ diff --git a/TD-1-test/Debug/TD-1-test.list b/TD-1-test/Debug/TD-1-test.list index fdfad45..b5aae9d 100644 --- a/TD-1-test/Debug/TD-1-test.list +++ b/TD-1-test/Debug/TD-1-test.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000013c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00001be4 0800013c 0800013c 0000113c 2**2 + 1 .text 00001c30 0800013c 0800013c 0000113c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000024 08001d20 08001d20 00002d20 2**2 + 2 .rodata 00000024 08001d6c 08001d6c 00002d6c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08001d44 08001d44 0000300c 2**0 + 3 .ARM.extab 00000000 08001d90 08001d90 0000300c 2**0 CONTENTS, READONLY - 4 .ARM 00000008 08001d44 08001d44 00002d44 2**2 + 4 .ARM 00000008 08001d90 08001d90 00002d90 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08001d4c 08001d4c 0000300c 2**0 + 5 .preinit_array 00000000 08001d98 08001d98 0000300c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08001d4c 08001d4c 00002d4c 2**2 + 6 .init_array 00000004 08001d98 08001d98 00002d98 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08001d50 08001d50 00002d50 2**2 + 7 .fini_array 00000004 08001d9c 08001d9c 00002d9c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 0000000c 20000000 08001d54 00003000 2**2 + 8 .data 0000000c 20000000 08001da0 00003000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000068 2000000c 08001d60 0000300c 2**2 + 9 .bss 00000068 2000000c 08001dac 0000300c 2**2 ALLOC - 10 ._user_heap_stack 00000604 20000074 08001d60 00003074 2**0 + 10 ._user_heap_stack 00000604 20000074 08001dac 00003074 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0000300c 2**0 CONTENTS, READONLY - 12 .debug_info 000068cd 00000000 00000000 00003035 2**0 + 12 .debug_info 000068e4 00000000 00000000 00003035 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 000012c6 00000000 00000000 00009902 2**0 + 13 .debug_abbrev 000012c4 00000000 00000000 00009919 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000618 00000000 00000000 0000abc8 2**3 + 14 .debug_aranges 00000618 00000000 00000000 0000abe0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 000004a7 00000000 00000000 0000b1e0 2**0 + 15 .debug_rnglists 000004a7 00000000 00000000 0000b1f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 00014879 00000000 00000000 0000b687 2**0 + 16 .debug_macro 00014879 00000000 00000000 0000b69f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 0000705a 00000000 00000000 0001ff00 2**0 + 17 .debug_line 0000705f 00000000 00000000 0001ff18 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 000819a6 00000000 00000000 00026f5a 2**0 + 18 .debug_str 000819a6 00000000 00000000 00026f77 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000a8900 2**0 + 19 .comment 00000043 00000000 00000000 000a891d 2**0 CONTENTS, READONLY - 20 .debug_frame 00001808 00000000 00000000 000a8944 2**2 + 20 .debug_frame 00001808 00000000 00000000 000a8960 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000069 00000000 00000000 000aa14c 2**0 + 21 .debug_line_str 00000069 00000000 00000000 000aa168 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 8000152: bd10 pop {r4, pc} 8000154: 2000000c .word 0x2000000c 8000158: 00000000 .word 0x00000000 - 800015c: 08001d08 .word 0x08001d08 + 800015c: 08001d54 .word 0x08001d54 08000160 : 8000160: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 800016e: bd08 pop {r3, pc} 8000170: 00000000 .word 0x00000000 8000174: 20000010 .word 0x20000010 - 8000178: 08001d08 .word 0x08001d08 + 8000178: 08001d54 .word 0x08001d54 0800017c <__aeabi_uldivmod>: 800017c: b953 cbnz r3, 8000194 <__aeabi_uldivmod+0x18> @@ -386,23 +386,23 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 80004b6: f000 f9d6 bl 8000866 + 80004b6: f000 f9da bl 800086e /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80004ba: f000 f825 bl 8000508 + 80004ba: f000 f829 bl 8000510 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 80004be: f000 f89b bl 80005f8 + 80004be: f000 f89f bl 8000600 MX_USART2_UART_Init(); - 80004c2: f000 f86f bl 80005a4 + 80004c2: f000 f873 bl 80005ac /* USER CODE BEGIN 2 */ // Allume la led V1 @@ -423,11 +423,11 @@ int main(void) // Version variable bouton_bleu = *(volatile uint32_t *)0x40020810; - 80004d2: 4b0b ldr r3, [pc, #44] @ (8000500 ) + 80004d2: 4b0d ldr r3, [pc, #52] @ (8000508 ) 80004d4: 681b ldr r3, [r3, #0] 80004d6: 60fb str r3, [r7, #12] led = *(volatile uint32_t *)0x40020014; - 80004d8: 4b0a ldr r3, [pc, #40] @ (8000504 ) + 80004d8: 4b0c ldr r3, [pc, #48] @ (800050c ) 80004da: 681b ldr r3, [r3, #0] 80004dc: 60bb str r3, [r7, #8] v = (bouton_bleu & (1 << 13)) >> 13; @@ -445,4265 +445,4319 @@ int main(void) 80004f2: f083 0320 eor.w r3, r3, #32 80004f6: 60bb str r3, [r7, #8] *(volatile uint32_t *)0x40020014 = led; - 80004f8: 4a02 ldr r2, [pc, #8] @ (8000504 ) + 80004f8: 4a04 ldr r2, [pc, #16] @ (800050c ) 80004fa: 68bb ldr r3, [r7, #8] 80004fc: 6013 str r3, [r2, #0] + HAL_Delay(500); + 80004fe: f44f 70fa mov.w r0, #500 @ 0x1f4 + 8000502: f000 fa23 bl 800094c bouton_bleu = *(volatile uint32_t *)0x40020810; - 80004fe: e7e8 b.n 80004d2 - 8000500: 40020810 .word 0x40020810 - 8000504: 40020014 .word 0x40020014 + 8000506: e7e4 b.n 80004d2 + 8000508: 40020810 .word 0x40020810 + 800050c: 40020014 .word 0x40020014 -08000508 : +08000510 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000508: b580 push {r7, lr} - 800050a: b092 sub sp, #72 @ 0x48 - 800050c: af00 add r7, sp, #0 + 8000510: b580 push {r7, lr} + 8000512: b092 sub sp, #72 @ 0x48 + 8000514: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800050e: f107 0314 add.w r3, r7, #20 - 8000512: 2234 movs r2, #52 @ 0x34 - 8000514: 2100 movs r1, #0 - 8000516: 4618 mov r0, r3 - 8000518: f001 fbca bl 8001cb0 + 8000516: f107 0314 add.w r3, r7, #20 + 800051a: 2234 movs r2, #52 @ 0x34 + 800051c: 2100 movs r1, #0 + 800051e: 4618 mov r0, r3 + 8000520: f001 fbec bl 8001cfc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 800051c: 463b mov r3, r7 - 800051e: 2200 movs r2, #0 - 8000520: 601a str r2, [r3, #0] - 8000522: 605a str r2, [r3, #4] - 8000524: 609a str r2, [r3, #8] - 8000526: 60da str r2, [r3, #12] - 8000528: 611a str r2, [r3, #16] + 8000524: 463b mov r3, r7 + 8000526: 2200 movs r2, #0 + 8000528: 601a str r2, [r3, #0] + 800052a: 605a str r2, [r3, #4] + 800052c: 609a str r2, [r3, #8] + 800052e: 60da str r2, [r3, #12] + 8000530: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 800052a: 4b1d ldr r3, [pc, #116] @ (80005a0 ) - 800052c: 681b ldr r3, [r3, #0] - 800052e: f423 53c0 bic.w r3, r3, #6144 @ 0x1800 - 8000532: 4a1b ldr r2, [pc, #108] @ (80005a0 ) - 8000534: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8000538: 6013 str r3, [r2, #0] + 8000532: 4b1d ldr r3, [pc, #116] @ (80005a8 ) + 8000534: 681b ldr r3, [r3, #0] + 8000536: f423 53c0 bic.w r3, r3, #6144 @ 0x1800 + 800053a: 4a1b ldr r2, [pc, #108] @ (80005a8 ) + 800053c: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8000540: 6013 str r3, [r2, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 800053a: 2302 movs r3, #2 - 800053c: 617b str r3, [r7, #20] + 8000542: 2302 movs r3, #2 + 8000544: 617b str r3, [r7, #20] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 800053e: 2301 movs r3, #1 - 8000540: 623b str r3, [r7, #32] + 8000546: 2301 movs r3, #1 + 8000548: 623b str r3, [r7, #32] RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 8000542: 2310 movs r3, #16 - 8000544: 627b str r3, [r7, #36] @ 0x24 + 800054a: 2310 movs r3, #16 + 800054c: 627b str r3, [r7, #36] @ 0x24 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000546: 2302 movs r3, #2 - 8000548: 63bb str r3, [r7, #56] @ 0x38 + 800054e: 2302 movs r3, #2 + 8000550: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 800054a: 2300 movs r3, #0 - 800054c: 63fb str r3, [r7, #60] @ 0x3c + 8000552: 2300 movs r3, #0 + 8000554: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; - 800054e: f44f 2300 mov.w r3, #524288 @ 0x80000 - 8000552: 643b str r3, [r7, #64] @ 0x40 + 8000556: f44f 2300 mov.w r3, #524288 @ 0x80000 + 800055a: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; - 8000554: f44f 0300 mov.w r3, #8388608 @ 0x800000 - 8000558: 647b str r3, [r7, #68] @ 0x44 + 800055c: f44f 0300 mov.w r3, #8388608 @ 0x800000 + 8000560: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 800055a: f107 0314 add.w r3, r7, #20 - 800055e: 4618 mov r0, r3 - 8000560: f000 fc7c bl 8000e5c - 8000564: 4603 mov r3, r0 - 8000566: 2b00 cmp r3, #0 - 8000568: d001 beq.n 800056e + 8000562: f107 0314 add.w r3, r7, #20 + 8000566: 4618 mov r0, r3 + 8000568: f000 fc9e bl 8000ea8 + 800056c: 4603 mov r3, r0 + 800056e: 2b00 cmp r3, #0 + 8000570: d001 beq.n 8000576 { Error_Handler(); - 800056a: f000 f8ab bl 80006c4 + 8000572: f000 f8ab bl 80006cc } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 800056e: 230f movs r3, #15 - 8000570: 603b str r3, [r7, #0] + 8000576: 230f movs r3, #15 + 8000578: 603b str r3, [r7, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8000572: 2303 movs r3, #3 - 8000574: 607b str r3, [r7, #4] + 800057a: 2303 movs r3, #3 + 800057c: 607b str r3, [r7, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000576: 2300 movs r3, #0 - 8000578: 60bb str r3, [r7, #8] - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 800057a: 2300 movs r3, #0 - 800057c: 60fb str r3, [r7, #12] - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800057e: 2300 movs r3, #0 - 8000580: 613b str r3, [r7, #16] + 8000580: 60bb str r3, [r7, #8] + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 8000582: 2300 movs r3, #0 + 8000584: 60fb str r3, [r7, #12] + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 8000586: 2300 movs r3, #0 + 8000588: 613b str r3, [r7, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) - 8000582: 463b mov r3, r7 - 8000584: 2101 movs r1, #1 - 8000586: 4618 mov r0, r3 - 8000588: f000 ff98 bl 80014bc - 800058c: 4603 mov r3, r0 - 800058e: 2b00 cmp r3, #0 - 8000590: d001 beq.n 8000596 + 800058a: 463b mov r3, r7 + 800058c: 2101 movs r1, #1 + 800058e: 4618 mov r0, r3 + 8000590: f000 ffba bl 8001508 + 8000594: 4603 mov r3, r0 + 8000596: 2b00 cmp r3, #0 + 8000598: d001 beq.n 800059e { Error_Handler(); - 8000592: f000 f897 bl 80006c4 + 800059a: f000 f897 bl 80006cc } } - 8000596: bf00 nop - 8000598: 3748 adds r7, #72 @ 0x48 - 800059a: 46bd mov sp, r7 - 800059c: bd80 pop {r7, pc} 800059e: bf00 nop - 80005a0: 40007000 .word 0x40007000 + 80005a0: 3748 adds r7, #72 @ 0x48 + 80005a2: 46bd mov sp, r7 + 80005a4: bd80 pop {r7, pc} + 80005a6: bf00 nop + 80005a8: 40007000 .word 0x40007000 -080005a4 : +080005ac : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { - 80005a4: b580 push {r7, lr} - 80005a6: af00 add r7, sp, #0 + 80005ac: b580 push {r7, lr} + 80005ae: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; - 80005a8: 4b11 ldr r3, [pc, #68] @ (80005f0 ) - 80005aa: 4a12 ldr r2, [pc, #72] @ (80005f4 ) - 80005ac: 601a str r2, [r3, #0] + 80005b0: 4b11 ldr r3, [pc, #68] @ (80005f8 ) + 80005b2: 4a12 ldr r2, [pc, #72] @ (80005fc ) + 80005b4: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; - 80005ae: 4b10 ldr r3, [pc, #64] @ (80005f0 ) - 80005b0: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 80005b4: 605a str r2, [r3, #4] + 80005b6: 4b10 ldr r3, [pc, #64] @ (80005f8 ) + 80005b8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 80005bc: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; - 80005b6: 4b0e ldr r3, [pc, #56] @ (80005f0 ) - 80005b8: 2200 movs r2, #0 - 80005ba: 609a str r2, [r3, #8] + 80005be: 4b0e ldr r3, [pc, #56] @ (80005f8 ) + 80005c0: 2200 movs r2, #0 + 80005c2: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; - 80005bc: 4b0c ldr r3, [pc, #48] @ (80005f0 ) - 80005be: 2200 movs r2, #0 - 80005c0: 60da str r2, [r3, #12] + 80005c4: 4b0c ldr r3, [pc, #48] @ (80005f8 ) + 80005c6: 2200 movs r2, #0 + 80005c8: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; - 80005c2: 4b0b ldr r3, [pc, #44] @ (80005f0 ) - 80005c4: 2200 movs r2, #0 - 80005c6: 611a str r2, [r3, #16] + 80005ca: 4b0b ldr r3, [pc, #44] @ (80005f8 ) + 80005cc: 2200 movs r2, #0 + 80005ce: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; - 80005c8: 4b09 ldr r3, [pc, #36] @ (80005f0 ) - 80005ca: 220c movs r2, #12 - 80005cc: 615a str r2, [r3, #20] + 80005d0: 4b09 ldr r3, [pc, #36] @ (80005f8 ) + 80005d2: 220c movs r2, #12 + 80005d4: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 80005ce: 4b08 ldr r3, [pc, #32] @ (80005f0 ) - 80005d0: 2200 movs r2, #0 - 80005d2: 619a str r2, [r3, #24] + 80005d6: 4b08 ldr r3, [pc, #32] @ (80005f8 ) + 80005d8: 2200 movs r2, #0 + 80005da: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 80005d4: 4b06 ldr r3, [pc, #24] @ (80005f0 ) - 80005d6: 2200 movs r2, #0 - 80005d8: 61da str r2, [r3, #28] + 80005dc: 4b06 ldr r3, [pc, #24] @ (80005f8 ) + 80005de: 2200 movs r2, #0 + 80005e0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) - 80005da: 4805 ldr r0, [pc, #20] @ (80005f0 ) - 80005dc: f001 fa34 bl 8001a48 - 80005e0: 4603 mov r3, r0 - 80005e2: 2b00 cmp r3, #0 - 80005e4: d001 beq.n 80005ea + 80005e2: 4805 ldr r0, [pc, #20] @ (80005f8 ) + 80005e4: f001 fa56 bl 8001a94 + 80005e8: 4603 mov r3, r0 + 80005ea: 2b00 cmp r3, #0 + 80005ec: d001 beq.n 80005f2 { Error_Handler(); - 80005e6: f000 f86d bl 80006c4 + 80005ee: f000 f86d bl 80006cc } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } - 80005ea: bf00 nop - 80005ec: bd80 pop {r7, pc} - 80005ee: bf00 nop - 80005f0: 20000028 .word 0x20000028 - 80005f4: 40004400 .word 0x40004400 + 80005f2: bf00 nop + 80005f4: bd80 pop {r7, pc} + 80005f6: bf00 nop + 80005f8: 20000028 .word 0x20000028 + 80005fc: 40004400 .word 0x40004400 -080005f8 : +08000600 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 80005f8: b580 push {r7, lr} - 80005fa: b08a sub sp, #40 @ 0x28 - 80005fc: af00 add r7, sp, #0 + 8000600: b580 push {r7, lr} + 8000602: b08a sub sp, #40 @ 0x28 + 8000604: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80005fe: f107 0314 add.w r3, r7, #20 - 8000602: 2200 movs r2, #0 - 8000604: 601a str r2, [r3, #0] - 8000606: 605a str r2, [r3, #4] - 8000608: 609a str r2, [r3, #8] - 800060a: 60da str r2, [r3, #12] - 800060c: 611a str r2, [r3, #16] + 8000606: f107 0314 add.w r3, r7, #20 + 800060a: 2200 movs r2, #0 + 800060c: 601a str r2, [r3, #0] + 800060e: 605a str r2, [r3, #4] + 8000610: 609a str r2, [r3, #8] + 8000612: 60da str r2, [r3, #12] + 8000614: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 800060e: 4b2a ldr r3, [pc, #168] @ (80006b8 ) - 8000610: 69db ldr r3, [r3, #28] - 8000612: 4a29 ldr r2, [pc, #164] @ (80006b8 ) - 8000614: f043 0304 orr.w r3, r3, #4 - 8000618: 61d3 str r3, [r2, #28] - 800061a: 4b27 ldr r3, [pc, #156] @ (80006b8 ) - 800061c: 69db ldr r3, [r3, #28] - 800061e: f003 0304 and.w r3, r3, #4 - 8000622: 613b str r3, [r7, #16] - 8000624: 693b ldr r3, [r7, #16] + 8000616: 4b2a ldr r3, [pc, #168] @ (80006c0 ) + 8000618: 69db ldr r3, [r3, #28] + 800061a: 4a29 ldr r2, [pc, #164] @ (80006c0 ) + 800061c: f043 0304 orr.w r3, r3, #4 + 8000620: 61d3 str r3, [r2, #28] + 8000622: 4b27 ldr r3, [pc, #156] @ (80006c0 ) + 8000624: 69db ldr r3, [r3, #28] + 8000626: f003 0304 and.w r3, r3, #4 + 800062a: 613b str r3, [r7, #16] + 800062c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOH_CLK_ENABLE(); - 8000626: 4b24 ldr r3, [pc, #144] @ (80006b8 ) - 8000628: 69db ldr r3, [r3, #28] - 800062a: 4a23 ldr r2, [pc, #140] @ (80006b8 ) - 800062c: f043 0320 orr.w r3, r3, #32 - 8000630: 61d3 str r3, [r2, #28] - 8000632: 4b21 ldr r3, [pc, #132] @ (80006b8 ) - 8000634: 69db ldr r3, [r3, #28] - 8000636: f003 0320 and.w r3, r3, #32 - 800063a: 60fb str r3, [r7, #12] - 800063c: 68fb ldr r3, [r7, #12] + 800062e: 4b24 ldr r3, [pc, #144] @ (80006c0 ) + 8000630: 69db ldr r3, [r3, #28] + 8000632: 4a23 ldr r2, [pc, #140] @ (80006c0 ) + 8000634: f043 0320 orr.w r3, r3, #32 + 8000638: 61d3 str r3, [r2, #28] + 800063a: 4b21 ldr r3, [pc, #132] @ (80006c0 ) + 800063c: 69db ldr r3, [r3, #28] + 800063e: f003 0320 and.w r3, r3, #32 + 8000642: 60fb str r3, [r7, #12] + 8000644: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800063e: 4b1e ldr r3, [pc, #120] @ (80006b8 ) - 8000640: 69db ldr r3, [r3, #28] - 8000642: 4a1d ldr r2, [pc, #116] @ (80006b8 ) - 8000644: f043 0301 orr.w r3, r3, #1 - 8000648: 61d3 str r3, [r2, #28] - 800064a: 4b1b ldr r3, [pc, #108] @ (80006b8 ) - 800064c: 69db ldr r3, [r3, #28] - 800064e: f003 0301 and.w r3, r3, #1 - 8000652: 60bb str r3, [r7, #8] - 8000654: 68bb ldr r3, [r7, #8] + 8000646: 4b1e ldr r3, [pc, #120] @ (80006c0 ) + 8000648: 69db ldr r3, [r3, #28] + 800064a: 4a1d ldr r2, [pc, #116] @ (80006c0 ) + 800064c: f043 0301 orr.w r3, r3, #1 + 8000650: 61d3 str r3, [r2, #28] + 8000652: 4b1b ldr r3, [pc, #108] @ (80006c0 ) + 8000654: 69db ldr r3, [r3, #28] + 8000656: f003 0301 and.w r3, r3, #1 + 800065a: 60bb str r3, [r7, #8] + 800065c: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000656: 4b18 ldr r3, [pc, #96] @ (80006b8 ) - 8000658: 69db ldr r3, [r3, #28] - 800065a: 4a17 ldr r2, [pc, #92] @ (80006b8 ) - 800065c: f043 0302 orr.w r3, r3, #2 - 8000660: 61d3 str r3, [r2, #28] - 8000662: 4b15 ldr r3, [pc, #84] @ (80006b8 ) - 8000664: 69db ldr r3, [r3, #28] - 8000666: f003 0302 and.w r3, r3, #2 - 800066a: 607b str r3, [r7, #4] - 800066c: 687b ldr r3, [r7, #4] + 800065e: 4b18 ldr r3, [pc, #96] @ (80006c0 ) + 8000660: 69db ldr r3, [r3, #28] + 8000662: 4a17 ldr r2, [pc, #92] @ (80006c0 ) + 8000664: f043 0302 orr.w r3, r3, #2 + 8000668: 61d3 str r3, [r2, #28] + 800066a: 4b15 ldr r3, [pc, #84] @ (80006c0 ) + 800066c: 69db ldr r3, [r3, #28] + 800066e: f003 0302 and.w r3, r3, #2 + 8000672: 607b str r3, [r7, #4] + 8000674: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); - 800066e: 2200 movs r2, #0 - 8000670: 2120 movs r1, #32 - 8000672: 4812 ldr r0, [pc, #72] @ (80006bc ) - 8000674: f000 fbda bl 8000e2c + 8000676: 2200 movs r2, #0 + 8000678: 2120 movs r1, #32 + 800067a: 4812 ldr r0, [pc, #72] @ (80006c4 ) + 800067c: f000 fbfc bl 8000e78 /*Configure GPIO pin : PC13 */ GPIO_InitStruct.Pin = GPIO_PIN_13; - 8000678: f44f 5300 mov.w r3, #8192 @ 0x2000 - 800067c: 617b str r3, [r7, #20] + 8000680: f44f 5300 mov.w r3, #8192 @ 0x2000 + 8000684: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800067e: 2300 movs r3, #0 - 8000680: 61bb str r3, [r7, #24] + 8000686: 2300 movs r3, #0 + 8000688: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000682: 2300 movs r3, #0 - 8000684: 61fb str r3, [r7, #28] + 800068a: 2300 movs r3, #0 + 800068c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000686: f107 0314 add.w r3, r7, #20 - 800068a: 4619 mov r1, r3 - 800068c: 480c ldr r0, [pc, #48] @ (80006c0 ) - 800068e: f000 fa3d bl 8000b0c + 800068e: f107 0314 add.w r3, r7, #20 + 8000692: 4619 mov r1, r3 + 8000694: 480c ldr r0, [pc, #48] @ (80006c8 ) + 8000696: f000 fa5f bl 8000b58 /*Configure GPIO pin : LD2_Pin */ GPIO_InitStruct.Pin = LD2_Pin; - 8000692: 2320 movs r3, #32 - 8000694: 617b str r3, [r7, #20] + 800069a: 2320 movs r3, #32 + 800069c: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000696: 2301 movs r3, #1 - 8000698: 61bb str r3, [r7, #24] + 800069e: 2301 movs r3, #1 + 80006a0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800069a: 2300 movs r3, #0 - 800069c: 61fb str r3, [r7, #28] + 80006a2: 2300 movs r3, #0 + 80006a4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800069e: 2300 movs r3, #0 - 80006a0: 623b str r3, [r7, #32] + 80006a6: 2300 movs r3, #0 + 80006a8: 623b str r3, [r7, #32] HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); - 80006a2: f107 0314 add.w r3, r7, #20 - 80006a6: 4619 mov r1, r3 - 80006a8: 4804 ldr r0, [pc, #16] @ (80006bc ) - 80006aa: f000 fa2f bl 8000b0c + 80006aa: f107 0314 add.w r3, r7, #20 + 80006ae: 4619 mov r1, r3 + 80006b0: 4804 ldr r0, [pc, #16] @ (80006c4 ) + 80006b2: f000 fa51 bl 8000b58 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 80006ae: bf00 nop - 80006b0: 3728 adds r7, #40 @ 0x28 - 80006b2: 46bd mov sp, r7 - 80006b4: bd80 pop {r7, pc} 80006b6: bf00 nop - 80006b8: 40023800 .word 0x40023800 - 80006bc: 40020000 .word 0x40020000 - 80006c0: 40020800 .word 0x40020800 + 80006b8: 3728 adds r7, #40 @ 0x28 + 80006ba: 46bd mov sp, r7 + 80006bc: bd80 pop {r7, pc} + 80006be: bf00 nop + 80006c0: 40023800 .word 0x40023800 + 80006c4: 40020000 .word 0x40020000 + 80006c8: 40020800 .word 0x40020800 -080006c4 : +080006cc : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80006c4: b480 push {r7} - 80006c6: af00 add r7, sp, #0 + 80006cc: b480 push {r7} + 80006ce: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 80006c8: b672 cpsid i + 80006d0: b672 cpsid i } - 80006ca: bf00 nop + 80006d2: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 80006cc: bf00 nop - 80006ce: e7fd b.n 80006cc + 80006d4: bf00 nop + 80006d6: e7fd b.n 80006d4 -080006d0 : +080006d8 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80006d0: b580 push {r7, lr} - 80006d2: b084 sub sp, #16 - 80006d4: af00 add r7, sp, #0 + 80006d8: b580 push {r7, lr} + 80006da: b084 sub sp, #16 + 80006dc: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_COMP_CLK_ENABLE(); - 80006d6: 4b15 ldr r3, [pc, #84] @ (800072c ) - 80006d8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80006da: 4a14 ldr r2, [pc, #80] @ (800072c ) - 80006dc: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 80006e0: 6253 str r3, [r2, #36] @ 0x24 - 80006e2: 4b12 ldr r3, [pc, #72] @ (800072c ) - 80006e4: 6a5b ldr r3, [r3, #36] @ 0x24 - 80006e6: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 - 80006ea: 60fb str r3, [r7, #12] - 80006ec: 68fb ldr r3, [r7, #12] + 80006de: 4b15 ldr r3, [pc, #84] @ (8000734 ) + 80006e0: 6a5b ldr r3, [r3, #36] @ 0x24 + 80006e2: 4a14 ldr r2, [pc, #80] @ (8000734 ) + 80006e4: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 80006e8: 6253 str r3, [r2, #36] @ 0x24 + 80006ea: 4b12 ldr r3, [pc, #72] @ (8000734 ) + 80006ec: 6a5b ldr r3, [r3, #36] @ 0x24 + 80006ee: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 + 80006f2: 60fb str r3, [r7, #12] + 80006f4: 68fb ldr r3, [r7, #12] __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80006ee: 4b0f ldr r3, [pc, #60] @ (800072c ) - 80006f0: 6a1b ldr r3, [r3, #32] - 80006f2: 4a0e ldr r2, [pc, #56] @ (800072c ) - 80006f4: f043 0301 orr.w r3, r3, #1 - 80006f8: 6213 str r3, [r2, #32] - 80006fa: 4b0c ldr r3, [pc, #48] @ (800072c ) - 80006fc: 6a1b ldr r3, [r3, #32] - 80006fe: f003 0301 and.w r3, r3, #1 - 8000702: 60bb str r3, [r7, #8] - 8000704: 68bb ldr r3, [r7, #8] + 80006f6: 4b0f ldr r3, [pc, #60] @ (8000734 ) + 80006f8: 6a1b ldr r3, [r3, #32] + 80006fa: 4a0e ldr r2, [pc, #56] @ (8000734 ) + 80006fc: f043 0301 orr.w r3, r3, #1 + 8000700: 6213 str r3, [r2, #32] + 8000702: 4b0c ldr r3, [pc, #48] @ (8000734 ) + 8000704: 6a1b ldr r3, [r3, #32] + 8000706: f003 0301 and.w r3, r3, #1 + 800070a: 60bb str r3, [r7, #8] + 800070c: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 8000706: 4b09 ldr r3, [pc, #36] @ (800072c ) - 8000708: 6a5b ldr r3, [r3, #36] @ 0x24 - 800070a: 4a08 ldr r2, [pc, #32] @ (800072c ) - 800070c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8000710: 6253 str r3, [r2, #36] @ 0x24 - 8000712: 4b06 ldr r3, [pc, #24] @ (800072c ) - 8000714: 6a5b ldr r3, [r3, #36] @ 0x24 - 8000716: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800071a: 607b str r3, [r7, #4] - 800071c: 687b ldr r3, [r7, #4] + 800070e: 4b09 ldr r3, [pc, #36] @ (8000734 ) + 8000710: 6a5b ldr r3, [r3, #36] @ 0x24 + 8000712: 4a08 ldr r2, [pc, #32] @ (8000734 ) + 8000714: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8000718: 6253 str r3, [r2, #36] @ 0x24 + 800071a: 4b06 ldr r3, [pc, #24] @ (8000734 ) + 800071c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800071e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8000722: 607b str r3, [r7, #4] + 8000724: 687b ldr r3, [r7, #4] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); - 800071e: 2007 movs r0, #7 - 8000720: f000 f9c0 bl 8000aa4 + 8000726: 2007 movs r0, #7 + 8000728: f000 f9e2 bl 8000af0 /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8000724: bf00 nop - 8000726: 3710 adds r7, #16 - 8000728: 46bd mov sp, r7 - 800072a: bd80 pop {r7, pc} - 800072c: 40023800 .word 0x40023800 + 800072c: bf00 nop + 800072e: 3710 adds r7, #16 + 8000730: 46bd mov sp, r7 + 8000732: bd80 pop {r7, pc} + 8000734: 40023800 .word 0x40023800 -08000730 : +08000738 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 8000730: b580 push {r7, lr} - 8000732: b08a sub sp, #40 @ 0x28 - 8000734: af00 add r7, sp, #0 - 8000736: 6078 str r0, [r7, #4] + 8000738: b580 push {r7, lr} + 800073a: b08a sub sp, #40 @ 0x28 + 800073c: af00 add r7, sp, #0 + 800073e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000738: f107 0314 add.w r3, r7, #20 - 800073c: 2200 movs r2, #0 - 800073e: 601a str r2, [r3, #0] - 8000740: 605a str r2, [r3, #4] - 8000742: 609a str r2, [r3, #8] - 8000744: 60da str r2, [r3, #12] - 8000746: 611a str r2, [r3, #16] + 8000740: f107 0314 add.w r3, r7, #20 + 8000744: 2200 movs r2, #0 + 8000746: 601a str r2, [r3, #0] + 8000748: 605a str r2, [r3, #4] + 800074a: 609a str r2, [r3, #8] + 800074c: 60da str r2, [r3, #12] + 800074e: 611a str r2, [r3, #16] if(huart->Instance==USART2) - 8000748: 687b ldr r3, [r7, #4] - 800074a: 681b ldr r3, [r3, #0] - 800074c: 4a17 ldr r2, [pc, #92] @ (80007ac ) - 800074e: 4293 cmp r3, r2 - 8000750: d127 bne.n 80007a2 + 8000750: 687b ldr r3, [r7, #4] + 8000752: 681b ldr r3, [r3, #0] + 8000754: 4a17 ldr r2, [pc, #92] @ (80007b4 ) + 8000756: 4293 cmp r3, r2 + 8000758: d127 bne.n 80007aa { /* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); - 8000752: 4b17 ldr r3, [pc, #92] @ (80007b0 ) - 8000754: 6a5b ldr r3, [r3, #36] @ 0x24 - 8000756: 4a16 ldr r2, [pc, #88] @ (80007b0 ) - 8000758: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 800075c: 6253 str r3, [r2, #36] @ 0x24 - 800075e: 4b14 ldr r3, [pc, #80] @ (80007b0 ) - 8000760: 6a5b ldr r3, [r3, #36] @ 0x24 - 8000762: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000766: 613b str r3, [r7, #16] - 8000768: 693b ldr r3, [r7, #16] + 800075a: 4b17 ldr r3, [pc, #92] @ (80007b8 ) + 800075c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800075e: 4a16 ldr r2, [pc, #88] @ (80007b8 ) + 8000760: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8000764: 6253 str r3, [r2, #36] @ 0x24 + 8000766: 4b14 ldr r3, [pc, #80] @ (80007b8 ) + 8000768: 6a5b ldr r3, [r3, #36] @ 0x24 + 800076a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800076e: 613b str r3, [r7, #16] + 8000770: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800076a: 4b11 ldr r3, [pc, #68] @ (80007b0 ) - 800076c: 69db ldr r3, [r3, #28] - 800076e: 4a10 ldr r2, [pc, #64] @ (80007b0 ) - 8000770: f043 0301 orr.w r3, r3, #1 - 8000774: 61d3 str r3, [r2, #28] - 8000776: 4b0e ldr r3, [pc, #56] @ (80007b0 ) - 8000778: 69db ldr r3, [r3, #28] - 800077a: f003 0301 and.w r3, r3, #1 - 800077e: 60fb str r3, [r7, #12] - 8000780: 68fb ldr r3, [r7, #12] + 8000772: 4b11 ldr r3, [pc, #68] @ (80007b8 ) + 8000774: 69db ldr r3, [r3, #28] + 8000776: 4a10 ldr r2, [pc, #64] @ (80007b8 ) + 8000778: f043 0301 orr.w r3, r3, #1 + 800077c: 61d3 str r3, [r2, #28] + 800077e: 4b0e ldr r3, [pc, #56] @ (80007b8 ) + 8000780: 69db ldr r3, [r3, #28] + 8000782: f003 0301 and.w r3, r3, #1 + 8000786: 60fb str r3, [r7, #12] + 8000788: 68fb ldr r3, [r7, #12] /**USART2 GPIO Configuration PA2 ------> USART2_TX PA3 ------> USART2_RX */ GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; - 8000782: 230c movs r3, #12 - 8000784: 617b str r3, [r7, #20] + 800078a: 230c movs r3, #12 + 800078c: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000786: 2302 movs r3, #2 - 8000788: 61bb str r3, [r7, #24] + 800078e: 2302 movs r3, #2 + 8000790: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800078a: 2300 movs r3, #0 - 800078c: 61fb str r3, [r7, #28] + 8000792: 2300 movs r3, #0 + 8000794: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 800078e: 2303 movs r3, #3 - 8000790: 623b str r3, [r7, #32] + 8000796: 2303 movs r3, #3 + 8000798: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - 8000792: 2307 movs r3, #7 - 8000794: 627b str r3, [r7, #36] @ 0x24 + 800079a: 2307 movs r3, #7 + 800079c: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000796: f107 0314 add.w r3, r7, #20 - 800079a: 4619 mov r1, r3 - 800079c: 4805 ldr r0, [pc, #20] @ (80007b4 ) - 800079e: f000 f9b5 bl 8000b0c + 800079e: f107 0314 add.w r3, r7, #20 + 80007a2: 4619 mov r1, r3 + 80007a4: 4805 ldr r0, [pc, #20] @ (80007bc ) + 80007a6: f000 f9d7 bl 8000b58 /* USER CODE END USART2_MspInit 1 */ } } - 80007a2: bf00 nop - 80007a4: 3728 adds r7, #40 @ 0x28 - 80007a6: 46bd mov sp, r7 - 80007a8: bd80 pop {r7, pc} 80007aa: bf00 nop - 80007ac: 40004400 .word 0x40004400 - 80007b0: 40023800 .word 0x40023800 - 80007b4: 40020000 .word 0x40020000 + 80007ac: 3728 adds r7, #40 @ 0x28 + 80007ae: 46bd mov sp, r7 + 80007b0: bd80 pop {r7, pc} + 80007b2: bf00 nop + 80007b4: 40004400 .word 0x40004400 + 80007b8: 40023800 .word 0x40023800 + 80007bc: 40020000 .word 0x40020000 -080007b8 : +080007c0 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 80007b8: b480 push {r7} - 80007ba: af00 add r7, sp, #0 + 80007c0: b480 push {r7} + 80007c2: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 80007bc: bf00 nop - 80007be: e7fd b.n 80007bc + 80007c4: bf00 nop + 80007c6: e7fd b.n 80007c4 -080007c0 : +080007c8 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 80007c0: b480 push {r7} - 80007c2: af00 add r7, sp, #0 + 80007c8: b480 push {r7} + 80007ca: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 80007c4: bf00 nop - 80007c6: e7fd b.n 80007c4 + 80007cc: bf00 nop + 80007ce: e7fd b.n 80007cc -080007c8 : +080007d0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 80007c8: b480 push {r7} - 80007ca: af00 add r7, sp, #0 + 80007d0: b480 push {r7} + 80007d2: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 80007cc: bf00 nop - 80007ce: e7fd b.n 80007cc + 80007d4: bf00 nop + 80007d6: e7fd b.n 80007d4 -080007d0 : +080007d8 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 80007d0: b480 push {r7} - 80007d2: af00 add r7, sp, #0 + 80007d8: b480 push {r7} + 80007da: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 80007d4: bf00 nop - 80007d6: e7fd b.n 80007d4 + 80007dc: bf00 nop + 80007de: e7fd b.n 80007dc -080007d8 : +080007e0 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 80007d8: b480 push {r7} - 80007da: af00 add r7, sp, #0 + 80007e0: b480 push {r7} + 80007e2: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 80007dc: bf00 nop - 80007de: e7fd b.n 80007dc + 80007e4: bf00 nop + 80007e6: e7fd b.n 80007e4 -080007e0 : +080007e8 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 80007e0: b480 push {r7} - 80007e2: af00 add r7, sp, #0 + 80007e8: b480 push {r7} + 80007ea: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 80007e4: bf00 nop - 80007e6: 46bd mov sp, r7 - 80007e8: bc80 pop {r7} - 80007ea: 4770 bx lr + 80007ec: bf00 nop + 80007ee: 46bd mov sp, r7 + 80007f0: bc80 pop {r7} + 80007f2: 4770 bx lr -080007ec : +080007f4 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 80007ec: b480 push {r7} - 80007ee: af00 add r7, sp, #0 + 80007f4: b480 push {r7} + 80007f6: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 80007f0: bf00 nop - 80007f2: 46bd mov sp, r7 - 80007f4: bc80 pop {r7} - 80007f6: 4770 bx lr + 80007f8: bf00 nop + 80007fa: 46bd mov sp, r7 + 80007fc: bc80 pop {r7} + 80007fe: 4770 bx lr -080007f8 : +08000800 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 80007f8: b480 push {r7} - 80007fa: af00 add r7, sp, #0 + 8000800: b480 push {r7} + 8000802: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 80007fc: bf00 nop - 80007fe: 46bd mov sp, r7 - 8000800: bc80 pop {r7} - 8000802: 4770 bx lr + 8000804: bf00 nop + 8000806: 46bd mov sp, r7 + 8000808: bc80 pop {r7} + 800080a: 4770 bx lr -08000804 : +0800080c : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8000804: b580 push {r7, lr} - 8000806: af00 add r7, sp, #0 + 800080c: b580 push {r7, lr} + 800080e: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8000808: f000 f880 bl 800090c + 8000810: f000 f880 bl 8000914 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 800080c: bf00 nop - 800080e: bd80 pop {r7, pc} + 8000814: bf00 nop + 8000816: bd80 pop {r7, pc} -08000810 : +08000818 : * SystemCoreClock variable. * @param None * @retval None */ void SystemInit (void) { - 8000810: b480 push {r7} - 8000812: af00 add r7, sp, #0 + 8000818: b480 push {r7} + 800081a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8000814: bf00 nop - 8000816: 46bd mov sp, r7 - 8000818: bc80 pop {r7} - 800081a: 4770 bx lr + 800081c: bf00 nop + 800081e: 46bd mov sp, r7 + 8000820: bc80 pop {r7} + 8000822: 4770 bx lr -0800081c : +08000824 : .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 800081c: f7ff fff8 bl 8000810 + 8000824: f7ff fff8 bl 8000818 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8000820: 480b ldr r0, [pc, #44] @ (8000850 ) + 8000828: 480b ldr r0, [pc, #44] @ (8000858 ) ldr r1, =_edata - 8000822: 490c ldr r1, [pc, #48] @ (8000854 ) + 800082a: 490c ldr r1, [pc, #48] @ (800085c ) ldr r2, =_sidata - 8000824: 4a0c ldr r2, [pc, #48] @ (8000858 ) + 800082c: 4a0c ldr r2, [pc, #48] @ (8000860 ) movs r3, #0 - 8000826: 2300 movs r3, #0 + 800082e: 2300 movs r3, #0 b LoopCopyDataInit - 8000828: e002 b.n 8000830 + 8000830: e002 b.n 8000838 -0800082a : +08000832 : CopyDataInit: ldr r4, [r2, r3] - 800082a: 58d4 ldr r4, [r2, r3] + 8000832: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 800082c: 50c4 str r4, [r0, r3] + 8000834: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 800082e: 3304 adds r3, #4 + 8000836: 3304 adds r3, #4 -08000830 : +08000838 : LoopCopyDataInit: adds r4, r0, r3 - 8000830: 18c4 adds r4, r0, r3 + 8000838: 18c4 adds r4, r0, r3 cmp r4, r1 - 8000832: 428c cmp r4, r1 + 800083a: 428c cmp r4, r1 bcc CopyDataInit - 8000834: d3f9 bcc.n 800082a + 800083c: d3f9 bcc.n 8000832 /* Zero fill the bss segment. */ ldr r2, =_sbss - 8000836: 4a09 ldr r2, [pc, #36] @ (800085c ) + 800083e: 4a09 ldr r2, [pc, #36] @ (8000864 ) ldr r4, =_ebss - 8000838: 4c09 ldr r4, [pc, #36] @ (8000860 ) + 8000840: 4c09 ldr r4, [pc, #36] @ (8000868 ) movs r3, #0 - 800083a: 2300 movs r3, #0 + 8000842: 2300 movs r3, #0 b LoopFillZerobss - 800083c: e001 b.n 8000842 + 8000844: e001 b.n 800084a -0800083e : +08000846 : FillZerobss: str r3, [r2] - 800083e: 6013 str r3, [r2, #0] + 8000846: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8000840: 3204 adds r2, #4 + 8000848: 3204 adds r2, #4 -08000842 : +0800084a : LoopFillZerobss: cmp r2, r4 - 8000842: 42a2 cmp r2, r4 + 800084a: 42a2 cmp r2, r4 bcc FillZerobss - 8000844: d3fb bcc.n 800083e + 800084c: d3fb bcc.n 8000846 /* Call static constructors */ bl __libc_init_array - 8000846: f001 fa3b bl 8001cc0 <__libc_init_array> + 800084e: f001 fa5d bl 8001d0c <__libc_init_array> /* Call the application's entry point.*/ bl main - 800084a: f7ff fe31 bl 80004b0
+ 8000852: f7ff fe2d bl 80004b0
bx lr - 800084e: 4770 bx lr + 8000856: 4770 bx lr ldr r0, =_sdata - 8000850: 20000000 .word 0x20000000 + 8000858: 20000000 .word 0x20000000 ldr r1, =_edata - 8000854: 2000000c .word 0x2000000c - ldr r2, =_sidata - 8000858: 08001d54 .word 0x08001d54 - ldr r2, =_sbss 800085c: 2000000c .word 0x2000000c + ldr r2, =_sidata + 8000860: 08001da0 .word 0x08001da0 + ldr r2, =_sbss + 8000864: 2000000c .word 0x2000000c ldr r4, =_ebss - 8000860: 20000074 .word 0x20000074 + 8000868: 20000074 .word 0x20000074 -08000864 : +0800086c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8000864: e7fe b.n 8000864 + 800086c: e7fe b.n 800086c -08000866 : +0800086e : * In the default implementation,Systick is used as source of time base. * the tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8000866: b580 push {r7, lr} - 8000868: b082 sub sp, #8 - 800086a: af00 add r7, sp, #0 + 800086e: b580 push {r7, lr} + 8000870: b082 sub sp, #8 + 8000872: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 800086c: 2300 movs r3, #0 - 800086e: 71fb strb r3, [r7, #7] + 8000874: 2300 movs r3, #0 + 8000876: 71fb strb r3, [r7, #7] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8000870: 2003 movs r0, #3 - 8000872: f000 f917 bl 8000aa4 + 8000878: 2003 movs r0, #3 + 800087a: f000 f939 bl 8000af0 /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 8000876: 2000 movs r0, #0 - 8000878: f000 f80e bl 8000898 - 800087c: 4603 mov r3, r0 - 800087e: 2b00 cmp r3, #0 - 8000880: d002 beq.n 8000888 + 800087e: 2000 movs r0, #0 + 8000880: f000 f80e bl 80008a0 + 8000884: 4603 mov r3, r0 + 8000886: 2b00 cmp r3, #0 + 8000888: d002 beq.n 8000890 { status = HAL_ERROR; - 8000882: 2301 movs r3, #1 - 8000884: 71fb strb r3, [r7, #7] - 8000886: e001 b.n 800088c + 800088a: 2301 movs r3, #1 + 800088c: 71fb strb r3, [r7, #7] + 800088e: e001 b.n 8000894 } else { /* Init the low level hardware */ HAL_MspInit(); - 8000888: f7ff ff22 bl 80006d0 + 8000890: f7ff ff22 bl 80006d8 } /* Return function status */ return status; - 800088c: 79fb ldrb r3, [r7, #7] + 8000894: 79fb ldrb r3, [r7, #7] } - 800088e: 4618 mov r0, r3 - 8000890: 3708 adds r7, #8 - 8000892: 46bd mov sp, r7 - 8000894: bd80 pop {r7, pc} + 8000896: 4618 mov r0, r3 + 8000898: 3708 adds r7, #8 + 800089a: 46bd mov sp, r7 + 800089c: bd80 pop {r7, pc} ... -08000898 : +080008a0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8000898: b580 push {r7, lr} - 800089a: b084 sub sp, #16 - 800089c: af00 add r7, sp, #0 - 800089e: 6078 str r0, [r7, #4] + 80008a0: b580 push {r7, lr} + 80008a2: b084 sub sp, #16 + 80008a4: af00 add r7, sp, #0 + 80008a6: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 80008a0: 2300 movs r3, #0 - 80008a2: 73fb strb r3, [r7, #15] + 80008a8: 2300 movs r3, #0 + 80008aa: 73fb strb r3, [r7, #15] if (uwTickFreq != 0U) - 80008a4: 4b16 ldr r3, [pc, #88] @ (8000900 ) - 80008a6: 681b ldr r3, [r3, #0] - 80008a8: 2b00 cmp r3, #0 - 80008aa: d022 beq.n 80008f2 + 80008ac: 4b16 ldr r3, [pc, #88] @ (8000908 ) + 80008ae: 681b ldr r3, [r3, #0] + 80008b0: 2b00 cmp r3, #0 + 80008b2: d022 beq.n 80008fa { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U) - 80008ac: 4b15 ldr r3, [pc, #84] @ (8000904 ) - 80008ae: 681a ldr r2, [r3, #0] - 80008b0: 4b13 ldr r3, [pc, #76] @ (8000900 ) - 80008b2: 681b ldr r3, [r3, #0] - 80008b4: f44f 717a mov.w r1, #1000 @ 0x3e8 - 80008b8: fbb1 f3f3 udiv r3, r1, r3 - 80008bc: fbb2 f3f3 udiv r3, r2, r3 - 80008c0: 4618 mov r0, r3 - 80008c2: f000 f916 bl 8000af2 - 80008c6: 4603 mov r3, r0 - 80008c8: 2b00 cmp r3, #0 - 80008ca: d10f bne.n 80008ec + 80008b4: 4b15 ldr r3, [pc, #84] @ (800090c ) + 80008b6: 681a ldr r2, [r3, #0] + 80008b8: 4b13 ldr r3, [pc, #76] @ (8000908 ) + 80008ba: 681b ldr r3, [r3, #0] + 80008bc: f44f 717a mov.w r1, #1000 @ 0x3e8 + 80008c0: fbb1 f3f3 udiv r3, r1, r3 + 80008c4: fbb2 f3f3 udiv r3, r2, r3 + 80008c8: 4618 mov r0, r3 + 80008ca: f000 f938 bl 8000b3e + 80008ce: 4603 mov r3, r0 + 80008d0: 2b00 cmp r3, #0 + 80008d2: d10f bne.n 80008f4 { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80008cc: 687b ldr r3, [r7, #4] - 80008ce: 2b0f cmp r3, #15 - 80008d0: d809 bhi.n 80008e6 + 80008d4: 687b ldr r3, [r7, #4] + 80008d6: 2b0f cmp r3, #15 + 80008d8: d809 bhi.n 80008ee { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80008d2: 2200 movs r2, #0 - 80008d4: 6879 ldr r1, [r7, #4] - 80008d6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff - 80008da: f000 f8ee bl 8000aba + 80008da: 2200 movs r2, #0 + 80008dc: 6879 ldr r1, [r7, #4] + 80008de: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 80008e2: f000 f910 bl 8000b06 uwTickPrio = TickPriority; - 80008de: 4a0a ldr r2, [pc, #40] @ (8000908 ) - 80008e0: 687b ldr r3, [r7, #4] - 80008e2: 6013 str r3, [r2, #0] - 80008e4: e007 b.n 80008f6 + 80008e6: 4a0a ldr r2, [pc, #40] @ (8000910 ) + 80008e8: 687b ldr r3, [r7, #4] + 80008ea: 6013 str r3, [r2, #0] + 80008ec: e007 b.n 80008fe } else { status = HAL_ERROR; - 80008e6: 2301 movs r3, #1 - 80008e8: 73fb strb r3, [r7, #15] - 80008ea: e004 b.n 80008f6 + 80008ee: 2301 movs r3, #1 + 80008f0: 73fb strb r3, [r7, #15] + 80008f2: e004 b.n 80008fe } } else { status = HAL_ERROR; - 80008ec: 2301 movs r3, #1 - 80008ee: 73fb strb r3, [r7, #15] - 80008f0: e001 b.n 80008f6 + 80008f4: 2301 movs r3, #1 + 80008f6: 73fb strb r3, [r7, #15] + 80008f8: e001 b.n 80008fe } } else { status = HAL_ERROR; - 80008f2: 2301 movs r3, #1 - 80008f4: 73fb strb r3, [r7, #15] + 80008fa: 2301 movs r3, #1 + 80008fc: 73fb strb r3, [r7, #15] } /* Return function status */ return status; - 80008f6: 7bfb ldrb r3, [r7, #15] + 80008fe: 7bfb ldrb r3, [r7, #15] } - 80008f8: 4618 mov r0, r3 - 80008fa: 3710 adds r7, #16 - 80008fc: 46bd mov sp, r7 - 80008fe: bd80 pop {r7, pc} - 8000900: 20000008 .word 0x20000008 - 8000904: 20000000 .word 0x20000000 - 8000908: 20000004 .word 0x20000004 + 8000900: 4618 mov r0, r3 + 8000902: 3710 adds r7, #16 + 8000904: 46bd mov sp, r7 + 8000906: bd80 pop {r7, pc} + 8000908: 20000008 .word 0x20000008 + 800090c: 20000000 .word 0x20000000 + 8000910: 20000004 .word 0x20000004 -0800090c : +08000914 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 800090c: b480 push {r7} - 800090e: af00 add r7, sp, #0 + 8000914: b480 push {r7} + 8000916: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8000910: 4b05 ldr r3, [pc, #20] @ (8000928 ) - 8000912: 681a ldr r2, [r3, #0] - 8000914: 4b05 ldr r3, [pc, #20] @ (800092c ) - 8000916: 681b ldr r3, [r3, #0] - 8000918: 4413 add r3, r2 - 800091a: 4a03 ldr r2, [pc, #12] @ (8000928 ) - 800091c: 6013 str r3, [r2, #0] + 8000918: 4b05 ldr r3, [pc, #20] @ (8000930 ) + 800091a: 681a ldr r2, [r3, #0] + 800091c: 4b05 ldr r3, [pc, #20] @ (8000934 ) + 800091e: 681b ldr r3, [r3, #0] + 8000920: 4413 add r3, r2 + 8000922: 4a03 ldr r2, [pc, #12] @ (8000930 ) + 8000924: 6013 str r3, [r2, #0] } - 800091e: bf00 nop - 8000920: 46bd mov sp, r7 - 8000922: bc80 pop {r7} - 8000924: 4770 bx lr 8000926: bf00 nop - 8000928: 20000070 .word 0x20000070 - 800092c: 20000008 .word 0x20000008 + 8000928: 46bd mov sp, r7 + 800092a: bc80 pop {r7} + 800092c: 4770 bx lr + 800092e: bf00 nop + 8000930: 20000070 .word 0x20000070 + 8000934: 20000008 .word 0x20000008 -08000930 : +08000938 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8000930: b480 push {r7} - 8000932: af00 add r7, sp, #0 + 8000938: b480 push {r7} + 800093a: af00 add r7, sp, #0 return uwTick; - 8000934: 4b02 ldr r3, [pc, #8] @ (8000940 ) - 8000936: 681b ldr r3, [r3, #0] + 800093c: 4b02 ldr r3, [pc, #8] @ (8000948 ) + 800093e: 681b ldr r3, [r3, #0] } - 8000938: 4618 mov r0, r3 - 800093a: 46bd mov sp, r7 - 800093c: bc80 pop {r7} - 800093e: 4770 bx lr - 8000940: 20000070 .word 0x20000070 + 8000940: 4618 mov r0, r3 + 8000942: 46bd mov sp, r7 + 8000944: bc80 pop {r7} + 8000946: 4770 bx lr + 8000948: 20000070 .word 0x20000070 -08000944 <__NVIC_SetPriorityGrouping>: +0800094c : + * implementations in user file. + * @param Delay specifies the delay time length, in milliseconds. + * @retval None + */ +__weak void HAL_Delay(uint32_t Delay) +{ + 800094c: b580 push {r7, lr} + 800094e: b084 sub sp, #16 + 8000950: af00 add r7, sp, #0 + 8000952: 6078 str r0, [r7, #4] + uint32_t tickstart = HAL_GetTick(); + 8000954: f7ff fff0 bl 8000938 + 8000958: 60b8 str r0, [r7, #8] + uint32_t wait = Delay; + 800095a: 687b ldr r3, [r7, #4] + 800095c: 60fb str r3, [r7, #12] + + /* Add a period to guaranty minimum wait */ + if (wait < HAL_MAX_DELAY) + 800095e: 68fb ldr r3, [r7, #12] + 8000960: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 8000964: d004 beq.n 8000970 + { + wait += (uint32_t)(uwTickFreq); + 8000966: 4b09 ldr r3, [pc, #36] @ (800098c ) + 8000968: 681b ldr r3, [r3, #0] + 800096a: 68fa ldr r2, [r7, #12] + 800096c: 4413 add r3, r2 + 800096e: 60fb str r3, [r7, #12] + } + + while((HAL_GetTick() - tickstart) < wait) + 8000970: bf00 nop + 8000972: f7ff ffe1 bl 8000938 + 8000976: 4602 mov r2, r0 + 8000978: 68bb ldr r3, [r7, #8] + 800097a: 1ad3 subs r3, r2, r3 + 800097c: 68fa ldr r2, [r7, #12] + 800097e: 429a cmp r2, r3 + 8000980: d8f7 bhi.n 8000972 + { + } +} + 8000982: bf00 nop + 8000984: bf00 nop + 8000986: 3710 adds r7, #16 + 8000988: 46bd mov sp, r7 + 800098a: bd80 pop {r7, pc} + 800098c: 20000008 .word 0x20000008 + +08000990 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8000944: b480 push {r7} - 8000946: b085 sub sp, #20 - 8000948: af00 add r7, sp, #0 - 800094a: 6078 str r0, [r7, #4] + 8000990: b480 push {r7} + 8000992: b085 sub sp, #20 + 8000994: af00 add r7, sp, #0 + 8000996: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 800094c: 687b ldr r3, [r7, #4] - 800094e: f003 0307 and.w r3, r3, #7 - 8000952: 60fb str r3, [r7, #12] + 8000998: 687b ldr r3, [r7, #4] + 800099a: f003 0307 and.w r3, r3, #7 + 800099e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8000954: 4b0c ldr r3, [pc, #48] @ (8000988 <__NVIC_SetPriorityGrouping+0x44>) - 8000956: 68db ldr r3, [r3, #12] - 8000958: 60bb str r3, [r7, #8] + 80009a0: 4b0c ldr r3, [pc, #48] @ (80009d4 <__NVIC_SetPriorityGrouping+0x44>) + 80009a2: 68db ldr r3, [r3, #12] + 80009a4: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 800095a: 68ba ldr r2, [r7, #8] - 800095c: f64f 03ff movw r3, #63743 @ 0xf8ff - 8000960: 4013 ands r3, r2 - 8000962: 60bb str r3, [r7, #8] + 80009a6: 68ba ldr r2, [r7, #8] + 80009a8: f64f 03ff movw r3, #63743 @ 0xf8ff + 80009ac: 4013 ands r3, r2 + 80009ae: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8000964: 68fb ldr r3, [r7, #12] - 8000966: 021a lsls r2, r3, #8 + 80009b0: 68fb ldr r3, [r7, #12] + 80009b2: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8000968: 68bb ldr r3, [r7, #8] - 800096a: 4313 orrs r3, r2 + 80009b4: 68bb ldr r3, [r7, #8] + 80009b6: 4313 orrs r3, r2 reg_value = (reg_value | - 800096c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8000970: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8000974: 60bb str r3, [r7, #8] + 80009b8: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 80009bc: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 80009c0: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8000976: 4a04 ldr r2, [pc, #16] @ (8000988 <__NVIC_SetPriorityGrouping+0x44>) - 8000978: 68bb ldr r3, [r7, #8] - 800097a: 60d3 str r3, [r2, #12] + 80009c2: 4a04 ldr r2, [pc, #16] @ (80009d4 <__NVIC_SetPriorityGrouping+0x44>) + 80009c4: 68bb ldr r3, [r7, #8] + 80009c6: 60d3 str r3, [r2, #12] } - 800097c: bf00 nop - 800097e: 3714 adds r7, #20 - 8000980: 46bd mov sp, r7 - 8000982: bc80 pop {r7} - 8000984: 4770 bx lr - 8000986: bf00 nop - 8000988: e000ed00 .word 0xe000ed00 + 80009c8: bf00 nop + 80009ca: 3714 adds r7, #20 + 80009cc: 46bd mov sp, r7 + 80009ce: bc80 pop {r7} + 80009d0: 4770 bx lr + 80009d2: bf00 nop + 80009d4: e000ed00 .word 0xe000ed00 -0800098c <__NVIC_GetPriorityGrouping>: +080009d8 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 800098c: b480 push {r7} - 800098e: af00 add r7, sp, #0 + 80009d8: b480 push {r7} + 80009da: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8000990: 4b04 ldr r3, [pc, #16] @ (80009a4 <__NVIC_GetPriorityGrouping+0x18>) - 8000992: 68db ldr r3, [r3, #12] - 8000994: 0a1b lsrs r3, r3, #8 - 8000996: f003 0307 and.w r3, r3, #7 + 80009dc: 4b04 ldr r3, [pc, #16] @ (80009f0 <__NVIC_GetPriorityGrouping+0x18>) + 80009de: 68db ldr r3, [r3, #12] + 80009e0: 0a1b lsrs r3, r3, #8 + 80009e2: f003 0307 and.w r3, r3, #7 } - 800099a: 4618 mov r0, r3 - 800099c: 46bd mov sp, r7 - 800099e: bc80 pop {r7} - 80009a0: 4770 bx lr - 80009a2: bf00 nop - 80009a4: e000ed00 .word 0xe000ed00 + 80009e6: 4618 mov r0, r3 + 80009e8: 46bd mov sp, r7 + 80009ea: bc80 pop {r7} + 80009ec: 4770 bx lr + 80009ee: bf00 nop + 80009f0: e000ed00 .word 0xe000ed00 -080009a8 <__NVIC_SetPriority>: +080009f4 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 80009a8: b480 push {r7} - 80009aa: b083 sub sp, #12 - 80009ac: af00 add r7, sp, #0 - 80009ae: 4603 mov r3, r0 - 80009b0: 6039 str r1, [r7, #0] - 80009b2: 71fb strb r3, [r7, #7] + 80009f4: b480 push {r7} + 80009f6: b083 sub sp, #12 + 80009f8: af00 add r7, sp, #0 + 80009fa: 4603 mov r3, r0 + 80009fc: 6039 str r1, [r7, #0] + 80009fe: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 80009b4: f997 3007 ldrsb.w r3, [r7, #7] - 80009b8: 2b00 cmp r3, #0 - 80009ba: db0a blt.n 80009d2 <__NVIC_SetPriority+0x2a> + 8000a00: f997 3007 ldrsb.w r3, [r7, #7] + 8000a04: 2b00 cmp r3, #0 + 8000a06: db0a blt.n 8000a1e <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80009bc: 683b ldr r3, [r7, #0] - 80009be: b2da uxtb r2, r3 - 80009c0: 490c ldr r1, [pc, #48] @ (80009f4 <__NVIC_SetPriority+0x4c>) - 80009c2: f997 3007 ldrsb.w r3, [r7, #7] - 80009c6: 0112 lsls r2, r2, #4 - 80009c8: b2d2 uxtb r2, r2 - 80009ca: 440b add r3, r1 - 80009cc: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 8000a08: 683b ldr r3, [r7, #0] + 8000a0a: b2da uxtb r2, r3 + 8000a0c: 490c ldr r1, [pc, #48] @ (8000a40 <__NVIC_SetPriority+0x4c>) + 8000a0e: f997 3007 ldrsb.w r3, [r7, #7] + 8000a12: 0112 lsls r2, r2, #4 + 8000a14: b2d2 uxtb r2, r2 + 8000a16: 440b add r3, r1 + 8000a18: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 80009d0: e00a b.n 80009e8 <__NVIC_SetPriority+0x40> + 8000a1c: e00a b.n 8000a34 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80009d2: 683b ldr r3, [r7, #0] - 80009d4: b2da uxtb r2, r3 - 80009d6: 4908 ldr r1, [pc, #32] @ (80009f8 <__NVIC_SetPriority+0x50>) - 80009d8: 79fb ldrb r3, [r7, #7] - 80009da: f003 030f and.w r3, r3, #15 - 80009de: 3b04 subs r3, #4 - 80009e0: 0112 lsls r2, r2, #4 - 80009e2: b2d2 uxtb r2, r2 - 80009e4: 440b add r3, r1 - 80009e6: 761a strb r2, [r3, #24] + 8000a1e: 683b ldr r3, [r7, #0] + 8000a20: b2da uxtb r2, r3 + 8000a22: 4908 ldr r1, [pc, #32] @ (8000a44 <__NVIC_SetPriority+0x50>) + 8000a24: 79fb ldrb r3, [r7, #7] + 8000a26: f003 030f and.w r3, r3, #15 + 8000a2a: 3b04 subs r3, #4 + 8000a2c: 0112 lsls r2, r2, #4 + 8000a2e: b2d2 uxtb r2, r2 + 8000a30: 440b add r3, r1 + 8000a32: 761a strb r2, [r3, #24] } - 80009e8: bf00 nop - 80009ea: 370c adds r7, #12 - 80009ec: 46bd mov sp, r7 - 80009ee: bc80 pop {r7} - 80009f0: 4770 bx lr - 80009f2: bf00 nop - 80009f4: e000e100 .word 0xe000e100 - 80009f8: e000ed00 .word 0xe000ed00 + 8000a34: bf00 nop + 8000a36: 370c adds r7, #12 + 8000a38: 46bd mov sp, r7 + 8000a3a: bc80 pop {r7} + 8000a3c: 4770 bx lr + 8000a3e: bf00 nop + 8000a40: e000e100 .word 0xe000e100 + 8000a44: e000ed00 .word 0xe000ed00 -080009fc : +08000a48 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 80009fc: b480 push {r7} - 80009fe: b089 sub sp, #36 @ 0x24 - 8000a00: af00 add r7, sp, #0 - 8000a02: 60f8 str r0, [r7, #12] - 8000a04: 60b9 str r1, [r7, #8] - 8000a06: 607a str r2, [r7, #4] + 8000a48: b480 push {r7} + 8000a4a: b089 sub sp, #36 @ 0x24 + 8000a4c: af00 add r7, sp, #0 + 8000a4e: 60f8 str r0, [r7, #12] + 8000a50: 60b9 str r1, [r7, #8] + 8000a52: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8000a08: 68fb ldr r3, [r7, #12] - 8000a0a: f003 0307 and.w r3, r3, #7 - 8000a0e: 61fb str r3, [r7, #28] + 8000a54: 68fb ldr r3, [r7, #12] + 8000a56: f003 0307 and.w r3, r3, #7 + 8000a5a: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8000a10: 69fb ldr r3, [r7, #28] - 8000a12: f1c3 0307 rsb r3, r3, #7 - 8000a16: 2b04 cmp r3, #4 - 8000a18: bf28 it cs - 8000a1a: 2304 movcs r3, #4 - 8000a1c: 61bb str r3, [r7, #24] + 8000a5c: 69fb ldr r3, [r7, #28] + 8000a5e: f1c3 0307 rsb r3, r3, #7 + 8000a62: 2b04 cmp r3, #4 + 8000a64: bf28 it cs + 8000a66: 2304 movcs r3, #4 + 8000a68: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8000a1e: 69fb ldr r3, [r7, #28] - 8000a20: 3304 adds r3, #4 - 8000a22: 2b06 cmp r3, #6 - 8000a24: d902 bls.n 8000a2c - 8000a26: 69fb ldr r3, [r7, #28] - 8000a28: 3b03 subs r3, #3 - 8000a2a: e000 b.n 8000a2e - 8000a2c: 2300 movs r3, #0 - 8000a2e: 617b str r3, [r7, #20] + 8000a6a: 69fb ldr r3, [r7, #28] + 8000a6c: 3304 adds r3, #4 + 8000a6e: 2b06 cmp r3, #6 + 8000a70: d902 bls.n 8000a78 + 8000a72: 69fb ldr r3, [r7, #28] + 8000a74: 3b03 subs r3, #3 + 8000a76: e000 b.n 8000a7a + 8000a78: 2300 movs r3, #0 + 8000a7a: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000a30: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff - 8000a34: 69bb ldr r3, [r7, #24] - 8000a36: fa02 f303 lsl.w r3, r2, r3 - 8000a3a: 43da mvns r2, r3 - 8000a3c: 68bb ldr r3, [r7, #8] - 8000a3e: 401a ands r2, r3 - 8000a40: 697b ldr r3, [r7, #20] - 8000a42: 409a lsls r2, r3 + 8000a7c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff + 8000a80: 69bb ldr r3, [r7, #24] + 8000a82: fa02 f303 lsl.w r3, r2, r3 + 8000a86: 43da mvns r2, r3 + 8000a88: 68bb ldr r3, [r7, #8] + 8000a8a: 401a ands r2, r3 + 8000a8c: 697b ldr r3, [r7, #20] + 8000a8e: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8000a44: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff - 8000a48: 697b ldr r3, [r7, #20] - 8000a4a: fa01 f303 lsl.w r3, r1, r3 - 8000a4e: 43d9 mvns r1, r3 - 8000a50: 687b ldr r3, [r7, #4] - 8000a52: 400b ands r3, r1 + 8000a90: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff + 8000a94: 697b ldr r3, [r7, #20] + 8000a96: fa01 f303 lsl.w r3, r1, r3 + 8000a9a: 43d9 mvns r1, r3 + 8000a9c: 687b ldr r3, [r7, #4] + 8000a9e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8000a54: 4313 orrs r3, r2 + 8000aa0: 4313 orrs r3, r2 ); } - 8000a56: 4618 mov r0, r3 - 8000a58: 3724 adds r7, #36 @ 0x24 - 8000a5a: 46bd mov sp, r7 - 8000a5c: bc80 pop {r7} - 8000a5e: 4770 bx lr + 8000aa2: 4618 mov r0, r3 + 8000aa4: 3724 adds r7, #36 @ 0x24 + 8000aa6: 46bd mov sp, r7 + 8000aa8: bc80 pop {r7} + 8000aaa: 4770 bx lr -08000a60 : +08000aac : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8000a60: b580 push {r7, lr} - 8000a62: b082 sub sp, #8 - 8000a64: af00 add r7, sp, #0 - 8000a66: 6078 str r0, [r7, #4] + 8000aac: b580 push {r7, lr} + 8000aae: b082 sub sp, #8 + 8000ab0: af00 add r7, sp, #0 + 8000ab2: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000a68: 687b ldr r3, [r7, #4] - 8000a6a: 3b01 subs r3, #1 - 8000a6c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8000a70: d301 bcc.n 8000a76 + 8000ab4: 687b ldr r3, [r7, #4] + 8000ab6: 3b01 subs r3, #1 + 8000ab8: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8000abc: d301 bcc.n 8000ac2 { return (1UL); /* Reload value impossible */ - 8000a72: 2301 movs r3, #1 - 8000a74: e00f b.n 8000a96 + 8000abe: 2301 movs r3, #1 + 8000ac0: e00f b.n 8000ae2 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000a76: 4a0a ldr r2, [pc, #40] @ (8000aa0 ) - 8000a78: 687b ldr r3, [r7, #4] - 8000a7a: 3b01 subs r3, #1 - 8000a7c: 6053 str r3, [r2, #4] + 8000ac2: 4a0a ldr r2, [pc, #40] @ (8000aec ) + 8000ac4: 687b ldr r3, [r7, #4] + 8000ac6: 3b01 subs r3, #1 + 8000ac8: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8000a7e: 210f movs r1, #15 - 8000a80: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff - 8000a84: f7ff ff90 bl 80009a8 <__NVIC_SetPriority> + 8000aca: 210f movs r1, #15 + 8000acc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 8000ad0: f7ff ff90 bl 80009f4 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000a88: 4b05 ldr r3, [pc, #20] @ (8000aa0 ) - 8000a8a: 2200 movs r2, #0 - 8000a8c: 609a str r2, [r3, #8] + 8000ad4: 4b05 ldr r3, [pc, #20] @ (8000aec ) + 8000ad6: 2200 movs r2, #0 + 8000ad8: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000a8e: 4b04 ldr r3, [pc, #16] @ (8000aa0 ) - 8000a90: 2207 movs r2, #7 - 8000a92: 601a str r2, [r3, #0] + 8000ada: 4b04 ldr r3, [pc, #16] @ (8000aec ) + 8000adc: 2207 movs r2, #7 + 8000ade: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000a94: 2300 movs r3, #0 + 8000ae0: 2300 movs r3, #0 } - 8000a96: 4618 mov r0, r3 - 8000a98: 3708 adds r7, #8 - 8000a9a: 46bd mov sp, r7 - 8000a9c: bd80 pop {r7, pc} - 8000a9e: bf00 nop - 8000aa0: e000e010 .word 0xe000e010 + 8000ae2: 4618 mov r0, r3 + 8000ae4: 3708 adds r7, #8 + 8000ae6: 46bd mov sp, r7 + 8000ae8: bd80 pop {r7, pc} + 8000aea: bf00 nop + 8000aec: e000e010 .word 0xe000e010 -08000aa4 : +08000af0 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8000aa4: b580 push {r7, lr} - 8000aa6: b082 sub sp, #8 - 8000aa8: af00 add r7, sp, #0 - 8000aaa: 6078 str r0, [r7, #4] + 8000af0: b580 push {r7, lr} + 8000af2: b082 sub sp, #8 + 8000af4: af00 add r7, sp, #0 + 8000af6: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8000aac: 6878 ldr r0, [r7, #4] - 8000aae: f7ff ff49 bl 8000944 <__NVIC_SetPriorityGrouping> + 8000af8: 6878 ldr r0, [r7, #4] + 8000afa: f7ff ff49 bl 8000990 <__NVIC_SetPriorityGrouping> } - 8000ab2: bf00 nop - 8000ab4: 3708 adds r7, #8 - 8000ab6: 46bd mov sp, r7 - 8000ab8: bd80 pop {r7, pc} + 8000afe: bf00 nop + 8000b00: 3708 adds r7, #8 + 8000b02: 46bd mov sp, r7 + 8000b04: bd80 pop {r7, pc} -08000aba : +08000b06 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000aba: b580 push {r7, lr} - 8000abc: b086 sub sp, #24 - 8000abe: af00 add r7, sp, #0 - 8000ac0: 4603 mov r3, r0 - 8000ac2: 60b9 str r1, [r7, #8] - 8000ac4: 607a str r2, [r7, #4] - 8000ac6: 73fb strb r3, [r7, #15] + 8000b06: b580 push {r7, lr} + 8000b08: b086 sub sp, #24 + 8000b0a: af00 add r7, sp, #0 + 8000b0c: 4603 mov r3, r0 + 8000b0e: 60b9 str r1, [r7, #8] + 8000b10: 607a str r2, [r7, #4] + 8000b12: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; - 8000ac8: 2300 movs r3, #0 - 8000aca: 617b str r3, [r7, #20] + 8000b14: 2300 movs r3, #0 + 8000b16: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8000acc: f7ff ff5e bl 800098c <__NVIC_GetPriorityGrouping> - 8000ad0: 6178 str r0, [r7, #20] + 8000b18: f7ff ff5e bl 80009d8 <__NVIC_GetPriorityGrouping> + 8000b1c: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8000ad2: 687a ldr r2, [r7, #4] - 8000ad4: 68b9 ldr r1, [r7, #8] - 8000ad6: 6978 ldr r0, [r7, #20] - 8000ad8: f7ff ff90 bl 80009fc - 8000adc: 4602 mov r2, r0 - 8000ade: f997 300f ldrsb.w r3, [r7, #15] - 8000ae2: 4611 mov r1, r2 - 8000ae4: 4618 mov r0, r3 - 8000ae6: f7ff ff5f bl 80009a8 <__NVIC_SetPriority> + 8000b1e: 687a ldr r2, [r7, #4] + 8000b20: 68b9 ldr r1, [r7, #8] + 8000b22: 6978 ldr r0, [r7, #20] + 8000b24: f7ff ff90 bl 8000a48 + 8000b28: 4602 mov r2, r0 + 8000b2a: f997 300f ldrsb.w r3, [r7, #15] + 8000b2e: 4611 mov r1, r2 + 8000b30: 4618 mov r0, r3 + 8000b32: f7ff ff5f bl 80009f4 <__NVIC_SetPriority> } - 8000aea: bf00 nop - 8000aec: 3718 adds r7, #24 - 8000aee: 46bd mov sp, r7 - 8000af0: bd80 pop {r7, pc} + 8000b36: bf00 nop + 8000b38: 3718 adds r7, #24 + 8000b3a: 46bd mov sp, r7 + 8000b3c: bd80 pop {r7, pc} -08000af2 : +08000b3e : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8000af2: b580 push {r7, lr} - 8000af4: b082 sub sp, #8 - 8000af6: af00 add r7, sp, #0 - 8000af8: 6078 str r0, [r7, #4] + 8000b3e: b580 push {r7, lr} + 8000b40: b082 sub sp, #8 + 8000b42: af00 add r7, sp, #0 + 8000b44: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8000afa: 6878 ldr r0, [r7, #4] - 8000afc: f7ff ffb0 bl 8000a60 - 8000b00: 4603 mov r3, r0 + 8000b46: 6878 ldr r0, [r7, #4] + 8000b48: f7ff ffb0 bl 8000aac + 8000b4c: 4603 mov r3, r0 } - 8000b02: 4618 mov r0, r3 - 8000b04: 3708 adds r7, #8 - 8000b06: 46bd mov sp, r7 - 8000b08: bd80 pop {r7, pc} + 8000b4e: 4618 mov r0, r3 + 8000b50: 3708 adds r7, #8 + 8000b52: 46bd mov sp, r7 + 8000b54: bd80 pop {r7, pc} ... -08000b0c : +08000b58 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8000b0c: b480 push {r7} - 8000b0e: b087 sub sp, #28 - 8000b10: af00 add r7, sp, #0 - 8000b12: 6078 str r0, [r7, #4] - 8000b14: 6039 str r1, [r7, #0] + 8000b58: b480 push {r7} + 8000b5a: b087 sub sp, #28 + 8000b5c: af00 add r7, sp, #0 + 8000b5e: 6078 str r0, [r7, #4] + 8000b60: 6039 str r1, [r7, #0] uint32_t position = 0x00; - 8000b16: 2300 movs r3, #0 - 8000b18: 617b str r3, [r7, #20] + 8000b62: 2300 movs r3, #0 + 8000b64: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00; - 8000b1a: 2300 movs r3, #0 - 8000b1c: 60fb str r3, [r7, #12] + 8000b66: 2300 movs r3, #0 + 8000b68: 60fb str r3, [r7, #12] uint32_t temp = 0x00; - 8000b1e: 2300 movs r3, #0 - 8000b20: 613b str r3, [r7, #16] + 8000b6a: 2300 movs r3, #0 + 8000b6c: 613b str r3, [r7, #16] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0) - 8000b22: e160 b.n 8000de6 + 8000b6e: e160 b.n 8000e32 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1U << position); - 8000b24: 683b ldr r3, [r7, #0] - 8000b26: 681a ldr r2, [r3, #0] - 8000b28: 2101 movs r1, #1 - 8000b2a: 697b ldr r3, [r7, #20] - 8000b2c: fa01 f303 lsl.w r3, r1, r3 - 8000b30: 4013 ands r3, r2 - 8000b32: 60fb str r3, [r7, #12] + 8000b70: 683b ldr r3, [r7, #0] + 8000b72: 681a ldr r2, [r3, #0] + 8000b74: 2101 movs r1, #1 + 8000b76: 697b ldr r3, [r7, #20] + 8000b78: fa01 f303 lsl.w r3, r1, r3 + 8000b7c: 4013 ands r3, r2 + 8000b7e: 60fb str r3, [r7, #12] if (iocurrent) - 8000b34: 68fb ldr r3, [r7, #12] - 8000b36: 2b00 cmp r3, #0 - 8000b38: f000 8152 beq.w 8000de0 + 8000b80: 68fb ldr r3, [r7, #12] + 8000b82: 2b00 cmp r3, #0 + 8000b84: f000 8152 beq.w 8000e2c { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8000b3c: 683b ldr r3, [r7, #0] - 8000b3e: 685b ldr r3, [r3, #4] - 8000b40: f003 0303 and.w r3, r3, #3 - 8000b44: 2b01 cmp r3, #1 - 8000b46: d005 beq.n 8000b54 + 8000b88: 683b ldr r3, [r7, #0] + 8000b8a: 685b ldr r3, [r3, #4] + 8000b8c: f003 0303 and.w r3, r3, #3 + 8000b90: 2b01 cmp r3, #1 + 8000b92: d005 beq.n 8000ba0 ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8000b48: 683b ldr r3, [r7, #0] - 8000b4a: 685b ldr r3, [r3, #4] - 8000b4c: f003 0303 and.w r3, r3, #3 + 8000b94: 683b ldr r3, [r7, #0] + 8000b96: 685b ldr r3, [r3, #4] + 8000b98: f003 0303 and.w r3, r3, #3 if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8000b50: 2b02 cmp r3, #2 - 8000b52: d130 bne.n 8000bb6 + 8000b9c: 2b02 cmp r3, #2 + 8000b9e: d130 bne.n 8000c02 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8000b54: 687b ldr r3, [r7, #4] - 8000b56: 689b ldr r3, [r3, #8] - 8000b58: 613b str r3, [r7, #16] + 8000ba0: 687b ldr r3, [r7, #4] + 8000ba2: 689b ldr r3, [r3, #8] + 8000ba4: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); - 8000b5a: 697b ldr r3, [r7, #20] - 8000b5c: 005b lsls r3, r3, #1 - 8000b5e: 2203 movs r2, #3 - 8000b60: fa02 f303 lsl.w r3, r2, r3 - 8000b64: 43db mvns r3, r3 - 8000b66: 693a ldr r2, [r7, #16] - 8000b68: 4013 ands r3, r2 - 8000b6a: 613b str r3, [r7, #16] + 8000ba6: 697b ldr r3, [r7, #20] + 8000ba8: 005b lsls r3, r3, #1 + 8000baa: 2203 movs r2, #3 + 8000bac: fa02 f303 lsl.w r3, r2, r3 + 8000bb0: 43db mvns r3, r3 + 8000bb2: 693a ldr r2, [r7, #16] + 8000bb4: 4013 ands r3, r2 + 8000bb6: 613b str r3, [r7, #16] SET_BIT(temp, GPIO_Init->Speed << (position * 2)); - 8000b6c: 683b ldr r3, [r7, #0] - 8000b6e: 68da ldr r2, [r3, #12] - 8000b70: 697b ldr r3, [r7, #20] - 8000b72: 005b lsls r3, r3, #1 - 8000b74: fa02 f303 lsl.w r3, r2, r3 - 8000b78: 693a ldr r2, [r7, #16] - 8000b7a: 4313 orrs r3, r2 - 8000b7c: 613b str r3, [r7, #16] + 8000bb8: 683b ldr r3, [r7, #0] + 8000bba: 68da ldr r2, [r3, #12] + 8000bbc: 697b ldr r3, [r7, #20] + 8000bbe: 005b lsls r3, r3, #1 + 8000bc0: fa02 f303 lsl.w r3, r2, r3 + 8000bc4: 693a ldr r2, [r7, #16] + 8000bc6: 4313 orrs r3, r2 + 8000bc8: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8000b7e: 687b ldr r3, [r7, #4] - 8000b80: 693a ldr r2, [r7, #16] - 8000b82: 609a str r2, [r3, #8] + 8000bca: 687b ldr r3, [r7, #4] + 8000bcc: 693a ldr r2, [r7, #16] + 8000bce: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8000b84: 687b ldr r3, [r7, #4] - 8000b86: 685b ldr r3, [r3, #4] - 8000b88: 613b str r3, [r7, #16] + 8000bd0: 687b ldr r3, [r7, #4] + 8000bd2: 685b ldr r3, [r3, #4] + 8000bd4: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ; - 8000b8a: 2201 movs r2, #1 - 8000b8c: 697b ldr r3, [r7, #20] - 8000b8e: fa02 f303 lsl.w r3, r2, r3 - 8000b92: 43db mvns r3, r3 - 8000b94: 693a ldr r2, [r7, #16] - 8000b96: 4013 ands r3, r2 - 8000b98: 613b str r3, [r7, #16] + 8000bd6: 2201 movs r2, #1 + 8000bd8: 697b ldr r3, [r7, #20] + 8000bda: fa02 f303 lsl.w r3, r2, r3 + 8000bde: 43db mvns r3, r3 + 8000be0: 693a ldr r2, [r7, #16] + 8000be2: 4013 ands r3, r2 + 8000be4: 613b str r3, [r7, #16] SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8000b9a: 683b ldr r3, [r7, #0] - 8000b9c: 685b ldr r3, [r3, #4] - 8000b9e: 091b lsrs r3, r3, #4 - 8000ba0: f003 0201 and.w r2, r3, #1 - 8000ba4: 697b ldr r3, [r7, #20] - 8000ba6: fa02 f303 lsl.w r3, r2, r3 - 8000baa: 693a ldr r2, [r7, #16] - 8000bac: 4313 orrs r3, r2 - 8000bae: 613b str r3, [r7, #16] + 8000be6: 683b ldr r3, [r7, #0] + 8000be8: 685b ldr r3, [r3, #4] + 8000bea: 091b lsrs r3, r3, #4 + 8000bec: f003 0201 and.w r2, r3, #1 + 8000bf0: 697b ldr r3, [r7, #20] + 8000bf2: fa02 f303 lsl.w r3, r2, r3 + 8000bf6: 693a ldr r2, [r7, #16] + 8000bf8: 4313 orrs r3, r2 + 8000bfa: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8000bb0: 687b ldr r3, [r7, #4] - 8000bb2: 693a ldr r2, [r7, #16] - 8000bb4: 605a str r2, [r3, #4] + 8000bfc: 687b ldr r3, [r7, #4] + 8000bfe: 693a ldr r2, [r7, #16] + 8000c00: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8000bb6: 683b ldr r3, [r7, #0] - 8000bb8: 685b ldr r3, [r3, #4] - 8000bba: f003 0303 and.w r3, r3, #3 - 8000bbe: 2b03 cmp r3, #3 - 8000bc0: d017 beq.n 8000bf2 + 8000c02: 683b ldr r3, [r7, #0] + 8000c04: 685b ldr r3, [r3, #4] + 8000c06: f003 0303 and.w r3, r3, #3 + 8000c0a: 2b03 cmp r3, #3 + 8000c0c: d017 beq.n 8000c3e { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8000bc2: 687b ldr r3, [r7, #4] - 8000bc4: 68db ldr r3, [r3, #12] - 8000bc6: 613b str r3, [r7, #16] + 8000c0e: 687b ldr r3, [r7, #4] + 8000c10: 68db ldr r3, [r3, #12] + 8000c12: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); - 8000bc8: 697b ldr r3, [r7, #20] - 8000bca: 005b lsls r3, r3, #1 - 8000bcc: 2203 movs r2, #3 - 8000bce: fa02 f303 lsl.w r3, r2, r3 - 8000bd2: 43db mvns r3, r3 - 8000bd4: 693a ldr r2, [r7, #16] - 8000bd6: 4013 ands r3, r2 - 8000bd8: 613b str r3, [r7, #16] + 8000c14: 697b ldr r3, [r7, #20] + 8000c16: 005b lsls r3, r3, #1 + 8000c18: 2203 movs r2, #3 + 8000c1a: fa02 f303 lsl.w r3, r2, r3 + 8000c1e: 43db mvns r3, r3 + 8000c20: 693a ldr r2, [r7, #16] + 8000c22: 4013 ands r3, r2 + 8000c24: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); - 8000bda: 683b ldr r3, [r7, #0] - 8000bdc: 689a ldr r2, [r3, #8] - 8000bde: 697b ldr r3, [r7, #20] - 8000be0: 005b lsls r3, r3, #1 - 8000be2: fa02 f303 lsl.w r3, r2, r3 - 8000be6: 693a ldr r2, [r7, #16] - 8000be8: 4313 orrs r3, r2 - 8000bea: 613b str r3, [r7, #16] + 8000c26: 683b ldr r3, [r7, #0] + 8000c28: 689a ldr r2, [r3, #8] + 8000c2a: 697b ldr r3, [r7, #20] + 8000c2c: 005b lsls r3, r3, #1 + 8000c2e: fa02 f303 lsl.w r3, r2, r3 + 8000c32: 693a ldr r2, [r7, #16] + 8000c34: 4313 orrs r3, r2 + 8000c36: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 8000bec: 687b ldr r3, [r7, #4] - 8000bee: 693a ldr r2, [r7, #16] - 8000bf0: 60da str r2, [r3, #12] + 8000c38: 687b ldr r3, [r7, #4] + 8000c3a: 693a ldr r2, [r7, #16] + 8000c3c: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000bf2: 683b ldr r3, [r7, #0] - 8000bf4: 685b ldr r3, [r3, #4] - 8000bf6: f003 0303 and.w r3, r3, #3 - 8000bfa: 2b02 cmp r3, #2 - 8000bfc: d123 bne.n 8000c46 + 8000c3e: 683b ldr r3, [r7, #0] + 8000c40: 685b ldr r3, [r3, #4] + 8000c42: f003 0303 and.w r3, r3, #3 + 8000c46: 2b02 cmp r3, #2 + 8000c48: d123 bne.n 8000c92 assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ /* Identify AFRL or AFRH register based on IO position*/ temp = GPIOx->AFR[position >> 3]; - 8000bfe: 697b ldr r3, [r7, #20] - 8000c00: 08da lsrs r2, r3, #3 - 8000c02: 687b ldr r3, [r7, #4] - 8000c04: 3208 adds r2, #8 - 8000c06: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8000c0a: 613b str r3, [r7, #16] + 8000c4a: 697b ldr r3, [r7, #20] + 8000c4c: 08da lsrs r2, r3, #3 + 8000c4e: 687b ldr r3, [r7, #4] + 8000c50: 3208 adds r2, #8 + 8000c52: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8000c56: 613b str r3, [r7, #16] CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)); - 8000c0c: 697b ldr r3, [r7, #20] - 8000c0e: f003 0307 and.w r3, r3, #7 - 8000c12: 009b lsls r3, r3, #2 - 8000c14: 220f movs r2, #15 - 8000c16: fa02 f303 lsl.w r3, r2, r3 - 8000c1a: 43db mvns r3, r3 - 8000c1c: 693a ldr r2, [r7, #16] - 8000c1e: 4013 ands r3, r2 - 8000c20: 613b str r3, [r7, #16] + 8000c58: 697b ldr r3, [r7, #20] + 8000c5a: f003 0307 and.w r3, r3, #7 + 8000c5e: 009b lsls r3, r3, #2 + 8000c60: 220f movs r2, #15 + 8000c62: fa02 f303 lsl.w r3, r2, r3 + 8000c66: 43db mvns r3, r3 + 8000c68: 693a ldr r2, [r7, #16] + 8000c6a: 4013 ands r3, r2 + 8000c6c: 613b str r3, [r7, #16] SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4)); - 8000c22: 683b ldr r3, [r7, #0] - 8000c24: 691a ldr r2, [r3, #16] - 8000c26: 697b ldr r3, [r7, #20] - 8000c28: f003 0307 and.w r3, r3, #7 - 8000c2c: 009b lsls r3, r3, #2 - 8000c2e: fa02 f303 lsl.w r3, r2, r3 - 8000c32: 693a ldr r2, [r7, #16] - 8000c34: 4313 orrs r3, r2 - 8000c36: 613b str r3, [r7, #16] + 8000c6e: 683b ldr r3, [r7, #0] + 8000c70: 691a ldr r2, [r3, #16] + 8000c72: 697b ldr r3, [r7, #20] + 8000c74: f003 0307 and.w r3, r3, #7 + 8000c78: 009b lsls r3, r3, #2 + 8000c7a: fa02 f303 lsl.w r3, r2, r3 + 8000c7e: 693a ldr r2, [r7, #16] + 8000c80: 4313 orrs r3, r2 + 8000c82: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3] = temp; - 8000c38: 697b ldr r3, [r7, #20] - 8000c3a: 08da lsrs r2, r3, #3 - 8000c3c: 687b ldr r3, [r7, #4] - 8000c3e: 3208 adds r2, #8 - 8000c40: 6939 ldr r1, [r7, #16] - 8000c42: f843 1022 str.w r1, [r3, r2, lsl #2] + 8000c84: 697b ldr r3, [r7, #20] + 8000c86: 08da lsrs r2, r3, #3 + 8000c88: 687b ldr r3, [r7, #4] + 8000c8a: 3208 adds r2, #8 + 8000c8c: 6939 ldr r1, [r7, #16] + 8000c8e: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8000c46: 687b ldr r3, [r7, #4] - 8000c48: 681b ldr r3, [r3, #0] - 8000c4a: 613b str r3, [r7, #16] + 8000c92: 687b ldr r3, [r7, #4] + 8000c94: 681b ldr r3, [r3, #0] + 8000c96: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); - 8000c4c: 697b ldr r3, [r7, #20] - 8000c4e: 005b lsls r3, r3, #1 - 8000c50: 2203 movs r2, #3 - 8000c52: fa02 f303 lsl.w r3, r2, r3 - 8000c56: 43db mvns r3, r3 - 8000c58: 693a ldr r2, [r7, #16] - 8000c5a: 4013 ands r3, r2 - 8000c5c: 613b str r3, [r7, #16] + 8000c98: 697b ldr r3, [r7, #20] + 8000c9a: 005b lsls r3, r3, #1 + 8000c9c: 2203 movs r2, #3 + 8000c9e: fa02 f303 lsl.w r3, r2, r3 + 8000ca2: 43db mvns r3, r3 + 8000ca4: 693a ldr r2, [r7, #16] + 8000ca6: 4013 ands r3, r2 + 8000ca8: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); - 8000c5e: 683b ldr r3, [r7, #0] - 8000c60: 685b ldr r3, [r3, #4] - 8000c62: f003 0203 and.w r2, r3, #3 - 8000c66: 697b ldr r3, [r7, #20] - 8000c68: 005b lsls r3, r3, #1 - 8000c6a: fa02 f303 lsl.w r3, r2, r3 - 8000c6e: 693a ldr r2, [r7, #16] - 8000c70: 4313 orrs r3, r2 - 8000c72: 613b str r3, [r7, #16] + 8000caa: 683b ldr r3, [r7, #0] + 8000cac: 685b ldr r3, [r3, #4] + 8000cae: f003 0203 and.w r2, r3, #3 + 8000cb2: 697b ldr r3, [r7, #20] + 8000cb4: 005b lsls r3, r3, #1 + 8000cb6: fa02 f303 lsl.w r3, r2, r3 + 8000cba: 693a ldr r2, [r7, #16] + 8000cbc: 4313 orrs r3, r2 + 8000cbe: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8000c74: 687b ldr r3, [r7, #4] - 8000c76: 693a ldr r2, [r7, #16] - 8000c78: 601a str r2, [r3, #0] + 8000cc0: 687b ldr r3, [r7, #4] + 8000cc2: 693a ldr r2, [r7, #16] + 8000cc4: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8000c7a: 683b ldr r3, [r7, #0] - 8000c7c: 685b ldr r3, [r3, #4] - 8000c7e: f403 3340 and.w r3, r3, #196608 @ 0x30000 - 8000c82: 2b00 cmp r3, #0 - 8000c84: f000 80ac beq.w 8000de0 + 8000cc6: 683b ldr r3, [r7, #0] + 8000cc8: 685b ldr r3, [r3, #4] + 8000cca: f403 3340 and.w r3, r3, #196608 @ 0x30000 + 8000cce: 2b00 cmp r3, #0 + 8000cd0: f000 80ac beq.w 8000e2c { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000c88: 4b5e ldr r3, [pc, #376] @ (8000e04 ) - 8000c8a: 6a1b ldr r3, [r3, #32] - 8000c8c: 4a5d ldr r2, [pc, #372] @ (8000e04 ) - 8000c8e: f043 0301 orr.w r3, r3, #1 - 8000c92: 6213 str r3, [r2, #32] - 8000c94: 4b5b ldr r3, [pc, #364] @ (8000e04 ) - 8000c96: 6a1b ldr r3, [r3, #32] - 8000c98: f003 0301 and.w r3, r3, #1 - 8000c9c: 60bb str r3, [r7, #8] - 8000c9e: 68bb ldr r3, [r7, #8] + 8000cd4: 4b5e ldr r3, [pc, #376] @ (8000e50 ) + 8000cd6: 6a1b ldr r3, [r3, #32] + 8000cd8: 4a5d ldr r2, [pc, #372] @ (8000e50 ) + 8000cda: f043 0301 orr.w r3, r3, #1 + 8000cde: 6213 str r3, [r2, #32] + 8000ce0: 4b5b ldr r3, [pc, #364] @ (8000e50 ) + 8000ce2: 6a1b ldr r3, [r3, #32] + 8000ce4: f003 0301 and.w r3, r3, #1 + 8000ce8: 60bb str r3, [r7, #8] + 8000cea: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2]; - 8000ca0: 4a59 ldr r2, [pc, #356] @ (8000e08 ) - 8000ca2: 697b ldr r3, [r7, #20] - 8000ca4: 089b lsrs r3, r3, #2 - 8000ca6: 3302 adds r3, #2 - 8000ca8: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000cac: 613b str r3, [r7, #16] + 8000cec: 4a59 ldr r2, [pc, #356] @ (8000e54 ) + 8000cee: 697b ldr r3, [r7, #20] + 8000cf0: 089b lsrs r3, r3, #2 + 8000cf2: 3302 adds r3, #2 + 8000cf4: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000cf8: 613b str r3, [r7, #16] CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03))); - 8000cae: 697b ldr r3, [r7, #20] - 8000cb0: f003 0303 and.w r3, r3, #3 - 8000cb4: 009b lsls r3, r3, #2 - 8000cb6: 220f movs r2, #15 - 8000cb8: fa02 f303 lsl.w r3, r2, r3 - 8000cbc: 43db mvns r3, r3 - 8000cbe: 693a ldr r2, [r7, #16] - 8000cc0: 4013 ands r3, r2 - 8000cc2: 613b str r3, [r7, #16] + 8000cfa: 697b ldr r3, [r7, #20] + 8000cfc: f003 0303 and.w r3, r3, #3 + 8000d00: 009b lsls r3, r3, #2 + 8000d02: 220f movs r2, #15 + 8000d04: fa02 f303 lsl.w r3, r2, r3 + 8000d08: 43db mvns r3, r3 + 8000d0a: 693a ldr r2, [r7, #16] + 8000d0c: 4013 ands r3, r2 + 8000d0e: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); - 8000cc4: 687b ldr r3, [r7, #4] - 8000cc6: 4a51 ldr r2, [pc, #324] @ (8000e0c ) - 8000cc8: 4293 cmp r3, r2 - 8000cca: d025 beq.n 8000d18 - 8000ccc: 687b ldr r3, [r7, #4] - 8000cce: 4a50 ldr r2, [pc, #320] @ (8000e10 ) - 8000cd0: 4293 cmp r3, r2 - 8000cd2: d01f beq.n 8000d14 - 8000cd4: 687b ldr r3, [r7, #4] - 8000cd6: 4a4f ldr r2, [pc, #316] @ (8000e14 ) - 8000cd8: 4293 cmp r3, r2 - 8000cda: d019 beq.n 8000d10 - 8000cdc: 687b ldr r3, [r7, #4] - 8000cde: 4a4e ldr r2, [pc, #312] @ (8000e18 ) - 8000ce0: 4293 cmp r3, r2 - 8000ce2: d013 beq.n 8000d0c - 8000ce4: 687b ldr r3, [r7, #4] - 8000ce6: 4a4d ldr r2, [pc, #308] @ (8000e1c ) - 8000ce8: 4293 cmp r3, r2 - 8000cea: d00d beq.n 8000d08 - 8000cec: 687b ldr r3, [r7, #4] - 8000cee: 4a4c ldr r2, [pc, #304] @ (8000e20 ) - 8000cf0: 4293 cmp r3, r2 - 8000cf2: d007 beq.n 8000d04 - 8000cf4: 687b ldr r3, [r7, #4] - 8000cf6: 4a4b ldr r2, [pc, #300] @ (8000e24 ) - 8000cf8: 4293 cmp r3, r2 - 8000cfa: d101 bne.n 8000d00 - 8000cfc: 2306 movs r3, #6 - 8000cfe: e00c b.n 8000d1a - 8000d00: 2307 movs r3, #7 - 8000d02: e00a b.n 8000d1a - 8000d04: 2305 movs r3, #5 - 8000d06: e008 b.n 8000d1a - 8000d08: 2304 movs r3, #4 - 8000d0a: e006 b.n 8000d1a - 8000d0c: 2303 movs r3, #3 - 8000d0e: e004 b.n 8000d1a - 8000d10: 2302 movs r3, #2 - 8000d12: e002 b.n 8000d1a - 8000d14: 2301 movs r3, #1 - 8000d16: e000 b.n 8000d1a - 8000d18: 2300 movs r3, #0 - 8000d1a: 697a ldr r2, [r7, #20] - 8000d1c: f002 0203 and.w r2, r2, #3 - 8000d20: 0092 lsls r2, r2, #2 - 8000d22: 4093 lsls r3, r2 - 8000d24: 693a ldr r2, [r7, #16] - 8000d26: 4313 orrs r3, r2 - 8000d28: 613b str r3, [r7, #16] + 8000d10: 687b ldr r3, [r7, #4] + 8000d12: 4a51 ldr r2, [pc, #324] @ (8000e58 ) + 8000d14: 4293 cmp r3, r2 + 8000d16: d025 beq.n 8000d64 + 8000d18: 687b ldr r3, [r7, #4] + 8000d1a: 4a50 ldr r2, [pc, #320] @ (8000e5c ) + 8000d1c: 4293 cmp r3, r2 + 8000d1e: d01f beq.n 8000d60 + 8000d20: 687b ldr r3, [r7, #4] + 8000d22: 4a4f ldr r2, [pc, #316] @ (8000e60 ) + 8000d24: 4293 cmp r3, r2 + 8000d26: d019 beq.n 8000d5c + 8000d28: 687b ldr r3, [r7, #4] + 8000d2a: 4a4e ldr r2, [pc, #312] @ (8000e64 ) + 8000d2c: 4293 cmp r3, r2 + 8000d2e: d013 beq.n 8000d58 + 8000d30: 687b ldr r3, [r7, #4] + 8000d32: 4a4d ldr r2, [pc, #308] @ (8000e68 ) + 8000d34: 4293 cmp r3, r2 + 8000d36: d00d beq.n 8000d54 + 8000d38: 687b ldr r3, [r7, #4] + 8000d3a: 4a4c ldr r2, [pc, #304] @ (8000e6c ) + 8000d3c: 4293 cmp r3, r2 + 8000d3e: d007 beq.n 8000d50 + 8000d40: 687b ldr r3, [r7, #4] + 8000d42: 4a4b ldr r2, [pc, #300] @ (8000e70 ) + 8000d44: 4293 cmp r3, r2 + 8000d46: d101 bne.n 8000d4c + 8000d48: 2306 movs r3, #6 + 8000d4a: e00c b.n 8000d66 + 8000d4c: 2307 movs r3, #7 + 8000d4e: e00a b.n 8000d66 + 8000d50: 2305 movs r3, #5 + 8000d52: e008 b.n 8000d66 + 8000d54: 2304 movs r3, #4 + 8000d56: e006 b.n 8000d66 + 8000d58: 2303 movs r3, #3 + 8000d5a: e004 b.n 8000d66 + 8000d5c: 2302 movs r3, #2 + 8000d5e: e002 b.n 8000d66 + 8000d60: 2301 movs r3, #1 + 8000d62: e000 b.n 8000d66 + 8000d64: 2300 movs r3, #0 + 8000d66: 697a ldr r2, [r7, #20] + 8000d68: f002 0203 and.w r2, r2, #3 + 8000d6c: 0092 lsls r2, r2, #2 + 8000d6e: 4093 lsls r3, r2 + 8000d70: 693a ldr r2, [r7, #16] + 8000d72: 4313 orrs r3, r2 + 8000d74: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2] = temp; - 8000d2a: 4937 ldr r1, [pc, #220] @ (8000e08 ) - 8000d2c: 697b ldr r3, [r7, #20] - 8000d2e: 089b lsrs r3, r3, #2 - 8000d30: 3302 adds r3, #2 - 8000d32: 693a ldr r2, [r7, #16] - 8000d34: f841 2023 str.w r2, [r1, r3, lsl #2] + 8000d76: 4937 ldr r1, [pc, #220] @ (8000e54 ) + 8000d78: 697b ldr r3, [r7, #20] + 8000d7a: 089b lsrs r3, r3, #2 + 8000d7c: 3302 adds r3, #2 + 8000d7e: 693a ldr r2, [r7, #16] + 8000d80: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8000d38: 4b3b ldr r3, [pc, #236] @ (8000e28 ) - 8000d3a: 689b ldr r3, [r3, #8] - 8000d3c: 613b str r3, [r7, #16] + 8000d84: 4b3b ldr r3, [pc, #236] @ (8000e74 ) + 8000d86: 689b ldr r3, [r3, #8] + 8000d88: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 8000d3e: 68fb ldr r3, [r7, #12] - 8000d40: 43db mvns r3, r3 - 8000d42: 693a ldr r2, [r7, #16] - 8000d44: 4013 ands r3, r2 - 8000d46: 613b str r3, [r7, #16] + 8000d8a: 68fb ldr r3, [r7, #12] + 8000d8c: 43db mvns r3, r3 + 8000d8e: 693a ldr r2, [r7, #16] + 8000d90: 4013 ands r3, r2 + 8000d92: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8000d48: 683b ldr r3, [r7, #0] - 8000d4a: 685b ldr r3, [r3, #4] - 8000d4c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8000d50: 2b00 cmp r3, #0 - 8000d52: d003 beq.n 8000d5c + 8000d94: 683b ldr r3, [r7, #0] + 8000d96: 685b ldr r3, [r3, #4] + 8000d98: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8000d9c: 2b00 cmp r3, #0 + 8000d9e: d003 beq.n 8000da8 { SET_BIT(temp, iocurrent); - 8000d54: 693a ldr r2, [r7, #16] - 8000d56: 68fb ldr r3, [r7, #12] - 8000d58: 4313 orrs r3, r2 - 8000d5a: 613b str r3, [r7, #16] + 8000da0: 693a ldr r2, [r7, #16] + 8000da2: 68fb ldr r3, [r7, #12] + 8000da4: 4313 orrs r3, r2 + 8000da6: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 8000d5c: 4a32 ldr r2, [pc, #200] @ (8000e28 ) - 8000d5e: 693b ldr r3, [r7, #16] - 8000d60: 6093 str r3, [r2, #8] + 8000da8: 4a32 ldr r2, [pc, #200] @ (8000e74 ) + 8000daa: 693b ldr r3, [r7, #16] + 8000dac: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 8000d62: 4b31 ldr r3, [pc, #196] @ (8000e28 ) - 8000d64: 68db ldr r3, [r3, #12] - 8000d66: 613b str r3, [r7, #16] + 8000dae: 4b31 ldr r3, [pc, #196] @ (8000e74 ) + 8000db0: 68db ldr r3, [r3, #12] + 8000db2: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 8000d68: 68fb ldr r3, [r7, #12] - 8000d6a: 43db mvns r3, r3 - 8000d6c: 693a ldr r2, [r7, #16] - 8000d6e: 4013 ands r3, r2 - 8000d70: 613b str r3, [r7, #16] + 8000db4: 68fb ldr r3, [r7, #12] + 8000db6: 43db mvns r3, r3 + 8000db8: 693a ldr r2, [r7, #16] + 8000dba: 4013 ands r3, r2 + 8000dbc: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 8000d72: 683b ldr r3, [r7, #0] - 8000d74: 685b ldr r3, [r3, #4] - 8000d76: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8000d7a: 2b00 cmp r3, #0 - 8000d7c: d003 beq.n 8000d86 + 8000dbe: 683b ldr r3, [r7, #0] + 8000dc0: 685b ldr r3, [r3, #4] + 8000dc2: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8000dc6: 2b00 cmp r3, #0 + 8000dc8: d003 beq.n 8000dd2 { SET_BIT(temp, iocurrent); - 8000d7e: 693a ldr r2, [r7, #16] - 8000d80: 68fb ldr r3, [r7, #12] - 8000d82: 4313 orrs r3, r2 - 8000d84: 613b str r3, [r7, #16] + 8000dca: 693a ldr r2, [r7, #16] + 8000dcc: 68fb ldr r3, [r7, #12] + 8000dce: 4313 orrs r3, r2 + 8000dd0: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 8000d86: 4a28 ldr r2, [pc, #160] @ (8000e28 ) - 8000d88: 693b ldr r3, [r7, #16] - 8000d8a: 60d3 str r3, [r2, #12] + 8000dd2: 4a28 ldr r2, [pc, #160] @ (8000e74 ) + 8000dd4: 693b ldr r3, [r7, #16] + 8000dd6: 60d3 str r3, [r2, #12] temp = EXTI->EMR; - 8000d8c: 4b26 ldr r3, [pc, #152] @ (8000e28 ) - 8000d8e: 685b ldr r3, [r3, #4] - 8000d90: 613b str r3, [r7, #16] + 8000dd8: 4b26 ldr r3, [pc, #152] @ (8000e74 ) + 8000dda: 685b ldr r3, [r3, #4] + 8000ddc: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 8000d92: 68fb ldr r3, [r7, #12] - 8000d94: 43db mvns r3, r3 - 8000d96: 693a ldr r2, [r7, #16] - 8000d98: 4013 ands r3, r2 - 8000d9a: 613b str r3, [r7, #16] + 8000dde: 68fb ldr r3, [r7, #12] + 8000de0: 43db mvns r3, r3 + 8000de2: 693a ldr r2, [r7, #16] + 8000de4: 4013 ands r3, r2 + 8000de6: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 8000d9c: 683b ldr r3, [r7, #0] - 8000d9e: 685b ldr r3, [r3, #4] - 8000da0: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000da4: 2b00 cmp r3, #0 - 8000da6: d003 beq.n 8000db0 + 8000de8: 683b ldr r3, [r7, #0] + 8000dea: 685b ldr r3, [r3, #4] + 8000dec: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000df0: 2b00 cmp r3, #0 + 8000df2: d003 beq.n 8000dfc { SET_BIT(temp, iocurrent); - 8000da8: 693a ldr r2, [r7, #16] - 8000daa: 68fb ldr r3, [r7, #12] - 8000dac: 4313 orrs r3, r2 - 8000dae: 613b str r3, [r7, #16] + 8000df4: 693a ldr r2, [r7, #16] + 8000df6: 68fb ldr r3, [r7, #12] + 8000df8: 4313 orrs r3, r2 + 8000dfa: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 8000db0: 4a1d ldr r2, [pc, #116] @ (8000e28 ) - 8000db2: 693b ldr r3, [r7, #16] - 8000db4: 6053 str r3, [r2, #4] + 8000dfc: 4a1d ldr r2, [pc, #116] @ (8000e74 ) + 8000dfe: 693b ldr r3, [r7, #16] + 8000e00: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8000db6: 4b1c ldr r3, [pc, #112] @ (8000e28 ) - 8000db8: 681b ldr r3, [r3, #0] - 8000dba: 613b str r3, [r7, #16] + 8000e02: 4b1c ldr r3, [pc, #112] @ (8000e74 ) + 8000e04: 681b ldr r3, [r3, #0] + 8000e06: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 8000dbc: 68fb ldr r3, [r7, #12] - 8000dbe: 43db mvns r3, r3 - 8000dc0: 693a ldr r2, [r7, #16] - 8000dc2: 4013 ands r3, r2 - 8000dc4: 613b str r3, [r7, #16] + 8000e08: 68fb ldr r3, [r7, #12] + 8000e0a: 43db mvns r3, r3 + 8000e0c: 693a ldr r2, [r7, #16] + 8000e0e: 4013 ands r3, r2 + 8000e10: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 8000dc6: 683b ldr r3, [r7, #0] - 8000dc8: 685b ldr r3, [r3, #4] - 8000dca: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8000dce: 2b00 cmp r3, #0 - 8000dd0: d003 beq.n 8000dda + 8000e12: 683b ldr r3, [r7, #0] + 8000e14: 685b ldr r3, [r3, #4] + 8000e16: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8000e1a: 2b00 cmp r3, #0 + 8000e1c: d003 beq.n 8000e26 { SET_BIT(temp, iocurrent); - 8000dd2: 693a ldr r2, [r7, #16] - 8000dd4: 68fb ldr r3, [r7, #12] - 8000dd6: 4313 orrs r3, r2 - 8000dd8: 613b str r3, [r7, #16] + 8000e1e: 693a ldr r2, [r7, #16] + 8000e20: 68fb ldr r3, [r7, #12] + 8000e22: 4313 orrs r3, r2 + 8000e24: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 8000dda: 4a13 ldr r2, [pc, #76] @ (8000e28 ) - 8000ddc: 693b ldr r3, [r7, #16] - 8000dde: 6013 str r3, [r2, #0] + 8000e26: 4a13 ldr r2, [pc, #76] @ (8000e74 ) + 8000e28: 693b ldr r3, [r7, #16] + 8000e2a: 6013 str r3, [r2, #0] } } position++; - 8000de0: 697b ldr r3, [r7, #20] - 8000de2: 3301 adds r3, #1 - 8000de4: 617b str r3, [r7, #20] + 8000e2c: 697b ldr r3, [r7, #20] + 8000e2e: 3301 adds r3, #1 + 8000e30: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0) - 8000de6: 683b ldr r3, [r7, #0] - 8000de8: 681a ldr r2, [r3, #0] - 8000dea: 697b ldr r3, [r7, #20] - 8000dec: fa22 f303 lsr.w r3, r2, r3 - 8000df0: 2b00 cmp r3, #0 - 8000df2: f47f ae97 bne.w 8000b24 + 8000e32: 683b ldr r3, [r7, #0] + 8000e34: 681a ldr r2, [r3, #0] + 8000e36: 697b ldr r3, [r7, #20] + 8000e38: fa22 f303 lsr.w r3, r2, r3 + 8000e3c: 2b00 cmp r3, #0 + 8000e3e: f47f ae97 bne.w 8000b70 } } - 8000df6: bf00 nop - 8000df8: bf00 nop - 8000dfa: 371c adds r7, #28 - 8000dfc: 46bd mov sp, r7 - 8000dfe: bc80 pop {r7} - 8000e00: 4770 bx lr - 8000e02: bf00 nop - 8000e04: 40023800 .word 0x40023800 - 8000e08: 40010000 .word 0x40010000 - 8000e0c: 40020000 .word 0x40020000 - 8000e10: 40020400 .word 0x40020400 - 8000e14: 40020800 .word 0x40020800 - 8000e18: 40020c00 .word 0x40020c00 - 8000e1c: 40021000 .word 0x40021000 - 8000e20: 40021400 .word 0x40021400 - 8000e24: 40021800 .word 0x40021800 - 8000e28: 40010400 .word 0x40010400 + 8000e42: bf00 nop + 8000e44: bf00 nop + 8000e46: 371c adds r7, #28 + 8000e48: 46bd mov sp, r7 + 8000e4a: bc80 pop {r7} + 8000e4c: 4770 bx lr + 8000e4e: bf00 nop + 8000e50: 40023800 .word 0x40023800 + 8000e54: 40010000 .word 0x40010000 + 8000e58: 40020000 .word 0x40020000 + 8000e5c: 40020400 .word 0x40020400 + 8000e60: 40020800 .word 0x40020800 + 8000e64: 40020c00 .word 0x40020c00 + 8000e68: 40021000 .word 0x40021000 + 8000e6c: 40021400 .word 0x40021400 + 8000e70: 40021800 .word 0x40021800 + 8000e74: 40010400 .word 0x40010400 -08000e2c : +08000e78 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8000e2c: b480 push {r7} - 8000e2e: b083 sub sp, #12 - 8000e30: af00 add r7, sp, #0 - 8000e32: 6078 str r0, [r7, #4] - 8000e34: 460b mov r3, r1 - 8000e36: 807b strh r3, [r7, #2] - 8000e38: 4613 mov r3, r2 - 8000e3a: 707b strb r3, [r7, #1] + 8000e78: b480 push {r7} + 8000e7a: b083 sub sp, #12 + 8000e7c: af00 add r7, sp, #0 + 8000e7e: 6078 str r0, [r7, #4] + 8000e80: 460b mov r3, r1 + 8000e82: 807b strh r3, [r7, #2] + 8000e84: 4613 mov r3, r2 + 8000e86: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8000e3c: 787b ldrb r3, [r7, #1] - 8000e3e: 2b00 cmp r3, #0 - 8000e40: d003 beq.n 8000e4a + 8000e88: 787b ldrb r3, [r7, #1] + 8000e8a: 2b00 cmp r3, #0 + 8000e8c: d003 beq.n 8000e96 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8000e42: 887a ldrh r2, [r7, #2] - 8000e44: 687b ldr r3, [r7, #4] - 8000e46: 619a str r2, [r3, #24] + 8000e8e: 887a ldrh r2, [r7, #2] + 8000e90: 687b ldr r3, [r7, #4] + 8000e92: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; } } - 8000e48: e003 b.n 8000e52 + 8000e94: e003 b.n 8000e9e GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; - 8000e4a: 887b ldrh r3, [r7, #2] - 8000e4c: 041a lsls r2, r3, #16 - 8000e4e: 687b ldr r3, [r7, #4] - 8000e50: 619a str r2, [r3, #24] + 8000e96: 887b ldrh r3, [r7, #2] + 8000e98: 041a lsls r2, r3, #16 + 8000e9a: 687b ldr r3, [r7, #4] + 8000e9c: 619a str r2, [r3, #24] } - 8000e52: bf00 nop - 8000e54: 370c adds r7, #12 - 8000e56: 46bd mov sp, r7 - 8000e58: bc80 pop {r7} - 8000e5a: 4770 bx lr + 8000e9e: bf00 nop + 8000ea0: 370c adds r7, #12 + 8000ea2: 46bd mov sp, r7 + 8000ea4: bc80 pop {r7} + 8000ea6: 4770 bx lr -08000e5c : +08000ea8 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8000e5c: b580 push {r7, lr} - 8000e5e: b088 sub sp, #32 - 8000e60: af00 add r7, sp, #0 - 8000e62: 6078 str r0, [r7, #4] + 8000ea8: b580 push {r7, lr} + 8000eaa: b088 sub sp, #32 + 8000eac: af00 add r7, sp, #0 + 8000eae: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check the parameters */ if(RCC_OscInitStruct == NULL) - 8000e64: 687b ldr r3, [r7, #4] - 8000e66: 2b00 cmp r3, #0 - 8000e68: d101 bne.n 8000e6e + 8000eb0: 687b ldr r3, [r7, #4] + 8000eb2: 2b00 cmp r3, #0 + 8000eb4: d101 bne.n 8000eba { return HAL_ERROR; - 8000e6a: 2301 movs r3, #1 - 8000e6c: e31d b.n 80014aa + 8000eb6: 2301 movs r3, #1 + 8000eb8: e31d b.n 80014f6 } assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8000e6e: 4b94 ldr r3, [pc, #592] @ (80010c0 ) - 8000e70: 689b ldr r3, [r3, #8] - 8000e72: f003 030c and.w r3, r3, #12 - 8000e76: 61bb str r3, [r7, #24] + 8000eba: 4b94 ldr r3, [pc, #592] @ (800110c ) + 8000ebc: 689b ldr r3, [r3, #8] + 8000ebe: f003 030c and.w r3, r3, #12 + 8000ec2: 61bb str r3, [r7, #24] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8000e78: 4b91 ldr r3, [pc, #580] @ (80010c0 ) - 8000e7a: 689b ldr r3, [r3, #8] - 8000e7c: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8000e80: 617b str r3, [r7, #20] + 8000ec4: 4b91 ldr r3, [pc, #580] @ (800110c ) + 8000ec6: 689b ldr r3, [r3, #8] + 8000ec8: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8000ecc: 617b str r3, [r7, #20] /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8000e82: 687b ldr r3, [r7, #4] - 8000e84: 681b ldr r3, [r3, #0] - 8000e86: f003 0301 and.w r3, r3, #1 - 8000e8a: 2b00 cmp r3, #0 - 8000e8c: d07b beq.n 8000f86 + 8000ece: 687b ldr r3, [r7, #4] + 8000ed0: 681b ldr r3, [r3, #0] + 8000ed2: f003 0301 and.w r3, r3, #1 + 8000ed6: 2b00 cmp r3, #0 + 8000ed8: d07b beq.n 8000fd2 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE) - 8000e8e: 69bb ldr r3, [r7, #24] - 8000e90: 2b08 cmp r3, #8 - 8000e92: d006 beq.n 8000ea2 + 8000eda: 69bb ldr r3, [r7, #24] + 8000edc: 2b08 cmp r3, #8 + 8000ede: d006 beq.n 8000eee || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE))) - 8000e94: 69bb ldr r3, [r7, #24] - 8000e96: 2b0c cmp r3, #12 - 8000e98: d10f bne.n 8000eba - 8000e9a: 697b ldr r3, [r7, #20] - 8000e9c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8000ea0: d10b bne.n 8000eba + 8000ee0: 69bb ldr r3, [r7, #24] + 8000ee2: 2b0c cmp r3, #12 + 8000ee4: d10f bne.n 8000f06 + 8000ee6: 697b ldr r3, [r7, #20] + 8000ee8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8000eec: d10b bne.n 8000f06 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000ea2: 4b87 ldr r3, [pc, #540] @ (80010c0 ) - 8000ea4: 681b ldr r3, [r3, #0] - 8000ea6: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000eaa: 2b00 cmp r3, #0 - 8000eac: d06a beq.n 8000f84 - 8000eae: 687b ldr r3, [r7, #4] - 8000eb0: 685b ldr r3, [r3, #4] - 8000eb2: 2b00 cmp r3, #0 - 8000eb4: d166 bne.n 8000f84 + 8000eee: 4b87 ldr r3, [pc, #540] @ (800110c ) + 8000ef0: 681b ldr r3, [r3, #0] + 8000ef2: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000ef6: 2b00 cmp r3, #0 + 8000ef8: d06a beq.n 8000fd0 + 8000efa: 687b ldr r3, [r7, #4] + 8000efc: 685b ldr r3, [r3, #4] + 8000efe: 2b00 cmp r3, #0 + 8000f00: d166 bne.n 8000fd0 { return HAL_ERROR; - 8000eb6: 2301 movs r3, #1 - 8000eb8: e2f7 b.n 80014aa + 8000f02: 2301 movs r3, #1 + 8000f04: e2f7 b.n 80014f6 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8000eba: 687b ldr r3, [r7, #4] - 8000ebc: 685b ldr r3, [r3, #4] - 8000ebe: 2b01 cmp r3, #1 - 8000ec0: d106 bne.n 8000ed0 - 8000ec2: 4b7f ldr r3, [pc, #508] @ (80010c0 ) - 8000ec4: 681b ldr r3, [r3, #0] - 8000ec6: 4a7e ldr r2, [pc, #504] @ (80010c0 ) - 8000ec8: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8000ecc: 6013 str r3, [r2, #0] - 8000ece: e02d b.n 8000f2c - 8000ed0: 687b ldr r3, [r7, #4] - 8000ed2: 685b ldr r3, [r3, #4] - 8000ed4: 2b00 cmp r3, #0 - 8000ed6: d10c bne.n 8000ef2 - 8000ed8: 4b79 ldr r3, [pc, #484] @ (80010c0 ) - 8000eda: 681b ldr r3, [r3, #0] - 8000edc: 4a78 ldr r2, [pc, #480] @ (80010c0 ) - 8000ede: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8000ee2: 6013 str r3, [r2, #0] - 8000ee4: 4b76 ldr r3, [pc, #472] @ (80010c0 ) - 8000ee6: 681b ldr r3, [r3, #0] - 8000ee8: 4a75 ldr r2, [pc, #468] @ (80010c0 ) - 8000eea: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8000eee: 6013 str r3, [r2, #0] - 8000ef0: e01c b.n 8000f2c - 8000ef2: 687b ldr r3, [r7, #4] - 8000ef4: 685b ldr r3, [r3, #4] - 8000ef6: 2b05 cmp r3, #5 - 8000ef8: d10c bne.n 8000f14 - 8000efa: 4b71 ldr r3, [pc, #452] @ (80010c0 ) - 8000efc: 681b ldr r3, [r3, #0] - 8000efe: 4a70 ldr r2, [pc, #448] @ (80010c0 ) - 8000f00: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 8000f04: 6013 str r3, [r2, #0] - 8000f06: 4b6e ldr r3, [pc, #440] @ (80010c0 ) - 8000f08: 681b ldr r3, [r3, #0] - 8000f0a: 4a6d ldr r2, [pc, #436] @ (80010c0 ) - 8000f0c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8000f10: 6013 str r3, [r2, #0] - 8000f12: e00b b.n 8000f2c - 8000f14: 4b6a ldr r3, [pc, #424] @ (80010c0 ) - 8000f16: 681b ldr r3, [r3, #0] - 8000f18: 4a69 ldr r2, [pc, #420] @ (80010c0 ) - 8000f1a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8000f1e: 6013 str r3, [r2, #0] - 8000f20: 4b67 ldr r3, [pc, #412] @ (80010c0 ) - 8000f22: 681b ldr r3, [r3, #0] - 8000f24: 4a66 ldr r2, [pc, #408] @ (80010c0 ) - 8000f26: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8000f2a: 6013 str r3, [r2, #0] + 8000f06: 687b ldr r3, [r7, #4] + 8000f08: 685b ldr r3, [r3, #4] + 8000f0a: 2b01 cmp r3, #1 + 8000f0c: d106 bne.n 8000f1c + 8000f0e: 4b7f ldr r3, [pc, #508] @ (800110c ) + 8000f10: 681b ldr r3, [r3, #0] + 8000f12: 4a7e ldr r2, [pc, #504] @ (800110c ) + 8000f14: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8000f18: 6013 str r3, [r2, #0] + 8000f1a: e02d b.n 8000f78 + 8000f1c: 687b ldr r3, [r7, #4] + 8000f1e: 685b ldr r3, [r3, #4] + 8000f20: 2b00 cmp r3, #0 + 8000f22: d10c bne.n 8000f3e + 8000f24: 4b79 ldr r3, [pc, #484] @ (800110c ) + 8000f26: 681b ldr r3, [r3, #0] + 8000f28: 4a78 ldr r2, [pc, #480] @ (800110c ) + 8000f2a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8000f2e: 6013 str r3, [r2, #0] + 8000f30: 4b76 ldr r3, [pc, #472] @ (800110c ) + 8000f32: 681b ldr r3, [r3, #0] + 8000f34: 4a75 ldr r2, [pc, #468] @ (800110c ) + 8000f36: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8000f3a: 6013 str r3, [r2, #0] + 8000f3c: e01c b.n 8000f78 + 8000f3e: 687b ldr r3, [r7, #4] + 8000f40: 685b ldr r3, [r3, #4] + 8000f42: 2b05 cmp r3, #5 + 8000f44: d10c bne.n 8000f60 + 8000f46: 4b71 ldr r3, [pc, #452] @ (800110c ) + 8000f48: 681b ldr r3, [r3, #0] + 8000f4a: 4a70 ldr r2, [pc, #448] @ (800110c ) + 8000f4c: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8000f50: 6013 str r3, [r2, #0] + 8000f52: 4b6e ldr r3, [pc, #440] @ (800110c ) + 8000f54: 681b ldr r3, [r3, #0] + 8000f56: 4a6d ldr r2, [pc, #436] @ (800110c ) + 8000f58: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8000f5c: 6013 str r3, [r2, #0] + 8000f5e: e00b b.n 8000f78 + 8000f60: 4b6a ldr r3, [pc, #424] @ (800110c ) + 8000f62: 681b ldr r3, [r3, #0] + 8000f64: 4a69 ldr r2, [pc, #420] @ (800110c ) + 8000f66: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8000f6a: 6013 str r3, [r2, #0] + 8000f6c: 4b67 ldr r3, [pc, #412] @ (800110c ) + 8000f6e: 681b ldr r3, [r3, #0] + 8000f70: 4a66 ldr r2, [pc, #408] @ (800110c ) + 8000f72: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8000f76: 6013 str r3, [r2, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8000f2c: 687b ldr r3, [r7, #4] - 8000f2e: 685b ldr r3, [r3, #4] - 8000f30: 2b00 cmp r3, #0 - 8000f32: d013 beq.n 8000f5c + 8000f78: 687b ldr r3, [r7, #4] + 8000f7a: 685b ldr r3, [r3, #4] + 8000f7c: 2b00 cmp r3, #0 + 8000f7e: d013 beq.n 8000fa8 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000f34: f7ff fcfc bl 8000930 - 8000f38: 6138 str r0, [r7, #16] + 8000f80: f7ff fcda bl 8000938 + 8000f84: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8000f3a: e008 b.n 8000f4e + 8000f86: e008 b.n 8000f9a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000f3c: f7ff fcf8 bl 8000930 - 8000f40: 4602 mov r2, r0 - 8000f42: 693b ldr r3, [r7, #16] - 8000f44: 1ad3 subs r3, r2, r3 - 8000f46: 2b64 cmp r3, #100 @ 0x64 - 8000f48: d901 bls.n 8000f4e + 8000f88: f7ff fcd6 bl 8000938 + 8000f8c: 4602 mov r2, r0 + 8000f8e: 693b ldr r3, [r7, #16] + 8000f90: 1ad3 subs r3, r2, r3 + 8000f92: 2b64 cmp r3, #100 @ 0x64 + 8000f94: d901 bls.n 8000f9a { return HAL_TIMEOUT; - 8000f4a: 2303 movs r3, #3 - 8000f4c: e2ad b.n 80014aa + 8000f96: 2303 movs r3, #3 + 8000f98: e2ad b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8000f4e: 4b5c ldr r3, [pc, #368] @ (80010c0 ) - 8000f50: 681b ldr r3, [r3, #0] - 8000f52: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000f56: 2b00 cmp r3, #0 - 8000f58: d0f0 beq.n 8000f3c - 8000f5a: e014 b.n 8000f86 + 8000f9a: 4b5c ldr r3, [pc, #368] @ (800110c ) + 8000f9c: 681b ldr r3, [r3, #0] + 8000f9e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000fa2: 2b00 cmp r3, #0 + 8000fa4: d0f0 beq.n 8000f88 + 8000fa6: e014 b.n 8000fd2 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000f5c: f7ff fce8 bl 8000930 - 8000f60: 6138 str r0, [r7, #16] + 8000fa8: f7ff fcc6 bl 8000938 + 8000fac: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8000f62: e008 b.n 8000f76 + 8000fae: e008 b.n 8000fc2 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000f64: f7ff fce4 bl 8000930 - 8000f68: 4602 mov r2, r0 - 8000f6a: 693b ldr r3, [r7, #16] - 8000f6c: 1ad3 subs r3, r2, r3 - 8000f6e: 2b64 cmp r3, #100 @ 0x64 - 8000f70: d901 bls.n 8000f76 + 8000fb0: f7ff fcc2 bl 8000938 + 8000fb4: 4602 mov r2, r0 + 8000fb6: 693b ldr r3, [r7, #16] + 8000fb8: 1ad3 subs r3, r2, r3 + 8000fba: 2b64 cmp r3, #100 @ 0x64 + 8000fbc: d901 bls.n 8000fc2 { return HAL_TIMEOUT; - 8000f72: 2303 movs r3, #3 - 8000f74: e299 b.n 80014aa + 8000fbe: 2303 movs r3, #3 + 8000fc0: e299 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8000f76: 4b52 ldr r3, [pc, #328] @ (80010c0 ) - 8000f78: 681b ldr r3, [r3, #0] - 8000f7a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8000f7e: 2b00 cmp r3, #0 - 8000f80: d1f0 bne.n 8000f64 - 8000f82: e000 b.n 8000f86 + 8000fc2: 4b52 ldr r3, [pc, #328] @ (800110c ) + 8000fc4: 681b ldr r3, [r3, #0] + 8000fc6: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000fca: 2b00 cmp r3, #0 + 8000fcc: d1f0 bne.n 8000fb0 + 8000fce: e000 b.n 8000fd2 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000f84: bf00 nop + 8000fd0: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8000f86: 687b ldr r3, [r7, #4] - 8000f88: 681b ldr r3, [r3, #0] - 8000f8a: f003 0302 and.w r3, r3, #2 - 8000f8e: 2b00 cmp r3, #0 - 8000f90: d05a beq.n 8001048 + 8000fd2: 687b ldr r3, [r7, #4] + 8000fd4: 681b ldr r3, [r3, #0] + 8000fd6: f003 0302 and.w r3, r3, #2 + 8000fda: 2b00 cmp r3, #0 + 8000fdc: d05a beq.n 8001094 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI) - 8000f92: 69bb ldr r3, [r7, #24] - 8000f94: 2b04 cmp r3, #4 - 8000f96: d005 beq.n 8000fa4 + 8000fde: 69bb ldr r3, [r7, #24] + 8000fe0: 2b04 cmp r3, #4 + 8000fe2: d005 beq.n 8000ff0 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI))) - 8000f98: 69bb ldr r3, [r7, #24] - 8000f9a: 2b0c cmp r3, #12 - 8000f9c: d119 bne.n 8000fd2 - 8000f9e: 697b ldr r3, [r7, #20] - 8000fa0: 2b00 cmp r3, #0 - 8000fa2: d116 bne.n 8000fd2 + 8000fe4: 69bb ldr r3, [r7, #24] + 8000fe6: 2b0c cmp r3, #12 + 8000fe8: d119 bne.n 800101e + 8000fea: 697b ldr r3, [r7, #20] + 8000fec: 2b00 cmp r3, #0 + 8000fee: d116 bne.n 800101e { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000fa4: 4b46 ldr r3, [pc, #280] @ (80010c0 ) - 8000fa6: 681b ldr r3, [r3, #0] - 8000fa8: f003 0302 and.w r3, r3, #2 - 8000fac: 2b00 cmp r3, #0 - 8000fae: d005 beq.n 8000fbc - 8000fb0: 687b ldr r3, [r7, #4] - 8000fb2: 68db ldr r3, [r3, #12] - 8000fb4: 2b01 cmp r3, #1 - 8000fb6: d001 beq.n 8000fbc + 8000ff0: 4b46 ldr r3, [pc, #280] @ (800110c ) + 8000ff2: 681b ldr r3, [r3, #0] + 8000ff4: f003 0302 and.w r3, r3, #2 + 8000ff8: 2b00 cmp r3, #0 + 8000ffa: d005 beq.n 8001008 + 8000ffc: 687b ldr r3, [r7, #4] + 8000ffe: 68db ldr r3, [r3, #12] + 8001000: 2b01 cmp r3, #1 + 8001002: d001 beq.n 8001008 { return HAL_ERROR; - 8000fb8: 2301 movs r3, #1 - 8000fba: e276 b.n 80014aa + 8001004: 2301 movs r3, #1 + 8001006: e276 b.n 80014f6 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8000fbc: 4b40 ldr r3, [pc, #256] @ (80010c0 ) - 8000fbe: 685b ldr r3, [r3, #4] - 8000fc0: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 - 8000fc4: 687b ldr r3, [r7, #4] - 8000fc6: 691b ldr r3, [r3, #16] - 8000fc8: 021b lsls r3, r3, #8 - 8000fca: 493d ldr r1, [pc, #244] @ (80010c0 ) - 8000fcc: 4313 orrs r3, r2 - 8000fce: 604b str r3, [r1, #4] + 8001008: 4b40 ldr r3, [pc, #256] @ (800110c ) + 800100a: 685b ldr r3, [r3, #4] + 800100c: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 + 8001010: 687b ldr r3, [r7, #4] + 8001012: 691b ldr r3, [r3, #16] + 8001014: 021b lsls r3, r3, #8 + 8001016: 493d ldr r1, [pc, #244] @ (800110c ) + 8001018: 4313 orrs r3, r2 + 800101a: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000fd0: e03a b.n 8001048 + 800101c: e03a b.n 8001094 } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8000fd2: 687b ldr r3, [r7, #4] - 8000fd4: 68db ldr r3, [r3, #12] - 8000fd6: 2b00 cmp r3, #0 - 8000fd8: d020 beq.n 800101c + 800101e: 687b ldr r3, [r7, #4] + 8001020: 68db ldr r3, [r3, #12] + 8001022: 2b00 cmp r3, #0 + 8001024: d020 beq.n 8001068 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8000fda: 4b3a ldr r3, [pc, #232] @ (80010c4 ) - 8000fdc: 2201 movs r2, #1 - 8000fde: 601a str r2, [r3, #0] + 8001026: 4b3a ldr r3, [pc, #232] @ (8001110 ) + 8001028: 2201 movs r2, #1 + 800102a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000fe0: f7ff fca6 bl 8000930 - 8000fe4: 6138 str r0, [r7, #16] + 800102c: f7ff fc84 bl 8000938 + 8001030: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8000fe6: e008 b.n 8000ffa + 8001032: e008 b.n 8001046 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8000fe8: f7ff fca2 bl 8000930 - 8000fec: 4602 mov r2, r0 - 8000fee: 693b ldr r3, [r7, #16] - 8000ff0: 1ad3 subs r3, r2, r3 - 8000ff2: 2b02 cmp r3, #2 - 8000ff4: d901 bls.n 8000ffa + 8001034: f7ff fc80 bl 8000938 + 8001038: 4602 mov r2, r0 + 800103a: 693b ldr r3, [r7, #16] + 800103c: 1ad3 subs r3, r2, r3 + 800103e: 2b02 cmp r3, #2 + 8001040: d901 bls.n 8001046 { return HAL_TIMEOUT; - 8000ff6: 2303 movs r3, #3 - 8000ff8: e257 b.n 80014aa + 8001042: 2303 movs r3, #3 + 8001044: e257 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8000ffa: 4b31 ldr r3, [pc, #196] @ (80010c0 ) - 8000ffc: 681b ldr r3, [r3, #0] - 8000ffe: f003 0302 and.w r3, r3, #2 - 8001002: 2b00 cmp r3, #0 - 8001004: d0f0 beq.n 8000fe8 + 8001046: 4b31 ldr r3, [pc, #196] @ (800110c ) + 8001048: 681b ldr r3, [r3, #0] + 800104a: f003 0302 and.w r3, r3, #2 + 800104e: 2b00 cmp r3, #0 + 8001050: d0f0 beq.n 8001034 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8001006: 4b2e ldr r3, [pc, #184] @ (80010c0 ) - 8001008: 685b ldr r3, [r3, #4] - 800100a: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 - 800100e: 687b ldr r3, [r7, #4] - 8001010: 691b ldr r3, [r3, #16] - 8001012: 021b lsls r3, r3, #8 - 8001014: 492a ldr r1, [pc, #168] @ (80010c0 ) - 8001016: 4313 orrs r3, r2 - 8001018: 604b str r3, [r1, #4] - 800101a: e015 b.n 8001048 + 8001052: 4b2e ldr r3, [pc, #184] @ (800110c ) + 8001054: 685b ldr r3, [r3, #4] + 8001056: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 + 800105a: 687b ldr r3, [r7, #4] + 800105c: 691b ldr r3, [r3, #16] + 800105e: 021b lsls r3, r3, #8 + 8001060: 492a ldr r1, [pc, #168] @ (800110c ) + 8001062: 4313 orrs r3, r2 + 8001064: 604b str r3, [r1, #4] + 8001066: e015 b.n 8001094 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 800101c: 4b29 ldr r3, [pc, #164] @ (80010c4 ) - 800101e: 2200 movs r2, #0 - 8001020: 601a str r2, [r3, #0] + 8001068: 4b29 ldr r3, [pc, #164] @ (8001110 ) + 800106a: 2200 movs r2, #0 + 800106c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001022: f7ff fc85 bl 8000930 - 8001026: 6138 str r0, [r7, #16] + 800106e: f7ff fc63 bl 8000938 + 8001072: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 8001028: e008 b.n 800103c + 8001074: e008 b.n 8001088 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800102a: f7ff fc81 bl 8000930 - 800102e: 4602 mov r2, r0 - 8001030: 693b ldr r3, [r7, #16] - 8001032: 1ad3 subs r3, r2, r3 - 8001034: 2b02 cmp r3, #2 - 8001036: d901 bls.n 800103c + 8001076: f7ff fc5f bl 8000938 + 800107a: 4602 mov r2, r0 + 800107c: 693b ldr r3, [r7, #16] + 800107e: 1ad3 subs r3, r2, r3 + 8001080: 2b02 cmp r3, #2 + 8001082: d901 bls.n 8001088 { return HAL_TIMEOUT; - 8001038: 2303 movs r3, #3 - 800103a: e236 b.n 80014aa + 8001084: 2303 movs r3, #3 + 8001086: e236 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 800103c: 4b20 ldr r3, [pc, #128] @ (80010c0 ) - 800103e: 681b ldr r3, [r3, #0] - 8001040: f003 0302 and.w r3, r3, #2 - 8001044: 2b00 cmp r3, #0 - 8001046: d1f0 bne.n 800102a + 8001088: 4b20 ldr r3, [pc, #128] @ (800110c ) + 800108a: 681b ldr r3, [r3, #0] + 800108c: f003 0302 and.w r3, r3, #2 + 8001090: 2b00 cmp r3, #0 + 8001092: d1f0 bne.n 8001076 } } } } /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - 8001048: 687b ldr r3, [r7, #4] - 800104a: 681b ldr r3, [r3, #0] - 800104c: f003 0310 and.w r3, r3, #16 - 8001050: 2b00 cmp r3, #0 - 8001052: f000 80b8 beq.w 80011c6 + 8001094: 687b ldr r3, [r7, #4] + 8001096: 681b ldr r3, [r3, #0] + 8001098: f003 0310 and.w r3, r3, #16 + 800109c: 2b00 cmp r3, #0 + 800109e: f000 80b8 beq.w 8001212 { /* When the MSI is used as system clock it will not be disabled */ if(sysclk_source == RCC_CFGR_SWS_MSI) - 8001056: 69bb ldr r3, [r7, #24] - 8001058: 2b00 cmp r3, #0 - 800105a: d170 bne.n 800113e + 80010a2: 69bb ldr r3, [r7, #24] + 80010a4: 2b00 cmp r3, #0 + 80010a6: d170 bne.n 800118a { if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - 800105c: 4b18 ldr r3, [pc, #96] @ (80010c0 ) - 800105e: 681b ldr r3, [r3, #0] - 8001060: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001064: 2b00 cmp r3, #0 - 8001066: d005 beq.n 8001074 - 8001068: 687b ldr r3, [r7, #4] - 800106a: 699b ldr r3, [r3, #24] - 800106c: 2b00 cmp r3, #0 - 800106e: d101 bne.n 8001074 + 80010a8: 4b18 ldr r3, [pc, #96] @ (800110c ) + 80010aa: 681b ldr r3, [r3, #0] + 80010ac: f403 7300 and.w r3, r3, #512 @ 0x200 + 80010b0: 2b00 cmp r3, #0 + 80010b2: d005 beq.n 80010c0 + 80010b4: 687b ldr r3, [r7, #4] + 80010b6: 699b ldr r3, [r3, #24] + 80010b8: 2b00 cmp r3, #0 + 80010ba: d101 bne.n 80010c0 { return HAL_ERROR; - 8001070: 2301 movs r3, #1 - 8001072: e21a b.n 80014aa + 80010bc: 2301 movs r3, #1 + 80010be: e21a b.n 80014f6 assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) - 8001074: 687b ldr r3, [r7, #4] - 8001076: 6a1a ldr r2, [r3, #32] - 8001078: 4b11 ldr r3, [pc, #68] @ (80010c0 ) - 800107a: 685b ldr r3, [r3, #4] - 800107c: f403 4360 and.w r3, r3, #57344 @ 0xe000 - 8001080: 429a cmp r2, r3 - 8001082: d921 bls.n 80010c8 + 80010c0: 687b ldr r3, [r7, #4] + 80010c2: 6a1a ldr r2, [r3, #32] + 80010c4: 4b11 ldr r3, [pc, #68] @ (800110c ) + 80010c6: 685b ldr r3, [r3, #4] + 80010c8: f403 4360 and.w r3, r3, #57344 @ 0xe000 + 80010cc: 429a cmp r2, r3 + 80010ce: d921 bls.n 8001114 { /* First increase number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - 8001084: 687b ldr r3, [r7, #4] - 8001086: 6a1b ldr r3, [r3, #32] - 8001088: 4618 mov r0, r3 - 800108a: f000 fc7d bl 8001988 - 800108e: 4603 mov r3, r0 - 8001090: 2b00 cmp r3, #0 - 8001092: d001 beq.n 8001098 + 80010d0: 687b ldr r3, [r7, #4] + 80010d2: 6a1b ldr r3, [r3, #32] + 80010d4: 4618 mov r0, r3 + 80010d6: f000 fc7d bl 80019d4 + 80010da: 4603 mov r3, r0 + 80010dc: 2b00 cmp r3, #0 + 80010de: d001 beq.n 80010e4 { return HAL_ERROR; - 8001094: 2301 movs r3, #1 - 8001096: e208 b.n 80014aa + 80010e0: 2301 movs r3, #1 + 80010e2: e208 b.n 80014f6 } /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 8001098: 4b09 ldr r3, [pc, #36] @ (80010c0 ) - 800109a: 685b ldr r3, [r3, #4] - 800109c: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 80010a0: 687b ldr r3, [r7, #4] - 80010a2: 6a1b ldr r3, [r3, #32] - 80010a4: 4906 ldr r1, [pc, #24] @ (80010c0 ) - 80010a6: 4313 orrs r3, r2 - 80010a8: 604b str r3, [r1, #4] + 80010e4: 4b09 ldr r3, [pc, #36] @ (800110c ) + 80010e6: 685b ldr r3, [r3, #4] + 80010e8: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 80010ec: 687b ldr r3, [r7, #4] + 80010ee: 6a1b ldr r3, [r3, #32] + 80010f0: 4906 ldr r1, [pc, #24] @ (800110c ) + 80010f2: 4313 orrs r3, r2 + 80010f4: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 80010aa: 4b05 ldr r3, [pc, #20] @ (80010c0 ) - 80010ac: 685b ldr r3, [r3, #4] - 80010ae: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 80010b2: 687b ldr r3, [r7, #4] - 80010b4: 69db ldr r3, [r3, #28] - 80010b6: 061b lsls r3, r3, #24 - 80010b8: 4901 ldr r1, [pc, #4] @ (80010c0 ) - 80010ba: 4313 orrs r3, r2 - 80010bc: 604b str r3, [r1, #4] - 80010be: e020 b.n 8001102 - 80010c0: 40023800 .word 0x40023800 - 80010c4: 42470000 .word 0x42470000 + 80010f6: 4b05 ldr r3, [pc, #20] @ (800110c ) + 80010f8: 685b ldr r3, [r3, #4] + 80010fa: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 80010fe: 687b ldr r3, [r7, #4] + 8001100: 69db ldr r3, [r3, #28] + 8001102: 061b lsls r3, r3, #24 + 8001104: 4901 ldr r1, [pc, #4] @ (800110c ) + 8001106: 4313 orrs r3, r2 + 8001108: 604b str r3, [r1, #4] + 800110a: e020 b.n 800114e + 800110c: 40023800 .word 0x40023800 + 8001110: 42470000 .word 0x42470000 } else { /* Else, keep current flash latency while decreasing applies */ /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 80010c8: 4b99 ldr r3, [pc, #612] @ (8001330 ) - 80010ca: 685b ldr r3, [r3, #4] - 80010cc: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 80010d0: 687b ldr r3, [r7, #4] - 80010d2: 6a1b ldr r3, [r3, #32] - 80010d4: 4996 ldr r1, [pc, #600] @ (8001330 ) - 80010d6: 4313 orrs r3, r2 - 80010d8: 604b str r3, [r1, #4] + 8001114: 4b99 ldr r3, [pc, #612] @ (800137c ) + 8001116: 685b ldr r3, [r3, #4] + 8001118: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 800111c: 687b ldr r3, [r7, #4] + 800111e: 6a1b ldr r3, [r3, #32] + 8001120: 4996 ldr r1, [pc, #600] @ (800137c ) + 8001122: 4313 orrs r3, r2 + 8001124: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 80010da: 4b95 ldr r3, [pc, #596] @ (8001330 ) - 80010dc: 685b ldr r3, [r3, #4] - 80010de: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 80010e2: 687b ldr r3, [r7, #4] - 80010e4: 69db ldr r3, [r3, #28] - 80010e6: 061b lsls r3, r3, #24 - 80010e8: 4991 ldr r1, [pc, #580] @ (8001330 ) - 80010ea: 4313 orrs r3, r2 - 80010ec: 604b str r3, [r1, #4] + 8001126: 4b95 ldr r3, [pc, #596] @ (800137c ) + 8001128: 685b ldr r3, [r3, #4] + 800112a: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 800112e: 687b ldr r3, [r7, #4] + 8001130: 69db ldr r3, [r3, #28] + 8001132: 061b lsls r3, r3, #24 + 8001134: 4991 ldr r1, [pc, #580] @ (800137c ) + 8001136: 4313 orrs r3, r2 + 8001138: 604b str r3, [r1, #4] /* Decrease number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - 80010ee: 687b ldr r3, [r7, #4] - 80010f0: 6a1b ldr r3, [r3, #32] - 80010f2: 4618 mov r0, r3 - 80010f4: f000 fc48 bl 8001988 - 80010f8: 4603 mov r3, r0 - 80010fa: 2b00 cmp r3, #0 - 80010fc: d001 beq.n 8001102 + 800113a: 687b ldr r3, [r7, #4] + 800113c: 6a1b ldr r3, [r3, #32] + 800113e: 4618 mov r0, r3 + 8001140: f000 fc48 bl 80019d4 + 8001144: 4603 mov r3, r0 + 8001146: 2b00 cmp r3, #0 + 8001148: d001 beq.n 800114e { return HAL_ERROR; - 80010fe: 2301 movs r3, #1 - 8001100: e1d3 b.n 80014aa + 800114a: 2301 movs r3, #1 + 800114c: e1d3 b.n 80014f6 } } /* Update the SystemCoreClock global variable */ SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8001102: 687b ldr r3, [r7, #4] - 8001104: 6a1b ldr r3, [r3, #32] - 8001106: 0b5b lsrs r3, r3, #13 - 8001108: 3301 adds r3, #1 - 800110a: f44f 4200 mov.w r2, #32768 @ 0x8000 - 800110e: fa02 f303 lsl.w r3, r2, r3 + 800114e: 687b ldr r3, [r7, #4] + 8001150: 6a1b ldr r3, [r3, #32] + 8001152: 0b5b lsrs r3, r3, #13 + 8001154: 3301 adds r3, #1 + 8001156: f44f 4200 mov.w r2, #32768 @ 0x8000 + 800115a: fa02 f303 lsl.w r3, r2, r3 >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; - 8001112: 4a87 ldr r2, [pc, #540] @ (8001330 ) - 8001114: 6892 ldr r2, [r2, #8] - 8001116: 0912 lsrs r2, r2, #4 - 8001118: f002 020f and.w r2, r2, #15 - 800111c: 4985 ldr r1, [pc, #532] @ (8001334 ) - 800111e: 5c8a ldrb r2, [r1, r2] - 8001120: 40d3 lsrs r3, r2 + 800115e: 4a87 ldr r2, [pc, #540] @ (800137c ) + 8001160: 6892 ldr r2, [r2, #8] + 8001162: 0912 lsrs r2, r2, #4 + 8001164: f002 020f and.w r2, r2, #15 + 8001168: 4985 ldr r1, [pc, #532] @ (8001380 ) + 800116a: 5c8a ldrb r2, [r1, r2] + 800116c: 40d3 lsrs r3, r2 SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8001122: 4a85 ldr r2, [pc, #532] @ (8001338 ) - 8001124: 6013 str r3, [r2, #0] + 800116e: 4a85 ldr r2, [pc, #532] @ (8001384 ) + 8001170: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 8001126: 4b85 ldr r3, [pc, #532] @ (800133c ) - 8001128: 681b ldr r3, [r3, #0] - 800112a: 4618 mov r0, r3 - 800112c: f7ff fbb4 bl 8000898 - 8001130: 4603 mov r3, r0 - 8001132: 73fb strb r3, [r7, #15] + 8001172: 4b85 ldr r3, [pc, #532] @ (8001388 ) + 8001174: 681b ldr r3, [r3, #0] + 8001176: 4618 mov r0, r3 + 8001178: f7ff fb92 bl 80008a0 + 800117c: 4603 mov r3, r0 + 800117e: 73fb strb r3, [r7, #15] if(status != HAL_OK) - 8001134: 7bfb ldrb r3, [r7, #15] - 8001136: 2b00 cmp r3, #0 - 8001138: d045 beq.n 80011c6 + 8001180: 7bfb ldrb r3, [r7, #15] + 8001182: 2b00 cmp r3, #0 + 8001184: d045 beq.n 8001212 { return status; - 800113a: 7bfb ldrb r3, [r7, #15] - 800113c: e1b5 b.n 80014aa + 8001186: 7bfb ldrb r3, [r7, #15] + 8001188: e1b5 b.n 80014f6 { /* Check MSI State */ assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); /* Check the MSI State */ if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - 800113e: 687b ldr r3, [r7, #4] - 8001140: 699b ldr r3, [r3, #24] - 8001142: 2b00 cmp r3, #0 - 8001144: d029 beq.n 800119a + 800118a: 687b ldr r3, [r7, #4] + 800118c: 699b ldr r3, [r3, #24] + 800118e: 2b00 cmp r3, #0 + 8001190: d029 beq.n 80011e6 { /* Enable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_ENABLE(); - 8001146: 4b7e ldr r3, [pc, #504] @ (8001340 ) - 8001148: 2201 movs r2, #1 - 800114a: 601a str r2, [r3, #0] + 8001192: 4b7e ldr r3, [pc, #504] @ (800138c ) + 8001194: 2201 movs r2, #1 + 8001196: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800114c: f7ff fbf0 bl 8000930 - 8001150: 6138 str r0, [r7, #16] + 8001198: f7ff fbce bl 8000938 + 800119c: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8001152: e008 b.n 8001166 + 800119e: e008 b.n 80011b2 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8001154: f7ff fbec bl 8000930 - 8001158: 4602 mov r2, r0 - 800115a: 693b ldr r3, [r7, #16] - 800115c: 1ad3 subs r3, r2, r3 - 800115e: 2b02 cmp r3, #2 - 8001160: d901 bls.n 8001166 + 80011a0: f7ff fbca bl 8000938 + 80011a4: 4602 mov r2, r0 + 80011a6: 693b ldr r3, [r7, #16] + 80011a8: 1ad3 subs r3, r2, r3 + 80011aa: 2b02 cmp r3, #2 + 80011ac: d901 bls.n 80011b2 { return HAL_TIMEOUT; - 8001162: 2303 movs r3, #3 - 8001164: e1a1 b.n 80014aa + 80011ae: 2303 movs r3, #3 + 80011b0: e1a1 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8001166: 4b72 ldr r3, [pc, #456] @ (8001330 ) - 8001168: 681b ldr r3, [r3, #0] - 800116a: f403 7300 and.w r3, r3, #512 @ 0x200 - 800116e: 2b00 cmp r3, #0 - 8001170: d0f0 beq.n 8001154 + 80011b2: 4b72 ldr r3, [pc, #456] @ (800137c ) + 80011b4: 681b ldr r3, [r3, #0] + 80011b6: f403 7300 and.w r3, r3, #512 @ 0x200 + 80011ba: 2b00 cmp r3, #0 + 80011bc: d0f0 beq.n 80011a0 /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 8001172: 4b6f ldr r3, [pc, #444] @ (8001330 ) - 8001174: 685b ldr r3, [r3, #4] - 8001176: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 800117a: 687b ldr r3, [r7, #4] - 800117c: 6a1b ldr r3, [r3, #32] - 800117e: 496c ldr r1, [pc, #432] @ (8001330 ) - 8001180: 4313 orrs r3, r2 - 8001182: 604b str r3, [r1, #4] + 80011be: 4b6f ldr r3, [pc, #444] @ (800137c ) + 80011c0: 685b ldr r3, [r3, #4] + 80011c2: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 80011c6: 687b ldr r3, [r7, #4] + 80011c8: 6a1b ldr r3, [r3, #32] + 80011ca: 496c ldr r1, [pc, #432] @ (800137c ) + 80011cc: 4313 orrs r3, r2 + 80011ce: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8001184: 4b6a ldr r3, [pc, #424] @ (8001330 ) - 8001186: 685b ldr r3, [r3, #4] - 8001188: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 800118c: 687b ldr r3, [r7, #4] - 800118e: 69db ldr r3, [r3, #28] - 8001190: 061b lsls r3, r3, #24 - 8001192: 4967 ldr r1, [pc, #412] @ (8001330 ) - 8001194: 4313 orrs r3, r2 - 8001196: 604b str r3, [r1, #4] - 8001198: e015 b.n 80011c6 + 80011d0: 4b6a ldr r3, [pc, #424] @ (800137c ) + 80011d2: 685b ldr r3, [r3, #4] + 80011d4: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 80011d8: 687b ldr r3, [r7, #4] + 80011da: 69db ldr r3, [r3, #28] + 80011dc: 061b lsls r3, r3, #24 + 80011de: 4967 ldr r1, [pc, #412] @ (800137c ) + 80011e0: 4313 orrs r3, r2 + 80011e2: 604b str r3, [r1, #4] + 80011e4: e015 b.n 8001212 } else { /* Disable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_DISABLE(); - 800119a: 4b69 ldr r3, [pc, #420] @ (8001340 ) - 800119c: 2200 movs r2, #0 - 800119e: 601a str r2, [r3, #0] + 80011e6: 4b69 ldr r3, [pc, #420] @ (800138c ) + 80011e8: 2200 movs r2, #0 + 80011ea: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80011a0: f7ff fbc6 bl 8000930 - 80011a4: 6138 str r0, [r7, #16] + 80011ec: f7ff fba4 bl 8000938 + 80011f0: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 80011a6: e008 b.n 80011ba + 80011f2: e008 b.n 8001206 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 80011a8: f7ff fbc2 bl 8000930 - 80011ac: 4602 mov r2, r0 - 80011ae: 693b ldr r3, [r7, #16] - 80011b0: 1ad3 subs r3, r2, r3 - 80011b2: 2b02 cmp r3, #2 - 80011b4: d901 bls.n 80011ba + 80011f4: f7ff fba0 bl 8000938 + 80011f8: 4602 mov r2, r0 + 80011fa: 693b ldr r3, [r7, #16] + 80011fc: 1ad3 subs r3, r2, r3 + 80011fe: 2b02 cmp r3, #2 + 8001200: d901 bls.n 8001206 { return HAL_TIMEOUT; - 80011b6: 2303 movs r3, #3 - 80011b8: e177 b.n 80014aa + 8001202: 2303 movs r3, #3 + 8001204: e177 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 80011ba: 4b5d ldr r3, [pc, #372] @ (8001330 ) - 80011bc: 681b ldr r3, [r3, #0] - 80011be: f403 7300 and.w r3, r3, #512 @ 0x200 - 80011c2: 2b00 cmp r3, #0 - 80011c4: d1f0 bne.n 80011a8 + 8001206: 4b5d ldr r3, [pc, #372] @ (800137c ) + 8001208: 681b ldr r3, [r3, #0] + 800120a: f403 7300 and.w r3, r3, #512 @ 0x200 + 800120e: 2b00 cmp r3, #0 + 8001210: d1f0 bne.n 80011f4 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80011c6: 687b ldr r3, [r7, #4] - 80011c8: 681b ldr r3, [r3, #0] - 80011ca: f003 0308 and.w r3, r3, #8 - 80011ce: 2b00 cmp r3, #0 - 80011d0: d030 beq.n 8001234 + 8001212: 687b ldr r3, [r7, #4] + 8001214: 681b ldr r3, [r3, #0] + 8001216: f003 0308 and.w r3, r3, #8 + 800121a: 2b00 cmp r3, #0 + 800121c: d030 beq.n 8001280 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80011d2: 687b ldr r3, [r7, #4] - 80011d4: 695b ldr r3, [r3, #20] - 80011d6: 2b00 cmp r3, #0 - 80011d8: d016 beq.n 8001208 + 800121e: 687b ldr r3, [r7, #4] + 8001220: 695b ldr r3, [r3, #20] + 8001222: 2b00 cmp r3, #0 + 8001224: d016 beq.n 8001254 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80011da: 4b5a ldr r3, [pc, #360] @ (8001344 ) - 80011dc: 2201 movs r2, #1 - 80011de: 601a str r2, [r3, #0] + 8001226: 4b5a ldr r3, [pc, #360] @ (8001390 ) + 8001228: 2201 movs r2, #1 + 800122a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80011e0: f7ff fba6 bl 8000930 - 80011e4: 6138 str r0, [r7, #16] + 800122c: f7ff fb84 bl 8000938 + 8001230: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 80011e6: e008 b.n 80011fa + 8001232: e008 b.n 8001246 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80011e8: f7ff fba2 bl 8000930 - 80011ec: 4602 mov r2, r0 - 80011ee: 693b ldr r3, [r7, #16] - 80011f0: 1ad3 subs r3, r2, r3 - 80011f2: 2b02 cmp r3, #2 - 80011f4: d901 bls.n 80011fa + 8001234: f7ff fb80 bl 8000938 + 8001238: 4602 mov r2, r0 + 800123a: 693b ldr r3, [r7, #16] + 800123c: 1ad3 subs r3, r2, r3 + 800123e: 2b02 cmp r3, #2 + 8001240: d901 bls.n 8001246 { return HAL_TIMEOUT; - 80011f6: 2303 movs r3, #3 - 80011f8: e157 b.n 80014aa + 8001242: 2303 movs r3, #3 + 8001244: e157 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 80011fa: 4b4d ldr r3, [pc, #308] @ (8001330 ) - 80011fc: 6b5b ldr r3, [r3, #52] @ 0x34 - 80011fe: f003 0302 and.w r3, r3, #2 - 8001202: 2b00 cmp r3, #0 - 8001204: d0f0 beq.n 80011e8 - 8001206: e015 b.n 8001234 + 8001246: 4b4d ldr r3, [pc, #308] @ (800137c ) + 8001248: 6b5b ldr r3, [r3, #52] @ 0x34 + 800124a: f003 0302 and.w r3, r3, #2 + 800124e: 2b00 cmp r3, #0 + 8001250: d0f0 beq.n 8001234 + 8001252: e015 b.n 8001280 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8001208: 4b4e ldr r3, [pc, #312] @ (8001344 ) - 800120a: 2200 movs r2, #0 - 800120c: 601a str r2, [r3, #0] + 8001254: 4b4e ldr r3, [pc, #312] @ (8001390 ) + 8001256: 2200 movs r2, #0 + 8001258: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800120e: f7ff fb8f bl 8000930 - 8001212: 6138 str r0, [r7, #16] + 800125a: f7ff fb6d bl 8000938 + 800125e: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8001214: e008 b.n 8001228 + 8001260: e008 b.n 8001274 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8001216: f7ff fb8b bl 8000930 - 800121a: 4602 mov r2, r0 - 800121c: 693b ldr r3, [r7, #16] - 800121e: 1ad3 subs r3, r2, r3 - 8001220: 2b02 cmp r3, #2 - 8001222: d901 bls.n 8001228 + 8001262: f7ff fb69 bl 8000938 + 8001266: 4602 mov r2, r0 + 8001268: 693b ldr r3, [r7, #16] + 800126a: 1ad3 subs r3, r2, r3 + 800126c: 2b02 cmp r3, #2 + 800126e: d901 bls.n 8001274 { return HAL_TIMEOUT; - 8001224: 2303 movs r3, #3 - 8001226: e140 b.n 80014aa + 8001270: 2303 movs r3, #3 + 8001272: e140 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8001228: 4b41 ldr r3, [pc, #260] @ (8001330 ) - 800122a: 6b5b ldr r3, [r3, #52] @ 0x34 - 800122c: f003 0302 and.w r3, r3, #2 - 8001230: 2b00 cmp r3, #0 - 8001232: d1f0 bne.n 8001216 + 8001274: 4b41 ldr r3, [pc, #260] @ (800137c ) + 8001276: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001278: f003 0302 and.w r3, r3, #2 + 800127c: 2b00 cmp r3, #0 + 800127e: d1f0 bne.n 8001262 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8001234: 687b ldr r3, [r7, #4] - 8001236: 681b ldr r3, [r3, #0] - 8001238: f003 0304 and.w r3, r3, #4 - 800123c: 2b00 cmp r3, #0 - 800123e: f000 80b5 beq.w 80013ac + 8001280: 687b ldr r3, [r7, #4] + 8001282: 681b ldr r3, [r3, #0] + 8001284: f003 0304 and.w r3, r3, #4 + 8001288: 2b00 cmp r3, #0 + 800128a: f000 80b5 beq.w 80013f8 { FlagStatus pwrclkchanged = RESET; - 8001242: 2300 movs r3, #0 - 8001244: 77fb strb r3, [r7, #31] + 800128e: 2300 movs r3, #0 + 8001290: 77fb strb r3, [r7, #31] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8001246: 4b3a ldr r3, [pc, #232] @ (8001330 ) - 8001248: 6a5b ldr r3, [r3, #36] @ 0x24 - 800124a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800124e: 2b00 cmp r3, #0 - 8001250: d10d bne.n 800126e + 8001292: 4b3a ldr r3, [pc, #232] @ (800137c ) + 8001294: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001296: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 800129a: 2b00 cmp r3, #0 + 800129c: d10d bne.n 80012ba { __HAL_RCC_PWR_CLK_ENABLE(); - 8001252: 4b37 ldr r3, [pc, #220] @ (8001330 ) - 8001254: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001256: 4a36 ldr r2, [pc, #216] @ (8001330 ) - 8001258: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 800125c: 6253 str r3, [r2, #36] @ 0x24 - 800125e: 4b34 ldr r3, [pc, #208] @ (8001330 ) - 8001260: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001262: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8001266: 60bb str r3, [r7, #8] - 8001268: 68bb ldr r3, [r7, #8] + 800129e: 4b37 ldr r3, [pc, #220] @ (800137c ) + 80012a0: 6a5b ldr r3, [r3, #36] @ 0x24 + 80012a2: 4a36 ldr r2, [pc, #216] @ (800137c ) + 80012a4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80012a8: 6253 str r3, [r2, #36] @ 0x24 + 80012aa: 4b34 ldr r3, [pc, #208] @ (800137c ) + 80012ac: 6a5b ldr r3, [r3, #36] @ 0x24 + 80012ae: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80012b2: 60bb str r3, [r7, #8] + 80012b4: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 800126a: 2301 movs r3, #1 - 800126c: 77fb strb r3, [r7, #31] + 80012b6: 2301 movs r3, #1 + 80012b8: 77fb strb r3, [r7, #31] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800126e: 4b36 ldr r3, [pc, #216] @ (8001348 ) - 8001270: 681b ldr r3, [r3, #0] - 8001272: f403 7380 and.w r3, r3, #256 @ 0x100 - 8001276: 2b00 cmp r3, #0 - 8001278: d118 bne.n 80012ac + 80012ba: 4b36 ldr r3, [pc, #216] @ (8001394 ) + 80012bc: 681b ldr r3, [r3, #0] + 80012be: f403 7380 and.w r3, r3, #256 @ 0x100 + 80012c2: 2b00 cmp r3, #0 + 80012c4: d118 bne.n 80012f8 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 800127a: 4b33 ldr r3, [pc, #204] @ (8001348 ) - 800127c: 681b ldr r3, [r3, #0] - 800127e: 4a32 ldr r2, [pc, #200] @ (8001348 ) - 8001280: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8001284: 6013 str r3, [r2, #0] + 80012c6: 4b33 ldr r3, [pc, #204] @ (8001394 ) + 80012c8: 681b ldr r3, [r3, #0] + 80012ca: 4a32 ldr r2, [pc, #200] @ (8001394 ) + 80012cc: f443 7380 orr.w r3, r3, #256 @ 0x100 + 80012d0: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8001286: f7ff fb53 bl 8000930 - 800128a: 6138 str r0, [r7, #16] + 80012d2: f7ff fb31 bl 8000938 + 80012d6: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800128c: e008 b.n 80012a0 + 80012d8: e008 b.n 80012ec { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 800128e: f7ff fb4f bl 8000930 - 8001292: 4602 mov r2, r0 - 8001294: 693b ldr r3, [r7, #16] - 8001296: 1ad3 subs r3, r2, r3 - 8001298: 2b64 cmp r3, #100 @ 0x64 - 800129a: d901 bls.n 80012a0 + 80012da: f7ff fb2d bl 8000938 + 80012de: 4602 mov r2, r0 + 80012e0: 693b ldr r3, [r7, #16] + 80012e2: 1ad3 subs r3, r2, r3 + 80012e4: 2b64 cmp r3, #100 @ 0x64 + 80012e6: d901 bls.n 80012ec { return HAL_TIMEOUT; - 800129c: 2303 movs r3, #3 - 800129e: e104 b.n 80014aa + 80012e8: 2303 movs r3, #3 + 80012ea: e104 b.n 80014f6 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80012a0: 4b29 ldr r3, [pc, #164] @ (8001348 ) - 80012a2: 681b ldr r3, [r3, #0] - 80012a4: f403 7380 and.w r3, r3, #256 @ 0x100 - 80012a8: 2b00 cmp r3, #0 - 80012aa: d0f0 beq.n 800128e + 80012ec: 4b29 ldr r3, [pc, #164] @ (8001394 ) + 80012ee: 681b ldr r3, [r3, #0] + 80012f0: f403 7380 and.w r3, r3, #256 @ 0x100 + 80012f4: 2b00 cmp r3, #0 + 80012f6: d0f0 beq.n 80012da } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80012ac: 687b ldr r3, [r7, #4] - 80012ae: 689b ldr r3, [r3, #8] - 80012b0: 2b01 cmp r3, #1 - 80012b2: d106 bne.n 80012c2 - 80012b4: 4b1e ldr r3, [pc, #120] @ (8001330 ) - 80012b6: 6b5b ldr r3, [r3, #52] @ 0x34 - 80012b8: 4a1d ldr r2, [pc, #116] @ (8001330 ) - 80012ba: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80012be: 6353 str r3, [r2, #52] @ 0x34 - 80012c0: e02d b.n 800131e - 80012c2: 687b ldr r3, [r7, #4] - 80012c4: 689b ldr r3, [r3, #8] - 80012c6: 2b00 cmp r3, #0 - 80012c8: d10c bne.n 80012e4 - 80012ca: 4b19 ldr r3, [pc, #100] @ (8001330 ) - 80012cc: 6b5b ldr r3, [r3, #52] @ 0x34 - 80012ce: 4a18 ldr r2, [pc, #96] @ (8001330 ) - 80012d0: f423 7380 bic.w r3, r3, #256 @ 0x100 - 80012d4: 6353 str r3, [r2, #52] @ 0x34 - 80012d6: 4b16 ldr r3, [pc, #88] @ (8001330 ) - 80012d8: 6b5b ldr r3, [r3, #52] @ 0x34 - 80012da: 4a15 ldr r2, [pc, #84] @ (8001330 ) - 80012dc: f423 6380 bic.w r3, r3, #1024 @ 0x400 - 80012e0: 6353 str r3, [r2, #52] @ 0x34 - 80012e2: e01c b.n 800131e - 80012e4: 687b ldr r3, [r7, #4] - 80012e6: 689b ldr r3, [r3, #8] - 80012e8: 2b05 cmp r3, #5 - 80012ea: d10c bne.n 8001306 - 80012ec: 4b10 ldr r3, [pc, #64] @ (8001330 ) - 80012ee: 6b5b ldr r3, [r3, #52] @ 0x34 - 80012f0: 4a0f ldr r2, [pc, #60] @ (8001330 ) - 80012f2: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 80012f6: 6353 str r3, [r2, #52] @ 0x34 - 80012f8: 4b0d ldr r3, [pc, #52] @ (8001330 ) - 80012fa: 6b5b ldr r3, [r3, #52] @ 0x34 - 80012fc: 4a0c ldr r2, [pc, #48] @ (8001330 ) - 80012fe: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8001302: 6353 str r3, [r2, #52] @ 0x34 - 8001304: e00b b.n 800131e - 8001306: 4b0a ldr r3, [pc, #40] @ (8001330 ) - 8001308: 6b5b ldr r3, [r3, #52] @ 0x34 - 800130a: 4a09 ldr r2, [pc, #36] @ (8001330 ) - 800130c: f423 7380 bic.w r3, r3, #256 @ 0x100 - 8001310: 6353 str r3, [r2, #52] @ 0x34 - 8001312: 4b07 ldr r3, [pc, #28] @ (8001330 ) - 8001314: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001316: 4a06 ldr r2, [pc, #24] @ (8001330 ) - 8001318: f423 6380 bic.w r3, r3, #1024 @ 0x400 - 800131c: 6353 str r3, [r2, #52] @ 0x34 + 80012f8: 687b ldr r3, [r7, #4] + 80012fa: 689b ldr r3, [r3, #8] + 80012fc: 2b01 cmp r3, #1 + 80012fe: d106 bne.n 800130e + 8001300: 4b1e ldr r3, [pc, #120] @ (800137c ) + 8001302: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001304: 4a1d ldr r2, [pc, #116] @ (800137c ) + 8001306: f443 7380 orr.w r3, r3, #256 @ 0x100 + 800130a: 6353 str r3, [r2, #52] @ 0x34 + 800130c: e02d b.n 800136a + 800130e: 687b ldr r3, [r7, #4] + 8001310: 689b ldr r3, [r3, #8] + 8001312: 2b00 cmp r3, #0 + 8001314: d10c bne.n 8001330 + 8001316: 4b19 ldr r3, [pc, #100] @ (800137c ) + 8001318: 6b5b ldr r3, [r3, #52] @ 0x34 + 800131a: 4a18 ldr r2, [pc, #96] @ (800137c ) + 800131c: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8001320: 6353 str r3, [r2, #52] @ 0x34 + 8001322: 4b16 ldr r3, [pc, #88] @ (800137c ) + 8001324: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001326: 4a15 ldr r2, [pc, #84] @ (800137c ) + 8001328: f423 6380 bic.w r3, r3, #1024 @ 0x400 + 800132c: 6353 str r3, [r2, #52] @ 0x34 + 800132e: e01c b.n 800136a + 8001330: 687b ldr r3, [r7, #4] + 8001332: 689b ldr r3, [r3, #8] + 8001334: 2b05 cmp r3, #5 + 8001336: d10c bne.n 8001352 + 8001338: 4b10 ldr r3, [pc, #64] @ (800137c ) + 800133a: 6b5b ldr r3, [r3, #52] @ 0x34 + 800133c: 4a0f ldr r2, [pc, #60] @ (800137c ) + 800133e: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 8001342: 6353 str r3, [r2, #52] @ 0x34 + 8001344: 4b0d ldr r3, [pc, #52] @ (800137c ) + 8001346: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001348: 4a0c ldr r2, [pc, #48] @ (800137c ) + 800134a: f443 7380 orr.w r3, r3, #256 @ 0x100 + 800134e: 6353 str r3, [r2, #52] @ 0x34 + 8001350: e00b b.n 800136a + 8001352: 4b0a ldr r3, [pc, #40] @ (800137c ) + 8001354: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001356: 4a09 ldr r2, [pc, #36] @ (800137c ) + 8001358: f423 7380 bic.w r3, r3, #256 @ 0x100 + 800135c: 6353 str r3, [r2, #52] @ 0x34 + 800135e: 4b07 ldr r3, [pc, #28] @ (800137c ) + 8001360: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001362: 4a06 ldr r2, [pc, #24] @ (800137c ) + 8001364: f423 6380 bic.w r3, r3, #1024 @ 0x400 + 8001368: 6353 str r3, [r2, #52] @ 0x34 /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 800131e: 687b ldr r3, [r7, #4] - 8001320: 689b ldr r3, [r3, #8] - 8001322: 2b00 cmp r3, #0 - 8001324: d024 beq.n 8001370 + 800136a: 687b ldr r3, [r7, #4] + 800136c: 689b ldr r3, [r3, #8] + 800136e: 2b00 cmp r3, #0 + 8001370: d024 beq.n 80013bc { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001326: f7ff fb03 bl 8000930 - 800132a: 6138 str r0, [r7, #16] + 8001372: f7ff fae1 bl 8000938 + 8001376: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 800132c: e019 b.n 8001362 - 800132e: bf00 nop - 8001330: 40023800 .word 0x40023800 - 8001334: 08001d2c .word 0x08001d2c - 8001338: 20000000 .word 0x20000000 - 800133c: 20000004 .word 0x20000004 - 8001340: 42470020 .word 0x42470020 - 8001344: 42470680 .word 0x42470680 - 8001348: 40007000 .word 0x40007000 + 8001378: e019 b.n 80013ae + 800137a: bf00 nop + 800137c: 40023800 .word 0x40023800 + 8001380: 08001d78 .word 0x08001d78 + 8001384: 20000000 .word 0x20000000 + 8001388: 20000004 .word 0x20000004 + 800138c: 42470020 .word 0x42470020 + 8001390: 42470680 .word 0x42470680 + 8001394: 40007000 .word 0x40007000 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 800134c: f7ff faf0 bl 8000930 - 8001350: 4602 mov r2, r0 - 8001352: 693b ldr r3, [r7, #16] - 8001354: 1ad3 subs r3, r2, r3 - 8001356: f241 3288 movw r2, #5000 @ 0x1388 - 800135a: 4293 cmp r3, r2 - 800135c: d901 bls.n 8001362 + 8001398: f7ff face bl 8000938 + 800139c: 4602 mov r2, r0 + 800139e: 693b ldr r3, [r7, #16] + 80013a0: 1ad3 subs r3, r2, r3 + 80013a2: f241 3288 movw r2, #5000 @ 0x1388 + 80013a6: 4293 cmp r3, r2 + 80013a8: d901 bls.n 80013ae { return HAL_TIMEOUT; - 800135e: 2303 movs r3, #3 - 8001360: e0a3 b.n 80014aa + 80013aa: 2303 movs r3, #3 + 80013ac: e0a3 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8001362: 4b54 ldr r3, [pc, #336] @ (80014b4 ) - 8001364: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001366: f403 7300 and.w r3, r3, #512 @ 0x200 - 800136a: 2b00 cmp r3, #0 - 800136c: d0ee beq.n 800134c - 800136e: e014 b.n 800139a + 80013ae: 4b54 ldr r3, [pc, #336] @ (8001500 ) + 80013b0: 6b5b ldr r3, [r3, #52] @ 0x34 + 80013b2: f403 7300 and.w r3, r3, #512 @ 0x200 + 80013b6: 2b00 cmp r3, #0 + 80013b8: d0ee beq.n 8001398 + 80013ba: e014 b.n 80013e6 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001370: f7ff fade bl 8000930 - 8001374: 6138 str r0, [r7, #16] + 80013bc: f7ff fabc bl 8000938 + 80013c0: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 8001376: e00a b.n 800138e + 80013c2: e00a b.n 80013da { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001378: f7ff fada bl 8000930 - 800137c: 4602 mov r2, r0 - 800137e: 693b ldr r3, [r7, #16] - 8001380: 1ad3 subs r3, r2, r3 - 8001382: f241 3288 movw r2, #5000 @ 0x1388 - 8001386: 4293 cmp r3, r2 - 8001388: d901 bls.n 800138e + 80013c4: f7ff fab8 bl 8000938 + 80013c8: 4602 mov r2, r0 + 80013ca: 693b ldr r3, [r7, #16] + 80013cc: 1ad3 subs r3, r2, r3 + 80013ce: f241 3288 movw r2, #5000 @ 0x1388 + 80013d2: 4293 cmp r3, r2 + 80013d4: d901 bls.n 80013da { return HAL_TIMEOUT; - 800138a: 2303 movs r3, #3 - 800138c: e08d b.n 80014aa + 80013d6: 2303 movs r3, #3 + 80013d8: e08d b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 800138e: 4b49 ldr r3, [pc, #292] @ (80014b4 ) - 8001390: 6b5b ldr r3, [r3, #52] @ 0x34 - 8001392: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001396: 2b00 cmp r3, #0 - 8001398: d1ee bne.n 8001378 + 80013da: 4b49 ldr r3, [pc, #292] @ (8001500 ) + 80013dc: 6b5b ldr r3, [r3, #52] @ 0x34 + 80013de: f403 7300 and.w r3, r3, #512 @ 0x200 + 80013e2: 2b00 cmp r3, #0 + 80013e4: d1ee bne.n 80013c4 } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 800139a: 7ffb ldrb r3, [r7, #31] - 800139c: 2b01 cmp r3, #1 - 800139e: d105 bne.n 80013ac + 80013e6: 7ffb ldrb r3, [r7, #31] + 80013e8: 2b01 cmp r3, #1 + 80013ea: d105 bne.n 80013f8 { __HAL_RCC_PWR_CLK_DISABLE(); - 80013a0: 4b44 ldr r3, [pc, #272] @ (80014b4 ) - 80013a2: 6a5b ldr r3, [r3, #36] @ 0x24 - 80013a4: 4a43 ldr r2, [pc, #268] @ (80014b4 ) - 80013a6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80013aa: 6253 str r3, [r2, #36] @ 0x24 + 80013ec: 4b44 ldr r3, [pc, #272] @ (8001500 ) + 80013ee: 6a5b ldr r3, [r3, #36] @ 0x24 + 80013f0: 4a43 ldr r2, [pc, #268] @ (8001500 ) + 80013f2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80013f6: 6253 str r3, [r2, #36] @ 0x24 } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80013ac: 687b ldr r3, [r7, #4] - 80013ae: 6a5b ldr r3, [r3, #36] @ 0x24 - 80013b0: 2b00 cmp r3, #0 - 80013b2: d079 beq.n 80014a8 + 80013f8: 687b ldr r3, [r7, #4] + 80013fa: 6a5b ldr r3, [r3, #36] @ 0x24 + 80013fc: 2b00 cmp r3, #0 + 80013fe: d079 beq.n 80014f4 { /* Check if the PLL is used as system clock or not */ if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80013b4: 69bb ldr r3, [r7, #24] - 80013b6: 2b0c cmp r3, #12 - 80013b8: d056 beq.n 8001468 + 8001400: 69bb ldr r3, [r7, #24] + 8001402: 2b0c cmp r3, #12 + 8001404: d056 beq.n 80014b4 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80013ba: 687b ldr r3, [r7, #4] - 80013bc: 6a5b ldr r3, [r3, #36] @ 0x24 - 80013be: 2b02 cmp r3, #2 - 80013c0: d13b bne.n 800143a + 8001406: 687b ldr r3, [r7, #4] + 8001408: 6a5b ldr r3, [r3, #36] @ 0x24 + 800140a: 2b02 cmp r3, #2 + 800140c: d13b bne.n 8001486 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80013c2: 4b3d ldr r3, [pc, #244] @ (80014b8 ) - 80013c4: 2200 movs r2, #0 - 80013c6: 601a str r2, [r3, #0] + 800140e: 4b3d ldr r3, [pc, #244] @ (8001504 ) + 8001410: 2200 movs r2, #0 + 8001412: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80013c8: f7ff fab2 bl 8000930 - 80013cc: 6138 str r0, [r7, #16] + 8001414: f7ff fa90 bl 8000938 + 8001418: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80013ce: e008 b.n 80013e2 + 800141a: e008 b.n 800142e { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80013d0: f7ff faae bl 8000930 - 80013d4: 4602 mov r2, r0 - 80013d6: 693b ldr r3, [r7, #16] - 80013d8: 1ad3 subs r3, r2, r3 - 80013da: 2b02 cmp r3, #2 - 80013dc: d901 bls.n 80013e2 + 800141c: f7ff fa8c bl 8000938 + 8001420: 4602 mov r2, r0 + 8001422: 693b ldr r3, [r7, #16] + 8001424: 1ad3 subs r3, r2, r3 + 8001426: 2b02 cmp r3, #2 + 8001428: d901 bls.n 800142e { return HAL_TIMEOUT; - 80013de: 2303 movs r3, #3 - 80013e0: e063 b.n 80014aa + 800142a: 2303 movs r3, #3 + 800142c: e063 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80013e2: 4b34 ldr r3, [pc, #208] @ (80014b4 ) - 80013e4: 681b ldr r3, [r3, #0] - 80013e6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80013ea: 2b00 cmp r3, #0 - 80013ec: d1f0 bne.n 80013d0 + 800142e: 4b34 ldr r3, [pc, #208] @ (8001500 ) + 8001430: 681b ldr r3, [r3, #0] + 8001432: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8001436: 2b00 cmp r3, #0 + 8001438: d1f0 bne.n 800141c } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 80013ee: 4b31 ldr r3, [pc, #196] @ (80014b4 ) - 80013f0: 689b ldr r3, [r3, #8] - 80013f2: f423 027d bic.w r2, r3, #16580608 @ 0xfd0000 - 80013f6: 687b ldr r3, [r7, #4] - 80013f8: 6a99 ldr r1, [r3, #40] @ 0x28 - 80013fa: 687b ldr r3, [r7, #4] - 80013fc: 6adb ldr r3, [r3, #44] @ 0x2c - 80013fe: 4319 orrs r1, r3 - 8001400: 687b ldr r3, [r7, #4] - 8001402: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001404: 430b orrs r3, r1 - 8001406: 492b ldr r1, [pc, #172] @ (80014b4 ) - 8001408: 4313 orrs r3, r2 - 800140a: 608b str r3, [r1, #8] + 800143a: 4b31 ldr r3, [pc, #196] @ (8001500 ) + 800143c: 689b ldr r3, [r3, #8] + 800143e: f423 027d bic.w r2, r3, #16580608 @ 0xfd0000 + 8001442: 687b ldr r3, [r7, #4] + 8001444: 6a99 ldr r1, [r3, #40] @ 0x28 + 8001446: 687b ldr r3, [r7, #4] + 8001448: 6adb ldr r3, [r3, #44] @ 0x2c + 800144a: 4319 orrs r1, r3 + 800144c: 687b ldr r3, [r7, #4] + 800144e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001450: 430b orrs r3, r1 + 8001452: 492b ldr r1, [pc, #172] @ (8001500 ) + 8001454: 4313 orrs r3, r2 + 8001456: 608b str r3, [r1, #8] RCC_OscInitStruct->PLL.PLLMUL, RCC_OscInitStruct->PLL.PLLDIV); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800140c: 4b2a ldr r3, [pc, #168] @ (80014b8 ) - 800140e: 2201 movs r2, #1 - 8001410: 601a str r2, [r3, #0] + 8001458: 4b2a ldr r3, [pc, #168] @ (8001504 ) + 800145a: 2201 movs r2, #1 + 800145c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001412: f7ff fa8d bl 8000930 - 8001416: 6138 str r0, [r7, #16] + 800145e: f7ff fa6b bl 8000938 + 8001462: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8001418: e008 b.n 800142c + 8001464: e008 b.n 8001478 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 800141a: f7ff fa89 bl 8000930 - 800141e: 4602 mov r2, r0 - 8001420: 693b ldr r3, [r7, #16] - 8001422: 1ad3 subs r3, r2, r3 - 8001424: 2b02 cmp r3, #2 - 8001426: d901 bls.n 800142c + 8001466: f7ff fa67 bl 8000938 + 800146a: 4602 mov r2, r0 + 800146c: 693b ldr r3, [r7, #16] + 800146e: 1ad3 subs r3, r2, r3 + 8001470: 2b02 cmp r3, #2 + 8001472: d901 bls.n 8001478 { return HAL_TIMEOUT; - 8001428: 2303 movs r3, #3 - 800142a: e03e b.n 80014aa + 8001474: 2303 movs r3, #3 + 8001476: e03e b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 800142c: 4b21 ldr r3, [pc, #132] @ (80014b4 ) - 800142e: 681b ldr r3, [r3, #0] - 8001430: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8001434: 2b00 cmp r3, #0 - 8001436: d0f0 beq.n 800141a - 8001438: e036 b.n 80014a8 + 8001478: 4b21 ldr r3, [pc, #132] @ (8001500 ) + 800147a: 681b ldr r3, [r3, #0] + 800147c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8001480: 2b00 cmp r3, #0 + 8001482: d0f0 beq.n 8001466 + 8001484: e036 b.n 80014f4 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800143a: 4b1f ldr r3, [pc, #124] @ (80014b8 ) - 800143c: 2200 movs r2, #0 - 800143e: 601a str r2, [r3, #0] + 8001486: 4b1f ldr r3, [pc, #124] @ (8001504 ) + 8001488: 2200 movs r2, #0 + 800148a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001440: f7ff fa76 bl 8000930 - 8001444: 6138 str r0, [r7, #16] + 800148c: f7ff fa54 bl 8000938 + 8001490: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8001446: e008 b.n 800145a + 8001492: e008 b.n 80014a6 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001448: f7ff fa72 bl 8000930 - 800144c: 4602 mov r2, r0 - 800144e: 693b ldr r3, [r7, #16] - 8001450: 1ad3 subs r3, r2, r3 - 8001452: 2b02 cmp r3, #2 - 8001454: d901 bls.n 800145a + 8001494: f7ff fa50 bl 8000938 + 8001498: 4602 mov r2, r0 + 800149a: 693b ldr r3, [r7, #16] + 800149c: 1ad3 subs r3, r2, r3 + 800149e: 2b02 cmp r3, #2 + 80014a0: d901 bls.n 80014a6 { return HAL_TIMEOUT; - 8001456: 2303 movs r3, #3 - 8001458: e027 b.n 80014aa + 80014a2: 2303 movs r3, #3 + 80014a4: e027 b.n 80014f6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 800145a: 4b16 ldr r3, [pc, #88] @ (80014b4 ) - 800145c: 681b ldr r3, [r3, #0] - 800145e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8001462: 2b00 cmp r3, #0 - 8001464: d1f0 bne.n 8001448 - 8001466: e01f b.n 80014a8 + 80014a6: 4b16 ldr r3, [pc, #88] @ (8001500 ) + 80014a8: 681b ldr r3, [r3, #0] + 80014aa: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80014ae: 2b00 cmp r3, #0 + 80014b0: d1f0 bne.n 8001494 + 80014b2: e01f b.n 80014f4 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8001468: 687b ldr r3, [r7, #4] - 800146a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800146c: 2b01 cmp r3, #1 - 800146e: d101 bne.n 8001474 + 80014b4: 687b ldr r3, [r7, #4] + 80014b6: 6a5b ldr r3, [r3, #36] @ 0x24 + 80014b8: 2b01 cmp r3, #1 + 80014ba: d101 bne.n 80014c0 { return HAL_ERROR; - 8001470: 2301 movs r3, #1 - 8001472: e01a b.n 80014aa + 80014bc: 2301 movs r3, #1 + 80014be: e01a b.n 80014f6 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8001474: 4b0f ldr r3, [pc, #60] @ (80014b4 ) - 8001476: 689b ldr r3, [r3, #8] - 8001478: 617b str r3, [r7, #20] + 80014c0: 4b0f ldr r3, [pc, #60] @ (8001500 ) + 80014c2: 689b ldr r3, [r3, #8] + 80014c4: 617b str r3, [r7, #20] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 800147a: 697b ldr r3, [r7, #20] - 800147c: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 8001480: 687b ldr r3, [r7, #4] - 8001482: 6a9b ldr r3, [r3, #40] @ 0x28 - 8001484: 429a cmp r2, r3 - 8001486: d10d bne.n 80014a4 + 80014c6: 697b ldr r3, [r7, #20] + 80014c8: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 80014cc: 687b ldr r3, [r7, #4] + 80014ce: 6a9b ldr r3, [r3, #40] @ 0x28 + 80014d0: 429a cmp r2, r3 + 80014d2: d10d bne.n 80014f0 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 8001488: 697b ldr r3, [r7, #20] - 800148a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 800148e: 687b ldr r3, [r7, #4] - 8001490: 6adb ldr r3, [r3, #44] @ 0x2c + 80014d4: 697b ldr r3, [r7, #20] + 80014d6: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 80014da: 687b ldr r3, [r7, #4] + 80014dc: 6adb ldr r3, [r3, #44] @ 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8001492: 429a cmp r2, r3 - 8001494: d106 bne.n 80014a4 + 80014de: 429a cmp r2, r3 + 80014e0: d106 bne.n 80014f0 (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV)) - 8001496: 697b ldr r3, [r7, #20] - 8001498: f403 0240 and.w r2, r3, #12582912 @ 0xc00000 - 800149c: 687b ldr r3, [r7, #4] - 800149e: 6b1b ldr r3, [r3, #48] @ 0x30 + 80014e2: 697b ldr r3, [r7, #20] + 80014e4: f403 0240 and.w r2, r3, #12582912 @ 0xc00000 + 80014e8: 687b ldr r3, [r7, #4] + 80014ea: 6b1b ldr r3, [r3, #48] @ 0x30 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 80014a0: 429a cmp r2, r3 - 80014a2: d001 beq.n 80014a8 + 80014ec: 429a cmp r2, r3 + 80014ee: d001 beq.n 80014f4 { return HAL_ERROR; - 80014a4: 2301 movs r3, #1 - 80014a6: e000 b.n 80014aa + 80014f0: 2301 movs r3, #1 + 80014f2: e000 b.n 80014f6 } } } } return HAL_OK; - 80014a8: 2300 movs r3, #0 + 80014f4: 2300 movs r3, #0 } - 80014aa: 4618 mov r0, r3 - 80014ac: 3720 adds r7, #32 - 80014ae: 46bd mov sp, r7 - 80014b0: bd80 pop {r7, pc} - 80014b2: bf00 nop - 80014b4: 40023800 .word 0x40023800 - 80014b8: 42470060 .word 0x42470060 + 80014f6: 4618 mov r0, r3 + 80014f8: 3720 adds r7, #32 + 80014fa: 46bd mov sp, r7 + 80014fc: bd80 pop {r7, pc} + 80014fe: bf00 nop + 8001500: 40023800 .word 0x40023800 + 8001504: 42470060 .word 0x42470060 -080014bc : +08001508 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80014bc: b580 push {r7, lr} - 80014be: b084 sub sp, #16 - 80014c0: af00 add r7, sp, #0 - 80014c2: 6078 str r0, [r7, #4] - 80014c4: 6039 str r1, [r7, #0] + 8001508: b580 push {r7, lr} + 800150a: b084 sub sp, #16 + 800150c: af00 add r7, sp, #0 + 800150e: 6078 str r0, [r7, #4] + 8001510: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status; /* Check the parameters */ if(RCC_ClkInitStruct == NULL) - 80014c6: 687b ldr r3, [r7, #4] - 80014c8: 2b00 cmp r3, #0 - 80014ca: d101 bne.n 80014d0 + 8001512: 687b ldr r3, [r7, #4] + 8001514: 2b00 cmp r3, #0 + 8001516: d101 bne.n 800151c { return HAL_ERROR; - 80014cc: 2301 movs r3, #1 - 80014ce: e11a b.n 8001706 + 8001518: 2301 movs r3, #1 + 800151a: e11a b.n 8001752 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 80014d0: 4b8f ldr r3, [pc, #572] @ (8001710 ) - 80014d2: 681b ldr r3, [r3, #0] - 80014d4: f003 0301 and.w r3, r3, #1 - 80014d8: 683a ldr r2, [r7, #0] - 80014da: 429a cmp r2, r3 - 80014dc: d919 bls.n 8001512 + 800151c: 4b8f ldr r3, [pc, #572] @ (800175c ) + 800151e: 681b ldr r3, [r3, #0] + 8001520: f003 0301 and.w r3, r3, #1 + 8001524: 683a ldr r2, [r7, #0] + 8001526: 429a cmp r2, r3 + 8001528: d919 bls.n 800155e { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80014de: 683b ldr r3, [r7, #0] - 80014e0: 2b01 cmp r3, #1 - 80014e2: d105 bne.n 80014f0 - 80014e4: 4b8a ldr r3, [pc, #552] @ (8001710 ) - 80014e6: 681b ldr r3, [r3, #0] - 80014e8: 4a89 ldr r2, [pc, #548] @ (8001710 ) - 80014ea: f043 0304 orr.w r3, r3, #4 - 80014ee: 6013 str r3, [r2, #0] - 80014f0: 4b87 ldr r3, [pc, #540] @ (8001710 ) - 80014f2: 681b ldr r3, [r3, #0] - 80014f4: f023 0201 bic.w r2, r3, #1 - 80014f8: 4985 ldr r1, [pc, #532] @ (8001710 ) - 80014fa: 683b ldr r3, [r7, #0] - 80014fc: 4313 orrs r3, r2 - 80014fe: 600b str r3, [r1, #0] + 800152a: 683b ldr r3, [r7, #0] + 800152c: 2b01 cmp r3, #1 + 800152e: d105 bne.n 800153c + 8001530: 4b8a ldr r3, [pc, #552] @ (800175c ) + 8001532: 681b ldr r3, [r3, #0] + 8001534: 4a89 ldr r2, [pc, #548] @ (800175c ) + 8001536: f043 0304 orr.w r3, r3, #4 + 800153a: 6013 str r3, [r2, #0] + 800153c: 4b87 ldr r3, [pc, #540] @ (800175c ) + 800153e: 681b ldr r3, [r3, #0] + 8001540: f023 0201 bic.w r2, r3, #1 + 8001544: 4985 ldr r1, [pc, #532] @ (800175c ) + 8001546: 683b ldr r3, [r7, #0] + 8001548: 4313 orrs r3, r2 + 800154a: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001500: 4b83 ldr r3, [pc, #524] @ (8001710 ) - 8001502: 681b ldr r3, [r3, #0] - 8001504: f003 0301 and.w r3, r3, #1 - 8001508: 683a ldr r2, [r7, #0] - 800150a: 429a cmp r2, r3 - 800150c: d001 beq.n 8001512 + 800154c: 4b83 ldr r3, [pc, #524] @ (800175c ) + 800154e: 681b ldr r3, [r3, #0] + 8001550: f003 0301 and.w r3, r3, #1 + 8001554: 683a ldr r2, [r7, #0] + 8001556: 429a cmp r2, r3 + 8001558: d001 beq.n 800155e { return HAL_ERROR; - 800150e: 2301 movs r3, #1 - 8001510: e0f9 b.n 8001706 + 800155a: 2301 movs r3, #1 + 800155c: e0f9 b.n 8001752 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8001512: 687b ldr r3, [r7, #4] - 8001514: 681b ldr r3, [r3, #0] - 8001516: f003 0302 and.w r3, r3, #2 - 800151a: 2b00 cmp r3, #0 - 800151c: d008 beq.n 8001530 + 800155e: 687b ldr r3, [r7, #4] + 8001560: 681b ldr r3, [r3, #0] + 8001562: f003 0302 and.w r3, r3, #2 + 8001566: 2b00 cmp r3, #0 + 8001568: d008 beq.n 800157c { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 800151e: 4b7d ldr r3, [pc, #500] @ (8001714 ) - 8001520: 689b ldr r3, [r3, #8] - 8001522: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8001526: 687b ldr r3, [r7, #4] - 8001528: 689b ldr r3, [r3, #8] - 800152a: 497a ldr r1, [pc, #488] @ (8001714 ) - 800152c: 4313 orrs r3, r2 - 800152e: 608b str r3, [r1, #8] + 800156a: 4b7d ldr r3, [pc, #500] @ (8001760 ) + 800156c: 689b ldr r3, [r3, #8] + 800156e: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 8001572: 687b ldr r3, [r7, #4] + 8001574: 689b ldr r3, [r3, #8] + 8001576: 497a ldr r1, [pc, #488] @ (8001760 ) + 8001578: 4313 orrs r3, r2 + 800157a: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8001530: 687b ldr r3, [r7, #4] - 8001532: 681b ldr r3, [r3, #0] - 8001534: f003 0301 and.w r3, r3, #1 - 8001538: 2b00 cmp r3, #0 - 800153a: f000 808e beq.w 800165a + 800157c: 687b ldr r3, [r7, #4] + 800157e: 681b ldr r3, [r3, #0] + 8001580: f003 0301 and.w r3, r3, #1 + 8001584: 2b00 cmp r3, #0 + 8001586: f000 808e beq.w 80016a6 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 800153e: 687b ldr r3, [r7, #4] - 8001540: 685b ldr r3, [r3, #4] - 8001542: 2b02 cmp r3, #2 - 8001544: d107 bne.n 8001556 + 800158a: 687b ldr r3, [r7, #4] + 800158c: 685b ldr r3, [r3, #4] + 800158e: 2b02 cmp r3, #2 + 8001590: d107 bne.n 80015a2 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8001546: 4b73 ldr r3, [pc, #460] @ (8001714 ) - 8001548: 681b ldr r3, [r3, #0] - 800154a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800154e: 2b00 cmp r3, #0 - 8001550: d121 bne.n 8001596 + 8001592: 4b73 ldr r3, [pc, #460] @ (8001760 ) + 8001594: 681b ldr r3, [r3, #0] + 8001596: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800159a: 2b00 cmp r3, #0 + 800159c: d121 bne.n 80015e2 { return HAL_ERROR; - 8001552: 2301 movs r3, #1 - 8001554: e0d7 b.n 8001706 + 800159e: 2301 movs r3, #1 + 80015a0: e0d7 b.n 8001752 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8001556: 687b ldr r3, [r7, #4] - 8001558: 685b ldr r3, [r3, #4] - 800155a: 2b03 cmp r3, #3 - 800155c: d107 bne.n 800156e + 80015a2: 687b ldr r3, [r7, #4] + 80015a4: 685b ldr r3, [r3, #4] + 80015a6: 2b03 cmp r3, #3 + 80015a8: d107 bne.n 80015ba { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 800155e: 4b6d ldr r3, [pc, #436] @ (8001714 ) - 8001560: 681b ldr r3, [r3, #0] - 8001562: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8001566: 2b00 cmp r3, #0 - 8001568: d115 bne.n 8001596 + 80015aa: 4b6d ldr r3, [pc, #436] @ (8001760 ) + 80015ac: 681b ldr r3, [r3, #0] + 80015ae: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80015b2: 2b00 cmp r3, #0 + 80015b4: d115 bne.n 80015e2 { return HAL_ERROR; - 800156a: 2301 movs r3, #1 - 800156c: e0cb b.n 8001706 + 80015b6: 2301 movs r3, #1 + 80015b8: e0cb b.n 8001752 } } /* HSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 800156e: 687b ldr r3, [r7, #4] - 8001570: 685b ldr r3, [r3, #4] - 8001572: 2b01 cmp r3, #1 - 8001574: d107 bne.n 8001586 + 80015ba: 687b ldr r3, [r7, #4] + 80015bc: 685b ldr r3, [r3, #4] + 80015be: 2b01 cmp r3, #1 + 80015c0: d107 bne.n 80015d2 { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8001576: 4b67 ldr r3, [pc, #412] @ (8001714 ) - 8001578: 681b ldr r3, [r3, #0] - 800157a: f003 0302 and.w r3, r3, #2 - 800157e: 2b00 cmp r3, #0 - 8001580: d109 bne.n 8001596 + 80015c2: 4b67 ldr r3, [pc, #412] @ (8001760 ) + 80015c4: 681b ldr r3, [r3, #0] + 80015c6: f003 0302 and.w r3, r3, #2 + 80015ca: 2b00 cmp r3, #0 + 80015cc: d109 bne.n 80015e2 { return HAL_ERROR; - 8001582: 2301 movs r3, #1 - 8001584: e0bf b.n 8001706 + 80015ce: 2301 movs r3, #1 + 80015d0: e0bf b.n 8001752 } /* MSI is selected as System Clock Source */ else { /* Check the MSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8001586: 4b63 ldr r3, [pc, #396] @ (8001714 ) - 8001588: 681b ldr r3, [r3, #0] - 800158a: f403 7300 and.w r3, r3, #512 @ 0x200 - 800158e: 2b00 cmp r3, #0 - 8001590: d101 bne.n 8001596 + 80015d2: 4b63 ldr r3, [pc, #396] @ (8001760 ) + 80015d4: 681b ldr r3, [r3, #0] + 80015d6: f403 7300 and.w r3, r3, #512 @ 0x200 + 80015da: 2b00 cmp r3, #0 + 80015dc: d101 bne.n 80015e2 { return HAL_ERROR; - 8001592: 2301 movs r3, #1 - 8001594: e0b7 b.n 8001706 + 80015de: 2301 movs r3, #1 + 80015e0: e0b7 b.n 8001752 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8001596: 4b5f ldr r3, [pc, #380] @ (8001714 ) - 8001598: 689b ldr r3, [r3, #8] - 800159a: f023 0203 bic.w r2, r3, #3 - 800159e: 687b ldr r3, [r7, #4] - 80015a0: 685b ldr r3, [r3, #4] - 80015a2: 495c ldr r1, [pc, #368] @ (8001714 ) - 80015a4: 4313 orrs r3, r2 - 80015a6: 608b str r3, [r1, #8] + 80015e2: 4b5f ldr r3, [pc, #380] @ (8001760 ) + 80015e4: 689b ldr r3, [r3, #8] + 80015e6: f023 0203 bic.w r2, r3, #3 + 80015ea: 687b ldr r3, [r7, #4] + 80015ec: 685b ldr r3, [r3, #4] + 80015ee: 495c ldr r1, [pc, #368] @ (8001760 ) + 80015f0: 4313 orrs r3, r2 + 80015f2: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80015a8: f7ff f9c2 bl 8000930 - 80015ac: 60f8 str r0, [r7, #12] + 80015f4: f7ff f9a0 bl 8000938 + 80015f8: 60f8 str r0, [r7, #12] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80015ae: 687b ldr r3, [r7, #4] - 80015b0: 685b ldr r3, [r3, #4] - 80015b2: 2b02 cmp r3, #2 - 80015b4: d112 bne.n 80015dc + 80015fa: 687b ldr r3, [r7, #4] + 80015fc: 685b ldr r3, [r3, #4] + 80015fe: 2b02 cmp r3, #2 + 8001600: d112 bne.n 8001628 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 80015b6: e00a b.n 80015ce + 8001602: e00a b.n 800161a { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80015b8: f7ff f9ba bl 8000930 - 80015bc: 4602 mov r2, r0 - 80015be: 68fb ldr r3, [r7, #12] - 80015c0: 1ad3 subs r3, r2, r3 - 80015c2: f241 3288 movw r2, #5000 @ 0x1388 - 80015c6: 4293 cmp r3, r2 - 80015c8: d901 bls.n 80015ce + 8001604: f7ff f998 bl 8000938 + 8001608: 4602 mov r2, r0 + 800160a: 68fb ldr r3, [r7, #12] + 800160c: 1ad3 subs r3, r2, r3 + 800160e: f241 3288 movw r2, #5000 @ 0x1388 + 8001612: 4293 cmp r3, r2 + 8001614: d901 bls.n 800161a { return HAL_TIMEOUT; - 80015ca: 2303 movs r3, #3 - 80015cc: e09b b.n 8001706 + 8001616: 2303 movs r3, #3 + 8001618: e09b b.n 8001752 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 80015ce: 4b51 ldr r3, [pc, #324] @ (8001714 ) - 80015d0: 689b ldr r3, [r3, #8] - 80015d2: f003 030c and.w r3, r3, #12 - 80015d6: 2b08 cmp r3, #8 - 80015d8: d1ee bne.n 80015b8 - 80015da: e03e b.n 800165a + 800161a: 4b51 ldr r3, [pc, #324] @ (8001760 ) + 800161c: 689b ldr r3, [r3, #8] + 800161e: f003 030c and.w r3, r3, #12 + 8001622: 2b08 cmp r3, #8 + 8001624: d1ee bne.n 8001604 + 8001626: e03e b.n 80016a6 } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80015dc: 687b ldr r3, [r7, #4] - 80015de: 685b ldr r3, [r3, #4] - 80015e0: 2b03 cmp r3, #3 - 80015e2: d112 bne.n 800160a + 8001628: 687b ldr r3, [r7, #4] + 800162a: 685b ldr r3, [r3, #4] + 800162c: 2b03 cmp r3, #3 + 800162e: d112 bne.n 8001656 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80015e4: e00a b.n 80015fc + 8001630: e00a b.n 8001648 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80015e6: f7ff f9a3 bl 8000930 - 80015ea: 4602 mov r2, r0 - 80015ec: 68fb ldr r3, [r7, #12] - 80015ee: 1ad3 subs r3, r2, r3 - 80015f0: f241 3288 movw r2, #5000 @ 0x1388 - 80015f4: 4293 cmp r3, r2 - 80015f6: d901 bls.n 80015fc + 8001632: f7ff f981 bl 8000938 + 8001636: 4602 mov r2, r0 + 8001638: 68fb ldr r3, [r7, #12] + 800163a: 1ad3 subs r3, r2, r3 + 800163c: f241 3288 movw r2, #5000 @ 0x1388 + 8001640: 4293 cmp r3, r2 + 8001642: d901 bls.n 8001648 { return HAL_TIMEOUT; - 80015f8: 2303 movs r3, #3 - 80015fa: e084 b.n 8001706 + 8001644: 2303 movs r3, #3 + 8001646: e084 b.n 8001752 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80015fc: 4b45 ldr r3, [pc, #276] @ (8001714 ) - 80015fe: 689b ldr r3, [r3, #8] - 8001600: f003 030c and.w r3, r3, #12 - 8001604: 2b0c cmp r3, #12 - 8001606: d1ee bne.n 80015e6 - 8001608: e027 b.n 800165a + 8001648: 4b45 ldr r3, [pc, #276] @ (8001760 ) + 800164a: 689b ldr r3, [r3, #8] + 800164c: f003 030c and.w r3, r3, #12 + 8001650: 2b0c cmp r3, #12 + 8001652: d1ee bne.n 8001632 + 8001654: e027 b.n 80016a6 } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 800160a: 687b ldr r3, [r7, #4] - 800160c: 685b ldr r3, [r3, #4] - 800160e: 2b01 cmp r3, #1 - 8001610: d11d bne.n 800164e + 8001656: 687b ldr r3, [r7, #4] + 8001658: 685b ldr r3, [r3, #4] + 800165a: 2b01 cmp r3, #1 + 800165c: d11d bne.n 800169a { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 8001612: e00a b.n 800162a + 800165e: e00a b.n 8001676 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8001614: f7ff f98c bl 8000930 - 8001618: 4602 mov r2, r0 - 800161a: 68fb ldr r3, [r7, #12] - 800161c: 1ad3 subs r3, r2, r3 - 800161e: f241 3288 movw r2, #5000 @ 0x1388 - 8001622: 4293 cmp r3, r2 - 8001624: d901 bls.n 800162a + 8001660: f7ff f96a bl 8000938 + 8001664: 4602 mov r2, r0 + 8001666: 68fb ldr r3, [r7, #12] + 8001668: 1ad3 subs r3, r2, r3 + 800166a: f241 3288 movw r2, #5000 @ 0x1388 + 800166e: 4293 cmp r3, r2 + 8001670: d901 bls.n 8001676 { return HAL_TIMEOUT; - 8001626: 2303 movs r3, #3 - 8001628: e06d b.n 8001706 + 8001672: 2303 movs r3, #3 + 8001674: e06d b.n 8001752 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 800162a: 4b3a ldr r3, [pc, #232] @ (8001714 ) - 800162c: 689b ldr r3, [r3, #8] - 800162e: f003 030c and.w r3, r3, #12 - 8001632: 2b04 cmp r3, #4 - 8001634: d1ee bne.n 8001614 - 8001636: e010 b.n 800165a + 8001676: 4b3a ldr r3, [pc, #232] @ (8001760 ) + 8001678: 689b ldr r3, [r3, #8] + 800167a: f003 030c and.w r3, r3, #12 + 800167e: 2b04 cmp r3, #4 + 8001680: d1ee bne.n 8001660 + 8001682: e010 b.n 80016a6 } else { while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8001638: f7ff f97a bl 8000930 - 800163c: 4602 mov r2, r0 - 800163e: 68fb ldr r3, [r7, #12] - 8001640: 1ad3 subs r3, r2, r3 - 8001642: f241 3288 movw r2, #5000 @ 0x1388 - 8001646: 4293 cmp r3, r2 - 8001648: d901 bls.n 800164e + 8001684: f7ff f958 bl 8000938 + 8001688: 4602 mov r2, r0 + 800168a: 68fb ldr r3, [r7, #12] + 800168c: 1ad3 subs r3, r2, r3 + 800168e: f241 3288 movw r2, #5000 @ 0x1388 + 8001692: 4293 cmp r3, r2 + 8001694: d901 bls.n 800169a { return HAL_TIMEOUT; - 800164a: 2303 movs r3, #3 - 800164c: e05b b.n 8001706 + 8001696: 2303 movs r3, #3 + 8001698: e05b b.n 8001752 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) - 800164e: 4b31 ldr r3, [pc, #196] @ (8001714 ) - 8001650: 689b ldr r3, [r3, #8] - 8001652: f003 030c and.w r3, r3, #12 - 8001656: 2b00 cmp r3, #0 - 8001658: d1ee bne.n 8001638 + 800169a: 4b31 ldr r3, [pc, #196] @ (8001760 ) + 800169c: 689b ldr r3, [r3, #8] + 800169e: f003 030c and.w r3, r3, #12 + 80016a2: 2b00 cmp r3, #0 + 80016a4: d1ee bne.n 8001684 } } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 800165a: 4b2d ldr r3, [pc, #180] @ (8001710 ) - 800165c: 681b ldr r3, [r3, #0] - 800165e: f003 0301 and.w r3, r3, #1 - 8001662: 683a ldr r2, [r7, #0] - 8001664: 429a cmp r2, r3 - 8001666: d219 bcs.n 800169c + 80016a6: 4b2d ldr r3, [pc, #180] @ (800175c ) + 80016a8: 681b ldr r3, [r3, #0] + 80016aa: f003 0301 and.w r3, r3, #1 + 80016ae: 683a ldr r2, [r7, #0] + 80016b0: 429a cmp r2, r3 + 80016b2: d219 bcs.n 80016e8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001668: 683b ldr r3, [r7, #0] - 800166a: 2b01 cmp r3, #1 - 800166c: d105 bne.n 800167a - 800166e: 4b28 ldr r3, [pc, #160] @ (8001710 ) - 8001670: 681b ldr r3, [r3, #0] - 8001672: 4a27 ldr r2, [pc, #156] @ (8001710 ) - 8001674: f043 0304 orr.w r3, r3, #4 - 8001678: 6013 str r3, [r2, #0] - 800167a: 4b25 ldr r3, [pc, #148] @ (8001710 ) - 800167c: 681b ldr r3, [r3, #0] - 800167e: f023 0201 bic.w r2, r3, #1 - 8001682: 4923 ldr r1, [pc, #140] @ (8001710 ) - 8001684: 683b ldr r3, [r7, #0] - 8001686: 4313 orrs r3, r2 - 8001688: 600b str r3, [r1, #0] + 80016b4: 683b ldr r3, [r7, #0] + 80016b6: 2b01 cmp r3, #1 + 80016b8: d105 bne.n 80016c6 + 80016ba: 4b28 ldr r3, [pc, #160] @ (800175c ) + 80016bc: 681b ldr r3, [r3, #0] + 80016be: 4a27 ldr r2, [pc, #156] @ (800175c ) + 80016c0: f043 0304 orr.w r3, r3, #4 + 80016c4: 6013 str r3, [r2, #0] + 80016c6: 4b25 ldr r3, [pc, #148] @ (800175c ) + 80016c8: 681b ldr r3, [r3, #0] + 80016ca: f023 0201 bic.w r2, r3, #1 + 80016ce: 4923 ldr r1, [pc, #140] @ (800175c ) + 80016d0: 683b ldr r3, [r7, #0] + 80016d2: 4313 orrs r3, r2 + 80016d4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 800168a: 4b21 ldr r3, [pc, #132] @ (8001710 ) - 800168c: 681b ldr r3, [r3, #0] - 800168e: f003 0301 and.w r3, r3, #1 - 8001692: 683a ldr r2, [r7, #0] - 8001694: 429a cmp r2, r3 - 8001696: d001 beq.n 800169c + 80016d6: 4b21 ldr r3, [pc, #132] @ (800175c ) + 80016d8: 681b ldr r3, [r3, #0] + 80016da: f003 0301 and.w r3, r3, #1 + 80016de: 683a ldr r2, [r7, #0] + 80016e0: 429a cmp r2, r3 + 80016e2: d001 beq.n 80016e8 { return HAL_ERROR; - 8001698: 2301 movs r3, #1 - 800169a: e034 b.n 8001706 + 80016e4: 2301 movs r3, #1 + 80016e6: e034 b.n 8001752 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800169c: 687b ldr r3, [r7, #4] - 800169e: 681b ldr r3, [r3, #0] - 80016a0: f003 0304 and.w r3, r3, #4 - 80016a4: 2b00 cmp r3, #0 - 80016a6: d008 beq.n 80016ba + 80016e8: 687b ldr r3, [r7, #4] + 80016ea: 681b ldr r3, [r3, #0] + 80016ec: f003 0304 and.w r3, r3, #4 + 80016f0: 2b00 cmp r3, #0 + 80016f2: d008 beq.n 8001706 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 80016a8: 4b1a ldr r3, [pc, #104] @ (8001714 ) - 80016aa: 689b ldr r3, [r3, #8] - 80016ac: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 80016b0: 687b ldr r3, [r7, #4] - 80016b2: 68db ldr r3, [r3, #12] - 80016b4: 4917 ldr r1, [pc, #92] @ (8001714 ) - 80016b6: 4313 orrs r3, r2 - 80016b8: 608b str r3, [r1, #8] + 80016f4: 4b1a ldr r3, [pc, #104] @ (8001760 ) + 80016f6: 689b ldr r3, [r3, #8] + 80016f8: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 80016fc: 687b ldr r3, [r7, #4] + 80016fe: 68db ldr r3, [r3, #12] + 8001700: 4917 ldr r1, [pc, #92] @ (8001760 ) + 8001702: 4313 orrs r3, r2 + 8001704: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80016ba: 687b ldr r3, [r7, #4] - 80016bc: 681b ldr r3, [r3, #0] - 80016be: f003 0308 and.w r3, r3, #8 - 80016c2: 2b00 cmp r3, #0 - 80016c4: d009 beq.n 80016da + 8001706: 687b ldr r3, [r7, #4] + 8001708: 681b ldr r3, [r3, #0] + 800170a: f003 0308 and.w r3, r3, #8 + 800170e: 2b00 cmp r3, #0 + 8001710: d009 beq.n 8001726 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 80016c6: 4b13 ldr r3, [pc, #76] @ (8001714 ) - 80016c8: 689b ldr r3, [r3, #8] - 80016ca: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 80016ce: 687b ldr r3, [r7, #4] - 80016d0: 691b ldr r3, [r3, #16] - 80016d2: 00db lsls r3, r3, #3 - 80016d4: 490f ldr r1, [pc, #60] @ (8001714 ) - 80016d6: 4313 orrs r3, r2 - 80016d8: 608b str r3, [r1, #8] + 8001712: 4b13 ldr r3, [pc, #76] @ (8001760 ) + 8001714: 689b ldr r3, [r3, #8] + 8001716: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 800171a: 687b ldr r3, [r7, #4] + 800171c: 691b ldr r3, [r3, #16] + 800171e: 00db lsls r3, r3, #3 + 8001720: 490f ldr r1, [pc, #60] @ (8001760 ) + 8001722: 4313 orrs r3, r2 + 8001724: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 80016da: f000 f823 bl 8001724 - 80016de: 4602 mov r2, r0 - 80016e0: 4b0c ldr r3, [pc, #48] @ (8001714 ) - 80016e2: 689b ldr r3, [r3, #8] - 80016e4: 091b lsrs r3, r3, #4 - 80016e6: f003 030f and.w r3, r3, #15 - 80016ea: 490b ldr r1, [pc, #44] @ (8001718 ) - 80016ec: 5ccb ldrb r3, [r1, r3] - 80016ee: fa22 f303 lsr.w r3, r2, r3 - 80016f2: 4a0a ldr r2, [pc, #40] @ (800171c ) - 80016f4: 6013 str r3, [r2, #0] + 8001726: f000 f823 bl 8001770 + 800172a: 4602 mov r2, r0 + 800172c: 4b0c ldr r3, [pc, #48] @ (8001760 ) + 800172e: 689b ldr r3, [r3, #8] + 8001730: 091b lsrs r3, r3, #4 + 8001732: f003 030f and.w r3, r3, #15 + 8001736: 490b ldr r1, [pc, #44] @ (8001764 ) + 8001738: 5ccb ldrb r3, [r1, r3] + 800173a: fa22 f303 lsr.w r3, r2, r3 + 800173e: 4a0a ldr r2, [pc, #40] @ (8001768 ) + 8001740: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 80016f6: 4b0a ldr r3, [pc, #40] @ (8001720 ) - 80016f8: 681b ldr r3, [r3, #0] - 80016fa: 4618 mov r0, r3 - 80016fc: f7ff f8cc bl 8000898 - 8001700: 4603 mov r3, r0 - 8001702: 72fb strb r3, [r7, #11] + 8001742: 4b0a ldr r3, [pc, #40] @ (800176c ) + 8001744: 681b ldr r3, [r3, #0] + 8001746: 4618 mov r0, r3 + 8001748: f7ff f8aa bl 80008a0 + 800174c: 4603 mov r3, r0 + 800174e: 72fb strb r3, [r7, #11] return status; - 8001704: 7afb ldrb r3, [r7, #11] + 8001750: 7afb ldrb r3, [r7, #11] } - 8001706: 4618 mov r0, r3 - 8001708: 3710 adds r7, #16 - 800170a: 46bd mov sp, r7 - 800170c: bd80 pop {r7, pc} - 800170e: bf00 nop - 8001710: 40023c00 .word 0x40023c00 - 8001714: 40023800 .word 0x40023800 - 8001718: 08001d2c .word 0x08001d2c - 800171c: 20000000 .word 0x20000000 - 8001720: 20000004 .word 0x20000004 + 8001752: 4618 mov r0, r3 + 8001754: 3710 adds r7, #16 + 8001756: 46bd mov sp, r7 + 8001758: bd80 pop {r7, pc} + 800175a: bf00 nop + 800175c: 40023c00 .word 0x40023c00 + 8001760: 40023800 .word 0x40023800 + 8001764: 08001d78 .word 0x08001d78 + 8001768: 20000000 .word 0x20000000 + 800176c: 20000004 .word 0x20000004 -08001724 : +08001770 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8001724: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 8001728: b092 sub sp, #72 @ 0x48 - 800172a: af00 add r7, sp, #0 + 8001770: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8001774: b092 sub sp, #72 @ 0x48 + 8001776: af00 add r7, sp, #0 uint32_t tmpreg, pllm, plld, pllvco, msiclkrange, sysclockfreq; tmpreg = RCC->CFGR; - 800172c: 4b79 ldr r3, [pc, #484] @ (8001914 ) - 800172e: 689b ldr r3, [r3, #8] - 8001730: 63fb str r3, [r7, #60] @ 0x3c + 8001778: 4b79 ldr r3, [pc, #484] @ (8001960 ) + 800177a: 689b ldr r3, [r3, #8] + 800177c: 63fb str r3, [r7, #60] @ 0x3c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8001732: 6bfb ldr r3, [r7, #60] @ 0x3c - 8001734: f003 030c and.w r3, r3, #12 - 8001738: 2b0c cmp r3, #12 - 800173a: d00d beq.n 8001758 - 800173c: 2b0c cmp r3, #12 - 800173e: f200 80d5 bhi.w 80018ec - 8001742: 2b04 cmp r3, #4 - 8001744: d002 beq.n 800174c - 8001746: 2b08 cmp r3, #8 - 8001748: d003 beq.n 8001752 - 800174a: e0cf b.n 80018ec + 800177e: 6bfb ldr r3, [r7, #60] @ 0x3c + 8001780: f003 030c and.w r3, r3, #12 + 8001784: 2b0c cmp r3, #12 + 8001786: d00d beq.n 80017a4 + 8001788: 2b0c cmp r3, #12 + 800178a: f200 80d5 bhi.w 8001938 + 800178e: 2b04 cmp r3, #4 + 8001790: d002 beq.n 8001798 + 8001792: 2b08 cmp r3, #8 + 8001794: d003 beq.n 800179e + 8001796: e0cf b.n 8001938 { case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 800174c: 4b72 ldr r3, [pc, #456] @ (8001918 ) - 800174e: 643b str r3, [r7, #64] @ 0x40 + 8001798: 4b72 ldr r3, [pc, #456] @ (8001964 ) + 800179a: 643b str r3, [r7, #64] @ 0x40 break; - 8001750: e0da b.n 8001908 + 800179c: e0da b.n 8001954 } case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8001752: 4b72 ldr r3, [pc, #456] @ (800191c ) - 8001754: 643b str r3, [r7, #64] @ 0x40 + 800179e: 4b72 ldr r3, [pc, #456] @ (8001968 ) + 80017a0: 643b str r3, [r7, #64] @ 0x40 break; - 8001756: e0d7 b.n 8001908 + 80017a2: e0d7 b.n 8001954 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; - 8001758: 6bfb ldr r3, [r7, #60] @ 0x3c - 800175a: 0c9b lsrs r3, r3, #18 - 800175c: f003 020f and.w r2, r3, #15 - 8001760: 4b6f ldr r3, [pc, #444] @ (8001920 ) - 8001762: 5c9b ldrb r3, [r3, r2] - 8001764: 63bb str r3, [r7, #56] @ 0x38 + 80017a4: 6bfb ldr r3, [r7, #60] @ 0x3c + 80017a6: 0c9b lsrs r3, r3, #18 + 80017a8: f003 020f and.w r2, r3, #15 + 80017ac: 4b6f ldr r3, [pc, #444] @ (800196c ) + 80017ae: 5c9b ldrb r3, [r3, r2] + 80017b0: 63bb str r3, [r7, #56] @ 0x38 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U; - 8001766: 6bfb ldr r3, [r7, #60] @ 0x3c - 8001768: 0d9b lsrs r3, r3, #22 - 800176a: f003 0303 and.w r3, r3, #3 - 800176e: 3301 adds r3, #1 - 8001770: 637b str r3, [r7, #52] @ 0x34 + 80017b2: 6bfb ldr r3, [r7, #60] @ 0x3c + 80017b4: 0d9b lsrs r3, r3, #22 + 80017b6: f003 0303 and.w r3, r3, #3 + 80017ba: 3301 adds r3, #1 + 80017bc: 637b str r3, [r7, #52] @ 0x34 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8001772: 4b68 ldr r3, [pc, #416] @ (8001914 ) - 8001774: 689b ldr r3, [r3, #8] - 8001776: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800177a: 2b00 cmp r3, #0 - 800177c: d05d beq.n 800183a + 80017be: 4b68 ldr r3, [pc, #416] @ (8001960 ) + 80017c0: 689b ldr r3, [r3, #8] + 80017c2: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80017c6: 2b00 cmp r3, #0 + 80017c8: d05d beq.n 8001886 { /* HSE used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 800177e: 6bbb ldr r3, [r7, #56] @ 0x38 - 8001780: 2200 movs r2, #0 - 8001782: 4618 mov r0, r3 - 8001784: 4611 mov r1, r2 - 8001786: 4604 mov r4, r0 - 8001788: 460d mov r5, r1 - 800178a: 4622 mov r2, r4 - 800178c: 462b mov r3, r5 - 800178e: f04f 0000 mov.w r0, #0 - 8001792: f04f 0100 mov.w r1, #0 - 8001796: 0159 lsls r1, r3, #5 - 8001798: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 800179c: 0150 lsls r0, r2, #5 - 800179e: 4602 mov r2, r0 - 80017a0: 460b mov r3, r1 - 80017a2: 4621 mov r1, r4 - 80017a4: 1a51 subs r1, r2, r1 - 80017a6: 6139 str r1, [r7, #16] - 80017a8: 4629 mov r1, r5 - 80017aa: eb63 0301 sbc.w r3, r3, r1 - 80017ae: 617b str r3, [r7, #20] - 80017b0: f04f 0200 mov.w r2, #0 - 80017b4: f04f 0300 mov.w r3, #0 - 80017b8: e9d7 ab04 ldrd sl, fp, [r7, #16] - 80017bc: 4659 mov r1, fp - 80017be: 018b lsls r3, r1, #6 - 80017c0: 4651 mov r1, sl - 80017c2: ea43 6391 orr.w r3, r3, r1, lsr #26 - 80017c6: 4651 mov r1, sl - 80017c8: 018a lsls r2, r1, #6 - 80017ca: 46d4 mov ip, sl - 80017cc: ebb2 080c subs.w r8, r2, ip - 80017d0: 4659 mov r1, fp - 80017d2: eb63 0901 sbc.w r9, r3, r1 - 80017d6: f04f 0200 mov.w r2, #0 - 80017da: f04f 0300 mov.w r3, #0 - 80017de: ea4f 03c9 mov.w r3, r9, lsl #3 - 80017e2: ea43 7358 orr.w r3, r3, r8, lsr #29 - 80017e6: ea4f 02c8 mov.w r2, r8, lsl #3 - 80017ea: 4690 mov r8, r2 - 80017ec: 4699 mov r9, r3 - 80017ee: 4623 mov r3, r4 - 80017f0: eb18 0303 adds.w r3, r8, r3 - 80017f4: 60bb str r3, [r7, #8] - 80017f6: 462b mov r3, r5 - 80017f8: eb49 0303 adc.w r3, r9, r3 - 80017fc: 60fb str r3, [r7, #12] - 80017fe: f04f 0200 mov.w r2, #0 - 8001802: f04f 0300 mov.w r3, #0 - 8001806: e9d7 4502 ldrd r4, r5, [r7, #8] - 800180a: 4629 mov r1, r5 - 800180c: 024b lsls r3, r1, #9 - 800180e: 4620 mov r0, r4 - 8001810: 4629 mov r1, r5 - 8001812: 4604 mov r4, r0 - 8001814: ea43 53d4 orr.w r3, r3, r4, lsr #23 - 8001818: 4601 mov r1, r0 - 800181a: 024a lsls r2, r1, #9 - 800181c: 4610 mov r0, r2 - 800181e: 4619 mov r1, r3 - 8001820: 6b7b ldr r3, [r7, #52] @ 0x34 - 8001822: 2200 movs r2, #0 - 8001824: 62bb str r3, [r7, #40] @ 0x28 - 8001826: 62fa str r2, [r7, #44] @ 0x2c - 8001828: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 - 800182c: f7fe fca6 bl 800017c <__aeabi_uldivmod> - 8001830: 4602 mov r2, r0 - 8001832: 460b mov r3, r1 - 8001834: 4613 mov r3, r2 - 8001836: 647b str r3, [r7, #68] @ 0x44 - 8001838: e055 b.n 80018e6 + 80017ca: 6bbb ldr r3, [r7, #56] @ 0x38 + 80017cc: 2200 movs r2, #0 + 80017ce: 4618 mov r0, r3 + 80017d0: 4611 mov r1, r2 + 80017d2: 4604 mov r4, r0 + 80017d4: 460d mov r5, r1 + 80017d6: 4622 mov r2, r4 + 80017d8: 462b mov r3, r5 + 80017da: f04f 0000 mov.w r0, #0 + 80017de: f04f 0100 mov.w r1, #0 + 80017e2: 0159 lsls r1, r3, #5 + 80017e4: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 80017e8: 0150 lsls r0, r2, #5 + 80017ea: 4602 mov r2, r0 + 80017ec: 460b mov r3, r1 + 80017ee: 4621 mov r1, r4 + 80017f0: 1a51 subs r1, r2, r1 + 80017f2: 6139 str r1, [r7, #16] + 80017f4: 4629 mov r1, r5 + 80017f6: eb63 0301 sbc.w r3, r3, r1 + 80017fa: 617b str r3, [r7, #20] + 80017fc: f04f 0200 mov.w r2, #0 + 8001800: f04f 0300 mov.w r3, #0 + 8001804: e9d7 ab04 ldrd sl, fp, [r7, #16] + 8001808: 4659 mov r1, fp + 800180a: 018b lsls r3, r1, #6 + 800180c: 4651 mov r1, sl + 800180e: ea43 6391 orr.w r3, r3, r1, lsr #26 + 8001812: 4651 mov r1, sl + 8001814: 018a lsls r2, r1, #6 + 8001816: 46d4 mov ip, sl + 8001818: ebb2 080c subs.w r8, r2, ip + 800181c: 4659 mov r1, fp + 800181e: eb63 0901 sbc.w r9, r3, r1 + 8001822: f04f 0200 mov.w r2, #0 + 8001826: f04f 0300 mov.w r3, #0 + 800182a: ea4f 03c9 mov.w r3, r9, lsl #3 + 800182e: ea43 7358 orr.w r3, r3, r8, lsr #29 + 8001832: ea4f 02c8 mov.w r2, r8, lsl #3 + 8001836: 4690 mov r8, r2 + 8001838: 4699 mov r9, r3 + 800183a: 4623 mov r3, r4 + 800183c: eb18 0303 adds.w r3, r8, r3 + 8001840: 60bb str r3, [r7, #8] + 8001842: 462b mov r3, r5 + 8001844: eb49 0303 adc.w r3, r9, r3 + 8001848: 60fb str r3, [r7, #12] + 800184a: f04f 0200 mov.w r2, #0 + 800184e: f04f 0300 mov.w r3, #0 + 8001852: e9d7 4502 ldrd r4, r5, [r7, #8] + 8001856: 4629 mov r1, r5 + 8001858: 024b lsls r3, r1, #9 + 800185a: 4620 mov r0, r4 + 800185c: 4629 mov r1, r5 + 800185e: 4604 mov r4, r0 + 8001860: ea43 53d4 orr.w r3, r3, r4, lsr #23 + 8001864: 4601 mov r1, r0 + 8001866: 024a lsls r2, r1, #9 + 8001868: 4610 mov r0, r2 + 800186a: 4619 mov r1, r3 + 800186c: 6b7b ldr r3, [r7, #52] @ 0x34 + 800186e: 2200 movs r2, #0 + 8001870: 62bb str r3, [r7, #40] @ 0x28 + 8001872: 62fa str r2, [r7, #44] @ 0x2c + 8001874: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 + 8001878: f7fe fc80 bl 800017c <__aeabi_uldivmod> + 800187c: 4602 mov r2, r0 + 800187e: 460b mov r3, r1 + 8001880: 4613 mov r3, r2 + 8001882: 647b str r3, [r7, #68] @ 0x44 + 8001884: e055 b.n 8001932 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 800183a: 6bbb ldr r3, [r7, #56] @ 0x38 - 800183c: 2200 movs r2, #0 - 800183e: 623b str r3, [r7, #32] - 8001840: 627a str r2, [r7, #36] @ 0x24 - 8001842: e9d7 8908 ldrd r8, r9, [r7, #32] - 8001846: 4642 mov r2, r8 - 8001848: 464b mov r3, r9 - 800184a: f04f 0000 mov.w r0, #0 - 800184e: f04f 0100 mov.w r1, #0 - 8001852: 0159 lsls r1, r3, #5 - 8001854: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 8001858: 0150 lsls r0, r2, #5 - 800185a: 4602 mov r2, r0 - 800185c: 460b mov r3, r1 - 800185e: 46c4 mov ip, r8 - 8001860: ebb2 0a0c subs.w sl, r2, ip - 8001864: 4640 mov r0, r8 - 8001866: 4649 mov r1, r9 - 8001868: 468c mov ip, r1 - 800186a: eb63 0b0c sbc.w fp, r3, ip - 800186e: f04f 0200 mov.w r2, #0 - 8001872: f04f 0300 mov.w r3, #0 - 8001876: ea4f 138b mov.w r3, fp, lsl #6 - 800187a: ea43 639a orr.w r3, r3, sl, lsr #26 - 800187e: ea4f 128a mov.w r2, sl, lsl #6 - 8001882: ebb2 040a subs.w r4, r2, sl - 8001886: eb63 050b sbc.w r5, r3, fp - 800188a: f04f 0200 mov.w r2, #0 - 800188e: f04f 0300 mov.w r3, #0 - 8001892: 00eb lsls r3, r5, #3 - 8001894: ea43 7354 orr.w r3, r3, r4, lsr #29 - 8001898: 00e2 lsls r2, r4, #3 - 800189a: 4614 mov r4, r2 - 800189c: 461d mov r5, r3 - 800189e: 4603 mov r3, r0 - 80018a0: 18e3 adds r3, r4, r3 - 80018a2: 603b str r3, [r7, #0] - 80018a4: 460b mov r3, r1 - 80018a6: eb45 0303 adc.w r3, r5, r3 - 80018aa: 607b str r3, [r7, #4] - 80018ac: f04f 0200 mov.w r2, #0 - 80018b0: f04f 0300 mov.w r3, #0 - 80018b4: e9d7 4500 ldrd r4, r5, [r7] - 80018b8: 4629 mov r1, r5 - 80018ba: 028b lsls r3, r1, #10 - 80018bc: 4620 mov r0, r4 - 80018be: 4629 mov r1, r5 - 80018c0: 4604 mov r4, r0 - 80018c2: ea43 5394 orr.w r3, r3, r4, lsr #22 - 80018c6: 4601 mov r1, r0 - 80018c8: 028a lsls r2, r1, #10 - 80018ca: 4610 mov r0, r2 - 80018cc: 4619 mov r1, r3 - 80018ce: 6b7b ldr r3, [r7, #52] @ 0x34 - 80018d0: 2200 movs r2, #0 - 80018d2: 61bb str r3, [r7, #24] - 80018d4: 61fa str r2, [r7, #28] - 80018d6: e9d7 2306 ldrd r2, r3, [r7, #24] - 80018da: f7fe fc4f bl 800017c <__aeabi_uldivmod> - 80018de: 4602 mov r2, r0 - 80018e0: 460b mov r3, r1 - 80018e2: 4613 mov r3, r2 - 80018e4: 647b str r3, [r7, #68] @ 0x44 + 8001886: 6bbb ldr r3, [r7, #56] @ 0x38 + 8001888: 2200 movs r2, #0 + 800188a: 623b str r3, [r7, #32] + 800188c: 627a str r2, [r7, #36] @ 0x24 + 800188e: e9d7 8908 ldrd r8, r9, [r7, #32] + 8001892: 4642 mov r2, r8 + 8001894: 464b mov r3, r9 + 8001896: f04f 0000 mov.w r0, #0 + 800189a: f04f 0100 mov.w r1, #0 + 800189e: 0159 lsls r1, r3, #5 + 80018a0: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 80018a4: 0150 lsls r0, r2, #5 + 80018a6: 4602 mov r2, r0 + 80018a8: 460b mov r3, r1 + 80018aa: 46c4 mov ip, r8 + 80018ac: ebb2 0a0c subs.w sl, r2, ip + 80018b0: 4640 mov r0, r8 + 80018b2: 4649 mov r1, r9 + 80018b4: 468c mov ip, r1 + 80018b6: eb63 0b0c sbc.w fp, r3, ip + 80018ba: f04f 0200 mov.w r2, #0 + 80018be: f04f 0300 mov.w r3, #0 + 80018c2: ea4f 138b mov.w r3, fp, lsl #6 + 80018c6: ea43 639a orr.w r3, r3, sl, lsr #26 + 80018ca: ea4f 128a mov.w r2, sl, lsl #6 + 80018ce: ebb2 040a subs.w r4, r2, sl + 80018d2: eb63 050b sbc.w r5, r3, fp + 80018d6: f04f 0200 mov.w r2, #0 + 80018da: f04f 0300 mov.w r3, #0 + 80018de: 00eb lsls r3, r5, #3 + 80018e0: ea43 7354 orr.w r3, r3, r4, lsr #29 + 80018e4: 00e2 lsls r2, r4, #3 + 80018e6: 4614 mov r4, r2 + 80018e8: 461d mov r5, r3 + 80018ea: 4603 mov r3, r0 + 80018ec: 18e3 adds r3, r4, r3 + 80018ee: 603b str r3, [r7, #0] + 80018f0: 460b mov r3, r1 + 80018f2: eb45 0303 adc.w r3, r5, r3 + 80018f6: 607b str r3, [r7, #4] + 80018f8: f04f 0200 mov.w r2, #0 + 80018fc: f04f 0300 mov.w r3, #0 + 8001900: e9d7 4500 ldrd r4, r5, [r7] + 8001904: 4629 mov r1, r5 + 8001906: 028b lsls r3, r1, #10 + 8001908: 4620 mov r0, r4 + 800190a: 4629 mov r1, r5 + 800190c: 4604 mov r4, r0 + 800190e: ea43 5394 orr.w r3, r3, r4, lsr #22 + 8001912: 4601 mov r1, r0 + 8001914: 028a lsls r2, r1, #10 + 8001916: 4610 mov r0, r2 + 8001918: 4619 mov r1, r3 + 800191a: 6b7b ldr r3, [r7, #52] @ 0x34 + 800191c: 2200 movs r2, #0 + 800191e: 61bb str r3, [r7, #24] + 8001920: 61fa str r2, [r7, #28] + 8001922: e9d7 2306 ldrd r2, r3, [r7, #24] + 8001926: f7fe fc29 bl 800017c <__aeabi_uldivmod> + 800192a: 4602 mov r2, r0 + 800192c: 460b mov r3, r1 + 800192e: 4613 mov r3, r2 + 8001930: 647b str r3, [r7, #68] @ 0x44 } sysclockfreq = pllvco; - 80018e6: 6c7b ldr r3, [r7, #68] @ 0x44 - 80018e8: 643b str r3, [r7, #64] @ 0x40 + 8001932: 6c7b ldr r3, [r7, #68] @ 0x44 + 8001934: 643b str r3, [r7, #64] @ 0x40 break; - 80018ea: e00d b.n 8001908 + 8001936: e00d b.n 8001954 } case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */ default: /* MSI used as system clock */ { msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos; - 80018ec: 4b09 ldr r3, [pc, #36] @ (8001914 ) - 80018ee: 685b ldr r3, [r3, #4] - 80018f0: 0b5b lsrs r3, r3, #13 - 80018f2: f003 0307 and.w r3, r3, #7 - 80018f6: 633b str r3, [r7, #48] @ 0x30 + 8001938: 4b09 ldr r3, [pc, #36] @ (8001960 ) + 800193a: 685b ldr r3, [r3, #4] + 800193c: 0b5b lsrs r3, r3, #13 + 800193e: f003 0307 and.w r3, r3, #7 + 8001942: 633b str r3, [r7, #48] @ 0x30 sysclockfreq = (32768U * (1UL << (msiclkrange + 1U))); - 80018f8: 6b3b ldr r3, [r7, #48] @ 0x30 - 80018fa: 3301 adds r3, #1 - 80018fc: f44f 4200 mov.w r2, #32768 @ 0x8000 - 8001900: fa02 f303 lsl.w r3, r2, r3 - 8001904: 643b str r3, [r7, #64] @ 0x40 + 8001944: 6b3b ldr r3, [r7, #48] @ 0x30 + 8001946: 3301 adds r3, #1 + 8001948: f44f 4200 mov.w r2, #32768 @ 0x8000 + 800194c: fa02 f303 lsl.w r3, r2, r3 + 8001950: 643b str r3, [r7, #64] @ 0x40 break; - 8001906: bf00 nop + 8001952: bf00 nop } } return sysclockfreq; - 8001908: 6c3b ldr r3, [r7, #64] @ 0x40 + 8001954: 6c3b ldr r3, [r7, #64] @ 0x40 } - 800190a: 4618 mov r0, r3 - 800190c: 3748 adds r7, #72 @ 0x48 - 800190e: 46bd mov sp, r7 - 8001910: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8001914: 40023800 .word 0x40023800 - 8001918: 00f42400 .word 0x00f42400 - 800191c: 007a1200 .word 0x007a1200 - 8001920: 08001d20 .word 0x08001d20 + 8001956: 4618 mov r0, r3 + 8001958: 3748 adds r7, #72 @ 0x48 + 800195a: 46bd mov sp, r7 + 800195c: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 8001960: 40023800 .word 0x40023800 + 8001964: 00f42400 .word 0x00f42400 + 8001968: 007a1200 .word 0x007a1200 + 800196c: 08001d6c .word 0x08001d6c -08001924 : +08001970 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8001924: b480 push {r7} - 8001926: af00 add r7, sp, #0 + 8001970: b480 push {r7} + 8001972: af00 add r7, sp, #0 return SystemCoreClock; - 8001928: 4b02 ldr r3, [pc, #8] @ (8001934 ) - 800192a: 681b ldr r3, [r3, #0] + 8001974: 4b02 ldr r3, [pc, #8] @ (8001980 ) + 8001976: 681b ldr r3, [r3, #0] } - 800192c: 4618 mov r0, r3 - 800192e: 46bd mov sp, r7 - 8001930: bc80 pop {r7} - 8001932: 4770 bx lr - 8001934: 20000000 .word 0x20000000 + 8001978: 4618 mov r0, r3 + 800197a: 46bd mov sp, r7 + 800197c: bc80 pop {r7} + 800197e: 4770 bx lr + 8001980: 20000000 .word 0x20000000 -08001938 : +08001984 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8001938: b580 push {r7, lr} - 800193a: af00 add r7, sp, #0 + 8001984: b580 push {r7, lr} + 8001986: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 800193c: f7ff fff2 bl 8001924 - 8001940: 4602 mov r2, r0 - 8001942: 4b05 ldr r3, [pc, #20] @ (8001958 ) - 8001944: 689b ldr r3, [r3, #8] - 8001946: 0a1b lsrs r3, r3, #8 - 8001948: f003 0307 and.w r3, r3, #7 - 800194c: 4903 ldr r1, [pc, #12] @ (800195c ) - 800194e: 5ccb ldrb r3, [r1, r3] - 8001950: fa22 f303 lsr.w r3, r2, r3 + 8001988: f7ff fff2 bl 8001970 + 800198c: 4602 mov r2, r0 + 800198e: 4b05 ldr r3, [pc, #20] @ (80019a4 ) + 8001990: 689b ldr r3, [r3, #8] + 8001992: 0a1b lsrs r3, r3, #8 + 8001994: f003 0307 and.w r3, r3, #7 + 8001998: 4903 ldr r1, [pc, #12] @ (80019a8 ) + 800199a: 5ccb ldrb r3, [r1, r3] + 800199c: fa22 f303 lsr.w r3, r2, r3 } - 8001954: 4618 mov r0, r3 - 8001956: bd80 pop {r7, pc} - 8001958: 40023800 .word 0x40023800 - 800195c: 08001d3c .word 0x08001d3c + 80019a0: 4618 mov r0, r3 + 80019a2: bd80 pop {r7, pc} + 80019a4: 40023800 .word 0x40023800 + 80019a8: 08001d88 .word 0x08001d88 -08001960 : +080019ac : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8001960: b580 push {r7, lr} - 8001962: af00 add r7, sp, #0 + 80019ac: b580 push {r7, lr} + 80019ae: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8001964: f7ff ffde bl 8001924 - 8001968: 4602 mov r2, r0 - 800196a: 4b05 ldr r3, [pc, #20] @ (8001980 ) - 800196c: 689b ldr r3, [r3, #8] - 800196e: 0adb lsrs r3, r3, #11 - 8001970: f003 0307 and.w r3, r3, #7 - 8001974: 4903 ldr r1, [pc, #12] @ (8001984 ) - 8001976: 5ccb ldrb r3, [r1, r3] - 8001978: fa22 f303 lsr.w r3, r2, r3 + 80019b0: f7ff ffde bl 8001970 + 80019b4: 4602 mov r2, r0 + 80019b6: 4b05 ldr r3, [pc, #20] @ (80019cc ) + 80019b8: 689b ldr r3, [r3, #8] + 80019ba: 0adb lsrs r3, r3, #11 + 80019bc: f003 0307 and.w r3, r3, #7 + 80019c0: 4903 ldr r1, [pc, #12] @ (80019d0 ) + 80019c2: 5ccb ldrb r3, [r1, r3] + 80019c4: fa22 f303 lsr.w r3, r2, r3 } - 800197c: 4618 mov r0, r3 - 800197e: bd80 pop {r7, pc} - 8001980: 40023800 .word 0x40023800 - 8001984: 08001d3c .word 0x08001d3c + 80019c8: 4618 mov r0, r3 + 80019ca: bd80 pop {r7, pc} + 80019cc: 40023800 .word 0x40023800 + 80019d0: 08001d88 .word 0x08001d88 -08001988 : +080019d4 : voltage range * @param MSIrange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_6 * @retval HAL status */ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange) { - 8001988: b480 push {r7} - 800198a: b087 sub sp, #28 - 800198c: af00 add r7, sp, #0 - 800198e: 6078 str r0, [r7, #4] + 80019d4: b480 push {r7} + 80019d6: b087 sub sp, #28 + 80019d8: af00 add r7, sp, #0 + 80019da: 6078 str r0, [r7, #4] uint32_t vos; uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */ - 8001990: 2300 movs r3, #0 - 8001992: 613b str r3, [r7, #16] + 80019dc: 2300 movs r3, #0 + 80019de: 613b str r3, [r7, #16] /* HCLK can reach 4 MHz only if AHB prescaler = 1 */ if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1) - 8001994: 4b29 ldr r3, [pc, #164] @ (8001a3c ) - 8001996: 689b ldr r3, [r3, #8] - 8001998: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 800199c: 2b00 cmp r3, #0 - 800199e: d12c bne.n 80019fa + 80019e0: 4b29 ldr r3, [pc, #164] @ (8001a88 ) + 80019e2: 689b ldr r3, [r3, #8] + 80019e4: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 80019e8: 2b00 cmp r3, #0 + 80019ea: d12c bne.n 8001a46 { if(__HAL_RCC_PWR_IS_CLK_ENABLED()) - 80019a0: 4b26 ldr r3, [pc, #152] @ (8001a3c ) - 80019a2: 6a5b ldr r3, [r3, #36] @ 0x24 - 80019a4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80019a8: 2b00 cmp r3, #0 - 80019aa: d005 beq.n 80019b8 + 80019ec: 4b26 ldr r3, [pc, #152] @ (8001a88 ) + 80019ee: 6a5b ldr r3, [r3, #36] @ 0x24 + 80019f0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80019f4: 2b00 cmp r3, #0 + 80019f6: d005 beq.n 8001a04 { vos = READ_BIT(PWR->CR, PWR_CR_VOS); - 80019ac: 4b24 ldr r3, [pc, #144] @ (8001a40 ) - 80019ae: 681b ldr r3, [r3, #0] - 80019b0: f403 53c0 and.w r3, r3, #6144 @ 0x1800 - 80019b4: 617b str r3, [r7, #20] - 80019b6: e016 b.n 80019e6 + 80019f8: 4b24 ldr r3, [pc, #144] @ (8001a8c ) + 80019fa: 681b ldr r3, [r3, #0] + 80019fc: f403 53c0 and.w r3, r3, #6144 @ 0x1800 + 8001a00: 617b str r3, [r7, #20] + 8001a02: e016 b.n 8001a32 } else { __HAL_RCC_PWR_CLK_ENABLE(); - 80019b8: 4b20 ldr r3, [pc, #128] @ (8001a3c ) - 80019ba: 6a5b ldr r3, [r3, #36] @ 0x24 - 80019bc: 4a1f ldr r2, [pc, #124] @ (8001a3c ) - 80019be: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80019c2: 6253 str r3, [r2, #36] @ 0x24 - 80019c4: 4b1d ldr r3, [pc, #116] @ (8001a3c ) - 80019c6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80019c8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80019cc: 60fb str r3, [r7, #12] - 80019ce: 68fb ldr r3, [r7, #12] + 8001a04: 4b20 ldr r3, [pc, #128] @ (8001a88 ) + 8001a06: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001a08: 4a1f ldr r2, [pc, #124] @ (8001a88 ) + 8001a0a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8001a0e: 6253 str r3, [r2, #36] @ 0x24 + 8001a10: 4b1d ldr r3, [pc, #116] @ (8001a88 ) + 8001a12: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001a14: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8001a18: 60fb str r3, [r7, #12] + 8001a1a: 68fb ldr r3, [r7, #12] vos = READ_BIT(PWR->CR, PWR_CR_VOS); - 80019d0: 4b1b ldr r3, [pc, #108] @ (8001a40 ) - 80019d2: 681b ldr r3, [r3, #0] - 80019d4: f403 53c0 and.w r3, r3, #6144 @ 0x1800 - 80019d8: 617b str r3, [r7, #20] + 8001a1c: 4b1b ldr r3, [pc, #108] @ (8001a8c ) + 8001a1e: 681b ldr r3, [r3, #0] + 8001a20: f403 53c0 and.w r3, r3, #6144 @ 0x1800 + 8001a24: 617b str r3, [r7, #20] __HAL_RCC_PWR_CLK_DISABLE(); - 80019da: 4b18 ldr r3, [pc, #96] @ (8001a3c ) - 80019dc: 6a5b ldr r3, [r3, #36] @ 0x24 - 80019de: 4a17 ldr r2, [pc, #92] @ (8001a3c ) - 80019e0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80019e4: 6253 str r3, [r2, #36] @ 0x24 + 8001a26: 4b18 ldr r3, [pc, #96] @ (8001a88 ) + 8001a28: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001a2a: 4a17 ldr r2, [pc, #92] @ (8001a88 ) + 8001a2c: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8001a30: 6253 str r3, [r2, #36] @ 0x24 } /* Check if need to set latency 1 only for Range 3 & HCLK = 4MHz */ if((vos == PWR_REGULATOR_VOLTAGE_SCALE3) && (MSIrange == RCC_MSIRANGE_6)) - 80019e6: 697b ldr r3, [r7, #20] - 80019e8: f5b3 5fc0 cmp.w r3, #6144 @ 0x1800 - 80019ec: d105 bne.n 80019fa - 80019ee: 687b ldr r3, [r7, #4] - 80019f0: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 - 80019f4: d101 bne.n 80019fa + 8001a32: 697b ldr r3, [r7, #20] + 8001a34: f5b3 5fc0 cmp.w r3, #6144 @ 0x1800 + 8001a38: d105 bne.n 8001a46 + 8001a3a: 687b ldr r3, [r7, #4] + 8001a3c: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 + 8001a40: d101 bne.n 8001a46 { latency = FLASH_LATENCY_1; /* 1WS */ - 80019f6: 2301 movs r3, #1 - 80019f8: 613b str r3, [r7, #16] + 8001a42: 2301 movs r3, #1 + 8001a44: 613b str r3, [r7, #16] } } __HAL_FLASH_SET_LATENCY(latency); - 80019fa: 693b ldr r3, [r7, #16] - 80019fc: 2b01 cmp r3, #1 - 80019fe: d105 bne.n 8001a0c - 8001a00: 4b10 ldr r3, [pc, #64] @ (8001a44 ) - 8001a02: 681b ldr r3, [r3, #0] - 8001a04: 4a0f ldr r2, [pc, #60] @ (8001a44 ) - 8001a06: f043 0304 orr.w r3, r3, #4 - 8001a0a: 6013 str r3, [r2, #0] - 8001a0c: 4b0d ldr r3, [pc, #52] @ (8001a44 ) - 8001a0e: 681b ldr r3, [r3, #0] - 8001a10: f023 0201 bic.w r2, r3, #1 - 8001a14: 490b ldr r1, [pc, #44] @ (8001a44 ) - 8001a16: 693b ldr r3, [r7, #16] - 8001a18: 4313 orrs r3, r2 - 8001a1a: 600b str r3, [r1, #0] + 8001a46: 693b ldr r3, [r7, #16] + 8001a48: 2b01 cmp r3, #1 + 8001a4a: d105 bne.n 8001a58 + 8001a4c: 4b10 ldr r3, [pc, #64] @ (8001a90 ) + 8001a4e: 681b ldr r3, [r3, #0] + 8001a50: 4a0f ldr r2, [pc, #60] @ (8001a90 ) + 8001a52: f043 0304 orr.w r3, r3, #4 + 8001a56: 6013 str r3, [r2, #0] + 8001a58: 4b0d ldr r3, [pc, #52] @ (8001a90 ) + 8001a5a: 681b ldr r3, [r3, #0] + 8001a5c: f023 0201 bic.w r2, r3, #1 + 8001a60: 490b ldr r1, [pc, #44] @ (8001a90 ) + 8001a62: 693b ldr r3, [r7, #16] + 8001a64: 4313 orrs r3, r2 + 8001a66: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != latency) - 8001a1c: 4b09 ldr r3, [pc, #36] @ (8001a44 ) - 8001a1e: 681b ldr r3, [r3, #0] - 8001a20: f003 0301 and.w r3, r3, #1 - 8001a24: 693a ldr r2, [r7, #16] - 8001a26: 429a cmp r2, r3 - 8001a28: d001 beq.n 8001a2e + 8001a68: 4b09 ldr r3, [pc, #36] @ (8001a90 ) + 8001a6a: 681b ldr r3, [r3, #0] + 8001a6c: f003 0301 and.w r3, r3, #1 + 8001a70: 693a ldr r2, [r7, #16] + 8001a72: 429a cmp r2, r3 + 8001a74: d001 beq.n 8001a7a { return HAL_ERROR; - 8001a2a: 2301 movs r3, #1 - 8001a2c: e000 b.n 8001a30 + 8001a76: 2301 movs r3, #1 + 8001a78: e000 b.n 8001a7c } return HAL_OK; - 8001a2e: 2300 movs r3, #0 + 8001a7a: 2300 movs r3, #0 } - 8001a30: 4618 mov r0, r3 - 8001a32: 371c adds r7, #28 - 8001a34: 46bd mov sp, r7 - 8001a36: bc80 pop {r7} - 8001a38: 4770 bx lr - 8001a3a: bf00 nop - 8001a3c: 40023800 .word 0x40023800 - 8001a40: 40007000 .word 0x40007000 - 8001a44: 40023c00 .word 0x40023c00 + 8001a7c: 4618 mov r0, r3 + 8001a7e: 371c adds r7, #28 + 8001a80: 46bd mov sp, r7 + 8001a82: bc80 pop {r7} + 8001a84: 4770 bx lr + 8001a86: bf00 nop + 8001a88: 40023800 .word 0x40023800 + 8001a8c: 40007000 .word 0x40007000 + 8001a90: 40023c00 .word 0x40023c00 -08001a48 : +08001a94 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8001a48: b580 push {r7, lr} - 8001a4a: b082 sub sp, #8 - 8001a4c: af00 add r7, sp, #0 - 8001a4e: 6078 str r0, [r7, #4] + 8001a94: b580 push {r7, lr} + 8001a96: b082 sub sp, #8 + 8001a98: af00 add r7, sp, #0 + 8001a9a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8001a50: 687b ldr r3, [r7, #4] - 8001a52: 2b00 cmp r3, #0 - 8001a54: d101 bne.n 8001a5a + 8001a9c: 687b ldr r3, [r7, #4] + 8001a9e: 2b00 cmp r3, #0 + 8001aa0: d101 bne.n 8001aa6 { return HAL_ERROR; - 8001a56: 2301 movs r3, #1 - 8001a58: e042 b.n 8001ae0 + 8001aa2: 2301 movs r3, #1 + 8001aa4: e042 b.n 8001b2c assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) - 8001a5a: 687b ldr r3, [r7, #4] - 8001a5c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8001a60: b2db uxtb r3, r3 - 8001a62: 2b00 cmp r3, #0 - 8001a64: d106 bne.n 8001a74 + 8001aa6: 687b ldr r3, [r7, #4] + 8001aa8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8001aac: b2db uxtb r3, r3 + 8001aae: 2b00 cmp r3, #0 + 8001ab0: d106 bne.n 8001ac0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8001a66: 687b ldr r3, [r7, #4] - 8001a68: 2200 movs r2, #0 - 8001a6a: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8001ab2: 687b ldr r3, [r7, #4] + 8001ab4: 2200 movs r2, #0 + 8001ab6: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8001a6e: 6878 ldr r0, [r7, #4] - 8001a70: f7fe fe5e bl 8000730 + 8001aba: 6878 ldr r0, [r7, #4] + 8001abc: f7fe fe3c bl 8000738 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8001a74: 687b ldr r3, [r7, #4] - 8001a76: 2224 movs r2, #36 @ 0x24 - 8001a78: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8001ac0: 687b ldr r3, [r7, #4] + 8001ac2: 2224 movs r2, #36 @ 0x24 + 8001ac4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8001a7c: 687b ldr r3, [r7, #4] - 8001a7e: 681b ldr r3, [r3, #0] - 8001a80: 68da ldr r2, [r3, #12] - 8001a82: 687b ldr r3, [r7, #4] - 8001a84: 681b ldr r3, [r3, #0] - 8001a86: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 8001a8a: 60da str r2, [r3, #12] + 8001ac8: 687b ldr r3, [r7, #4] + 8001aca: 681b ldr r3, [r3, #0] + 8001acc: 68da ldr r2, [r3, #12] + 8001ace: 687b ldr r3, [r7, #4] + 8001ad0: 681b ldr r3, [r3, #0] + 8001ad2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 8001ad6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 8001a8c: 6878 ldr r0, [r7, #4] - 8001a8e: f000 f82b bl 8001ae8 + 8001ad8: 6878 ldr r0, [r7, #4] + 8001ada: f000 f82b bl 8001b34 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8001a92: 687b ldr r3, [r7, #4] - 8001a94: 681b ldr r3, [r3, #0] - 8001a96: 691a ldr r2, [r3, #16] - 8001a98: 687b ldr r3, [r7, #4] - 8001a9a: 681b ldr r3, [r3, #0] - 8001a9c: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 8001aa0: 611a str r2, [r3, #16] + 8001ade: 687b ldr r3, [r7, #4] + 8001ae0: 681b ldr r3, [r3, #0] + 8001ae2: 691a ldr r2, [r3, #16] + 8001ae4: 687b ldr r3, [r7, #4] + 8001ae6: 681b ldr r3, [r3, #0] + 8001ae8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 8001aec: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8001aa2: 687b ldr r3, [r7, #4] - 8001aa4: 681b ldr r3, [r3, #0] - 8001aa6: 695a ldr r2, [r3, #20] - 8001aa8: 687b ldr r3, [r7, #4] - 8001aaa: 681b ldr r3, [r3, #0] - 8001aac: f022 022a bic.w r2, r2, #42 @ 0x2a - 8001ab0: 615a str r2, [r3, #20] + 8001aee: 687b ldr r3, [r7, #4] + 8001af0: 681b ldr r3, [r3, #0] + 8001af2: 695a ldr r2, [r3, #20] + 8001af4: 687b ldr r3, [r7, #4] + 8001af6: 681b ldr r3, [r3, #0] + 8001af8: f022 022a bic.w r2, r2, #42 @ 0x2a + 8001afc: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 8001ab2: 687b ldr r3, [r7, #4] - 8001ab4: 681b ldr r3, [r3, #0] - 8001ab6: 68da ldr r2, [r3, #12] - 8001ab8: 687b ldr r3, [r7, #4] - 8001aba: 681b ldr r3, [r3, #0] - 8001abc: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 8001ac0: 60da str r2, [r3, #12] + 8001afe: 687b ldr r3, [r7, #4] + 8001b00: 681b ldr r3, [r3, #0] + 8001b02: 68da ldr r2, [r3, #12] + 8001b04: 687b ldr r3, [r7, #4] + 8001b06: 681b ldr r3, [r3, #0] + 8001b08: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8001b0c: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8001ac2: 687b ldr r3, [r7, #4] - 8001ac4: 2200 movs r2, #0 - 8001ac6: 645a str r2, [r3, #68] @ 0x44 + 8001b0e: 687b ldr r3, [r7, #4] + 8001b10: 2200 movs r2, #0 + 8001b12: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 8001ac8: 687b ldr r3, [r7, #4] - 8001aca: 2220 movs r2, #32 - 8001acc: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8001b14: 687b ldr r3, [r7, #4] + 8001b16: 2220 movs r2, #32 + 8001b18: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 8001ad0: 687b ldr r3, [r7, #4] - 8001ad2: 2220 movs r2, #32 - 8001ad4: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8001b1c: 687b ldr r3, [r7, #4] + 8001b1e: 2220 movs r2, #32 + 8001b20: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8001ad8: 687b ldr r3, [r7, #4] - 8001ada: 2200 movs r2, #0 - 8001adc: 635a str r2, [r3, #52] @ 0x34 + 8001b24: 687b ldr r3, [r7, #4] + 8001b26: 2200 movs r2, #0 + 8001b28: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 8001ade: 2300 movs r3, #0 + 8001b2a: 2300 movs r3, #0 } - 8001ae0: 4618 mov r0, r3 - 8001ae2: 3708 adds r7, #8 - 8001ae4: 46bd mov sp, r7 - 8001ae6: bd80 pop {r7, pc} + 8001b2c: 4618 mov r0, r3 + 8001b2e: 3708 adds r7, #8 + 8001b30: 46bd mov sp, r7 + 8001b32: bd80 pop {r7, pc} -08001ae8 : +08001b34 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8001ae8: b580 push {r7, lr} - 8001aea: b084 sub sp, #16 - 8001aec: af00 add r7, sp, #0 - 8001aee: 6078 str r0, [r7, #4] + 8001b34: b580 push {r7, lr} + 8001b36: b084 sub sp, #16 + 8001b38: af00 add r7, sp, #0 + 8001b3a: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8001af0: 687b ldr r3, [r7, #4] - 8001af2: 681b ldr r3, [r3, #0] - 8001af4: 691b ldr r3, [r3, #16] - 8001af6: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 8001afa: 687b ldr r3, [r7, #4] - 8001afc: 68da ldr r2, [r3, #12] - 8001afe: 687b ldr r3, [r7, #4] - 8001b00: 681b ldr r3, [r3, #0] - 8001b02: 430a orrs r2, r1 - 8001b04: 611a str r2, [r3, #16] + 8001b3c: 687b ldr r3, [r7, #4] + 8001b3e: 681b ldr r3, [r3, #0] + 8001b40: 691b ldr r3, [r3, #16] + 8001b42: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 8001b46: 687b ldr r3, [r7, #4] + 8001b48: 68da ldr r2, [r3, #12] + 8001b4a: 687b ldr r3, [r7, #4] + 8001b4c: 681b ldr r3, [r3, #0] + 8001b4e: 430a orrs r2, r1 + 8001b50: 611a str r2, [r3, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; - 8001b06: 687b ldr r3, [r7, #4] - 8001b08: 689a ldr r2, [r3, #8] - 8001b0a: 687b ldr r3, [r7, #4] - 8001b0c: 691b ldr r3, [r3, #16] - 8001b0e: 431a orrs r2, r3 - 8001b10: 687b ldr r3, [r7, #4] - 8001b12: 695b ldr r3, [r3, #20] - 8001b14: 431a orrs r2, r3 - 8001b16: 687b ldr r3, [r7, #4] - 8001b18: 69db ldr r3, [r3, #28] - 8001b1a: 4313 orrs r3, r2 - 8001b1c: 60bb str r3, [r7, #8] + 8001b52: 687b ldr r3, [r7, #4] + 8001b54: 689a ldr r2, [r3, #8] + 8001b56: 687b ldr r3, [r7, #4] + 8001b58: 691b ldr r3, [r3, #16] + 8001b5a: 431a orrs r2, r3 + 8001b5c: 687b ldr r3, [r7, #4] + 8001b5e: 695b ldr r3, [r3, #20] + 8001b60: 431a orrs r2, r3 + 8001b62: 687b ldr r3, [r7, #4] + 8001b64: 69db ldr r3, [r3, #28] + 8001b66: 4313 orrs r3, r2 + 8001b68: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 8001b1e: 687b ldr r3, [r7, #4] - 8001b20: 681b ldr r3, [r3, #0] - 8001b22: 68db ldr r3, [r3, #12] - 8001b24: f423 4316 bic.w r3, r3, #38400 @ 0x9600 - 8001b28: f023 030c bic.w r3, r3, #12 - 8001b2c: 687a ldr r2, [r7, #4] - 8001b2e: 6812 ldr r2, [r2, #0] - 8001b30: 68b9 ldr r1, [r7, #8] - 8001b32: 430b orrs r3, r1 - 8001b34: 60d3 str r3, [r2, #12] + 8001b6a: 687b ldr r3, [r7, #4] + 8001b6c: 681b ldr r3, [r3, #0] + 8001b6e: 68db ldr r3, [r3, #12] + 8001b70: f423 4316 bic.w r3, r3, #38400 @ 0x9600 + 8001b74: f023 030c bic.w r3, r3, #12 + 8001b78: 687a ldr r2, [r7, #4] + 8001b7a: 6812 ldr r2, [r2, #0] + 8001b7c: 68b9 ldr r1, [r7, #8] + 8001b7e: 430b orrs r3, r1 + 8001b80: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 8001b36: 687b ldr r3, [r7, #4] - 8001b38: 681b ldr r3, [r3, #0] - 8001b3a: 695b ldr r3, [r3, #20] - 8001b3c: f423 7140 bic.w r1, r3, #768 @ 0x300 - 8001b40: 687b ldr r3, [r7, #4] - 8001b42: 699a ldr r2, [r3, #24] - 8001b44: 687b ldr r3, [r7, #4] - 8001b46: 681b ldr r3, [r3, #0] - 8001b48: 430a orrs r2, r1 - 8001b4a: 615a str r2, [r3, #20] + 8001b82: 687b ldr r3, [r7, #4] + 8001b84: 681b ldr r3, [r3, #0] + 8001b86: 695b ldr r3, [r3, #20] + 8001b88: f423 7140 bic.w r1, r3, #768 @ 0x300 + 8001b8c: 687b ldr r3, [r7, #4] + 8001b8e: 699a ldr r2, [r3, #24] + 8001b90: 687b ldr r3, [r7, #4] + 8001b92: 681b ldr r3, [r3, #0] + 8001b94: 430a orrs r2, r1 + 8001b96: 615a str r2, [r3, #20] if((huart->Instance == USART1)) - 8001b4c: 687b ldr r3, [r7, #4] - 8001b4e: 681b ldr r3, [r3, #0] - 8001b50: 4a55 ldr r2, [pc, #340] @ (8001ca8 ) - 8001b52: 4293 cmp r3, r2 - 8001b54: d103 bne.n 8001b5e + 8001b98: 687b ldr r3, [r7, #4] + 8001b9a: 681b ldr r3, [r3, #0] + 8001b9c: 4a55 ldr r2, [pc, #340] @ (8001cf4 ) + 8001b9e: 4293 cmp r3, r2 + 8001ba0: d103 bne.n 8001baa { pclk = HAL_RCC_GetPCLK2Freq(); - 8001b56: f7ff ff03 bl 8001960 - 8001b5a: 60f8 str r0, [r7, #12] - 8001b5c: e002 b.n 8001b64 + 8001ba2: f7ff ff03 bl 80019ac + 8001ba6: 60f8 str r0, [r7, #12] + 8001ba8: e002 b.n 8001bb0 } else { pclk = HAL_RCC_GetPCLK1Freq(); - 8001b5e: f7ff feeb bl 8001938 - 8001b62: 60f8 str r0, [r7, #12] + 8001baa: f7ff feeb bl 8001984 + 8001bae: 60f8 str r0, [r7, #12] } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8001b64: 687b ldr r3, [r7, #4] - 8001b66: 69db ldr r3, [r3, #28] - 8001b68: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 - 8001b6c: d14c bne.n 8001c08 + 8001bb0: 687b ldr r3, [r7, #4] + 8001bb2: 69db ldr r3, [r3, #28] + 8001bb4: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 + 8001bb8: d14c bne.n 8001c54 { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); - 8001b6e: 68fa ldr r2, [r7, #12] - 8001b70: 4613 mov r3, r2 - 8001b72: 009b lsls r3, r3, #2 - 8001b74: 4413 add r3, r2 - 8001b76: 009a lsls r2, r3, #2 - 8001b78: 441a add r2, r3 - 8001b7a: 687b ldr r3, [r7, #4] - 8001b7c: 685b ldr r3, [r3, #4] - 8001b7e: 005b lsls r3, r3, #1 - 8001b80: fbb2 f3f3 udiv r3, r2, r3 - 8001b84: 4a49 ldr r2, [pc, #292] @ (8001cac ) - 8001b86: fba2 2303 umull r2, r3, r2, r3 - 8001b8a: 095b lsrs r3, r3, #5 - 8001b8c: 0119 lsls r1, r3, #4 - 8001b8e: 68fa ldr r2, [r7, #12] - 8001b90: 4613 mov r3, r2 - 8001b92: 009b lsls r3, r3, #2 - 8001b94: 4413 add r3, r2 - 8001b96: 009a lsls r2, r3, #2 - 8001b98: 441a add r2, r3 - 8001b9a: 687b ldr r3, [r7, #4] - 8001b9c: 685b ldr r3, [r3, #4] - 8001b9e: 005b lsls r3, r3, #1 - 8001ba0: fbb2 f2f3 udiv r2, r2, r3 - 8001ba4: 4b41 ldr r3, [pc, #260] @ (8001cac ) - 8001ba6: fba3 0302 umull r0, r3, r3, r2 - 8001baa: 095b lsrs r3, r3, #5 - 8001bac: 2064 movs r0, #100 @ 0x64 - 8001bae: fb00 f303 mul.w r3, r0, r3 - 8001bb2: 1ad3 subs r3, r2, r3 - 8001bb4: 00db lsls r3, r3, #3 - 8001bb6: 3332 adds r3, #50 @ 0x32 - 8001bb8: 4a3c ldr r2, [pc, #240] @ (8001cac ) - 8001bba: fba2 2303 umull r2, r3, r2, r3 - 8001bbe: 095b lsrs r3, r3, #5 - 8001bc0: 005b lsls r3, r3, #1 - 8001bc2: f403 73f8 and.w r3, r3, #496 @ 0x1f0 - 8001bc6: 4419 add r1, r3 - 8001bc8: 68fa ldr r2, [r7, #12] - 8001bca: 4613 mov r3, r2 - 8001bcc: 009b lsls r3, r3, #2 - 8001bce: 4413 add r3, r2 - 8001bd0: 009a lsls r2, r3, #2 - 8001bd2: 441a add r2, r3 - 8001bd4: 687b ldr r3, [r7, #4] - 8001bd6: 685b ldr r3, [r3, #4] - 8001bd8: 005b lsls r3, r3, #1 - 8001bda: fbb2 f2f3 udiv r2, r2, r3 - 8001bde: 4b33 ldr r3, [pc, #204] @ (8001cac ) - 8001be0: fba3 0302 umull r0, r3, r3, r2 - 8001be4: 095b lsrs r3, r3, #5 - 8001be6: 2064 movs r0, #100 @ 0x64 - 8001be8: fb00 f303 mul.w r3, r0, r3 - 8001bec: 1ad3 subs r3, r2, r3 - 8001bee: 00db lsls r3, r3, #3 - 8001bf0: 3332 adds r3, #50 @ 0x32 - 8001bf2: 4a2e ldr r2, [pc, #184] @ (8001cac ) - 8001bf4: fba2 2303 umull r2, r3, r2, r3 - 8001bf8: 095b lsrs r3, r3, #5 - 8001bfa: f003 0207 and.w r2, r3, #7 - 8001bfe: 687b ldr r3, [r7, #4] - 8001c00: 681b ldr r3, [r3, #0] - 8001c02: 440a add r2, r1 - 8001c04: 609a str r2, [r3, #8] + 8001bba: 68fa ldr r2, [r7, #12] + 8001bbc: 4613 mov r3, r2 + 8001bbe: 009b lsls r3, r3, #2 + 8001bc0: 4413 add r3, r2 + 8001bc2: 009a lsls r2, r3, #2 + 8001bc4: 441a add r2, r3 + 8001bc6: 687b ldr r3, [r7, #4] + 8001bc8: 685b ldr r3, [r3, #4] + 8001bca: 005b lsls r3, r3, #1 + 8001bcc: fbb2 f3f3 udiv r3, r2, r3 + 8001bd0: 4a49 ldr r2, [pc, #292] @ (8001cf8 ) + 8001bd2: fba2 2303 umull r2, r3, r2, r3 + 8001bd6: 095b lsrs r3, r3, #5 + 8001bd8: 0119 lsls r1, r3, #4 + 8001bda: 68fa ldr r2, [r7, #12] + 8001bdc: 4613 mov r3, r2 + 8001bde: 009b lsls r3, r3, #2 + 8001be0: 4413 add r3, r2 + 8001be2: 009a lsls r2, r3, #2 + 8001be4: 441a add r2, r3 + 8001be6: 687b ldr r3, [r7, #4] + 8001be8: 685b ldr r3, [r3, #4] + 8001bea: 005b lsls r3, r3, #1 + 8001bec: fbb2 f2f3 udiv r2, r2, r3 + 8001bf0: 4b41 ldr r3, [pc, #260] @ (8001cf8 ) + 8001bf2: fba3 0302 umull r0, r3, r3, r2 + 8001bf6: 095b lsrs r3, r3, #5 + 8001bf8: 2064 movs r0, #100 @ 0x64 + 8001bfa: fb00 f303 mul.w r3, r0, r3 + 8001bfe: 1ad3 subs r3, r2, r3 + 8001c00: 00db lsls r3, r3, #3 + 8001c02: 3332 adds r3, #50 @ 0x32 + 8001c04: 4a3c ldr r2, [pc, #240] @ (8001cf8 ) + 8001c06: fba2 2303 umull r2, r3, r2, r3 + 8001c0a: 095b lsrs r3, r3, #5 + 8001c0c: 005b lsls r3, r3, #1 + 8001c0e: f403 73f8 and.w r3, r3, #496 @ 0x1f0 + 8001c12: 4419 add r1, r3 + 8001c14: 68fa ldr r2, [r7, #12] + 8001c16: 4613 mov r3, r2 + 8001c18: 009b lsls r3, r3, #2 + 8001c1a: 4413 add r3, r2 + 8001c1c: 009a lsls r2, r3, #2 + 8001c1e: 441a add r2, r3 + 8001c20: 687b ldr r3, [r7, #4] + 8001c22: 685b ldr r3, [r3, #4] + 8001c24: 005b lsls r3, r3, #1 + 8001c26: fbb2 f2f3 udiv r2, r2, r3 + 8001c2a: 4b33 ldr r3, [pc, #204] @ (8001cf8 ) + 8001c2c: fba3 0302 umull r0, r3, r3, r2 + 8001c30: 095b lsrs r3, r3, #5 + 8001c32: 2064 movs r0, #100 @ 0x64 + 8001c34: fb00 f303 mul.w r3, r0, r3 + 8001c38: 1ad3 subs r3, r2, r3 + 8001c3a: 00db lsls r3, r3, #3 + 8001c3c: 3332 adds r3, #50 @ 0x32 + 8001c3e: 4a2e ldr r2, [pc, #184] @ (8001cf8 ) + 8001c40: fba2 2303 umull r2, r3, r2, r3 + 8001c44: 095b lsrs r3, r3, #5 + 8001c46: f003 0207 and.w r2, r3, #7 + 8001c4a: 687b ldr r3, [r7, #4] + 8001c4c: 681b ldr r3, [r3, #0] + 8001c4e: 440a add r2, r1 + 8001c50: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } - 8001c06: e04a b.n 8001c9e + 8001c52: e04a b.n 8001cea huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8001c08: 68fa ldr r2, [r7, #12] - 8001c0a: 4613 mov r3, r2 - 8001c0c: 009b lsls r3, r3, #2 - 8001c0e: 4413 add r3, r2 - 8001c10: 009a lsls r2, r3, #2 - 8001c12: 441a add r2, r3 - 8001c14: 687b ldr r3, [r7, #4] - 8001c16: 685b ldr r3, [r3, #4] - 8001c18: 009b lsls r3, r3, #2 - 8001c1a: fbb2 f3f3 udiv r3, r2, r3 - 8001c1e: 4a23 ldr r2, [pc, #140] @ (8001cac ) - 8001c20: fba2 2303 umull r2, r3, r2, r3 - 8001c24: 095b lsrs r3, r3, #5 - 8001c26: 0119 lsls r1, r3, #4 - 8001c28: 68fa ldr r2, [r7, #12] - 8001c2a: 4613 mov r3, r2 - 8001c2c: 009b lsls r3, r3, #2 - 8001c2e: 4413 add r3, r2 - 8001c30: 009a lsls r2, r3, #2 - 8001c32: 441a add r2, r3 - 8001c34: 687b ldr r3, [r7, #4] - 8001c36: 685b ldr r3, [r3, #4] - 8001c38: 009b lsls r3, r3, #2 - 8001c3a: fbb2 f2f3 udiv r2, r2, r3 - 8001c3e: 4b1b ldr r3, [pc, #108] @ (8001cac ) - 8001c40: fba3 0302 umull r0, r3, r3, r2 - 8001c44: 095b lsrs r3, r3, #5 - 8001c46: 2064 movs r0, #100 @ 0x64 - 8001c48: fb00 f303 mul.w r3, r0, r3 - 8001c4c: 1ad3 subs r3, r2, r3 - 8001c4e: 011b lsls r3, r3, #4 - 8001c50: 3332 adds r3, #50 @ 0x32 - 8001c52: 4a16 ldr r2, [pc, #88] @ (8001cac ) - 8001c54: fba2 2303 umull r2, r3, r2, r3 - 8001c58: 095b lsrs r3, r3, #5 - 8001c5a: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 8001c5e: 4419 add r1, r3 - 8001c60: 68fa ldr r2, [r7, #12] - 8001c62: 4613 mov r3, r2 + 8001c54: 68fa ldr r2, [r7, #12] + 8001c56: 4613 mov r3, r2 + 8001c58: 009b lsls r3, r3, #2 + 8001c5a: 4413 add r3, r2 + 8001c5c: 009a lsls r2, r3, #2 + 8001c5e: 441a add r2, r3 + 8001c60: 687b ldr r3, [r7, #4] + 8001c62: 685b ldr r3, [r3, #4] 8001c64: 009b lsls r3, r3, #2 - 8001c66: 4413 add r3, r2 - 8001c68: 009a lsls r2, r3, #2 - 8001c6a: 441a add r2, r3 - 8001c6c: 687b ldr r3, [r7, #4] - 8001c6e: 685b ldr r3, [r3, #4] - 8001c70: 009b lsls r3, r3, #2 - 8001c72: fbb2 f2f3 udiv r2, r2, r3 - 8001c76: 4b0d ldr r3, [pc, #52] @ (8001cac ) - 8001c78: fba3 0302 umull r0, r3, r3, r2 - 8001c7c: 095b lsrs r3, r3, #5 - 8001c7e: 2064 movs r0, #100 @ 0x64 - 8001c80: fb00 f303 mul.w r3, r0, r3 - 8001c84: 1ad3 subs r3, r2, r3 - 8001c86: 011b lsls r3, r3, #4 - 8001c88: 3332 adds r3, #50 @ 0x32 - 8001c8a: 4a08 ldr r2, [pc, #32] @ (8001cac ) - 8001c8c: fba2 2303 umull r2, r3, r2, r3 + 8001c66: fbb2 f3f3 udiv r3, r2, r3 + 8001c6a: 4a23 ldr r2, [pc, #140] @ (8001cf8 ) + 8001c6c: fba2 2303 umull r2, r3, r2, r3 + 8001c70: 095b lsrs r3, r3, #5 + 8001c72: 0119 lsls r1, r3, #4 + 8001c74: 68fa ldr r2, [r7, #12] + 8001c76: 4613 mov r3, r2 + 8001c78: 009b lsls r3, r3, #2 + 8001c7a: 4413 add r3, r2 + 8001c7c: 009a lsls r2, r3, #2 + 8001c7e: 441a add r2, r3 + 8001c80: 687b ldr r3, [r7, #4] + 8001c82: 685b ldr r3, [r3, #4] + 8001c84: 009b lsls r3, r3, #2 + 8001c86: fbb2 f2f3 udiv r2, r2, r3 + 8001c8a: 4b1b ldr r3, [pc, #108] @ (8001cf8 ) + 8001c8c: fba3 0302 umull r0, r3, r3, r2 8001c90: 095b lsrs r3, r3, #5 - 8001c92: f003 020f and.w r2, r3, #15 - 8001c96: 687b ldr r3, [r7, #4] - 8001c98: 681b ldr r3, [r3, #0] - 8001c9a: 440a add r2, r1 - 8001c9c: 609a str r2, [r3, #8] + 8001c92: 2064 movs r0, #100 @ 0x64 + 8001c94: fb00 f303 mul.w r3, r0, r3 + 8001c98: 1ad3 subs r3, r2, r3 + 8001c9a: 011b lsls r3, r3, #4 + 8001c9c: 3332 adds r3, #50 @ 0x32 + 8001c9e: 4a16 ldr r2, [pc, #88] @ (8001cf8 ) + 8001ca0: fba2 2303 umull r2, r3, r2, r3 + 8001ca4: 095b lsrs r3, r3, #5 + 8001ca6: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 8001caa: 4419 add r1, r3 + 8001cac: 68fa ldr r2, [r7, #12] + 8001cae: 4613 mov r3, r2 + 8001cb0: 009b lsls r3, r3, #2 + 8001cb2: 4413 add r3, r2 + 8001cb4: 009a lsls r2, r3, #2 + 8001cb6: 441a add r2, r3 + 8001cb8: 687b ldr r3, [r7, #4] + 8001cba: 685b ldr r3, [r3, #4] + 8001cbc: 009b lsls r3, r3, #2 + 8001cbe: fbb2 f2f3 udiv r2, r2, r3 + 8001cc2: 4b0d ldr r3, [pc, #52] @ (8001cf8 ) + 8001cc4: fba3 0302 umull r0, r3, r3, r2 + 8001cc8: 095b lsrs r3, r3, #5 + 8001cca: 2064 movs r0, #100 @ 0x64 + 8001ccc: fb00 f303 mul.w r3, r0, r3 + 8001cd0: 1ad3 subs r3, r2, r3 + 8001cd2: 011b lsls r3, r3, #4 + 8001cd4: 3332 adds r3, #50 @ 0x32 + 8001cd6: 4a08 ldr r2, [pc, #32] @ (8001cf8 ) + 8001cd8: fba2 2303 umull r2, r3, r2, r3 + 8001cdc: 095b lsrs r3, r3, #5 + 8001cde: f003 020f and.w r2, r3, #15 + 8001ce2: 687b ldr r3, [r7, #4] + 8001ce4: 681b ldr r3, [r3, #0] + 8001ce6: 440a add r2, r1 + 8001ce8: 609a str r2, [r3, #8] } - 8001c9e: bf00 nop - 8001ca0: 3710 adds r7, #16 - 8001ca2: 46bd mov sp, r7 - 8001ca4: bd80 pop {r7, pc} - 8001ca6: bf00 nop - 8001ca8: 40013800 .word 0x40013800 - 8001cac: 51eb851f .word 0x51eb851f + 8001cea: bf00 nop + 8001cec: 3710 adds r7, #16 + 8001cee: 46bd mov sp, r7 + 8001cf0: bd80 pop {r7, pc} + 8001cf2: bf00 nop + 8001cf4: 40013800 .word 0x40013800 + 8001cf8: 51eb851f .word 0x51eb851f -08001cb0 : - 8001cb0: 4603 mov r3, r0 - 8001cb2: 4402 add r2, r0 - 8001cb4: 4293 cmp r3, r2 - 8001cb6: d100 bne.n 8001cba - 8001cb8: 4770 bx lr - 8001cba: f803 1b01 strb.w r1, [r3], #1 - 8001cbe: e7f9 b.n 8001cb4 +08001cfc : + 8001cfc: 4603 mov r3, r0 + 8001cfe: 4402 add r2, r0 + 8001d00: 4293 cmp r3, r2 + 8001d02: d100 bne.n 8001d06 + 8001d04: 4770 bx lr + 8001d06: f803 1b01 strb.w r1, [r3], #1 + 8001d0a: e7f9 b.n 8001d00 -08001cc0 <__libc_init_array>: - 8001cc0: b570 push {r4, r5, r6, lr} - 8001cc2: 2600 movs r6, #0 - 8001cc4: 4d0c ldr r5, [pc, #48] @ (8001cf8 <__libc_init_array+0x38>) - 8001cc6: 4c0d ldr r4, [pc, #52] @ (8001cfc <__libc_init_array+0x3c>) - 8001cc8: 1b64 subs r4, r4, r5 - 8001cca: 10a4 asrs r4, r4, #2 - 8001ccc: 42a6 cmp r6, r4 - 8001cce: d109 bne.n 8001ce4 <__libc_init_array+0x24> - 8001cd0: f000 f81a bl 8001d08 <_init> - 8001cd4: 2600 movs r6, #0 - 8001cd6: 4d0a ldr r5, [pc, #40] @ (8001d00 <__libc_init_array+0x40>) - 8001cd8: 4c0a ldr r4, [pc, #40] @ (8001d04 <__libc_init_array+0x44>) - 8001cda: 1b64 subs r4, r4, r5 - 8001cdc: 10a4 asrs r4, r4, #2 - 8001cde: 42a6 cmp r6, r4 - 8001ce0: d105 bne.n 8001cee <__libc_init_array+0x2e> - 8001ce2: bd70 pop {r4, r5, r6, pc} - 8001ce4: f855 3b04 ldr.w r3, [r5], #4 - 8001ce8: 4798 blx r3 - 8001cea: 3601 adds r6, #1 - 8001cec: e7ee b.n 8001ccc <__libc_init_array+0xc> - 8001cee: f855 3b04 ldr.w r3, [r5], #4 - 8001cf2: 4798 blx r3 - 8001cf4: 3601 adds r6, #1 - 8001cf6: e7f2 b.n 8001cde <__libc_init_array+0x1e> - 8001cf8: 08001d4c .word 0x08001d4c - 8001cfc: 08001d4c .word 0x08001d4c - 8001d00: 08001d4c .word 0x08001d4c - 8001d04: 08001d50 .word 0x08001d50 +08001d0c <__libc_init_array>: + 8001d0c: b570 push {r4, r5, r6, lr} + 8001d0e: 2600 movs r6, #0 + 8001d10: 4d0c ldr r5, [pc, #48] @ (8001d44 <__libc_init_array+0x38>) + 8001d12: 4c0d ldr r4, [pc, #52] @ (8001d48 <__libc_init_array+0x3c>) + 8001d14: 1b64 subs r4, r4, r5 + 8001d16: 10a4 asrs r4, r4, #2 + 8001d18: 42a6 cmp r6, r4 + 8001d1a: d109 bne.n 8001d30 <__libc_init_array+0x24> + 8001d1c: f000 f81a bl 8001d54 <_init> + 8001d20: 2600 movs r6, #0 + 8001d22: 4d0a ldr r5, [pc, #40] @ (8001d4c <__libc_init_array+0x40>) + 8001d24: 4c0a ldr r4, [pc, #40] @ (8001d50 <__libc_init_array+0x44>) + 8001d26: 1b64 subs r4, r4, r5 + 8001d28: 10a4 asrs r4, r4, #2 + 8001d2a: 42a6 cmp r6, r4 + 8001d2c: d105 bne.n 8001d3a <__libc_init_array+0x2e> + 8001d2e: bd70 pop {r4, r5, r6, pc} + 8001d30: f855 3b04 ldr.w r3, [r5], #4 + 8001d34: 4798 blx r3 + 8001d36: 3601 adds r6, #1 + 8001d38: e7ee b.n 8001d18 <__libc_init_array+0xc> + 8001d3a: f855 3b04 ldr.w r3, [r5], #4 + 8001d3e: 4798 blx r3 + 8001d40: 3601 adds r6, #1 + 8001d42: e7f2 b.n 8001d2a <__libc_init_array+0x1e> + 8001d44: 08001d98 .word 0x08001d98 + 8001d48: 08001d98 .word 0x08001d98 + 8001d4c: 08001d98 .word 0x08001d98 + 8001d50: 08001d9c .word 0x08001d9c -08001d08 <_init>: - 8001d08: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001d0a: bf00 nop - 8001d0c: bcf8 pop {r3, r4, r5, r6, r7} - 8001d0e: bc08 pop {r3} - 8001d10: 469e mov lr, r3 - 8001d12: 4770 bx lr +08001d54 <_init>: + 8001d54: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001d56: bf00 nop + 8001d58: bcf8 pop {r3, r4, r5, r6, r7} + 8001d5a: bc08 pop {r3} + 8001d5c: 469e mov lr, r3 + 8001d5e: 4770 bx lr -08001d14 <_fini>: - 8001d14: b5f8 push {r3, r4, r5, r6, r7, lr} - 8001d16: bf00 nop - 8001d18: bcf8 pop {r3, r4, r5, r6, r7} - 8001d1a: bc08 pop {r3} - 8001d1c: 469e mov lr, r3 - 8001d1e: 4770 bx lr +08001d60 <_fini>: + 8001d60: b5f8 push {r3, r4, r5, r6, r7, lr} + 8001d62: bf00 nop + 8001d64: bcf8 pop {r3, r4, r5, r6, r7} + 8001d66: bc08 pop {r3} + 8001d68: 469e mov lr, r3 + 8001d6a: 4770 bx lr diff --git a/TD-1-test/Debug/TD-1-test.map b/TD-1-test/Debug/TD-1-test.map index ffe2d95..8220983 100644 --- a/TD-1-test/Debug/TD-1-test.map +++ b/TD-1-test/Debug/TD-1-test.map @@ -562,8 +562,6 @@ Discarded input sections 0x00000000 0x50 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .text.HAL_GetTickFreq 0x00000000 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .text.HAL_Delay - 0x00000000 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .text.HAL_SuspendTick 0x00000000 0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .text.HAL_ResumeTick @@ -2249,7 +2247,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x08000000 g_pfnVectors 0x0800013c . = ALIGN (0x4) -.text 0x0800013c 0x1bec +.text 0x0800013c 0x1c30 0x0800013c . = ALIGN (0x4) *(.text) .text 0x0800013c 0x40 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o @@ -2383,147 +2381,150 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .text.HAL_GetTick 0x08000938 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o 0x08000938 HAL_GetTick + .text.HAL_Delay + 0x0800094c 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x0800094c HAL_Delay .text.__NVIC_SetPriorityGrouping - 0x0800094c 0x48 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000990 0x48 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x08000994 0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x080009d8 0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x080009b0 0x54 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x080009f4 0x54 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08000a04 0x64 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000a48 0x64 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.SysTick_Config - 0x08000a68 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000aac 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08000aac 0x16 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - 0x08000aac HAL_NVIC_SetPriorityGrouping + 0x08000af0 0x16 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000af0 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08000ac2 0x38 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - 0x08000ac2 HAL_NVIC_SetPriority + 0x08000b06 0x38 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000b06 HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x08000afa 0x18 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - 0x08000afa HAL_SYSTICK_Config - *fill* 0x08000b12 0x2 + 0x08000b3e 0x18 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x08000b3e HAL_SYSTICK_Config + *fill* 0x08000b56 0x2 .text.HAL_GPIO_Init - 0x08000b14 0x320 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - 0x08000b14 HAL_GPIO_Init + 0x08000b58 0x320 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + 0x08000b58 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x08000e34 0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - 0x08000e34 HAL_GPIO_WritePin + 0x08000e78 0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + 0x08000e78 HAL_GPIO_WritePin .text.HAL_RCC_OscConfig - 0x08000e64 0x660 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x08000e64 HAL_RCC_OscConfig + 0x08000ea8 0x660 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x08000ea8 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x080014c4 0x268 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x080014c4 HAL_RCC_ClockConfig + 0x08001508 0x268 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x08001508 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x0800172c 0x200 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x0800172c HAL_RCC_GetSysClockFreq + 0x08001770 0x200 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x08001770 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x0800192c 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x0800192c HAL_RCC_GetHCLKFreq + 0x08001970 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x08001970 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08001940 0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x08001940 HAL_RCC_GetPCLK1Freq + 0x08001984 0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x08001984 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08001968 0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - 0x08001968 HAL_RCC_GetPCLK2Freq + 0x080019ac 0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x080019ac HAL_RCC_GetPCLK2Freq .text.RCC_SetFlashLatencyFromMSIRange - 0x08001990 0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x080019d4 0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .text.HAL_UART_Init - 0x08001a50 0xa0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o - 0x08001a50 HAL_UART_Init + 0x08001a94 0xa0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o + 0x08001a94 HAL_UART_Init .text.UART_SetConfig - 0x08001af0 0x1c8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o - .text.memset 0x08001cb8 0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o) - 0x08001cb8 memset + 0x08001b34 0x1c8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o + .text.memset 0x08001cfc 0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o) + 0x08001cfc memset .text.__libc_init_array - 0x08001cc8 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o) - 0x08001cc8 __libc_init_array + 0x08001d0c 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o) + 0x08001d0c __libc_init_array *(.glue_7) - .glue_7 0x08001d10 0x0 linker stubs + .glue_7 0x08001d54 0x0 linker stubs *(.glue_7t) - .glue_7t 0x08001d10 0x0 linker stubs + .glue_7t 0x08001d54 0x0 linker stubs *(.eh_frame) - .eh_frame 0x08001d10 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o + .eh_frame 0x08001d54 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o *(.init) - .init 0x08001d10 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o - 0x08001d10 _init - .init 0x08001d14 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o + .init 0x08001d54 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o + 0x08001d54 _init + .init 0x08001d58 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o *(.fini) - .fini 0x08001d1c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o - 0x08001d1c _fini - .fini 0x08001d20 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o - 0x08001d28 . = ALIGN (0x4) - 0x08001d28 _etext = . + .fini 0x08001d60 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o + 0x08001d60 _fini + .fini 0x08001d64 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o + 0x08001d6c . = ALIGN (0x4) + 0x08001d6c _etext = . -.vfp11_veneer 0x08001d28 0x0 - .vfp11_veneer 0x08001d28 0x0 linker stubs +.vfp11_veneer 0x08001d6c 0x0 + .vfp11_veneer 0x08001d6c 0x0 linker stubs -.v4_bx 0x08001d28 0x0 - .v4_bx 0x08001d28 0x0 linker stubs +.v4_bx 0x08001d6c 0x0 + .v4_bx 0x08001d6c 0x0 linker stubs -.iplt 0x08001d28 0x0 - .iplt 0x08001d28 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o +.iplt 0x08001d6c 0x0 + .iplt 0x08001d6c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o -.rodata 0x08001d28 0x24 - 0x08001d28 . = ALIGN (0x4) +.rodata 0x08001d6c 0x24 + 0x08001d6c . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.PLLMulTable - 0x08001d28 0x9 ./Core/Src/system_stm32l1xx.o - 0x08001d28 PLLMulTable - *fill* 0x08001d31 0x3 + 0x08001d6c 0x9 ./Core/Src/system_stm32l1xx.o + 0x08001d6c PLLMulTable + *fill* 0x08001d75 0x3 .rodata.AHBPrescTable - 0x08001d34 0x10 ./Core/Src/system_stm32l1xx.o - 0x08001d34 AHBPrescTable + 0x08001d78 0x10 ./Core/Src/system_stm32l1xx.o + 0x08001d78 AHBPrescTable .rodata.APBPrescTable - 0x08001d44 0x8 ./Core/Src/system_stm32l1xx.o - 0x08001d44 APBPrescTable - 0x08001d4c . = ALIGN (0x4) + 0x08001d88 0x8 ./Core/Src/system_stm32l1xx.o + 0x08001d88 APBPrescTable + 0x08001d90 . = ALIGN (0x4) -.ARM.extab 0x08001d4c 0x0 - 0x08001d4c . = ALIGN (0x4) +.ARM.extab 0x08001d90 0x0 + 0x08001d90 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08001d4c . = ALIGN (0x4) + 0x08001d90 . = ALIGN (0x4) -.ARM 0x08001d4c 0x8 - 0x08001d4c . = ALIGN (0x4) - 0x08001d4c __exidx_start = . +.ARM 0x08001d90 0x8 + 0x08001d90 . = ALIGN (0x4) + 0x08001d90 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x08001d4c 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) - 0x08001d54 __exidx_end = . - 0x08001d54 . = ALIGN (0x4) + .ARM.exidx 0x08001d90 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) + 0x08001d98 __exidx_end = . + 0x08001d98 . = ALIGN (0x4) -.preinit_array 0x08001d54 0x0 - 0x08001d54 . = ALIGN (0x4) - 0x08001d54 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08001d98 0x0 + 0x08001d98 . = ALIGN (0x4) + 0x08001d98 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08001d54 PROVIDE (__preinit_array_end = .) - 0x08001d54 . = ALIGN (0x4) + 0x08001d98 PROVIDE (__preinit_array_end = .) + 0x08001d98 . = ALIGN (0x4) -.init_array 0x08001d54 0x4 - 0x08001d54 . = ALIGN (0x4) - 0x08001d54 PROVIDE (__init_array_start = .) +.init_array 0x08001d98 0x4 + 0x08001d98 . = ALIGN (0x4) + 0x08001d98 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08001d54 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o - 0x08001d58 PROVIDE (__init_array_end = .) - 0x08001d58 . = ALIGN (0x4) + .init_array 0x08001d98 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o + 0x08001d9c PROVIDE (__init_array_end = .) + 0x08001d9c . = ALIGN (0x4) -.fini_array 0x08001d58 0x4 - 0x08001d58 . = ALIGN (0x4) +.fini_array 0x08001d9c 0x4 + 0x08001d9c . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08001d58 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o + .fini_array 0x08001d9c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08001d5c . = ALIGN (0x4) - 0x08001d5c _sidata = LOADADDR (.data) + 0x08001da0 . = ALIGN (0x4) + 0x08001da0 _sidata = LOADADDR (.data) -.rel.dyn 0x08001d5c 0x0 - .rel.iplt 0x08001d5c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x08001da0 0x0 + .rel.iplt 0x08001da0 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0xc load address 0x08001d5c +.data 0x20000000 0xc load address 0x08001da0 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -2542,11 +2543,11 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x2000000c . = ALIGN (0x4) 0x2000000c _edata = . -.igot.plt 0x2000000c 0x0 load address 0x08001d68 +.igot.plt 0x2000000c 0x0 load address 0x08001dac .igot.plt 0x2000000c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o 0x2000000c . = ALIGN (0x4) -.bss 0x2000000c 0x68 load address 0x08001d68 +.bss 0x2000000c 0x68 load address 0x08001dac 0x2000000c _sbss = . 0x2000000c __bss_start__ = _sbss *(.bss) @@ -2562,7 +2563,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x20000074 __bss_end__ = _ebss ._user_heap_stack - 0x20000074 0x604 load address 0x08001d68 + 0x20000074 0x604 load address 0x08001dac 0x20000078 . = ALIGN (0x8) *fill* 0x20000074 0x4 [!provide] PROVIDE (end = .) @@ -2623,29 +2624,29 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libm.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a -.debug_info 0x00000000 0x68f7 - .debug_info 0x00000000 0xb19 ./Core/Src/main.o - .debug_info 0x00000b19 0x80f ./Core/Src/stm32l1xx_hal_msp.o - .debug_info 0x00001328 0x113 ./Core/Src/stm32l1xx_it.o - .debug_info 0x0000143b 0x27c ./Core/Src/system_stm32l1xx.o - .debug_info 0x000016b7 0x30 ./Core/Startup/startup_stm32l152retx.o - .debug_info 0x000016e7 0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_info 0x00001dd6 0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_info 0x00002abb 0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_info 0x0000306d 0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_info 0x00003a08 0x2eef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o +.debug_info 0x00000000 0x68e4 + .debug_info 0x00000000 0xb06 ./Core/Src/main.o + .debug_info 0x00000b06 0x80f ./Core/Src/stm32l1xx_hal_msp.o + .debug_info 0x00001315 0x113 ./Core/Src/stm32l1xx_it.o + .debug_info 0x00001428 0x27c ./Core/Src/system_stm32l1xx.o + .debug_info 0x000016a4 0x30 ./Core/Startup/startup_stm32l152retx.o + .debug_info 0x000016d4 0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_info 0x00001dc3 0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_info 0x00002aa8 0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_info 0x0000305a 0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_info 0x000039f5 0x2eef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o -.debug_abbrev 0x00000000 0x12f3 - .debug_abbrev 0x00000000 0x282 ./Core/Src/main.o - .debug_abbrev 0x00000282 0x1aa ./Core/Src/stm32l1xx_hal_msp.o - .debug_abbrev 0x0000042c 0x73 ./Core/Src/stm32l1xx_it.o - .debug_abbrev 0x0000049f 0x11c ./Core/Src/system_stm32l1xx.o - .debug_abbrev 0x000005bb 0x24 ./Core/Startup/startup_stm32l152retx.o - .debug_abbrev 0x000005df 0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_abbrev 0x00000854 0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_abbrev 0x00000b70 0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_abbrev 0x00000d44 0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_abbrev 0x00000ffc 0x2f7 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o +.debug_abbrev 0x00000000 0x12c4 + .debug_abbrev 0x00000000 0x253 ./Core/Src/main.o + .debug_abbrev 0x00000253 0x1aa ./Core/Src/stm32l1xx_hal_msp.o + .debug_abbrev 0x000003fd 0x73 ./Core/Src/stm32l1xx_it.o + .debug_abbrev 0x00000470 0x11c ./Core/Src/system_stm32l1xx.o + .debug_abbrev 0x0000058c 0x24 ./Core/Startup/startup_stm32l152retx.o + .debug_abbrev 0x000005b0 0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_abbrev 0x00000825 0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_abbrev 0x00000b41 0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_abbrev 0x00000d15 0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_abbrev 0x00000fcd 0x2f7 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o .debug_aranges 0x00000000 0x618 .debug_aranges @@ -2749,18 +2750,18 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_line 0x00003c8e 0xf20 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .debug_line 0x00004bae 0x24b1 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o -.debug_str 0x00000000 0x819b0 - .debug_str 0x00000000 0x819b0 ./Core/Src/main.o +.debug_str 0x00000000 0x819a6 + .debug_str 0x00000000 0x819a6 ./Core/Src/main.o 0x805c6 (size before relaxing) - .debug_str 0x000819b0 0x803d4 ./Core/Src/stm32l1xx_hal_msp.o - .debug_str 0x000819b0 0x7ff2a ./Core/Src/stm32l1xx_it.o - .debug_str 0x000819b0 0x7fe7b ./Core/Src/system_stm32l1xx.o - .debug_str 0x000819b0 0x85 ./Core/Startup/startup_stm32l152retx.o - .debug_str 0x000819b0 0x805a3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_str 0x000819b0 0x806af ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_str 0x000819b0 0x8000e ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_str 0x000819b0 0x80337 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_str 0x000819b0 0x808e0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o + .debug_str 0x000819a6 0x803d4 ./Core/Src/stm32l1xx_hal_msp.o + .debug_str 0x000819a6 0x7ff2a ./Core/Src/stm32l1xx_it.o + .debug_str 0x000819a6 0x7fe7b ./Core/Src/system_stm32l1xx.o + .debug_str 0x000819a6 0x85 ./Core/Startup/startup_stm32l152retx.o + .debug_str 0x000819a6 0x805a3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_str 0x000819a6 0x806af ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_str 0x000819a6 0x8000e ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_str 0x000819a6 0x80337 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_str 0x000819a6 0x808e0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/main.o