diff --git a/TP5_TEMP/Core/Inc/stm32l1xx_it.h b/TP5_TEMP/Core/Inc/stm32l1xx_it.h index a0c610b..2c5eb24 100644 --- a/TP5_TEMP/Core/Inc/stm32l1xx_it.h +++ b/TP5_TEMP/Core/Inc/stm32l1xx_it.h @@ -55,7 +55,6 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); -void ADC1_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/TP5_TEMP/Core/Src/main.c b/TP5_TEMP/Core/Src/main.c index 66b5fd2..de5bc92 100644 --- a/TP5_TEMP/Core/Src/main.c +++ b/TP5_TEMP/Core/Src/main.c @@ -77,8 +77,8 @@ void affiche_nombre(uint32_t nombre, uint8_t col, uint8_t ligne) { displayChar_TFT(col + 12, ligne, cen + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); displayChar_TFT(col + 24, ligne, diz + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); displayChar_TFT(col + 36, ligne, uni + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); - displayChar_TFT(col + 48, ligne, 'm', ST7735_YELLOW, ST7735_BLACK, 2); - displayChar_TFT(col + 60, ligne, 'V', ST7735_YELLOW, ST7735_BLACK, 2); + displayChar_TFT(col + 48, ligne, ' ', ST7735_YELLOW, ST7735_BLACK, 2); + displayChar_TFT(col + 60, ligne, 'C', ST7735_YELLOW, ST7735_BLACK, 2); } @@ -124,7 +124,11 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ + const uint16_t TS_CAL1 = *(uint16_t*)0x1FF800FA; + const uint16_t TS_CAL2 = *(uint16_t*)0x1FF800FE; const uint16_t VREFINT_CAL = *(uint16_t*)0x1FF800F8; + const int32_t vrefint_value = 1210; + float vdda_div_3 = (float)VREFINT_CAL / vrefint_value; while (1) { /* USER CODE END WHILE */ @@ -132,11 +136,10 @@ int main(void) /* USER CODE BEGIN 3 */ HAL_ADC_Start(&hadc); HAL_ADC_PollForConversion(&hadc, 1000); - uint32_t value = HAL_ADC_GetValue(&hadc); + uint32_t temp_value = (HAL_ADC_GetValue(&hadc) / 4096.0) * 3300; HAL_ADC_Stop(&hadc); - uint32_t milivolt = (value / 4096.0) * 3300; - affiche_nombre(milivolt, 10, 80); - + float temperature = 80 * (temp_value * vdda_div_3 - TS_CAL1) / (TS_CAL2 - TS_CAL1) + 30; + affiche_nombre((uint32_t)(temperature), 10, 80); } /* USER CODE END 3 */ @@ -224,7 +227,7 @@ static void MX_ADC_Init(void) /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ - sConfig.Channel = ADC_CHANNEL_VREFINT; + sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; sConfig.Rank = ADC_REGULAR_RANK_1; sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES; if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) diff --git a/TP5_TEMP/Core/Src/stm32l1xx_hal_msp.c b/TP5_TEMP/Core/Src/stm32l1xx_hal_msp.c index 70741cc..f0af4fd 100644 --- a/TP5_TEMP/Core/Src/stm32l1xx_hal_msp.c +++ b/TP5_TEMP/Core/Src/stm32l1xx_hal_msp.c @@ -104,9 +104,6 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /* ADC1 interrupt Init */ - HAL_NVIC_SetPriority(ADC1_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(ADC1_IRQn); /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ @@ -136,8 +133,6 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0); - /* ADC1 interrupt DeInit */ - HAL_NVIC_DisableIRQ(ADC1_IRQn); /* USER CODE BEGIN ADC1_MspDeInit 1 */ /* USER CODE END ADC1_MspDeInit 1 */ diff --git a/TP5_TEMP/Core/Src/stm32l1xx_it.c b/TP5_TEMP/Core/Src/stm32l1xx_it.c index 73b9c1f..afd5dcc 100644 --- a/TP5_TEMP/Core/Src/stm32l1xx_it.c +++ b/TP5_TEMP/Core/Src/stm32l1xx_it.c @@ -55,7 +55,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ -extern ADC_HandleTypeDef hadc; + /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -198,20 +198,6 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32l1xx.s). */ /******************************************************************************/ -/** - * @brief This function handles ADC global interrupt. - */ -void ADC1_IRQHandler(void) -{ - /* USER CODE BEGIN ADC1_IRQn 0 */ - - /* USER CODE END ADC1_IRQn 0 */ - HAL_ADC_IRQHandler(&hadc); - /* USER CODE BEGIN ADC1_IRQn 1 */ - - /* USER CODE END ADC1_IRQn 1 */ -} - /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/TP5_TEMP/Debug/Core/Src/main.cyclo b/TP5_TEMP/Debug/Core/Src/main.cyclo index dcf4870..03a50e7 100644 --- a/TP5_TEMP/Debug/Core/Src/main.cyclo +++ b/TP5_TEMP/Debug/Core/Src/main.cyclo @@ -1,7 +1,7 @@ ../Core/Src/main.c:66:6:affiche_nombre 2 ../Core/Src/main.c:91:5:main 1 -../Core/Src/main.c:149:6:SystemClock_Config 3 -../Core/Src/main.c:190:13:MX_ADC_Init 3 -../Core/Src/main.c:245:13:MX_SPI1_Init 2 -../Core/Src/main.c:283:13:MX_GPIO_Init 1 -../Core/Src/main.c:348:6:Error_Handler 1 +../Core/Src/main.c:152:6:SystemClock_Config 3 +../Core/Src/main.c:193:13:MX_ADC_Init 3 +../Core/Src/main.c:248:13:MX_SPI1_Init 2 +../Core/Src/main.c:286:13:MX_GPIO_Init 1 +../Core/Src/main.c:351:6:Error_Handler 1 diff --git a/TP5_TEMP/Debug/Core/Src/main.o b/TP5_TEMP/Debug/Core/Src/main.o index b0e16e9..8fb4c1e 100644 Binary files a/TP5_TEMP/Debug/Core/Src/main.o and b/TP5_TEMP/Debug/Core/Src/main.o differ diff --git a/TP5_TEMP/Debug/Core/Src/main.su b/TP5_TEMP/Debug/Core/Src/main.su index 0c1215d..293bc94 100644 --- a/TP5_TEMP/Debug/Core/Src/main.su +++ b/TP5_TEMP/Debug/Core/Src/main.su @@ -1,7 +1,7 @@ ../Core/Src/main.c:66:6:affiche_nombre 32 static -../Core/Src/main.c:91:5:main 24 static -../Core/Src/main.c:149:6:SystemClock_Config 80 static -../Core/Src/main.c:190:13:MX_ADC_Init 24 static -../Core/Src/main.c:245:13:MX_SPI1_Init 8 static -../Core/Src/main.c:283:13:MX_GPIO_Init 48 static -../Core/Src/main.c:348:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:91:5:main 40 static +../Core/Src/main.c:152:6:SystemClock_Config 80 static +../Core/Src/main.c:193:13:MX_ADC_Init 24 static +../Core/Src/main.c:248:13:MX_SPI1_Init 8 static +../Core/Src/main.c:286:13:MX_GPIO_Init 48 static +../Core/Src/main.c:351:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.cyclo b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.cyclo index 5043ec7..d0977ad 100644 --- a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.cyclo +++ b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.cyclo @@ -1,5 +1,5 @@ ../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 1 ../Core/Src/stm32l1xx_hal_msp.c:87:6:HAL_ADC_MspInit 2 -../Core/Src/stm32l1xx_hal_msp.c:124:6:HAL_ADC_MspDeInit 2 -../Core/Src/stm32l1xx_hal_msp.c:154:6:HAL_SPI_MspInit 2 -../Core/Src/stm32l1xx_hal_msp.c:192:6:HAL_SPI_MspDeInit 2 +../Core/Src/stm32l1xx_hal_msp.c:121:6:HAL_ADC_MspDeInit 2 +../Core/Src/stm32l1xx_hal_msp.c:149:6:HAL_SPI_MspInit 2 +../Core/Src/stm32l1xx_hal_msp.c:187:6:HAL_SPI_MspDeInit 2 diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.o b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.o index a2f6158..48638d8 100644 Binary files a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.o and b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.o differ diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.su b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.su index aa65ccc..626a1ab 100644 --- a/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.su +++ b/TP5_TEMP/Debug/Core/Src/stm32l1xx_hal_msp.su @@ -1,5 +1,5 @@ ../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 24 static ../Core/Src/stm32l1xx_hal_msp.c:87:6:HAL_ADC_MspInit 48 static -../Core/Src/stm32l1xx_hal_msp.c:124:6:HAL_ADC_MspDeInit 16 static -../Core/Src/stm32l1xx_hal_msp.c:154:6:HAL_SPI_MspInit 48 static -../Core/Src/stm32l1xx_hal_msp.c:192:6:HAL_SPI_MspDeInit 16 static +../Core/Src/stm32l1xx_hal_msp.c:121:6:HAL_ADC_MspDeInit 16 static +../Core/Src/stm32l1xx_hal_msp.c:149:6:HAL_SPI_MspInit 48 static +../Core/Src/stm32l1xx_hal_msp.c:187:6:HAL_SPI_MspDeInit 16 static diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.cyclo b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.cyclo index 7f95aba..79351de 100644 --- a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.cyclo +++ b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.cyclo @@ -7,4 +7,3 @@ ../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 1 ../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 1 ../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 1 -../Core/Src/stm32l1xx_it.c:204:6:ADC1_IRQHandler 1 diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.o b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.o index a849e04..29b003d 100644 Binary files a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.o and b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.o differ diff --git a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.su b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.su index fa87c01..affde81 100644 --- a/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.su +++ b/TP5_TEMP/Debug/Core/Src/stm32l1xx_it.su @@ -7,4 +7,3 @@ ../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 4 static ../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 4 static ../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 8 static -../Core/Src/stm32l1xx_it.c:204:6:ADC1_IRQHandler 8 static diff --git a/TP5_TEMP/Debug/TP5_TEMP.elf b/TP5_TEMP/Debug/TP5_TEMP.elf index 472ee9d..661f826 100755 Binary files a/TP5_TEMP/Debug/TP5_TEMP.elf and b/TP5_TEMP/Debug/TP5_TEMP.elf differ diff --git a/TP5_TEMP/Debug/TP5_TEMP.list b/TP5_TEMP/Debug/TP5_TEMP.list index be61dfb..dcee47a 100644 --- a/TP5_TEMP/Debug/TP5_TEMP.list +++ b/TP5_TEMP/Debug/TP5_TEMP.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000013c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00003c58 08000140 08000140 00001140 2**3 + 1 .text 00003f4c 08000140 08000140 00001140 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000860 08003d98 08003d98 00004d98 2**2 + 2 .rodata 00000860 0800408c 0800408c 0000508c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080045f8 080045f8 0000600c 2**0 + 3 .ARM.extab 00000000 080048ec 080048ec 0000600c 2**0 CONTENTS, READONLY - 4 .ARM 00000008 080045f8 080045f8 000055f8 2**2 + 4 .ARM 00000008 080048ec 080048ec 000058ec 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08004600 08004600 0000600c 2**0 + 5 .preinit_array 00000000 080048f4 080048f4 0000600c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08004600 08004600 00005600 2**2 + 6 .init_array 00000004 080048f4 080048f4 000058f4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08004604 08004604 00005604 2**2 + 7 .fini_array 00000004 080048f8 080048f8 000058f8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 0000000c 20000000 08004608 00006000 2**2 + 8 .data 0000000c 20000000 080048fc 00006000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000000cc 2000000c 08004614 0000600c 2**2 + 9 .bss 000000cc 2000000c 08004908 0000600c 2**2 ALLOC - 10 ._user_heap_stack 00000600 200000d8 08004614 000060d8 2**0 + 10 ._user_heap_stack 00000600 200000d8 08004908 000060d8 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0000600c 2**0 CONTENTS, READONLY - 12 .debug_info 00008821 00000000 00000000 00006035 2**0 + 12 .debug_info 00007879 00000000 00000000 00006035 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001cef 00000000 00000000 0000e856 2**0 + 13 .debug_abbrev 00001970 00000000 00000000 0000d8ae 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000840 00000000 00000000 00010548 2**3 + 14 .debug_aranges 000007e0 00000000 00000000 0000f220 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 0000062d 00000000 00000000 00010d88 2**0 + 15 .debug_rnglists 000005e4 00000000 00000000 0000fa00 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 00015968 00000000 00000000 000113b5 2**0 + 16 .debug_macro 00015783 00000000 00000000 0000ffe4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 000097d4 00000000 00000000 00026d1d 2**0 + 17 .debug_line 00008d64 00000000 00000000 00025767 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 000884c8 00000000 00000000 000304f1 2**0 + 18 .debug_str 00088159 00000000 00000000 0002e4cb 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000b89b9 2**0 + 19 .comment 00000043 00000000 00000000 000b6624 2**0 CONTENTS, READONLY - 20 .debug_frame 00002174 00000000 00000000 000b89fc 2**2 + 20 .debug_frame 000020c0 00000000 00000000 000b6668 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000068 00000000 00000000 000bab70 2**0 + 21 .debug_line_str 00000068 00000000 00000000 000b8728 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 8000156: bd10 pop {r4, pc} 8000158: 2000000c .word 0x2000000c 800015c: 00000000 .word 0x00000000 - 8000160: 08003d80 .word 0x08003d80 + 8000160: 08004074 .word 0x08004074 08000164 : 8000164: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 8000172: bd08 pop {r3, pc} 8000174: 00000000 .word 0x00000000 8000178: 20000010 .word 0x20000010 - 800017c: 08003d80 .word 0x08003d80 + 800017c: 08004074 .word 0x08004074 08000180 <__aeabi_drsub>: 8000180: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 @@ -728,9042 +728,9003 @@ Disassembly of section .text: 8000956: f04f 0000 mov.w r0, #0 800095a: 4770 bx lr -0800095c <__aeabi_uldivmod>: - 800095c: b953 cbnz r3, 8000974 <__aeabi_uldivmod+0x18> - 800095e: b94a cbnz r2, 8000974 <__aeabi_uldivmod+0x18> - 8000960: 2900 cmp r1, #0 - 8000962: bf08 it eq - 8000964: 2800 cmpeq r0, #0 - 8000966: bf1c itt ne - 8000968: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff - 800096c: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff - 8000970: f000 b98c b.w 8000c8c <__aeabi_idiv0> - 8000974: f1ad 0c08 sub.w ip, sp, #8 - 8000978: e96d ce04 strd ip, lr, [sp, #-16]! - 800097c: f000 f806 bl 800098c <__udivmoddi4> - 8000980: f8dd e004 ldr.w lr, [sp, #4] - 8000984: e9dd 2302 ldrd r2, r3, [sp, #8] - 8000988: b004 add sp, #16 - 800098a: 4770 bx lr +0800095c <__aeabi_frsub>: + 800095c: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 + 8000960: e002 b.n 8000968 <__addsf3> + 8000962: bf00 nop -0800098c <__udivmoddi4>: - 800098c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 8000990: 9d08 ldr r5, [sp, #32] - 8000992: 468e mov lr, r1 - 8000994: 4604 mov r4, r0 - 8000996: 4688 mov r8, r1 - 8000998: 2b00 cmp r3, #0 - 800099a: d14a bne.n 8000a32 <__udivmoddi4+0xa6> - 800099c: 428a cmp r2, r1 - 800099e: 4617 mov r7, r2 - 80009a0: d962 bls.n 8000a68 <__udivmoddi4+0xdc> - 80009a2: fab2 f682 clz r6, r2 - 80009a6: b14e cbz r6, 80009bc <__udivmoddi4+0x30> - 80009a8: f1c6 0320 rsb r3, r6, #32 - 80009ac: fa01 f806 lsl.w r8, r1, r6 - 80009b0: fa20 f303 lsr.w r3, r0, r3 - 80009b4: 40b7 lsls r7, r6 - 80009b6: ea43 0808 orr.w r8, r3, r8 - 80009ba: 40b4 lsls r4, r6 - 80009bc: ea4f 4e17 mov.w lr, r7, lsr #16 - 80009c0: fbb8 f1fe udiv r1, r8, lr - 80009c4: fa1f fc87 uxth.w ip, r7 - 80009c8: fb0e 8811 mls r8, lr, r1, r8 - 80009cc: fb01 f20c mul.w r2, r1, ip - 80009d0: 0c23 lsrs r3, r4, #16 - 80009d2: ea43 4308 orr.w r3, r3, r8, lsl #16 - 80009d6: 429a cmp r2, r3 - 80009d8: d909 bls.n 80009ee <__udivmoddi4+0x62> - 80009da: 18fb adds r3, r7, r3 - 80009dc: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff - 80009e0: f080 80eb bcs.w 8000bba <__udivmoddi4+0x22e> - 80009e4: 429a cmp r2, r3 - 80009e6: f240 80e8 bls.w 8000bba <__udivmoddi4+0x22e> - 80009ea: 3902 subs r1, #2 - 80009ec: 443b add r3, r7 - 80009ee: 1a9a subs r2, r3, r2 - 80009f0: fbb2 f0fe udiv r0, r2, lr - 80009f4: fb0e 2210 mls r2, lr, r0, r2 - 80009f8: fb00 fc0c mul.w ip, r0, ip - 80009fc: b2a3 uxth r3, r4 - 80009fe: ea43 4302 orr.w r3, r3, r2, lsl #16 - 8000a02: 459c cmp ip, r3 - 8000a04: d909 bls.n 8000a1a <__udivmoddi4+0x8e> - 8000a06: 18fb adds r3, r7, r3 - 8000a08: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff - 8000a0c: f080 80d7 bcs.w 8000bbe <__udivmoddi4+0x232> - 8000a10: 459c cmp ip, r3 - 8000a12: f240 80d4 bls.w 8000bbe <__udivmoddi4+0x232> - 8000a16: 443b add r3, r7 - 8000a18: 3802 subs r0, #2 - 8000a1a: ea40 4001 orr.w r0, r0, r1, lsl #16 - 8000a1e: 2100 movs r1, #0 - 8000a20: eba3 030c sub.w r3, r3, ip - 8000a24: b11d cbz r5, 8000a2e <__udivmoddi4+0xa2> - 8000a26: 2200 movs r2, #0 - 8000a28: 40f3 lsrs r3, r6 - 8000a2a: e9c5 3200 strd r3, r2, [r5] - 8000a2e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8000a32: 428b cmp r3, r1 - 8000a34: d905 bls.n 8000a42 <__udivmoddi4+0xb6> - 8000a36: b10d cbz r5, 8000a3c <__udivmoddi4+0xb0> - 8000a38: e9c5 0100 strd r0, r1, [r5] - 8000a3c: 2100 movs r1, #0 - 8000a3e: 4608 mov r0, r1 - 8000a40: e7f5 b.n 8000a2e <__udivmoddi4+0xa2> - 8000a42: fab3 f183 clz r1, r3 - 8000a46: 2900 cmp r1, #0 - 8000a48: d146 bne.n 8000ad8 <__udivmoddi4+0x14c> - 8000a4a: 4573 cmp r3, lr - 8000a4c: d302 bcc.n 8000a54 <__udivmoddi4+0xc8> - 8000a4e: 4282 cmp r2, r0 - 8000a50: f200 8108 bhi.w 8000c64 <__udivmoddi4+0x2d8> - 8000a54: 1a84 subs r4, r0, r2 - 8000a56: eb6e 0203 sbc.w r2, lr, r3 - 8000a5a: 2001 movs r0, #1 - 8000a5c: 4690 mov r8, r2 - 8000a5e: 2d00 cmp r5, #0 - 8000a60: d0e5 beq.n 8000a2e <__udivmoddi4+0xa2> - 8000a62: e9c5 4800 strd r4, r8, [r5] - 8000a66: e7e2 b.n 8000a2e <__udivmoddi4+0xa2> - 8000a68: 2a00 cmp r2, #0 - 8000a6a: f000 8091 beq.w 8000b90 <__udivmoddi4+0x204> - 8000a6e: fab2 f682 clz r6, r2 - 8000a72: 2e00 cmp r6, #0 - 8000a74: f040 80a5 bne.w 8000bc2 <__udivmoddi4+0x236> - 8000a78: 1a8a subs r2, r1, r2 - 8000a7a: 2101 movs r1, #1 - 8000a7c: 0c03 lsrs r3, r0, #16 - 8000a7e: ea4f 4e17 mov.w lr, r7, lsr #16 - 8000a82: b280 uxth r0, r0 - 8000a84: b2bc uxth r4, r7 - 8000a86: fbb2 fcfe udiv ip, r2, lr - 8000a8a: fb0e 221c mls r2, lr, ip, r2 - 8000a8e: ea43 4302 orr.w r3, r3, r2, lsl #16 - 8000a92: fb04 f20c mul.w r2, r4, ip - 8000a96: 429a cmp r2, r3 - 8000a98: d907 bls.n 8000aaa <__udivmoddi4+0x11e> - 8000a9a: 18fb adds r3, r7, r3 - 8000a9c: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff - 8000aa0: d202 bcs.n 8000aa8 <__udivmoddi4+0x11c> - 8000aa2: 429a cmp r2, r3 - 8000aa4: f200 80e3 bhi.w 8000c6e <__udivmoddi4+0x2e2> - 8000aa8: 46c4 mov ip, r8 - 8000aaa: 1a9b subs r3, r3, r2 - 8000aac: fbb3 f2fe udiv r2, r3, lr - 8000ab0: fb0e 3312 mls r3, lr, r2, r3 - 8000ab4: fb02 f404 mul.w r4, r2, r4 - 8000ab8: ea40 4303 orr.w r3, r0, r3, lsl #16 - 8000abc: 429c cmp r4, r3 - 8000abe: d907 bls.n 8000ad0 <__udivmoddi4+0x144> - 8000ac0: 18fb adds r3, r7, r3 - 8000ac2: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff - 8000ac6: d202 bcs.n 8000ace <__udivmoddi4+0x142> - 8000ac8: 429c cmp r4, r3 - 8000aca: f200 80cd bhi.w 8000c68 <__udivmoddi4+0x2dc> - 8000ace: 4602 mov r2, r0 - 8000ad0: 1b1b subs r3, r3, r4 - 8000ad2: ea42 400c orr.w r0, r2, ip, lsl #16 - 8000ad6: e7a5 b.n 8000a24 <__udivmoddi4+0x98> - 8000ad8: f1c1 0620 rsb r6, r1, #32 - 8000adc: 408b lsls r3, r1 - 8000ade: fa22 f706 lsr.w r7, r2, r6 - 8000ae2: 431f orrs r7, r3 - 8000ae4: fa2e fa06 lsr.w sl, lr, r6 - 8000ae8: ea4f 4917 mov.w r9, r7, lsr #16 - 8000aec: fbba f8f9 udiv r8, sl, r9 - 8000af0: fa0e fe01 lsl.w lr, lr, r1 - 8000af4: fa20 f306 lsr.w r3, r0, r6 - 8000af8: fb09 aa18 mls sl, r9, r8, sl - 8000afc: fa1f fc87 uxth.w ip, r7 - 8000b00: ea43 030e orr.w r3, r3, lr - 8000b04: fa00 fe01 lsl.w lr, r0, r1 - 8000b08: fb08 f00c mul.w r0, r8, ip - 8000b0c: 0c1c lsrs r4, r3, #16 - 8000b0e: ea44 440a orr.w r4, r4, sl, lsl #16 - 8000b12: 42a0 cmp r0, r4 - 8000b14: fa02 f201 lsl.w r2, r2, r1 - 8000b18: d90a bls.n 8000b30 <__udivmoddi4+0x1a4> - 8000b1a: 193c adds r4, r7, r4 - 8000b1c: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff - 8000b20: f080 809e bcs.w 8000c60 <__udivmoddi4+0x2d4> - 8000b24: 42a0 cmp r0, r4 - 8000b26: f240 809b bls.w 8000c60 <__udivmoddi4+0x2d4> - 8000b2a: f1a8 0802 sub.w r8, r8, #2 - 8000b2e: 443c add r4, r7 - 8000b30: 1a24 subs r4, r4, r0 - 8000b32: b298 uxth r0, r3 - 8000b34: fbb4 f3f9 udiv r3, r4, r9 - 8000b38: fb09 4413 mls r4, r9, r3, r4 - 8000b3c: fb03 fc0c mul.w ip, r3, ip - 8000b40: ea40 4404 orr.w r4, r0, r4, lsl #16 - 8000b44: 45a4 cmp ip, r4 - 8000b46: d909 bls.n 8000b5c <__udivmoddi4+0x1d0> - 8000b48: 193c adds r4, r7, r4 - 8000b4a: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff - 8000b4e: f080 8085 bcs.w 8000c5c <__udivmoddi4+0x2d0> - 8000b52: 45a4 cmp ip, r4 - 8000b54: f240 8082 bls.w 8000c5c <__udivmoddi4+0x2d0> - 8000b58: 3b02 subs r3, #2 - 8000b5a: 443c add r4, r7 - 8000b5c: ea43 4008 orr.w r0, r3, r8, lsl #16 - 8000b60: eba4 040c sub.w r4, r4, ip - 8000b64: fba0 8c02 umull r8, ip, r0, r2 - 8000b68: 4564 cmp r4, ip - 8000b6a: 4643 mov r3, r8 - 8000b6c: 46e1 mov r9, ip - 8000b6e: d364 bcc.n 8000c3a <__udivmoddi4+0x2ae> - 8000b70: d061 beq.n 8000c36 <__udivmoddi4+0x2aa> - 8000b72: b15d cbz r5, 8000b8c <__udivmoddi4+0x200> - 8000b74: ebbe 0203 subs.w r2, lr, r3 - 8000b78: eb64 0409 sbc.w r4, r4, r9 - 8000b7c: fa04 f606 lsl.w r6, r4, r6 - 8000b80: fa22 f301 lsr.w r3, r2, r1 - 8000b84: 431e orrs r6, r3 - 8000b86: 40cc lsrs r4, r1 - 8000b88: e9c5 6400 strd r6, r4, [r5] - 8000b8c: 2100 movs r1, #0 - 8000b8e: e74e b.n 8000a2e <__udivmoddi4+0xa2> - 8000b90: fbb1 fcf2 udiv ip, r1, r2 - 8000b94: 0c01 lsrs r1, r0, #16 - 8000b96: ea41 410e orr.w r1, r1, lr, lsl #16 - 8000b9a: b280 uxth r0, r0 - 8000b9c: ea40 4201 orr.w r2, r0, r1, lsl #16 - 8000ba0: 463b mov r3, r7 - 8000ba2: fbb1 f1f7 udiv r1, r1, r7 - 8000ba6: 4638 mov r0, r7 - 8000ba8: 463c mov r4, r7 - 8000baa: 46b8 mov r8, r7 - 8000bac: 46be mov lr, r7 - 8000bae: 2620 movs r6, #32 - 8000bb0: eba2 0208 sub.w r2, r2, r8 - 8000bb4: ea41 410c orr.w r1, r1, ip, lsl #16 - 8000bb8: e765 b.n 8000a86 <__udivmoddi4+0xfa> - 8000bba: 4601 mov r1, r0 - 8000bbc: e717 b.n 80009ee <__udivmoddi4+0x62> - 8000bbe: 4610 mov r0, r2 - 8000bc0: e72b b.n 8000a1a <__udivmoddi4+0x8e> - 8000bc2: f1c6 0120 rsb r1, r6, #32 - 8000bc6: fa2e fc01 lsr.w ip, lr, r1 - 8000bca: 40b7 lsls r7, r6 - 8000bcc: fa0e fe06 lsl.w lr, lr, r6 - 8000bd0: fa20 f101 lsr.w r1, r0, r1 - 8000bd4: ea41 010e orr.w r1, r1, lr - 8000bd8: ea4f 4e17 mov.w lr, r7, lsr #16 - 8000bdc: fbbc f8fe udiv r8, ip, lr - 8000be0: b2bc uxth r4, r7 - 8000be2: fb0e cc18 mls ip, lr, r8, ip - 8000be6: fb08 f904 mul.w r9, r8, r4 - 8000bea: 0c0a lsrs r2, r1, #16 - 8000bec: ea42 420c orr.w r2, r2, ip, lsl #16 - 8000bf0: 40b0 lsls r0, r6 - 8000bf2: 4591 cmp r9, r2 - 8000bf4: ea4f 4310 mov.w r3, r0, lsr #16 - 8000bf8: b280 uxth r0, r0 - 8000bfa: d93e bls.n 8000c7a <__udivmoddi4+0x2ee> - 8000bfc: 18ba adds r2, r7, r2 - 8000bfe: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff - 8000c02: d201 bcs.n 8000c08 <__udivmoddi4+0x27c> - 8000c04: 4591 cmp r9, r2 - 8000c06: d81f bhi.n 8000c48 <__udivmoddi4+0x2bc> - 8000c08: eba2 0209 sub.w r2, r2, r9 - 8000c0c: fbb2 f9fe udiv r9, r2, lr - 8000c10: fb09 f804 mul.w r8, r9, r4 - 8000c14: fb0e 2a19 mls sl, lr, r9, r2 - 8000c18: b28a uxth r2, r1 - 8000c1a: ea42 420a orr.w r2, r2, sl, lsl #16 - 8000c1e: 4542 cmp r2, r8 - 8000c20: d229 bcs.n 8000c76 <__udivmoddi4+0x2ea> - 8000c22: 18ba adds r2, r7, r2 - 8000c24: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff - 8000c28: d2c2 bcs.n 8000bb0 <__udivmoddi4+0x224> - 8000c2a: 4542 cmp r2, r8 - 8000c2c: d2c0 bcs.n 8000bb0 <__udivmoddi4+0x224> - 8000c2e: f1a9 0102 sub.w r1, r9, #2 - 8000c32: 443a add r2, r7 - 8000c34: e7bc b.n 8000bb0 <__udivmoddi4+0x224> - 8000c36: 45c6 cmp lr, r8 - 8000c38: d29b bcs.n 8000b72 <__udivmoddi4+0x1e6> - 8000c3a: ebb8 0302 subs.w r3, r8, r2 - 8000c3e: eb6c 0c07 sbc.w ip, ip, r7 - 8000c42: 3801 subs r0, #1 - 8000c44: 46e1 mov r9, ip - 8000c46: e794 b.n 8000b72 <__udivmoddi4+0x1e6> - 8000c48: eba7 0909 sub.w r9, r7, r9 - 8000c4c: 444a add r2, r9 - 8000c4e: fbb2 f9fe udiv r9, r2, lr - 8000c52: f1a8 0c02 sub.w ip, r8, #2 - 8000c56: fb09 f804 mul.w r8, r9, r4 - 8000c5a: e7db b.n 8000c14 <__udivmoddi4+0x288> - 8000c5c: 4603 mov r3, r0 - 8000c5e: e77d b.n 8000b5c <__udivmoddi4+0x1d0> - 8000c60: 46d0 mov r8, sl - 8000c62: e765 b.n 8000b30 <__udivmoddi4+0x1a4> - 8000c64: 4608 mov r0, r1 - 8000c66: e6fa b.n 8000a5e <__udivmoddi4+0xd2> - 8000c68: 443b add r3, r7 - 8000c6a: 3a02 subs r2, #2 - 8000c6c: e730 b.n 8000ad0 <__udivmoddi4+0x144> - 8000c6e: f1ac 0c02 sub.w ip, ip, #2 - 8000c72: 443b add r3, r7 - 8000c74: e719 b.n 8000aaa <__udivmoddi4+0x11e> - 8000c76: 4649 mov r1, r9 - 8000c78: e79a b.n 8000bb0 <__udivmoddi4+0x224> - 8000c7a: eba2 0209 sub.w r2, r2, r9 - 8000c7e: fbb2 f9fe udiv r9, r2, lr - 8000c82: 46c4 mov ip, r8 - 8000c84: fb09 f804 mul.w r8, r9, r4 - 8000c88: e7c4 b.n 8000c14 <__udivmoddi4+0x288> - 8000c8a: bf00 nop +08000964 <__aeabi_fsub>: + 8000964: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 -08000c8c <__aeabi_idiv0>: - 8000c8c: 4770 bx lr - 8000c8e: bf00 nop +08000968 <__addsf3>: + 8000968: 0042 lsls r2, r0, #1 + 800096a: bf1f itttt ne + 800096c: ea5f 0341 movsne.w r3, r1, lsl #1 + 8000970: ea92 0f03 teqne r2, r3 + 8000974: ea7f 6c22 mvnsne.w ip, r2, asr #24 + 8000978: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 800097c: d06a beq.n 8000a54 <__addsf3+0xec> + 800097e: ea4f 6212 mov.w r2, r2, lsr #24 + 8000982: ebd2 6313 rsbs r3, r2, r3, lsr #24 + 8000986: bfc1 itttt gt + 8000988: 18d2 addgt r2, r2, r3 + 800098a: 4041 eorgt r1, r0 + 800098c: 4048 eorgt r0, r1 + 800098e: 4041 eorgt r1, r0 + 8000990: bfb8 it lt + 8000992: 425b neglt r3, r3 + 8000994: 2b19 cmp r3, #25 + 8000996: bf88 it hi + 8000998: 4770 bxhi lr + 800099a: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 800099e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80009a2: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 + 80009a6: bf18 it ne + 80009a8: 4240 negne r0, r0 + 80009aa: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 80009ae: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 + 80009b2: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 + 80009b6: bf18 it ne + 80009b8: 4249 negne r1, r1 + 80009ba: ea92 0f03 teq r2, r3 + 80009be: d03f beq.n 8000a40 <__addsf3+0xd8> + 80009c0: f1a2 0201 sub.w r2, r2, #1 + 80009c4: fa41 fc03 asr.w ip, r1, r3 + 80009c8: eb10 000c adds.w r0, r0, ip + 80009cc: f1c3 0320 rsb r3, r3, #32 + 80009d0: fa01 f103 lsl.w r1, r1, r3 + 80009d4: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 80009d8: d502 bpl.n 80009e0 <__addsf3+0x78> + 80009da: 4249 negs r1, r1 + 80009dc: eb60 0040 sbc.w r0, r0, r0, lsl #1 + 80009e0: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 + 80009e4: d313 bcc.n 8000a0e <__addsf3+0xa6> + 80009e6: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 + 80009ea: d306 bcc.n 80009fa <__addsf3+0x92> + 80009ec: 0840 lsrs r0, r0, #1 + 80009ee: ea4f 0131 mov.w r1, r1, rrx + 80009f2: f102 0201 add.w r2, r2, #1 + 80009f6: 2afe cmp r2, #254 @ 0xfe + 80009f8: d251 bcs.n 8000a9e <__addsf3+0x136> + 80009fa: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 + 80009fe: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000a02: bf08 it eq + 8000a04: f020 0001 biceq.w r0, r0, #1 + 8000a08: ea40 0003 orr.w r0, r0, r3 + 8000a0c: 4770 bx lr + 8000a0e: 0049 lsls r1, r1, #1 + 8000a10: eb40 0000 adc.w r0, r0, r0 + 8000a14: 3a01 subs r2, #1 + 8000a16: bf28 it cs + 8000a18: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 + 8000a1c: d2ed bcs.n 80009fa <__addsf3+0x92> + 8000a1e: fab0 fc80 clz ip, r0 + 8000a22: f1ac 0c08 sub.w ip, ip, #8 + 8000a26: ebb2 020c subs.w r2, r2, ip + 8000a2a: fa00 f00c lsl.w r0, r0, ip + 8000a2e: bfaa itet ge + 8000a30: eb00 50c2 addge.w r0, r0, r2, lsl #23 + 8000a34: 4252 neglt r2, r2 + 8000a36: 4318 orrge r0, r3 + 8000a38: bfbc itt lt + 8000a3a: 40d0 lsrlt r0, r2 + 8000a3c: 4318 orrlt r0, r3 + 8000a3e: 4770 bx lr + 8000a40: f092 0f00 teq r2, #0 + 8000a44: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 + 8000a48: bf06 itte eq + 8000a4a: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 + 8000a4e: 3201 addeq r2, #1 + 8000a50: 3b01 subne r3, #1 + 8000a52: e7b5 b.n 80009c0 <__addsf3+0x58> + 8000a54: ea4f 0341 mov.w r3, r1, lsl #1 + 8000a58: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000a5c: bf18 it ne + 8000a5e: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 8000a62: d021 beq.n 8000aa8 <__addsf3+0x140> + 8000a64: ea92 0f03 teq r2, r3 + 8000a68: d004 beq.n 8000a74 <__addsf3+0x10c> + 8000a6a: f092 0f00 teq r2, #0 + 8000a6e: bf08 it eq + 8000a70: 4608 moveq r0, r1 + 8000a72: 4770 bx lr + 8000a74: ea90 0f01 teq r0, r1 + 8000a78: bf1c itt ne + 8000a7a: 2000 movne r0, #0 + 8000a7c: 4770 bxne lr + 8000a7e: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 + 8000a82: d104 bne.n 8000a8e <__addsf3+0x126> + 8000a84: 0040 lsls r0, r0, #1 + 8000a86: bf28 it cs + 8000a88: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 + 8000a8c: 4770 bx lr + 8000a8e: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 + 8000a92: bf3c itt cc + 8000a94: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 + 8000a98: 4770 bxcc lr + 8000a9a: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 8000a9e: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 + 8000aa2: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000aa6: 4770 bx lr + 8000aa8: ea7f 6222 mvns.w r2, r2, asr #24 + 8000aac: bf16 itet ne + 8000aae: 4608 movne r0, r1 + 8000ab0: ea7f 6323 mvnseq.w r3, r3, asr #24 + 8000ab4: 4601 movne r1, r0 + 8000ab6: 0242 lsls r2, r0, #9 + 8000ab8: bf06 itte eq + 8000aba: ea5f 2341 movseq.w r3, r1, lsl #9 + 8000abe: ea90 0f01 teqeq r0, r1 + 8000ac2: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 + 8000ac6: 4770 bx lr -08000c90 : +08000ac8 <__aeabi_ui2f>: + 8000ac8: f04f 0300 mov.w r3, #0 + 8000acc: e004 b.n 8000ad8 <__aeabi_i2f+0x8> + 8000ace: bf00 nop + +08000ad0 <__aeabi_i2f>: + 8000ad0: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 + 8000ad4: bf48 it mi + 8000ad6: 4240 negmi r0, r0 + 8000ad8: ea5f 0c00 movs.w ip, r0 + 8000adc: bf08 it eq + 8000ade: 4770 bxeq lr + 8000ae0: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 + 8000ae4: 4601 mov r1, r0 + 8000ae6: f04f 0000 mov.w r0, #0 + 8000aea: e01c b.n 8000b26 <__aeabi_l2f+0x2a> + +08000aec <__aeabi_ul2f>: + 8000aec: ea50 0201 orrs.w r2, r0, r1 + 8000af0: bf08 it eq + 8000af2: 4770 bxeq lr + 8000af4: f04f 0300 mov.w r3, #0 + 8000af8: e00a b.n 8000b10 <__aeabi_l2f+0x14> + 8000afa: bf00 nop + +08000afc <__aeabi_l2f>: + 8000afc: ea50 0201 orrs.w r2, r0, r1 + 8000b00: bf08 it eq + 8000b02: 4770 bxeq lr + 8000b04: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 + 8000b08: d502 bpl.n 8000b10 <__aeabi_l2f+0x14> + 8000b0a: 4240 negs r0, r0 + 8000b0c: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 8000b10: ea5f 0c01 movs.w ip, r1 + 8000b14: bf02 ittt eq + 8000b16: 4684 moveq ip, r0 + 8000b18: 4601 moveq r1, r0 + 8000b1a: 2000 moveq r0, #0 + 8000b1c: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 + 8000b20: bf08 it eq + 8000b22: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 + 8000b26: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 + 8000b2a: fabc f28c clz r2, ip + 8000b2e: 3a08 subs r2, #8 + 8000b30: eba3 53c2 sub.w r3, r3, r2, lsl #23 + 8000b34: db10 blt.n 8000b58 <__aeabi_l2f+0x5c> + 8000b36: fa01 fc02 lsl.w ip, r1, r2 + 8000b3a: 4463 add r3, ip + 8000b3c: fa00 fc02 lsl.w ip, r0, r2 + 8000b40: f1c2 0220 rsb r2, r2, #32 + 8000b44: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 8000b48: fa20 f202 lsr.w r2, r0, r2 + 8000b4c: eb43 0002 adc.w r0, r3, r2 + 8000b50: bf08 it eq + 8000b52: f020 0001 biceq.w r0, r0, #1 + 8000b56: 4770 bx lr + 8000b58: f102 0220 add.w r2, r2, #32 + 8000b5c: fa01 fc02 lsl.w ip, r1, r2 + 8000b60: f1c2 0220 rsb r2, r2, #32 + 8000b64: ea50 004c orrs.w r0, r0, ip, lsl #1 + 8000b68: fa21 f202 lsr.w r2, r1, r2 + 8000b6c: eb43 0002 adc.w r0, r3, r2 + 8000b70: bf08 it eq + 8000b72: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000b76: 4770 bx lr + +08000b78 <__aeabi_fmul>: + 8000b78: f04f 0cff mov.w ip, #255 @ 0xff + 8000b7c: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000b80: bf1e ittt ne + 8000b82: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000b86: ea92 0f0c teqne r2, ip + 8000b8a: ea93 0f0c teqne r3, ip + 8000b8e: d06f beq.n 8000c70 <__aeabi_fmul+0xf8> + 8000b90: 441a add r2, r3 + 8000b92: ea80 0c01 eor.w ip, r0, r1 + 8000b96: 0240 lsls r0, r0, #9 + 8000b98: bf18 it ne + 8000b9a: ea5f 2141 movsne.w r1, r1, lsl #9 + 8000b9e: d01e beq.n 8000bde <__aeabi_fmul+0x66> + 8000ba0: f04f 6300 mov.w r3, #134217728 @ 0x8000000 + 8000ba4: ea43 1050 orr.w r0, r3, r0, lsr #5 + 8000ba8: ea43 1151 orr.w r1, r3, r1, lsr #5 + 8000bac: fba0 3101 umull r3, r1, r0, r1 + 8000bb0: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000bb4: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 + 8000bb8: bf3e ittt cc + 8000bba: 0049 lslcc r1, r1, #1 + 8000bbc: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 + 8000bc0: 005b lslcc r3, r3, #1 + 8000bc2: ea40 0001 orr.w r0, r0, r1 + 8000bc6: f162 027f sbc.w r2, r2, #127 @ 0x7f + 8000bca: 2afd cmp r2, #253 @ 0xfd + 8000bcc: d81d bhi.n 8000c0a <__aeabi_fmul+0x92> + 8000bce: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 + 8000bd2: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000bd6: bf08 it eq + 8000bd8: f020 0001 biceq.w r0, r0, #1 + 8000bdc: 4770 bx lr + 8000bde: f090 0f00 teq r0, #0 + 8000be2: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000be6: bf08 it eq + 8000be8: 0249 lsleq r1, r1, #9 + 8000bea: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000bee: ea40 2051 orr.w r0, r0, r1, lsr #9 + 8000bf2: 3a7f subs r2, #127 @ 0x7f + 8000bf4: bfc2 ittt gt + 8000bf6: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000bfa: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000bfe: 4770 bxgt lr + 8000c00: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000c04: f04f 0300 mov.w r3, #0 + 8000c08: 3a01 subs r2, #1 + 8000c0a: dc5d bgt.n 8000cc8 <__aeabi_fmul+0x150> + 8000c0c: f112 0f19 cmn.w r2, #25 + 8000c10: bfdc itt le + 8000c12: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 + 8000c16: 4770 bxle lr + 8000c18: f1c2 0200 rsb r2, r2, #0 + 8000c1c: 0041 lsls r1, r0, #1 + 8000c1e: fa21 f102 lsr.w r1, r1, r2 + 8000c22: f1c2 0220 rsb r2, r2, #32 + 8000c26: fa00 fc02 lsl.w ip, r0, r2 + 8000c2a: ea5f 0031 movs.w r0, r1, rrx + 8000c2e: f140 0000 adc.w r0, r0, #0 + 8000c32: ea53 034c orrs.w r3, r3, ip, lsl #1 + 8000c36: bf08 it eq + 8000c38: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000c3c: 4770 bx lr + 8000c3e: f092 0f00 teq r2, #0 + 8000c42: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000c46: bf02 ittt eq + 8000c48: 0040 lsleq r0, r0, #1 + 8000c4a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000c4e: 3a01 subeq r2, #1 + 8000c50: d0f9 beq.n 8000c46 <__aeabi_fmul+0xce> + 8000c52: ea40 000c orr.w r0, r0, ip + 8000c56: f093 0f00 teq r3, #0 + 8000c5a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000c5e: bf02 ittt eq + 8000c60: 0049 lsleq r1, r1, #1 + 8000c62: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000c66: 3b01 subeq r3, #1 + 8000c68: d0f9 beq.n 8000c5e <__aeabi_fmul+0xe6> + 8000c6a: ea41 010c orr.w r1, r1, ip + 8000c6e: e78f b.n 8000b90 <__aeabi_fmul+0x18> + 8000c70: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000c74: ea92 0f0c teq r2, ip + 8000c78: bf18 it ne + 8000c7a: ea93 0f0c teqne r3, ip + 8000c7e: d00a beq.n 8000c96 <__aeabi_fmul+0x11e> + 8000c80: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000c84: bf18 it ne + 8000c86: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000c8a: d1d8 bne.n 8000c3e <__aeabi_fmul+0xc6> + 8000c8c: ea80 0001 eor.w r0, r0, r1 + 8000c90: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000c94: 4770 bx lr + 8000c96: f090 0f00 teq r0, #0 + 8000c9a: bf17 itett ne + 8000c9c: f090 4f00 teqne r0, #2147483648 @ 0x80000000 + 8000ca0: 4608 moveq r0, r1 + 8000ca2: f091 0f00 teqne r1, #0 + 8000ca6: f091 4f00 teqne r1, #2147483648 @ 0x80000000 + 8000caa: d014 beq.n 8000cd6 <__aeabi_fmul+0x15e> + 8000cac: ea92 0f0c teq r2, ip + 8000cb0: d101 bne.n 8000cb6 <__aeabi_fmul+0x13e> + 8000cb2: 0242 lsls r2, r0, #9 + 8000cb4: d10f bne.n 8000cd6 <__aeabi_fmul+0x15e> + 8000cb6: ea93 0f0c teq r3, ip + 8000cba: d103 bne.n 8000cc4 <__aeabi_fmul+0x14c> + 8000cbc: 024b lsls r3, r1, #9 + 8000cbe: bf18 it ne + 8000cc0: 4608 movne r0, r1 + 8000cc2: d108 bne.n 8000cd6 <__aeabi_fmul+0x15e> + 8000cc4: ea80 0001 eor.w r0, r0, r1 + 8000cc8: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000ccc: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000cd0: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000cd4: 4770 bx lr + 8000cd6: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000cda: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 + 8000cde: 4770 bx lr + +08000ce0 <__aeabi_fdiv>: + 8000ce0: f04f 0cff mov.w ip, #255 @ 0xff + 8000ce4: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000ce8: bf1e ittt ne + 8000cea: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000cee: ea92 0f0c teqne r2, ip + 8000cf2: ea93 0f0c teqne r3, ip + 8000cf6: d069 beq.n 8000dcc <__aeabi_fdiv+0xec> + 8000cf8: eba2 0203 sub.w r2, r2, r3 + 8000cfc: ea80 0c01 eor.w ip, r0, r1 + 8000d00: 0249 lsls r1, r1, #9 + 8000d02: ea4f 2040 mov.w r0, r0, lsl #9 + 8000d06: d037 beq.n 8000d78 <__aeabi_fdiv+0x98> + 8000d08: f04f 5380 mov.w r3, #268435456 @ 0x10000000 + 8000d0c: ea43 1111 orr.w r1, r3, r1, lsr #4 + 8000d10: ea43 1310 orr.w r3, r3, r0, lsr #4 + 8000d14: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000d18: 428b cmp r3, r1 + 8000d1a: bf38 it cc + 8000d1c: 005b lslcc r3, r3, #1 + 8000d1e: f142 027d adc.w r2, r2, #125 @ 0x7d + 8000d22: f44f 0c00 mov.w ip, #8388608 @ 0x800000 + 8000d26: 428b cmp r3, r1 + 8000d28: bf24 itt cs + 8000d2a: 1a5b subcs r3, r3, r1 + 8000d2c: ea40 000c orrcs.w r0, r0, ip + 8000d30: ebb3 0f51 cmp.w r3, r1, lsr #1 + 8000d34: bf24 itt cs + 8000d36: eba3 0351 subcs.w r3, r3, r1, lsr #1 + 8000d3a: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 8000d3e: ebb3 0f91 cmp.w r3, r1, lsr #2 + 8000d42: bf24 itt cs + 8000d44: eba3 0391 subcs.w r3, r3, r1, lsr #2 + 8000d48: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 8000d4c: ebb3 0fd1 cmp.w r3, r1, lsr #3 + 8000d50: bf24 itt cs + 8000d52: eba3 03d1 subcs.w r3, r3, r1, lsr #3 + 8000d56: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000d5a: 011b lsls r3, r3, #4 + 8000d5c: bf18 it ne + 8000d5e: ea5f 1c1c movsne.w ip, ip, lsr #4 + 8000d62: d1e0 bne.n 8000d26 <__aeabi_fdiv+0x46> + 8000d64: 2afd cmp r2, #253 @ 0xfd + 8000d66: f63f af50 bhi.w 8000c0a <__aeabi_fmul+0x92> + 8000d6a: 428b cmp r3, r1 + 8000d6c: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000d70: bf08 it eq + 8000d72: f020 0001 biceq.w r0, r0, #1 + 8000d76: 4770 bx lr + 8000d78: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000d7c: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000d80: 327f adds r2, #127 @ 0x7f + 8000d82: bfc2 ittt gt + 8000d84: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000d88: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000d8c: 4770 bxgt lr + 8000d8e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000d92: f04f 0300 mov.w r3, #0 + 8000d96: 3a01 subs r2, #1 + 8000d98: e737 b.n 8000c0a <__aeabi_fmul+0x92> + 8000d9a: f092 0f00 teq r2, #0 + 8000d9e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000da2: bf02 ittt eq + 8000da4: 0040 lsleq r0, r0, #1 + 8000da6: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000daa: 3a01 subeq r2, #1 + 8000dac: d0f9 beq.n 8000da2 <__aeabi_fdiv+0xc2> + 8000dae: ea40 000c orr.w r0, r0, ip + 8000db2: f093 0f00 teq r3, #0 + 8000db6: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000dba: bf02 ittt eq + 8000dbc: 0049 lsleq r1, r1, #1 + 8000dbe: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000dc2: 3b01 subeq r3, #1 + 8000dc4: d0f9 beq.n 8000dba <__aeabi_fdiv+0xda> + 8000dc6: ea41 010c orr.w r1, r1, ip + 8000dca: e795 b.n 8000cf8 <__aeabi_fdiv+0x18> + 8000dcc: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000dd0: ea92 0f0c teq r2, ip + 8000dd4: d108 bne.n 8000de8 <__aeabi_fdiv+0x108> + 8000dd6: 0242 lsls r2, r0, #9 + 8000dd8: f47f af7d bne.w 8000cd6 <__aeabi_fmul+0x15e> + 8000ddc: ea93 0f0c teq r3, ip + 8000de0: f47f af70 bne.w 8000cc4 <__aeabi_fmul+0x14c> + 8000de4: 4608 mov r0, r1 + 8000de6: e776 b.n 8000cd6 <__aeabi_fmul+0x15e> + 8000de8: ea93 0f0c teq r3, ip + 8000dec: d104 bne.n 8000df8 <__aeabi_fdiv+0x118> + 8000dee: 024b lsls r3, r1, #9 + 8000df0: f43f af4c beq.w 8000c8c <__aeabi_fmul+0x114> + 8000df4: 4608 mov r0, r1 + 8000df6: e76e b.n 8000cd6 <__aeabi_fmul+0x15e> + 8000df8: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000dfc: bf18 it ne + 8000dfe: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000e02: d1ca bne.n 8000d9a <__aeabi_fdiv+0xba> + 8000e04: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 + 8000e08: f47f af5c bne.w 8000cc4 <__aeabi_fmul+0x14c> + 8000e0c: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 + 8000e10: f47f af3c bne.w 8000c8c <__aeabi_fmul+0x114> + 8000e14: e75f b.n 8000cd6 <__aeabi_fmul+0x15e> + 8000e16: bf00 nop + +08000e18 <__aeabi_f2uiz>: + 8000e18: 0042 lsls r2, r0, #1 + 8000e1a: d20e bcs.n 8000e3a <__aeabi_f2uiz+0x22> + 8000e1c: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 + 8000e20: d30b bcc.n 8000e3a <__aeabi_f2uiz+0x22> + 8000e22: f04f 039e mov.w r3, #158 @ 0x9e + 8000e26: ebb3 6212 subs.w r2, r3, r2, lsr #24 + 8000e2a: d409 bmi.n 8000e40 <__aeabi_f2uiz+0x28> + 8000e2c: ea4f 2300 mov.w r3, r0, lsl #8 + 8000e30: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000e34: fa23 f002 lsr.w r0, r3, r2 + 8000e38: 4770 bx lr + 8000e3a: f04f 0000 mov.w r0, #0 + 8000e3e: 4770 bx lr + 8000e40: f112 0f61 cmn.w r2, #97 @ 0x61 + 8000e44: d101 bne.n 8000e4a <__aeabi_f2uiz+0x32> + 8000e46: 0242 lsls r2, r0, #9 + 8000e48: d102 bne.n 8000e50 <__aeabi_f2uiz+0x38> + 8000e4a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 8000e4e: 4770 bx lr + 8000e50: f04f 0000 mov.w r0, #0 + 8000e54: 4770 bx lr + 8000e56: bf00 nop + +08000e58 <__aeabi_uldivmod>: + 8000e58: b953 cbnz r3, 8000e70 <__aeabi_uldivmod+0x18> + 8000e5a: b94a cbnz r2, 8000e70 <__aeabi_uldivmod+0x18> + 8000e5c: 2900 cmp r1, #0 + 8000e5e: bf08 it eq + 8000e60: 2800 cmpeq r0, #0 + 8000e62: bf1c itt ne + 8000e64: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff + 8000e68: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff + 8000e6c: f000 b98c b.w 8001188 <__aeabi_idiv0> + 8000e70: f1ad 0c08 sub.w ip, sp, #8 + 8000e74: e96d ce04 strd ip, lr, [sp, #-16]! + 8000e78: f000 f806 bl 8000e88 <__udivmoddi4> + 8000e7c: f8dd e004 ldr.w lr, [sp, #4] + 8000e80: e9dd 2302 ldrd r2, r3, [sp, #8] + 8000e84: b004 add sp, #16 + 8000e86: 4770 bx lr + +08000e88 <__udivmoddi4>: + 8000e88: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8000e8c: 9d08 ldr r5, [sp, #32] + 8000e8e: 468e mov lr, r1 + 8000e90: 4604 mov r4, r0 + 8000e92: 4688 mov r8, r1 + 8000e94: 2b00 cmp r3, #0 + 8000e96: d14a bne.n 8000f2e <__udivmoddi4+0xa6> + 8000e98: 428a cmp r2, r1 + 8000e9a: 4617 mov r7, r2 + 8000e9c: d962 bls.n 8000f64 <__udivmoddi4+0xdc> + 8000e9e: fab2 f682 clz r6, r2 + 8000ea2: b14e cbz r6, 8000eb8 <__udivmoddi4+0x30> + 8000ea4: f1c6 0320 rsb r3, r6, #32 + 8000ea8: fa01 f806 lsl.w r8, r1, r6 + 8000eac: fa20 f303 lsr.w r3, r0, r3 + 8000eb0: 40b7 lsls r7, r6 + 8000eb2: ea43 0808 orr.w r8, r3, r8 + 8000eb6: 40b4 lsls r4, r6 + 8000eb8: ea4f 4e17 mov.w lr, r7, lsr #16 + 8000ebc: fbb8 f1fe udiv r1, r8, lr + 8000ec0: fa1f fc87 uxth.w ip, r7 + 8000ec4: fb0e 8811 mls r8, lr, r1, r8 + 8000ec8: fb01 f20c mul.w r2, r1, ip + 8000ecc: 0c23 lsrs r3, r4, #16 + 8000ece: ea43 4308 orr.w r3, r3, r8, lsl #16 + 8000ed2: 429a cmp r2, r3 + 8000ed4: d909 bls.n 8000eea <__udivmoddi4+0x62> + 8000ed6: 18fb adds r3, r7, r3 + 8000ed8: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff + 8000edc: f080 80eb bcs.w 80010b6 <__udivmoddi4+0x22e> + 8000ee0: 429a cmp r2, r3 + 8000ee2: f240 80e8 bls.w 80010b6 <__udivmoddi4+0x22e> + 8000ee6: 3902 subs r1, #2 + 8000ee8: 443b add r3, r7 + 8000eea: 1a9a subs r2, r3, r2 + 8000eec: fbb2 f0fe udiv r0, r2, lr + 8000ef0: fb0e 2210 mls r2, lr, r0, r2 + 8000ef4: fb00 fc0c mul.w ip, r0, ip + 8000ef8: b2a3 uxth r3, r4 + 8000efa: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8000efe: 459c cmp ip, r3 + 8000f00: d909 bls.n 8000f16 <__udivmoddi4+0x8e> + 8000f02: 18fb adds r3, r7, r3 + 8000f04: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff + 8000f08: f080 80d7 bcs.w 80010ba <__udivmoddi4+0x232> + 8000f0c: 459c cmp ip, r3 + 8000f0e: f240 80d4 bls.w 80010ba <__udivmoddi4+0x232> + 8000f12: 443b add r3, r7 + 8000f14: 3802 subs r0, #2 + 8000f16: ea40 4001 orr.w r0, r0, r1, lsl #16 + 8000f1a: 2100 movs r1, #0 + 8000f1c: eba3 030c sub.w r3, r3, ip + 8000f20: b11d cbz r5, 8000f2a <__udivmoddi4+0xa2> + 8000f22: 2200 movs r2, #0 + 8000f24: 40f3 lsrs r3, r6 + 8000f26: e9c5 3200 strd r3, r2, [r5] + 8000f2a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8000f2e: 428b cmp r3, r1 + 8000f30: d905 bls.n 8000f3e <__udivmoddi4+0xb6> + 8000f32: b10d cbz r5, 8000f38 <__udivmoddi4+0xb0> + 8000f34: e9c5 0100 strd r0, r1, [r5] + 8000f38: 2100 movs r1, #0 + 8000f3a: 4608 mov r0, r1 + 8000f3c: e7f5 b.n 8000f2a <__udivmoddi4+0xa2> + 8000f3e: fab3 f183 clz r1, r3 + 8000f42: 2900 cmp r1, #0 + 8000f44: d146 bne.n 8000fd4 <__udivmoddi4+0x14c> + 8000f46: 4573 cmp r3, lr + 8000f48: d302 bcc.n 8000f50 <__udivmoddi4+0xc8> + 8000f4a: 4282 cmp r2, r0 + 8000f4c: f200 8108 bhi.w 8001160 <__udivmoddi4+0x2d8> + 8000f50: 1a84 subs r4, r0, r2 + 8000f52: eb6e 0203 sbc.w r2, lr, r3 + 8000f56: 2001 movs r0, #1 + 8000f58: 4690 mov r8, r2 + 8000f5a: 2d00 cmp r5, #0 + 8000f5c: d0e5 beq.n 8000f2a <__udivmoddi4+0xa2> + 8000f5e: e9c5 4800 strd r4, r8, [r5] + 8000f62: e7e2 b.n 8000f2a <__udivmoddi4+0xa2> + 8000f64: 2a00 cmp r2, #0 + 8000f66: f000 8091 beq.w 800108c <__udivmoddi4+0x204> + 8000f6a: fab2 f682 clz r6, r2 + 8000f6e: 2e00 cmp r6, #0 + 8000f70: f040 80a5 bne.w 80010be <__udivmoddi4+0x236> + 8000f74: 1a8a subs r2, r1, r2 + 8000f76: 2101 movs r1, #1 + 8000f78: 0c03 lsrs r3, r0, #16 + 8000f7a: ea4f 4e17 mov.w lr, r7, lsr #16 + 8000f7e: b280 uxth r0, r0 + 8000f80: b2bc uxth r4, r7 + 8000f82: fbb2 fcfe udiv ip, r2, lr + 8000f86: fb0e 221c mls r2, lr, ip, r2 + 8000f8a: ea43 4302 orr.w r3, r3, r2, lsl #16 + 8000f8e: fb04 f20c mul.w r2, r4, ip + 8000f92: 429a cmp r2, r3 + 8000f94: d907 bls.n 8000fa6 <__udivmoddi4+0x11e> + 8000f96: 18fb adds r3, r7, r3 + 8000f98: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff + 8000f9c: d202 bcs.n 8000fa4 <__udivmoddi4+0x11c> + 8000f9e: 429a cmp r2, r3 + 8000fa0: f200 80e3 bhi.w 800116a <__udivmoddi4+0x2e2> + 8000fa4: 46c4 mov ip, r8 + 8000fa6: 1a9b subs r3, r3, r2 + 8000fa8: fbb3 f2fe udiv r2, r3, lr + 8000fac: fb0e 3312 mls r3, lr, r2, r3 + 8000fb0: fb02 f404 mul.w r4, r2, r4 + 8000fb4: ea40 4303 orr.w r3, r0, r3, lsl #16 + 8000fb8: 429c cmp r4, r3 + 8000fba: d907 bls.n 8000fcc <__udivmoddi4+0x144> + 8000fbc: 18fb adds r3, r7, r3 + 8000fbe: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff + 8000fc2: d202 bcs.n 8000fca <__udivmoddi4+0x142> + 8000fc4: 429c cmp r4, r3 + 8000fc6: f200 80cd bhi.w 8001164 <__udivmoddi4+0x2dc> + 8000fca: 4602 mov r2, r0 + 8000fcc: 1b1b subs r3, r3, r4 + 8000fce: ea42 400c orr.w r0, r2, ip, lsl #16 + 8000fd2: e7a5 b.n 8000f20 <__udivmoddi4+0x98> + 8000fd4: f1c1 0620 rsb r6, r1, #32 + 8000fd8: 408b lsls r3, r1 + 8000fda: fa22 f706 lsr.w r7, r2, r6 + 8000fde: 431f orrs r7, r3 + 8000fe0: fa2e fa06 lsr.w sl, lr, r6 + 8000fe4: ea4f 4917 mov.w r9, r7, lsr #16 + 8000fe8: fbba f8f9 udiv r8, sl, r9 + 8000fec: fa0e fe01 lsl.w lr, lr, r1 + 8000ff0: fa20 f306 lsr.w r3, r0, r6 + 8000ff4: fb09 aa18 mls sl, r9, r8, sl + 8000ff8: fa1f fc87 uxth.w ip, r7 + 8000ffc: ea43 030e orr.w r3, r3, lr + 8001000: fa00 fe01 lsl.w lr, r0, r1 + 8001004: fb08 f00c mul.w r0, r8, ip + 8001008: 0c1c lsrs r4, r3, #16 + 800100a: ea44 440a orr.w r4, r4, sl, lsl #16 + 800100e: 42a0 cmp r0, r4 + 8001010: fa02 f201 lsl.w r2, r2, r1 + 8001014: d90a bls.n 800102c <__udivmoddi4+0x1a4> + 8001016: 193c adds r4, r7, r4 + 8001018: f108 3aff add.w sl, r8, #4294967295 @ 0xffffffff + 800101c: f080 809e bcs.w 800115c <__udivmoddi4+0x2d4> + 8001020: 42a0 cmp r0, r4 + 8001022: f240 809b bls.w 800115c <__udivmoddi4+0x2d4> + 8001026: f1a8 0802 sub.w r8, r8, #2 + 800102a: 443c add r4, r7 + 800102c: 1a24 subs r4, r4, r0 + 800102e: b298 uxth r0, r3 + 8001030: fbb4 f3f9 udiv r3, r4, r9 + 8001034: fb09 4413 mls r4, r9, r3, r4 + 8001038: fb03 fc0c mul.w ip, r3, ip + 800103c: ea40 4404 orr.w r4, r0, r4, lsl #16 + 8001040: 45a4 cmp ip, r4 + 8001042: d909 bls.n 8001058 <__udivmoddi4+0x1d0> + 8001044: 193c adds r4, r7, r4 + 8001046: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff + 800104a: f080 8085 bcs.w 8001158 <__udivmoddi4+0x2d0> + 800104e: 45a4 cmp ip, r4 + 8001050: f240 8082 bls.w 8001158 <__udivmoddi4+0x2d0> + 8001054: 3b02 subs r3, #2 + 8001056: 443c add r4, r7 + 8001058: ea43 4008 orr.w r0, r3, r8, lsl #16 + 800105c: eba4 040c sub.w r4, r4, ip + 8001060: fba0 8c02 umull r8, ip, r0, r2 + 8001064: 4564 cmp r4, ip + 8001066: 4643 mov r3, r8 + 8001068: 46e1 mov r9, ip + 800106a: d364 bcc.n 8001136 <__udivmoddi4+0x2ae> + 800106c: d061 beq.n 8001132 <__udivmoddi4+0x2aa> + 800106e: b15d cbz r5, 8001088 <__udivmoddi4+0x200> + 8001070: ebbe 0203 subs.w r2, lr, r3 + 8001074: eb64 0409 sbc.w r4, r4, r9 + 8001078: fa04 f606 lsl.w r6, r4, r6 + 800107c: fa22 f301 lsr.w r3, r2, r1 + 8001080: 431e orrs r6, r3 + 8001082: 40cc lsrs r4, r1 + 8001084: e9c5 6400 strd r6, r4, [r5] + 8001088: 2100 movs r1, #0 + 800108a: e74e b.n 8000f2a <__udivmoddi4+0xa2> + 800108c: fbb1 fcf2 udiv ip, r1, r2 + 8001090: 0c01 lsrs r1, r0, #16 + 8001092: ea41 410e orr.w r1, r1, lr, lsl #16 + 8001096: b280 uxth r0, r0 + 8001098: ea40 4201 orr.w r2, r0, r1, lsl #16 + 800109c: 463b mov r3, r7 + 800109e: fbb1 f1f7 udiv r1, r1, r7 + 80010a2: 4638 mov r0, r7 + 80010a4: 463c mov r4, r7 + 80010a6: 46b8 mov r8, r7 + 80010a8: 46be mov lr, r7 + 80010aa: 2620 movs r6, #32 + 80010ac: eba2 0208 sub.w r2, r2, r8 + 80010b0: ea41 410c orr.w r1, r1, ip, lsl #16 + 80010b4: e765 b.n 8000f82 <__udivmoddi4+0xfa> + 80010b6: 4601 mov r1, r0 + 80010b8: e717 b.n 8000eea <__udivmoddi4+0x62> + 80010ba: 4610 mov r0, r2 + 80010bc: e72b b.n 8000f16 <__udivmoddi4+0x8e> + 80010be: f1c6 0120 rsb r1, r6, #32 + 80010c2: fa2e fc01 lsr.w ip, lr, r1 + 80010c6: 40b7 lsls r7, r6 + 80010c8: fa0e fe06 lsl.w lr, lr, r6 + 80010cc: fa20 f101 lsr.w r1, r0, r1 + 80010d0: ea41 010e orr.w r1, r1, lr + 80010d4: ea4f 4e17 mov.w lr, r7, lsr #16 + 80010d8: fbbc f8fe udiv r8, ip, lr + 80010dc: b2bc uxth r4, r7 + 80010de: fb0e cc18 mls ip, lr, r8, ip + 80010e2: fb08 f904 mul.w r9, r8, r4 + 80010e6: 0c0a lsrs r2, r1, #16 + 80010e8: ea42 420c orr.w r2, r2, ip, lsl #16 + 80010ec: 40b0 lsls r0, r6 + 80010ee: 4591 cmp r9, r2 + 80010f0: ea4f 4310 mov.w r3, r0, lsr #16 + 80010f4: b280 uxth r0, r0 + 80010f6: d93e bls.n 8001176 <__udivmoddi4+0x2ee> + 80010f8: 18ba adds r2, r7, r2 + 80010fa: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff + 80010fe: d201 bcs.n 8001104 <__udivmoddi4+0x27c> + 8001100: 4591 cmp r9, r2 + 8001102: d81f bhi.n 8001144 <__udivmoddi4+0x2bc> + 8001104: eba2 0209 sub.w r2, r2, r9 + 8001108: fbb2 f9fe udiv r9, r2, lr + 800110c: fb09 f804 mul.w r8, r9, r4 + 8001110: fb0e 2a19 mls sl, lr, r9, r2 + 8001114: b28a uxth r2, r1 + 8001116: ea42 420a orr.w r2, r2, sl, lsl #16 + 800111a: 4542 cmp r2, r8 + 800111c: d229 bcs.n 8001172 <__udivmoddi4+0x2ea> + 800111e: 18ba adds r2, r7, r2 + 8001120: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff + 8001124: d2c2 bcs.n 80010ac <__udivmoddi4+0x224> + 8001126: 4542 cmp r2, r8 + 8001128: d2c0 bcs.n 80010ac <__udivmoddi4+0x224> + 800112a: f1a9 0102 sub.w r1, r9, #2 + 800112e: 443a add r2, r7 + 8001130: e7bc b.n 80010ac <__udivmoddi4+0x224> + 8001132: 45c6 cmp lr, r8 + 8001134: d29b bcs.n 800106e <__udivmoddi4+0x1e6> + 8001136: ebb8 0302 subs.w r3, r8, r2 + 800113a: eb6c 0c07 sbc.w ip, ip, r7 + 800113e: 3801 subs r0, #1 + 8001140: 46e1 mov r9, ip + 8001142: e794 b.n 800106e <__udivmoddi4+0x1e6> + 8001144: eba7 0909 sub.w r9, r7, r9 + 8001148: 444a add r2, r9 + 800114a: fbb2 f9fe udiv r9, r2, lr + 800114e: f1a8 0c02 sub.w ip, r8, #2 + 8001152: fb09 f804 mul.w r8, r9, r4 + 8001156: e7db b.n 8001110 <__udivmoddi4+0x288> + 8001158: 4603 mov r3, r0 + 800115a: e77d b.n 8001058 <__udivmoddi4+0x1d0> + 800115c: 46d0 mov r8, sl + 800115e: e765 b.n 800102c <__udivmoddi4+0x1a4> + 8001160: 4608 mov r0, r1 + 8001162: e6fa b.n 8000f5a <__udivmoddi4+0xd2> + 8001164: 443b add r3, r7 + 8001166: 3a02 subs r2, #2 + 8001168: e730 b.n 8000fcc <__udivmoddi4+0x144> + 800116a: f1ac 0c02 sub.w ip, ip, #2 + 800116e: 443b add r3, r7 + 8001170: e719 b.n 8000fa6 <__udivmoddi4+0x11e> + 8001172: 4649 mov r1, r9 + 8001174: e79a b.n 80010ac <__udivmoddi4+0x224> + 8001176: eba2 0209 sub.w r2, r2, r9 + 800117a: fbb2 f9fe udiv r9, r2, lr + 800117e: 46c4 mov ip, r8 + 8001180: fb09 f804 mul.w r8, r9, r4 + 8001184: e7c4 b.n 8001110 <__udivmoddi4+0x288> + 8001186: bf00 nop + +08001188 <__aeabi_idiv0>: + 8001188: 4770 bx lr + 800118a: bf00 nop + +0800118c : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void affiche_nombre(uint32_t nombre, uint8_t col, uint8_t ligne) { - 8000c90: b580 push {r7, lr} - 8000c92: b086 sub sp, #24 - 8000c94: af02 add r7, sp, #8 - 8000c96: 6078 str r0, [r7, #4] - 8000c98: 460b mov r3, r1 - 8000c9a: 70fb strb r3, [r7, #3] - 8000c9c: 4613 mov r3, r2 - 8000c9e: 70bb strb r3, [r7, #2] + 800118c: b580 push {r7, lr} + 800118e: b086 sub sp, #24 + 8001190: af02 add r7, sp, #8 + 8001192: 6078 str r0, [r7, #4] + 8001194: 460b mov r3, r1 + 8001196: 70fb strb r3, [r7, #3] + 8001198: 4613 mov r3, r2 + 800119a: 70bb strb r3, [r7, #2] if (nombre < 0 || nombre > 9999) { - 8000ca0: 687b ldr r3, [r7, #4] - 8000ca2: f242 720f movw r2, #9999 @ 0x270f - 8000ca6: 4293 cmp r3, r2 - 8000ca8: f200 8093 bhi.w 8000dd2 + 800119c: 687b ldr r3, [r7, #4] + 800119e: f242 720f movw r2, #9999 @ 0x270f + 80011a2: 4293 cmp r3, r2 + 80011a4: f200 8093 bhi.w 80012ce return; } uint8_t mil = nombre / 1000; - 8000cac: 687b ldr r3, [r7, #4] - 8000cae: 4a4b ldr r2, [pc, #300] @ (8000ddc ) - 8000cb0: fba2 2303 umull r2, r3, r2, r3 - 8000cb4: 099b lsrs r3, r3, #6 - 8000cb6: 73fb strb r3, [r7, #15] + 80011a8: 687b ldr r3, [r7, #4] + 80011aa: 4a4b ldr r2, [pc, #300] @ (80012d8 ) + 80011ac: fba2 2303 umull r2, r3, r2, r3 + 80011b0: 099b lsrs r3, r3, #6 + 80011b2: 73fb strb r3, [r7, #15] uint8_t cen = (nombre / 100) % 10; - 8000cb8: 687b ldr r3, [r7, #4] - 8000cba: 4a49 ldr r2, [pc, #292] @ (8000de0 ) - 8000cbc: fba2 2303 umull r2, r3, r2, r3 - 8000cc0: 0959 lsrs r1, r3, #5 - 8000cc2: 4b48 ldr r3, [pc, #288] @ (8000de4 ) - 8000cc4: fba3 2301 umull r2, r3, r3, r1 - 8000cc8: 08da lsrs r2, r3, #3 - 8000cca: 4613 mov r3, r2 - 8000ccc: 009b lsls r3, r3, #2 - 8000cce: 4413 add r3, r2 - 8000cd0: 005b lsls r3, r3, #1 - 8000cd2: 1aca subs r2, r1, r3 - 8000cd4: 4613 mov r3, r2 - 8000cd6: 73bb strb r3, [r7, #14] + 80011b4: 687b ldr r3, [r7, #4] + 80011b6: 4a49 ldr r2, [pc, #292] @ (80012dc ) + 80011b8: fba2 2303 umull r2, r3, r2, r3 + 80011bc: 0959 lsrs r1, r3, #5 + 80011be: 4b48 ldr r3, [pc, #288] @ (80012e0 ) + 80011c0: fba3 2301 umull r2, r3, r3, r1 + 80011c4: 08da lsrs r2, r3, #3 + 80011c6: 4613 mov r3, r2 + 80011c8: 009b lsls r3, r3, #2 + 80011ca: 4413 add r3, r2 + 80011cc: 005b lsls r3, r3, #1 + 80011ce: 1aca subs r2, r1, r3 + 80011d0: 4613 mov r3, r2 + 80011d2: 73bb strb r3, [r7, #14] uint8_t diz = (nombre / 10) % 10; - 8000cd8: 687b ldr r3, [r7, #4] - 8000cda: 4a42 ldr r2, [pc, #264] @ (8000de4 ) - 8000cdc: fba2 2303 umull r2, r3, r2, r3 - 8000ce0: 08d9 lsrs r1, r3, #3 - 8000ce2: 4b40 ldr r3, [pc, #256] @ (8000de4 ) - 8000ce4: fba3 2301 umull r2, r3, r3, r1 - 8000ce8: 08da lsrs r2, r3, #3 - 8000cea: 4613 mov r3, r2 - 8000cec: 009b lsls r3, r3, #2 - 8000cee: 4413 add r3, r2 - 8000cf0: 005b lsls r3, r3, #1 - 8000cf2: 1aca subs r2, r1, r3 - 8000cf4: 4613 mov r3, r2 - 8000cf6: 737b strb r3, [r7, #13] + 80011d4: 687b ldr r3, [r7, #4] + 80011d6: 4a42 ldr r2, [pc, #264] @ (80012e0 ) + 80011d8: fba2 2303 umull r2, r3, r2, r3 + 80011dc: 08d9 lsrs r1, r3, #3 + 80011de: 4b40 ldr r3, [pc, #256] @ (80012e0 ) + 80011e0: fba3 2301 umull r2, r3, r3, r1 + 80011e4: 08da lsrs r2, r3, #3 + 80011e6: 4613 mov r3, r2 + 80011e8: 009b lsls r3, r3, #2 + 80011ea: 4413 add r3, r2 + 80011ec: 005b lsls r3, r3, #1 + 80011ee: 1aca subs r2, r1, r3 + 80011f0: 4613 mov r3, r2 + 80011f2: 737b strb r3, [r7, #13] uint8_t uni = nombre % 10; - 8000cf8: 6879 ldr r1, [r7, #4] - 8000cfa: 4b3a ldr r3, [pc, #232] @ (8000de4 ) - 8000cfc: fba3 2301 umull r2, r3, r3, r1 - 8000d00: 08da lsrs r2, r3, #3 - 8000d02: 4613 mov r3, r2 - 8000d04: 009b lsls r3, r3, #2 - 8000d06: 4413 add r3, r2 - 8000d08: 005b lsls r3, r3, #1 - 8000d0a: 1aca subs r2, r1, r3 - 8000d0c: 4613 mov r3, r2 - 8000d0e: 733b strb r3, [r7, #12] + 80011f4: 6879 ldr r1, [r7, #4] + 80011f6: 4b3a ldr r3, [pc, #232] @ (80012e0 ) + 80011f8: fba3 2301 umull r2, r3, r3, r1 + 80011fc: 08da lsrs r2, r3, #3 + 80011fe: 4613 mov r3, r2 + 8001200: 009b lsls r3, r3, #2 + 8001202: 4413 add r3, r2 + 8001204: 005b lsls r3, r3, #1 + 8001206: 1aca subs r2, r1, r3 + 8001208: 4613 mov r3, r2 + 800120a: 733b strb r3, [r7, #12] displayChar_TFT(col, ligne, mil + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); - 8000d10: 78fb ldrb r3, [r7, #3] - 8000d12: b298 uxth r0, r3 - 8000d14: 78bb ldrb r3, [r7, #2] - 8000d16: b299 uxth r1, r3 - 8000d18: 7bfb ldrb r3, [r7, #15] - 8000d1a: 3330 adds r3, #48 @ 0x30 - 8000d1c: b2da uxtb r2, r3 - 8000d1e: 2302 movs r3, #2 - 8000d20: 9301 str r3, [sp, #4] - 8000d22: 2300 movs r3, #0 - 8000d24: 9300 str r3, [sp, #0] - 8000d26: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000d2a: f002 fe7f bl 8003a2c + 800120c: 78fb ldrb r3, [r7, #3] + 800120e: b298 uxth r0, r3 + 8001210: 78bb ldrb r3, [r7, #2] + 8001212: b299 uxth r1, r3 + 8001214: 7bfb ldrb r3, [r7, #15] + 8001216: 3330 adds r3, #48 @ 0x30 + 8001218: b2da uxtb r2, r3 + 800121a: 2302 movs r3, #2 + 800121c: 9301 str r3, [sp, #4] + 800121e: 2300 movs r3, #0 + 8001220: 9300 str r3, [sp, #0] + 8001222: f64f 73e0 movw r3, #65504 @ 0xffe0 + 8001226: f002 fd7b bl 8003d20 displayChar_TFT(col + 12, ligne, cen + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); - 8000d2e: 78fb ldrb r3, [r7, #3] - 8000d30: b29b uxth r3, r3 - 8000d32: 330c adds r3, #12 - 8000d34: b298 uxth r0, r3 - 8000d36: 78bb ldrb r3, [r7, #2] - 8000d38: b299 uxth r1, r3 - 8000d3a: 7bbb ldrb r3, [r7, #14] - 8000d3c: 3330 adds r3, #48 @ 0x30 - 8000d3e: b2da uxtb r2, r3 - 8000d40: 2302 movs r3, #2 - 8000d42: 9301 str r3, [sp, #4] - 8000d44: 2300 movs r3, #0 - 8000d46: 9300 str r3, [sp, #0] - 8000d48: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000d4c: f002 fe6e bl 8003a2c + 800122a: 78fb ldrb r3, [r7, #3] + 800122c: b29b uxth r3, r3 + 800122e: 330c adds r3, #12 + 8001230: b298 uxth r0, r3 + 8001232: 78bb ldrb r3, [r7, #2] + 8001234: b299 uxth r1, r3 + 8001236: 7bbb ldrb r3, [r7, #14] + 8001238: 3330 adds r3, #48 @ 0x30 + 800123a: b2da uxtb r2, r3 + 800123c: 2302 movs r3, #2 + 800123e: 9301 str r3, [sp, #4] + 8001240: 2300 movs r3, #0 + 8001242: 9300 str r3, [sp, #0] + 8001244: f64f 73e0 movw r3, #65504 @ 0xffe0 + 8001248: f002 fd6a bl 8003d20 displayChar_TFT(col + 24, ligne, diz + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); - 8000d50: 78fb ldrb r3, [r7, #3] - 8000d52: b29b uxth r3, r3 - 8000d54: 3318 adds r3, #24 - 8000d56: b298 uxth r0, r3 - 8000d58: 78bb ldrb r3, [r7, #2] - 8000d5a: b299 uxth r1, r3 - 8000d5c: 7b7b ldrb r3, [r7, #13] - 8000d5e: 3330 adds r3, #48 @ 0x30 - 8000d60: b2da uxtb r2, r3 - 8000d62: 2302 movs r3, #2 - 8000d64: 9301 str r3, [sp, #4] - 8000d66: 2300 movs r3, #0 - 8000d68: 9300 str r3, [sp, #0] - 8000d6a: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000d6e: f002 fe5d bl 8003a2c + 800124c: 78fb ldrb r3, [r7, #3] + 800124e: b29b uxth r3, r3 + 8001250: 3318 adds r3, #24 + 8001252: b298 uxth r0, r3 + 8001254: 78bb ldrb r3, [r7, #2] + 8001256: b299 uxth r1, r3 + 8001258: 7b7b ldrb r3, [r7, #13] + 800125a: 3330 adds r3, #48 @ 0x30 + 800125c: b2da uxtb r2, r3 + 800125e: 2302 movs r3, #2 + 8001260: 9301 str r3, [sp, #4] + 8001262: 2300 movs r3, #0 + 8001264: 9300 str r3, [sp, #0] + 8001266: f64f 73e0 movw r3, #65504 @ 0xffe0 + 800126a: f002 fd59 bl 8003d20 displayChar_TFT(col + 36, ligne, uni + 0x30, ST7735_YELLOW, ST7735_BLACK, 2); - 8000d72: 78fb ldrb r3, [r7, #3] - 8000d74: b29b uxth r3, r3 - 8000d76: 3324 adds r3, #36 @ 0x24 - 8000d78: b298 uxth r0, r3 - 8000d7a: 78bb ldrb r3, [r7, #2] - 8000d7c: b299 uxth r1, r3 - 8000d7e: 7b3b ldrb r3, [r7, #12] - 8000d80: 3330 adds r3, #48 @ 0x30 - 8000d82: b2da uxtb r2, r3 - 8000d84: 2302 movs r3, #2 - 8000d86: 9301 str r3, [sp, #4] - 8000d88: 2300 movs r3, #0 - 8000d8a: 9300 str r3, [sp, #0] - 8000d8c: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000d90: f002 fe4c bl 8003a2c - displayChar_TFT(col + 48, ligne, 'm', ST7735_YELLOW, ST7735_BLACK, 2); - 8000d94: 78fb ldrb r3, [r7, #3] - 8000d96: b29b uxth r3, r3 - 8000d98: 3330 adds r3, #48 @ 0x30 - 8000d9a: b298 uxth r0, r3 - 8000d9c: 78bb ldrb r3, [r7, #2] - 8000d9e: b299 uxth r1, r3 - 8000da0: 2302 movs r3, #2 - 8000da2: 9301 str r3, [sp, #4] - 8000da4: 2300 movs r3, #0 - 8000da6: 9300 str r3, [sp, #0] - 8000da8: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000dac: 226d movs r2, #109 @ 0x6d - 8000dae: f002 fe3d bl 8003a2c - displayChar_TFT(col + 60, ligne, 'V', ST7735_YELLOW, ST7735_BLACK, 2); - 8000db2: 78fb ldrb r3, [r7, #3] - 8000db4: b29b uxth r3, r3 - 8000db6: 333c adds r3, #60 @ 0x3c - 8000db8: b298 uxth r0, r3 - 8000dba: 78bb ldrb r3, [r7, #2] - 8000dbc: b299 uxth r1, r3 - 8000dbe: 2302 movs r3, #2 - 8000dc0: 9301 str r3, [sp, #4] - 8000dc2: 2300 movs r3, #0 - 8000dc4: 9300 str r3, [sp, #0] - 8000dc6: f64f 73e0 movw r3, #65504 @ 0xffe0 - 8000dca: 2256 movs r2, #86 @ 0x56 - 8000dcc: f002 fe2e bl 8003a2c - 8000dd0: e000 b.n 8000dd4 + 800126e: 78fb ldrb r3, [r7, #3] + 8001270: b29b uxth r3, r3 + 8001272: 3324 adds r3, #36 @ 0x24 + 8001274: b298 uxth r0, r3 + 8001276: 78bb ldrb r3, [r7, #2] + 8001278: b299 uxth r1, r3 + 800127a: 7b3b ldrb r3, [r7, #12] + 800127c: 3330 adds r3, #48 @ 0x30 + 800127e: b2da uxtb r2, r3 + 8001280: 2302 movs r3, #2 + 8001282: 9301 str r3, [sp, #4] + 8001284: 2300 movs r3, #0 + 8001286: 9300 str r3, [sp, #0] + 8001288: f64f 73e0 movw r3, #65504 @ 0xffe0 + 800128c: f002 fd48 bl 8003d20 + displayChar_TFT(col + 48, ligne, ' ', ST7735_YELLOW, ST7735_BLACK, 2); + 8001290: 78fb ldrb r3, [r7, #3] + 8001292: b29b uxth r3, r3 + 8001294: 3330 adds r3, #48 @ 0x30 + 8001296: b298 uxth r0, r3 + 8001298: 78bb ldrb r3, [r7, #2] + 800129a: b299 uxth r1, r3 + 800129c: 2302 movs r3, #2 + 800129e: 9301 str r3, [sp, #4] + 80012a0: 2300 movs r3, #0 + 80012a2: 9300 str r3, [sp, #0] + 80012a4: f64f 73e0 movw r3, #65504 @ 0xffe0 + 80012a8: 2220 movs r2, #32 + 80012aa: f002 fd39 bl 8003d20 + displayChar_TFT(col + 60, ligne, 'C', ST7735_YELLOW, ST7735_BLACK, 2); + 80012ae: 78fb ldrb r3, [r7, #3] + 80012b0: b29b uxth r3, r3 + 80012b2: 333c adds r3, #60 @ 0x3c + 80012b4: b298 uxth r0, r3 + 80012b6: 78bb ldrb r3, [r7, #2] + 80012b8: b299 uxth r1, r3 + 80012ba: 2302 movs r3, #2 + 80012bc: 9301 str r3, [sp, #4] + 80012be: 2300 movs r3, #0 + 80012c0: 9300 str r3, [sp, #0] + 80012c2: f64f 73e0 movw r3, #65504 @ 0xffe0 + 80012c6: 2243 movs r2, #67 @ 0x43 + 80012c8: f002 fd2a bl 8003d20 + 80012cc: e000 b.n 80012d0 return; - 8000dd2: bf00 nop + 80012ce: bf00 nop } - 8000dd4: 3710 adds r7, #16 - 8000dd6: 46bd mov sp, r7 - 8000dd8: bd80 pop {r7, pc} - 8000dda: bf00 nop - 8000ddc: 10624dd3 .word 0x10624dd3 - 8000de0: 51eb851f .word 0x51eb851f - 8000de4: cccccccd .word 0xcccccccd + 80012d0: 3710 adds r7, #16 + 80012d2: 46bd mov sp, r7 + 80012d4: bd80 pop {r7, pc} + 80012d6: bf00 nop + 80012d8: 10624dd3 .word 0x10624dd3 + 80012dc: 51eb851f .word 0x51eb851f + 80012e0: cccccccd .word 0xcccccccd + 80012e4: 00000000 .word 0x00000000 -08000de8
: +080012e8
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8000de8: b580 push {r7, lr} - 8000dea: b084 sub sp, #16 - 8000dec: af00 add r7, sp, #0 + 80012e8: b590 push {r4, r7, lr} + 80012ea: b087 sub sp, #28 + 80012ec: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8000dee: f000 fb53 bl 8001498 + 80012ee: f000 fb91 bl 8001a14 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8000df2: f000 f84b bl 8000e8c + 80012f2: f000 f89b bl 800142c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000df6: f000 f91d bl 8001034 + 80012f6: f000 f96d bl 80015d4 MX_SPI1_Init(); - 8000dfa: f000 f8e5 bl 8000fc8 + 80012fa: f000 f935 bl 8001568 MX_ADC_Init(); - 8000dfe: f000 f88b bl 8000f18 + 80012fe: f000 f8db bl 80014b8 /* USER CODE BEGIN 2 */ MAX7219_Init(); - 8000e02: f000 facc bl 800139e + 8001302: f000 fb0a bl 800191a init_TFT(); - 8000e06: f002 fd07 bl 8003818 + 8001306: f002 fc01 bl 8003b0c MAX7219_Clear(); - 8000e0a: f000 faff bl 800140c + 800130a: f000 fb3d bl 8001988 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ + const uint16_t TS_CAL1 = *(uint16_t*)0x1FF800FA; + 800130e: 4b40 ldr r3, [pc, #256] @ (8001410 ) + 8001310: 881b ldrh r3, [r3, #0] + 8001312: 82fb strh r3, [r7, #22] + const uint16_t TS_CAL2 = *(uint16_t*)0x1FF800FE; + 8001314: 4b3f ldr r3, [pc, #252] @ (8001414 ) + 8001316: 881b ldrh r3, [r3, #0] + 8001318: 82bb strh r3, [r7, #20] const uint16_t VREFINT_CAL = *(uint16_t*)0x1FF800F8; - 8000e0e: 4b1c ldr r3, [pc, #112] @ (8000e80 ) - 8000e10: 881b ldrh r3, [r3, #0] - 8000e12: 81fb strh r3, [r7, #14] + 800131a: 4b3f ldr r3, [pc, #252] @ (8001418 ) + 800131c: 881b ldrh r3, [r3, #0] + 800131e: 827b strh r3, [r7, #18] + const int32_t vrefint_value = 1210; + 8001320: f240 43ba movw r3, #1210 @ 0x4ba + 8001324: 60fb str r3, [r7, #12] + float vdda_div_3 = (float)VREFINT_CAL / vrefint_value; + 8001326: 8a7b ldrh r3, [r7, #18] + 8001328: 4618 mov r0, r3 + 800132a: f7ff fbcd bl 8000ac8 <__aeabi_ui2f> + 800132e: 4604 mov r4, r0 + 8001330: 68f8 ldr r0, [r7, #12] + 8001332: f7ff fbcd bl 8000ad0 <__aeabi_i2f> + 8001336: 4603 mov r3, r0 + 8001338: 4619 mov r1, r3 + 800133a: 4620 mov r0, r4 + 800133c: f7ff fcd0 bl 8000ce0 <__aeabi_fdiv> + 8001340: 4603 mov r3, r0 + 8001342: 60bb str r3, [r7, #8] while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ HAL_ADC_Start(&hadc); - 8000e14: 481b ldr r0, [pc, #108] @ (8000e84 ) - 8000e16: f000 fd15 bl 8001844 + 8001344: 4835 ldr r0, [pc, #212] @ (800141c ) + 8001346: f000 fd3b bl 8001dc0 HAL_ADC_PollForConversion(&hadc, 1000); - 8000e1a: f44f 717a mov.w r1, #1000 @ 0x3e8 - 8000e1e: 4819 ldr r0, [pc, #100] @ (8000e84 ) - 8000e20: f000 fd9c bl 800195c - uint32_t value = HAL_ADC_GetValue(&hadc); - 8000e24: 4817 ldr r0, [pc, #92] @ (8000e84 ) - 8000e26: f000 fe29 bl 8001a7c - 8000e2a: 60b8 str r0, [r7, #8] + 800134a: f44f 717a mov.w r1, #1000 @ 0x3e8 + 800134e: 4833 ldr r0, [pc, #204] @ (800141c ) + 8001350: f000 fdc2 bl 8001ed8 + uint32_t temp_value = (HAL_ADC_GetValue(&hadc) / 4096.0) * 3300; + 8001354: 4831 ldr r0, [pc, #196] @ (800141c ) + 8001356: f000 fe4f bl 8001ff8 + 800135a: 4603 mov r3, r0 + 800135c: 4618 mov r0, r3 + 800135e: f7ff f851 bl 8000404 <__aeabi_ui2d> + 8001362: f04f 0200 mov.w r2, #0 + 8001366: 4b2e ldr r3, [pc, #184] @ (8001420 ) + 8001368: f7ff f9f0 bl 800074c <__aeabi_ddiv> + 800136c: 4602 mov r2, r0 + 800136e: 460b mov r3, r1 + 8001370: 4610 mov r0, r2 + 8001372: 4619 mov r1, r3 + 8001374: a324 add r3, pc, #144 @ (adr r3, 8001408 ) + 8001376: e9d3 2300 ldrd r2, r3, [r3] + 800137a: f7ff f8bd bl 80004f8 <__aeabi_dmul> + 800137e: 4602 mov r2, r0 + 8001380: 460b mov r3, r1 + 8001382: 4610 mov r0, r2 + 8001384: 4619 mov r1, r3 + 8001386: f7ff fac9 bl 800091c <__aeabi_d2uiz> + 800138a: 4603 mov r3, r0 + 800138c: 607b str r3, [r7, #4] HAL_ADC_Stop(&hadc); - 8000e2c: 4815 ldr r0, [pc, #84] @ (8000e84 ) - 8000e2e: f000 fd69 bl 8001904 - uint32_t milivolt = (value / 4096.0) * 3300; - 8000e32: 68b8 ldr r0, [r7, #8] - 8000e34: f7ff fae6 bl 8000404 <__aeabi_ui2d> - 8000e38: f04f 0200 mov.w r2, #0 - 8000e3c: 4b12 ldr r3, [pc, #72] @ (8000e88 ) - 8000e3e: f7ff fc85 bl 800074c <__aeabi_ddiv> - 8000e42: 4602 mov r2, r0 - 8000e44: 460b mov r3, r1 - 8000e46: 4610 mov r0, r2 - 8000e48: 4619 mov r1, r3 - 8000e4a: a30b add r3, pc, #44 @ (adr r3, 8000e78 ) - 8000e4c: e9d3 2300 ldrd r2, r3, [r3] - 8000e50: f7ff fb52 bl 80004f8 <__aeabi_dmul> - 8000e54: 4602 mov r2, r0 - 8000e56: 460b mov r3, r1 - 8000e58: 4610 mov r0, r2 - 8000e5a: 4619 mov r1, r3 - 8000e5c: f7ff fd5e bl 800091c <__aeabi_d2uiz> - 8000e60: 4603 mov r3, r0 - 8000e62: 607b str r3, [r7, #4] - affiche_nombre(milivolt, 10, 80); - 8000e64: 2250 movs r2, #80 @ 0x50 - 8000e66: 210a movs r1, #10 - 8000e68: 6878 ldr r0, [r7, #4] - 8000e6a: f7ff ff11 bl 8000c90 + 800138e: 4823 ldr r0, [pc, #140] @ (800141c ) + 8001390: f000 fd76 bl 8001e80 + float temperature = 80 * (temp_value * vdda_div_3 - TS_CAL1) / (TS_CAL2 - TS_CAL1) + 30; + 8001394: 6878 ldr r0, [r7, #4] + 8001396: f7ff fb97 bl 8000ac8 <__aeabi_ui2f> + 800139a: 4603 mov r3, r0 + 800139c: 68b9 ldr r1, [r7, #8] + 800139e: 4618 mov r0, r3 + 80013a0: f7ff fbea bl 8000b78 <__aeabi_fmul> + 80013a4: 4603 mov r3, r0 + 80013a6: 461c mov r4, r3 + 80013a8: 8afb ldrh r3, [r7, #22] + 80013aa: 4618 mov r0, r3 + 80013ac: f7ff fb90 bl 8000ad0 <__aeabi_i2f> + 80013b0: 4603 mov r3, r0 + 80013b2: 4619 mov r1, r3 + 80013b4: 4620 mov r0, r4 + 80013b6: f7ff fad5 bl 8000964 <__aeabi_fsub> + 80013ba: 4603 mov r3, r0 + 80013bc: 4919 ldr r1, [pc, #100] @ (8001424 ) + 80013be: 4618 mov r0, r3 + 80013c0: f7ff fbda bl 8000b78 <__aeabi_fmul> + 80013c4: 4603 mov r3, r0 + 80013c6: 461c mov r4, r3 + 80013c8: 8aba ldrh r2, [r7, #20] + 80013ca: 8afb ldrh r3, [r7, #22] + 80013cc: 1ad3 subs r3, r2, r3 + 80013ce: 4618 mov r0, r3 + 80013d0: f7ff fb7e bl 8000ad0 <__aeabi_i2f> + 80013d4: 4603 mov r3, r0 + 80013d6: 4619 mov r1, r3 + 80013d8: 4620 mov r0, r4 + 80013da: f7ff fc81 bl 8000ce0 <__aeabi_fdiv> + 80013de: 4603 mov r3, r0 + 80013e0: 4911 ldr r1, [pc, #68] @ (8001428 ) + 80013e2: 4618 mov r0, r3 + 80013e4: f7ff fac0 bl 8000968 <__addsf3> + 80013e8: 4603 mov r3, r0 + 80013ea: 603b str r3, [r7, #0] + affiche_nombre((uint32_t)(temperature), 10, 80); + 80013ec: 6838 ldr r0, [r7, #0] + 80013ee: f7ff fd13 bl 8000e18 <__aeabi_f2uiz> + 80013f2: 4603 mov r3, r0 + 80013f4: 2250 movs r2, #80 @ 0x50 + 80013f6: 210a movs r1, #10 + 80013f8: 4618 mov r0, r3 + 80013fa: f7ff fec7 bl 800118c { - 8000e6e: bf00 nop - 8000e70: e7d0 b.n 8000e14 - 8000e72: bf00 nop - 8000e74: f3af 8000 nop.w - 8000e78: 00000000 .word 0x00000000 - 8000e7c: 40a9c800 .word 0x40a9c800 - 8000e80: 1ff800f8 .word 0x1ff800f8 - 8000e84: 20000028 .word 0x20000028 - 8000e88: 40b00000 .word 0x40b00000 + 80013fe: bf00 nop + 8001400: e7a0 b.n 8001344 + 8001402: bf00 nop + 8001404: f3af 8000 nop.w + 8001408: 00000000 .word 0x00000000 + 800140c: 40a9c800 .word 0x40a9c800 + 8001410: 1ff800fa .word 0x1ff800fa + 8001414: 1ff800fe .word 0x1ff800fe + 8001418: 1ff800f8 .word 0x1ff800f8 + 800141c: 20000028 .word 0x20000028 + 8001420: 40b00000 .word 0x40b00000 + 8001424: 42a00000 .word 0x42a00000 + 8001428: 41f00000 .word 0x41f00000 -08000e8c : +0800142c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000e8c: b580 push {r7, lr} - 8000e8e: b092 sub sp, #72 @ 0x48 - 8000e90: af00 add r7, sp, #0 + 800142c: b580 push {r7, lr} + 800142e: b092 sub sp, #72 @ 0x48 + 8001430: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8000e92: f107 0314 add.w r3, r7, #20 - 8000e96: 2234 movs r2, #52 @ 0x34 - 8000e98: 2100 movs r1, #0 - 8000e9a: 4618 mov r0, r3 - 8000e9c: f002 ff44 bl 8003d28 + 8001432: f107 0314 add.w r3, r7, #20 + 8001436: 2234 movs r2, #52 @ 0x34 + 8001438: 2100 movs r1, #0 + 800143a: 4618 mov r0, r3 + 800143c: f002 fdee bl 800401c RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8000ea0: 463b mov r3, r7 - 8000ea2: 2200 movs r2, #0 - 8000ea4: 601a str r2, [r3, #0] - 8000ea6: 605a str r2, [r3, #4] - 8000ea8: 609a str r2, [r3, #8] - 8000eaa: 60da str r2, [r3, #12] - 8000eac: 611a str r2, [r3, #16] + 8001440: 463b mov r3, r7 + 8001442: 2200 movs r2, #0 + 8001444: 601a str r2, [r3, #0] + 8001446: 605a str r2, [r3, #4] + 8001448: 609a str r2, [r3, #8] + 800144a: 60da str r2, [r3, #12] + 800144c: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8000eae: 4b19 ldr r3, [pc, #100] @ (8000f14 ) - 8000eb0: 681b ldr r3, [r3, #0] - 8000eb2: f423 53c0 bic.w r3, r3, #6144 @ 0x1800 - 8000eb6: 4a17 ldr r2, [pc, #92] @ (8000f14 ) - 8000eb8: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8000ebc: 6013 str r3, [r2, #0] + 800144e: 4b19 ldr r3, [pc, #100] @ (80014b4 ) + 8001450: 681b ldr r3, [r3, #0] + 8001452: f423 53c0 bic.w r3, r3, #6144 @ 0x1800 + 8001456: 4a17 ldr r2, [pc, #92] @ (80014b4 ) + 8001458: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 800145c: 6013 str r3, [r2, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 8000ebe: 2302 movs r3, #2 - 8000ec0: 617b str r3, [r7, #20] + 800145e: 2302 movs r3, #2 + 8001460: 617b str r3, [r7, #20] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8000ec2: 2301 movs r3, #1 - 8000ec4: 623b str r3, [r7, #32] + 8001462: 2301 movs r3, #1 + 8001464: 623b str r3, [r7, #32] RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 8000ec6: 2310 movs r3, #16 - 8000ec8: 627b str r3, [r7, #36] @ 0x24 + 8001466: 2310 movs r3, #16 + 8001468: 627b str r3, [r7, #36] @ 0x24 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8000eca: 2300 movs r3, #0 - 8000ecc: 63bb str r3, [r7, #56] @ 0x38 + 800146a: 2300 movs r3, #0 + 800146c: 63bb str r3, [r7, #56] @ 0x38 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000ece: f107 0314 add.w r3, r7, #20 - 8000ed2: 4618 mov r0, r3 - 8000ed4: f001 fbb8 bl 8002648 - 8000ed8: 4603 mov r3, r0 - 8000eda: 2b00 cmp r3, #0 - 8000edc: d001 beq.n 8000ee2 + 800146e: f107 0314 add.w r3, r7, #20 + 8001472: 4618 mov r0, r3 + 8001474: f001 fa62 bl 800293c + 8001478: 4603 mov r3, r0 + 800147a: 2b00 cmp r3, #0 + 800147c: d001 beq.n 8001482 { Error_Handler(); - 8000ede: f000 f93d bl 800115c + 800147e: f000 f93d bl 80016fc } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000ee2: 230f movs r3, #15 - 8000ee4: 603b str r3, [r7, #0] + 8001482: 230f movs r3, #15 + 8001484: 603b str r3, [r7, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; - 8000ee6: 2301 movs r3, #1 - 8000ee8: 607b str r3, [r7, #4] + 8001486: 2301 movs r3, #1 + 8001488: 607b str r3, [r7, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000eea: 2300 movs r3, #0 - 8000eec: 60bb str r3, [r7, #8] + 800148a: 2300 movs r3, #0 + 800148c: 60bb str r3, [r7, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8000eee: 2300 movs r3, #0 - 8000ef0: 60fb str r3, [r7, #12] + 800148e: 2300 movs r3, #0 + 8001490: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8000ef2: 2300 movs r3, #0 - 8000ef4: 613b str r3, [r7, #16] + 8001492: 2300 movs r3, #0 + 8001494: 613b str r3, [r7, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8000ef6: 463b mov r3, r7 - 8000ef8: 2100 movs r1, #0 - 8000efa: 4618 mov r0, r3 - 8000efc: f001 fed4 bl 8002ca8 - 8000f00: 4603 mov r3, r0 - 8000f02: 2b00 cmp r3, #0 - 8000f04: d001 beq.n 8000f0a + 8001496: 463b mov r3, r7 + 8001498: 2100 movs r1, #0 + 800149a: 4618 mov r0, r3 + 800149c: f001 fd7e bl 8002f9c + 80014a0: 4603 mov r3, r0 + 80014a2: 2b00 cmp r3, #0 + 80014a4: d001 beq.n 80014aa { Error_Handler(); - 8000f06: f000 f929 bl 800115c + 80014a6: f000 f929 bl 80016fc } } - 8000f0a: bf00 nop - 8000f0c: 3748 adds r7, #72 @ 0x48 - 8000f0e: 46bd mov sp, r7 - 8000f10: bd80 pop {r7, pc} - 8000f12: bf00 nop - 8000f14: 40007000 .word 0x40007000 + 80014aa: bf00 nop + 80014ac: 3748 adds r7, #72 @ 0x48 + 80014ae: 46bd mov sp, r7 + 80014b0: bd80 pop {r7, pc} + 80014b2: bf00 nop + 80014b4: 40007000 .word 0x40007000 -08000f18 : +080014b8 : * @brief ADC Initialization Function * @param None * @retval None */ static void MX_ADC_Init(void) { - 8000f18: b580 push {r7, lr} - 8000f1a: b084 sub sp, #16 - 8000f1c: af00 add r7, sp, #0 + 80014b8: b580 push {r7, lr} + 80014ba: b084 sub sp, #16 + 80014bc: af00 add r7, sp, #0 /* USER CODE BEGIN ADC_Init 0 */ /* USER CODE END ADC_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 8000f1e: 1d3b adds r3, r7, #4 - 8000f20: 2200 movs r2, #0 - 8000f22: 601a str r2, [r3, #0] - 8000f24: 605a str r2, [r3, #4] - 8000f26: 609a str r2, [r3, #8] + 80014be: 1d3b adds r3, r7, #4 + 80014c0: 2200 movs r2, #0 + 80014c2: 601a str r2, [r3, #0] + 80014c4: 605a str r2, [r3, #4] + 80014c6: 609a str r2, [r3, #8] /* USER CODE END ADC_Init 1 */ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) */ hadc.Instance = ADC1; - 8000f28: 4b25 ldr r3, [pc, #148] @ (8000fc0 ) - 8000f2a: 4a26 ldr r2, [pc, #152] @ (8000fc4 ) - 8000f2c: 601a str r2, [r3, #0] + 80014c8: 4b25 ldr r3, [pc, #148] @ (8001560 ) + 80014ca: 4a26 ldr r2, [pc, #152] @ (8001564 ) + 80014cc: 601a str r2, [r3, #0] hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - 8000f2e: 4b24 ldr r3, [pc, #144] @ (8000fc0 ) - 8000f30: 2200 movs r2, #0 - 8000f32: 605a str r2, [r3, #4] + 80014ce: 4b24 ldr r3, [pc, #144] @ (8001560 ) + 80014d0: 2200 movs r2, #0 + 80014d2: 605a str r2, [r3, #4] hadc.Init.Resolution = ADC_RESOLUTION_12B; - 8000f34: 4b22 ldr r3, [pc, #136] @ (8000fc0 ) - 8000f36: 2200 movs r2, #0 - 8000f38: 609a str r2, [r3, #8] + 80014d4: 4b22 ldr r3, [pc, #136] @ (8001560 ) + 80014d6: 2200 movs r2, #0 + 80014d8: 609a str r2, [r3, #8] hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8000f3a: 4b21 ldr r3, [pc, #132] @ (8000fc0 ) - 8000f3c: 2200 movs r2, #0 - 8000f3e: 60da str r2, [r3, #12] + 80014da: 4b21 ldr r3, [pc, #132] @ (8001560 ) + 80014dc: 2200 movs r2, #0 + 80014de: 60da str r2, [r3, #12] hadc.Init.ScanConvMode = ADC_SCAN_DISABLE; - 8000f40: 4b1f ldr r3, [pc, #124] @ (8000fc0 ) - 8000f42: 2200 movs r2, #0 - 8000f44: 611a str r2, [r3, #16] + 80014e0: 4b1f ldr r3, [pc, #124] @ (8001560 ) + 80014e2: 2200 movs r2, #0 + 80014e4: 611a str r2, [r3, #16] hadc.Init.EOCSelection = ADC_EOC_SEQ_CONV; - 8000f46: 4b1e ldr r3, [pc, #120] @ (8000fc0 ) - 8000f48: 2200 movs r2, #0 - 8000f4a: 615a str r2, [r3, #20] + 80014e6: 4b1e ldr r3, [pc, #120] @ (8001560 ) + 80014e8: 2200 movs r2, #0 + 80014ea: 615a str r2, [r3, #20] hadc.Init.LowPowerAutoWait = ADC_AUTOWAIT_DISABLE; - 8000f4c: 4b1c ldr r3, [pc, #112] @ (8000fc0 ) - 8000f4e: 2200 movs r2, #0 - 8000f50: 619a str r2, [r3, #24] + 80014ec: 4b1c ldr r3, [pc, #112] @ (8001560 ) + 80014ee: 2200 movs r2, #0 + 80014f0: 619a str r2, [r3, #24] hadc.Init.LowPowerAutoPowerOff = ADC_AUTOPOWEROFF_DISABLE; - 8000f52: 4b1b ldr r3, [pc, #108] @ (8000fc0 ) - 8000f54: 2200 movs r2, #0 - 8000f56: 61da str r2, [r3, #28] + 80014f2: 4b1b ldr r3, [pc, #108] @ (8001560 ) + 80014f4: 2200 movs r2, #0 + 80014f6: 61da str r2, [r3, #28] hadc.Init.ChannelsBank = ADC_CHANNELS_BANK_A; - 8000f58: 4b19 ldr r3, [pc, #100] @ (8000fc0 ) - 8000f5a: 2200 movs r2, #0 - 8000f5c: 621a str r2, [r3, #32] + 80014f8: 4b19 ldr r3, [pc, #100] @ (8001560 ) + 80014fa: 2200 movs r2, #0 + 80014fc: 621a str r2, [r3, #32] hadc.Init.ContinuousConvMode = DISABLE; - 8000f5e: 4b18 ldr r3, [pc, #96] @ (8000fc0 ) - 8000f60: 2200 movs r2, #0 - 8000f62: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 80014fe: 4b18 ldr r3, [pc, #96] @ (8001560 ) + 8001500: 2200 movs r2, #0 + 8001502: f883 2024 strb.w r2, [r3, #36] @ 0x24 hadc.Init.NbrOfConversion = 1; - 8000f66: 4b16 ldr r3, [pc, #88] @ (8000fc0 ) - 8000f68: 2201 movs r2, #1 - 8000f6a: 629a str r2, [r3, #40] @ 0x28 + 8001506: 4b16 ldr r3, [pc, #88] @ (8001560 ) + 8001508: 2201 movs r2, #1 + 800150a: 629a str r2, [r3, #40] @ 0x28 hadc.Init.DiscontinuousConvMode = DISABLE; - 8000f6c: 4b14 ldr r3, [pc, #80] @ (8000fc0 ) - 8000f6e: 2200 movs r2, #0 - 8000f70: f883 202c strb.w r2, [r3, #44] @ 0x2c + 800150c: 4b14 ldr r3, [pc, #80] @ (8001560 ) + 800150e: 2200 movs r2, #0 + 8001510: f883 202c strb.w r2, [r3, #44] @ 0x2c hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8000f74: 4b12 ldr r3, [pc, #72] @ (8000fc0 ) - 8000f76: 2210 movs r2, #16 - 8000f78: 635a str r2, [r3, #52] @ 0x34 + 8001514: 4b12 ldr r3, [pc, #72] @ (8001560 ) + 8001516: 2210 movs r2, #16 + 8001518: 635a str r2, [r3, #52] @ 0x34 hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 8000f7a: 4b11 ldr r3, [pc, #68] @ (8000fc0 ) - 8000f7c: 2200 movs r2, #0 - 8000f7e: 639a str r2, [r3, #56] @ 0x38 + 800151a: 4b11 ldr r3, [pc, #68] @ (8001560 ) + 800151c: 2200 movs r2, #0 + 800151e: 639a str r2, [r3, #56] @ 0x38 hadc.Init.DMAContinuousRequests = DISABLE; - 8000f80: 4b0f ldr r3, [pc, #60] @ (8000fc0 ) - 8000f82: 2200 movs r2, #0 - 8000f84: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8001520: 4b0f ldr r3, [pc, #60] @ (8001560 ) + 8001522: 2200 movs r2, #0 + 8001524: f883 203c strb.w r2, [r3, #60] @ 0x3c if (HAL_ADC_Init(&hadc) != HAL_OK) - 8000f88: 480d ldr r0, [pc, #52] @ (8000fc0 ) - 8000f8a: f000 fb15 bl 80015b8 - 8000f8e: 4603 mov r3, r0 - 8000f90: 2b00 cmp r3, #0 - 8000f92: d001 beq.n 8000f98 + 8001528: 480d ldr r0, [pc, #52] @ (8001560 ) + 800152a: f000 fb03 bl 8001b34 + 800152e: 4603 mov r3, r0 + 8001530: 2b00 cmp r3, #0 + 8001532: d001 beq.n 8001538 { Error_Handler(); - 8000f94: f000 f8e2 bl 800115c + 8001534: f000 f8e2 bl 80016fc } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ - sConfig.Channel = ADC_CHANNEL_VREFINT; - 8000f98: 2311 movs r3, #17 - 8000f9a: 607b str r3, [r7, #4] + sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; + 8001538: 2310 movs r3, #16 + 800153a: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8000f9c: 2301 movs r3, #1 - 8000f9e: 60bb str r3, [r7, #8] + 800153c: 2301 movs r3, #1 + 800153e: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_4CYCLES; - 8000fa0: 2300 movs r3, #0 - 8000fa2: 60fb str r3, [r7, #12] + 8001540: 2300 movs r3, #0 + 8001542: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) - 8000fa4: 1d3b adds r3, r7, #4 - 8000fa6: 4619 mov r1, r3 - 8000fa8: 4805 ldr r0, [pc, #20] @ (8000fc0 ) - 8000faa: f000 fe85 bl 8001cb8 - 8000fae: 4603 mov r3, r0 - 8000fb0: 2b00 cmp r3, #0 - 8000fb2: d001 beq.n 8000fb8 + 8001544: 1d3b adds r3, r7, #4 + 8001546: 4619 mov r1, r3 + 8001548: 4805 ldr r0, [pc, #20] @ (8001560 ) + 800154a: f000 fd61 bl 8002010 + 800154e: 4603 mov r3, r0 + 8001550: 2b00 cmp r3, #0 + 8001552: d001 beq.n 8001558 { Error_Handler(); - 8000fb4: f000 f8d2 bl 800115c + 8001554: f000 f8d2 bl 80016fc } /* USER CODE BEGIN ADC_Init 2 */ /* USER CODE END ADC_Init 2 */ } - 8000fb8: bf00 nop - 8000fba: 3710 adds r7, #16 - 8000fbc: 46bd mov sp, r7 - 8000fbe: bd80 pop {r7, pc} - 8000fc0: 20000028 .word 0x20000028 - 8000fc4: 40012400 .word 0x40012400 + 8001558: bf00 nop + 800155a: 3710 adds r7, #16 + 800155c: 46bd mov sp, r7 + 800155e: bd80 pop {r7, pc} + 8001560: 20000028 .word 0x20000028 + 8001564: 40012400 .word 0x40012400 -08000fc8 : +08001568 : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { - 8000fc8: b580 push {r7, lr} - 8000fca: af00 add r7, sp, #0 + 8001568: b580 push {r7, lr} + 800156a: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; - 8000fcc: 4b17 ldr r3, [pc, #92] @ (800102c ) - 8000fce: 4a18 ldr r2, [pc, #96] @ (8001030 ) - 8000fd0: 601a str r2, [r3, #0] + 800156c: 4b17 ldr r3, [pc, #92] @ (80015cc ) + 800156e: 4a18 ldr r2, [pc, #96] @ (80015d0 ) + 8001570: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; - 8000fd2: 4b16 ldr r3, [pc, #88] @ (800102c ) - 8000fd4: f44f 7282 mov.w r2, #260 @ 0x104 - 8000fd8: 605a str r2, [r3, #4] + 8001572: 4b16 ldr r3, [pc, #88] @ (80015cc ) + 8001574: f44f 7282 mov.w r2, #260 @ 0x104 + 8001578: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; - 8000fda: 4b14 ldr r3, [pc, #80] @ (800102c ) - 8000fdc: 2200 movs r2, #0 - 8000fde: 609a str r2, [r3, #8] + 800157a: 4b14 ldr r3, [pc, #80] @ (80015cc ) + 800157c: 2200 movs r2, #0 + 800157e: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - 8000fe0: 4b12 ldr r3, [pc, #72] @ (800102c ) - 8000fe2: 2200 movs r2, #0 - 8000fe4: 60da str r2, [r3, #12] + 8001580: 4b12 ldr r3, [pc, #72] @ (80015cc ) + 8001582: 2200 movs r2, #0 + 8001584: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - 8000fe6: 4b11 ldr r3, [pc, #68] @ (800102c ) - 8000fe8: 2200 movs r2, #0 - 8000fea: 611a str r2, [r3, #16] + 8001586: 4b11 ldr r3, [pc, #68] @ (80015cc ) + 8001588: 2200 movs r2, #0 + 800158a: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - 8000fec: 4b0f ldr r3, [pc, #60] @ (800102c ) - 8000fee: 2200 movs r2, #0 - 8000ff0: 615a str r2, [r3, #20] + 800158c: 4b0f ldr r3, [pc, #60] @ (80015cc ) + 800158e: 2200 movs r2, #0 + 8001590: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; - 8000ff2: 4b0e ldr r3, [pc, #56] @ (800102c ) - 8000ff4: f44f 7200 mov.w r2, #512 @ 0x200 - 8000ff8: 619a str r2, [r3, #24] + 8001592: 4b0e ldr r3, [pc, #56] @ (80015cc ) + 8001594: f44f 7200 mov.w r2, #512 @ 0x200 + 8001598: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 8000ffa: 4b0c ldr r3, [pc, #48] @ (800102c ) - 8000ffc: 2200 movs r2, #0 - 8000ffe: 61da str r2, [r3, #28] + 800159a: 4b0c ldr r3, [pc, #48] @ (80015cc ) + 800159c: 2200 movs r2, #0 + 800159e: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - 8001000: 4b0a ldr r3, [pc, #40] @ (800102c ) - 8001002: 2200 movs r2, #0 - 8001004: 621a str r2, [r3, #32] + 80015a0: 4b0a ldr r3, [pc, #40] @ (80015cc ) + 80015a2: 2200 movs r2, #0 + 80015a4: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - 8001006: 4b09 ldr r3, [pc, #36] @ (800102c ) - 8001008: 2200 movs r2, #0 - 800100a: 625a str r2, [r3, #36] @ 0x24 + 80015a6: 4b09 ldr r3, [pc, #36] @ (80015cc ) + 80015a8: 2200 movs r2, #0 + 80015aa: 625a str r2, [r3, #36] @ 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 800100c: 4b07 ldr r3, [pc, #28] @ (800102c ) - 800100e: 2200 movs r2, #0 - 8001010: 629a str r2, [r3, #40] @ 0x28 + 80015ac: 4b07 ldr r3, [pc, #28] @ (80015cc ) + 80015ae: 2200 movs r2, #0 + 80015b0: 629a str r2, [r3, #40] @ 0x28 hspi1.Init.CRCPolynomial = 10; - 8001012: 4b06 ldr r3, [pc, #24] @ (800102c ) - 8001014: 220a movs r2, #10 - 8001016: 62da str r2, [r3, #44] @ 0x2c + 80015b2: 4b06 ldr r3, [pc, #24] @ (80015cc ) + 80015b4: 220a movs r2, #10 + 80015b6: 62da str r2, [r3, #44] @ 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) - 8001018: 4804 ldr r0, [pc, #16] @ (800102c ) - 800101a: f002 f897 bl 800314c - 800101e: 4603 mov r3, r0 - 8001020: 2b00 cmp r3, #0 - 8001022: d001 beq.n 8001028 + 80015b8: 4804 ldr r0, [pc, #16] @ (80015cc ) + 80015ba: f001 ff41 bl 8003440 + 80015be: 4603 mov r3, r0 + 80015c0: 2b00 cmp r3, #0 + 80015c2: d001 beq.n 80015c8 { Error_Handler(); - 8001024: f000 f89a bl 800115c + 80015c4: f000 f89a bl 80016fc } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } - 8001028: bf00 nop - 800102a: bd80 pop {r7, pc} - 800102c: 2000007c .word 0x2000007c - 8001030: 40013000 .word 0x40013000 + 80015c8: bf00 nop + 80015ca: bd80 pop {r7, pc} + 80015cc: 2000007c .word 0x2000007c + 80015d0: 40013000 .word 0x40013000 -08001034 : +080015d4 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 8001034: b580 push {r7, lr} - 8001036: b08a sub sp, #40 @ 0x28 - 8001038: af00 add r7, sp, #0 + 80015d4: b580 push {r7, lr} + 80015d6: b08a sub sp, #40 @ 0x28 + 80015d8: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800103a: f107 0314 add.w r3, r7, #20 - 800103e: 2200 movs r2, #0 - 8001040: 601a str r2, [r3, #0] - 8001042: 605a str r2, [r3, #4] - 8001044: 609a str r2, [r3, #8] - 8001046: 60da str r2, [r3, #12] - 8001048: 611a str r2, [r3, #16] + 80015da: f107 0314 add.w r3, r7, #20 + 80015de: 2200 movs r2, #0 + 80015e0: 601a str r2, [r3, #0] + 80015e2: 605a str r2, [r3, #4] + 80015e4: 609a str r2, [r3, #8] + 80015e6: 60da str r2, [r3, #12] + 80015e8: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 800104a: 4b40 ldr r3, [pc, #256] @ (800114c ) - 800104c: 69db ldr r3, [r3, #28] - 800104e: 4a3f ldr r2, [pc, #252] @ (800114c ) - 8001050: f043 0304 orr.w r3, r3, #4 - 8001054: 61d3 str r3, [r2, #28] - 8001056: 4b3d ldr r3, [pc, #244] @ (800114c ) - 8001058: 69db ldr r3, [r3, #28] - 800105a: f003 0304 and.w r3, r3, #4 - 800105e: 613b str r3, [r7, #16] - 8001060: 693b ldr r3, [r7, #16] + 80015ea: 4b40 ldr r3, [pc, #256] @ (80016ec ) + 80015ec: 69db ldr r3, [r3, #28] + 80015ee: 4a3f ldr r2, [pc, #252] @ (80016ec ) + 80015f0: f043 0304 orr.w r3, r3, #4 + 80015f4: 61d3 str r3, [r2, #28] + 80015f6: 4b3d ldr r3, [pc, #244] @ (80016ec ) + 80015f8: 69db ldr r3, [r3, #28] + 80015fa: f003 0304 and.w r3, r3, #4 + 80015fe: 613b str r3, [r7, #16] + 8001600: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001062: 4b3a ldr r3, [pc, #232] @ (800114c ) - 8001064: 69db ldr r3, [r3, #28] - 8001066: 4a39 ldr r2, [pc, #228] @ (800114c ) - 8001068: f043 0301 orr.w r3, r3, #1 - 800106c: 61d3 str r3, [r2, #28] - 800106e: 4b37 ldr r3, [pc, #220] @ (800114c ) - 8001070: 69db ldr r3, [r3, #28] - 8001072: f003 0301 and.w r3, r3, #1 - 8001076: 60fb str r3, [r7, #12] - 8001078: 68fb ldr r3, [r7, #12] + 8001602: 4b3a ldr r3, [pc, #232] @ (80016ec ) + 8001604: 69db ldr r3, [r3, #28] + 8001606: 4a39 ldr r2, [pc, #228] @ (80016ec ) + 8001608: f043 0301 orr.w r3, r3, #1 + 800160c: 61d3 str r3, [r2, #28] + 800160e: 4b37 ldr r3, [pc, #220] @ (80016ec ) + 8001610: 69db ldr r3, [r3, #28] + 8001612: f003 0301 and.w r3, r3, #1 + 8001616: 60fb str r3, [r7, #12] + 8001618: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); - 800107a: 4b34 ldr r3, [pc, #208] @ (800114c ) - 800107c: 69db ldr r3, [r3, #28] - 800107e: 4a33 ldr r2, [pc, #204] @ (800114c ) - 8001080: f043 0302 orr.w r3, r3, #2 - 8001084: 61d3 str r3, [r2, #28] - 8001086: 4b31 ldr r3, [pc, #196] @ (800114c ) - 8001088: 69db ldr r3, [r3, #28] - 800108a: f003 0302 and.w r3, r3, #2 - 800108e: 60bb str r3, [r7, #8] - 8001090: 68bb ldr r3, [r7, #8] + 800161a: 4b34 ldr r3, [pc, #208] @ (80016ec ) + 800161c: 69db ldr r3, [r3, #28] + 800161e: 4a33 ldr r2, [pc, #204] @ (80016ec ) + 8001620: f043 0302 orr.w r3, r3, #2 + 8001624: 61d3 str r3, [r2, #28] + 8001626: 4b31 ldr r3, [pc, #196] @ (80016ec ) + 8001628: 69db ldr r3, [r3, #28] + 800162a: f003 0302 and.w r3, r3, #2 + 800162e: 60bb str r3, [r7, #8] + 8001630: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8001092: 4b2e ldr r3, [pc, #184] @ (800114c ) - 8001094: 69db ldr r3, [r3, #28] - 8001096: 4a2d ldr r2, [pc, #180] @ (800114c ) - 8001098: f043 0308 orr.w r3, r3, #8 - 800109c: 61d3 str r3, [r2, #28] - 800109e: 4b2b ldr r3, [pc, #172] @ (800114c ) - 80010a0: 69db ldr r3, [r3, #28] - 80010a2: f003 0308 and.w r3, r3, #8 - 80010a6: 607b str r3, [r7, #4] - 80010a8: 687b ldr r3, [r7, #4] + 8001632: 4b2e ldr r3, [pc, #184] @ (80016ec ) + 8001634: 69db ldr r3, [r3, #28] + 8001636: 4a2d ldr r2, [pc, #180] @ (80016ec ) + 8001638: f043 0308 orr.w r3, r3, #8 + 800163c: 61d3 str r3, [r2, #28] + 800163e: 4b2b ldr r3, [pc, #172] @ (80016ec ) + 8001640: 69db ldr r3, [r3, #28] + 8001642: f003 0308 and.w r3, r3, #8 + 8001646: 607b str r3, [r7, #4] + 8001648: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, GPIO_PIN_RESET); - 80010aa: 2200 movs r2, #0 - 80010ac: 2101 movs r1, #1 - 80010ae: 4828 ldr r0, [pc, #160] @ (8001150 ) - 80010b0: f001 fab2 bl 8002618 + 800164a: 2200 movs r2, #0 + 800164c: 2101 movs r1, #1 + 800164e: 4828 ldr r0, [pc, #160] @ (80016f0 ) + 8001650: f001 f95c bl 800290c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_SET); - 80010b4: 2201 movs r2, #1 - 80010b6: 210e movs r1, #14 - 80010b8: 4825 ldr r0, [pc, #148] @ (8001150 ) - 80010ba: f001 faad bl 8002618 + 8001654: 2201 movs r2, #1 + 8001656: 210e movs r1, #14 + 8001658: 4825 ldr r0, [pc, #148] @ (80016f0 ) + 800165a: f001 f957 bl 800290c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_SET); - 80010be: 2201 movs r2, #1 - 80010c0: 2104 movs r1, #4 - 80010c2: 4824 ldr r0, [pc, #144] @ (8001154 ) - 80010c4: f001 faa8 bl 8002618 + 800165e: 2201 movs r2, #1 + 8001660: 2104 movs r1, #4 + 8001662: 4824 ldr r0, [pc, #144] @ (80016f4 ) + 8001664: f001 f952 bl 800290c /*Configure GPIO pins : PC0 PC1 PC2 PC3 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; - 80010c8: 230f movs r3, #15 - 80010ca: 617b str r3, [r7, #20] + 8001668: 230f movs r3, #15 + 800166a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80010cc: 2301 movs r3, #1 - 80010ce: 61bb str r3, [r7, #24] + 800166c: 2301 movs r3, #1 + 800166e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80010d0: 2300 movs r3, #0 - 80010d2: 61fb str r3, [r7, #28] + 8001670: 2300 movs r3, #0 + 8001672: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80010d4: 2300 movs r3, #0 - 80010d6: 623b str r3, [r7, #32] + 8001674: 2300 movs r3, #0 + 8001676: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80010d8: f107 0314 add.w r3, r7, #20 - 80010dc: 4619 mov r1, r3 - 80010de: 481c ldr r0, [pc, #112] @ (8001150 ) - 80010e0: f001 f90a bl 80022f8 + 8001678: f107 0314 add.w r3, r7, #20 + 800167c: 4619 mov r1, r3 + 800167e: 481c ldr r0, [pc, #112] @ (80016f0 ) + 8001680: f000 ffb4 bl 80025ec /*Configure GPIO pin : PB15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; - 80010e4: f44f 4300 mov.w r3, #32768 @ 0x8000 - 80010e8: 617b str r3, [r7, #20] + 8001684: f44f 4300 mov.w r3, #32768 @ 0x8000 + 8001688: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80010ea: 2302 movs r3, #2 - 80010ec: 61bb str r3, [r7, #24] + 800168a: 2302 movs r3, #2 + 800168c: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80010ee: 2300 movs r3, #0 - 80010f0: 61fb str r3, [r7, #28] + 800168e: 2300 movs r3, #0 + 8001690: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80010f2: 2300 movs r3, #0 - 80010f4: 623b str r3, [r7, #32] + 8001692: 2300 movs r3, #0 + 8001694: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF3_TIM11; - 80010f6: 2303 movs r3, #3 - 80010f8: 627b str r3, [r7, #36] @ 0x24 + 8001696: 2303 movs r3, #3 + 8001698: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80010fa: f107 0314 add.w r3, r7, #20 - 80010fe: 4619 mov r1, r3 - 8001100: 4815 ldr r0, [pc, #84] @ (8001158 ) - 8001102: f001 f8f9 bl 80022f8 + 800169a: f107 0314 add.w r3, r7, #20 + 800169e: 4619 mov r1, r3 + 80016a0: 4815 ldr r0, [pc, #84] @ (80016f8 ) + 80016a2: f000 ffa3 bl 80025ec /*Configure GPIO pin : PD2 */ GPIO_InitStruct.Pin = GPIO_PIN_2; - 8001106: 2304 movs r3, #4 - 8001108: 617b str r3, [r7, #20] + 80016a6: 2304 movs r3, #4 + 80016a8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 800110a: 2301 movs r3, #1 - 800110c: 61bb str r3, [r7, #24] + 80016aa: 2301 movs r3, #1 + 80016ac: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800110e: 2300 movs r3, #0 - 8001110: 61fb str r3, [r7, #28] + 80016ae: 2300 movs r3, #0 + 80016b0: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001112: 2300 movs r3, #0 - 8001114: 623b str r3, [r7, #32] + 80016b2: 2300 movs r3, #0 + 80016b4: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 8001116: f107 0314 add.w r3, r7, #20 - 800111a: 4619 mov r1, r3 - 800111c: 480d ldr r0, [pc, #52] @ (8001154 ) - 800111e: f001 f8eb bl 80022f8 + 80016b6: f107 0314 add.w r3, r7, #20 + 80016ba: 4619 mov r1, r3 + 80016bc: 480d ldr r0, [pc, #52] @ (80016f4 ) + 80016be: f000 ff95 bl 80025ec /*Configure GPIO pin : PB7 */ GPIO_InitStruct.Pin = GPIO_PIN_7; - 8001122: 2380 movs r3, #128 @ 0x80 - 8001124: 617b str r3, [r7, #20] + 80016c2: 2380 movs r3, #128 @ 0x80 + 80016c4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8001126: 2302 movs r3, #2 - 8001128: 61bb str r3, [r7, #24] + 80016c6: 2302 movs r3, #2 + 80016c8: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800112a: 2300 movs r3, #0 - 800112c: 61fb str r3, [r7, #28] + 80016ca: 2300 movs r3, #0 + 80016cc: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800112e: 2300 movs r3, #0 - 8001130: 623b str r3, [r7, #32] + 80016ce: 2300 movs r3, #0 + 80016d0: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; - 8001132: 2302 movs r3, #2 - 8001134: 627b str r3, [r7, #36] @ 0x24 + 80016d2: 2302 movs r3, #2 + 80016d4: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001136: f107 0314 add.w r3, r7, #20 - 800113a: 4619 mov r1, r3 - 800113c: 4806 ldr r0, [pc, #24] @ (8001158 ) - 800113e: f001 f8db bl 80022f8 + 80016d6: f107 0314 add.w r3, r7, #20 + 80016da: 4619 mov r1, r3 + 80016dc: 4806 ldr r0, [pc, #24] @ (80016f8 ) + 80016de: f000 ff85 bl 80025ec /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 8001142: bf00 nop - 8001144: 3728 adds r7, #40 @ 0x28 - 8001146: 46bd mov sp, r7 - 8001148: bd80 pop {r7, pc} - 800114a: bf00 nop - 800114c: 40023800 .word 0x40023800 - 8001150: 40020800 .word 0x40020800 - 8001154: 40020c00 .word 0x40020c00 - 8001158: 40020400 .word 0x40020400 + 80016e2: bf00 nop + 80016e4: 3728 adds r7, #40 @ 0x28 + 80016e6: 46bd mov sp, r7 + 80016e8: bd80 pop {r7, pc} + 80016ea: bf00 nop + 80016ec: 40023800 .word 0x40023800 + 80016f0: 40020800 .word 0x40020800 + 80016f4: 40020c00 .word 0x40020c00 + 80016f8: 40020400 .word 0x40020400 -0800115c : +080016fc : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 800115c: b480 push {r7} - 800115e: af00 add r7, sp, #0 + 80016fc: b480 push {r7} + 80016fe: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8001160: b672 cpsid i + 8001700: b672 cpsid i } - 8001162: bf00 nop + 8001702: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8001164: bf00 nop - 8001166: e7fd b.n 8001164 + 8001704: bf00 nop + 8001706: e7fd b.n 8001704 -08001168 : +08001708 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8001168: b480 push {r7} - 800116a: b085 sub sp, #20 - 800116c: af00 add r7, sp, #0 + 8001708: b480 push {r7} + 800170a: b085 sub sp, #20 + 800170c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_COMP_CLK_ENABLE(); - 800116e: 4b14 ldr r3, [pc, #80] @ (80011c0 ) - 8001170: 6a5b ldr r3, [r3, #36] @ 0x24 - 8001172: 4a13 ldr r2, [pc, #76] @ (80011c0 ) - 8001174: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 8001178: 6253 str r3, [r2, #36] @ 0x24 - 800117a: 4b11 ldr r3, [pc, #68] @ (80011c0 ) - 800117c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800117e: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 - 8001182: 60fb str r3, [r7, #12] - 8001184: 68fb ldr r3, [r7, #12] + 800170e: 4b14 ldr r3, [pc, #80] @ (8001760 ) + 8001710: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001712: 4a13 ldr r2, [pc, #76] @ (8001760 ) + 8001714: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8001718: 6253 str r3, [r2, #36] @ 0x24 + 800171a: 4b11 ldr r3, [pc, #68] @ (8001760 ) + 800171c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800171e: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 + 8001722: 60fb str r3, [r7, #12] + 8001724: 68fb ldr r3, [r7, #12] __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8001186: 4b0e ldr r3, [pc, #56] @ (80011c0 ) - 8001188: 6a1b ldr r3, [r3, #32] - 800118a: 4a0d ldr r2, [pc, #52] @ (80011c0 ) - 800118c: f043 0301 orr.w r3, r3, #1 - 8001190: 6213 str r3, [r2, #32] - 8001192: 4b0b ldr r3, [pc, #44] @ (80011c0 ) - 8001194: 6a1b ldr r3, [r3, #32] - 8001196: f003 0301 and.w r3, r3, #1 - 800119a: 60bb str r3, [r7, #8] - 800119c: 68bb ldr r3, [r7, #8] + 8001726: 4b0e ldr r3, [pc, #56] @ (8001760 ) + 8001728: 6a1b ldr r3, [r3, #32] + 800172a: 4a0d ldr r2, [pc, #52] @ (8001760 ) + 800172c: f043 0301 orr.w r3, r3, #1 + 8001730: 6213 str r3, [r2, #32] + 8001732: 4b0b ldr r3, [pc, #44] @ (8001760 ) + 8001734: 6a1b ldr r3, [r3, #32] + 8001736: f003 0301 and.w r3, r3, #1 + 800173a: 60bb str r3, [r7, #8] + 800173c: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 800119e: 4b08 ldr r3, [pc, #32] @ (80011c0 ) - 80011a0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80011a2: 4a07 ldr r2, [pc, #28] @ (80011c0 ) - 80011a4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80011a8: 6253 str r3, [r2, #36] @ 0x24 - 80011aa: 4b05 ldr r3, [pc, #20] @ (80011c0 ) - 80011ac: 6a5b ldr r3, [r3, #36] @ 0x24 - 80011ae: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80011b2: 607b str r3, [r7, #4] - 80011b4: 687b ldr r3, [r7, #4] + 800173e: 4b08 ldr r3, [pc, #32] @ (8001760 ) + 8001740: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001742: 4a07 ldr r2, [pc, #28] @ (8001760 ) + 8001744: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8001748: 6253 str r3, [r2, #36] @ 0x24 + 800174a: 4b05 ldr r3, [pc, #20] @ (8001760 ) + 800174c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800174e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8001752: 607b str r3, [r7, #4] + 8001754: 687b ldr r3, [r7, #4] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 80011b6: bf00 nop - 80011b8: 3714 adds r7, #20 - 80011ba: 46bd mov sp, r7 - 80011bc: bc80 pop {r7} - 80011be: 4770 bx lr - 80011c0: 40023800 .word 0x40023800 + 8001756: bf00 nop + 8001758: 3714 adds r7, #20 + 800175a: 46bd mov sp, r7 + 800175c: bc80 pop {r7} + 800175e: 4770 bx lr + 8001760: 40023800 .word 0x40023800 -080011c4 : +08001764 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { - 80011c4: b580 push {r7, lr} - 80011c6: b08a sub sp, #40 @ 0x28 - 80011c8: af00 add r7, sp, #0 - 80011ca: 6078 str r0, [r7, #4] + 8001764: b580 push {r7, lr} + 8001766: b08a sub sp, #40 @ 0x28 + 8001768: af00 add r7, sp, #0 + 800176a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80011cc: f107 0314 add.w r3, r7, #20 - 80011d0: 2200 movs r2, #0 - 80011d2: 601a str r2, [r3, #0] - 80011d4: 605a str r2, [r3, #4] - 80011d6: 609a str r2, [r3, #8] - 80011d8: 60da str r2, [r3, #12] - 80011da: 611a str r2, [r3, #16] + 800176c: f107 0314 add.w r3, r7, #20 + 8001770: 2200 movs r2, #0 + 8001772: 601a str r2, [r3, #0] + 8001774: 605a str r2, [r3, #4] + 8001776: 609a str r2, [r3, #8] + 8001778: 60da str r2, [r3, #12] + 800177a: 611a str r2, [r3, #16] if(hadc->Instance==ADC1) - 80011dc: 687b ldr r3, [r7, #4] - 80011de: 681b ldr r3, [r3, #0] - 80011e0: 4a19 ldr r2, [pc, #100] @ (8001248 ) - 80011e2: 4293 cmp r3, r2 - 80011e4: d12b bne.n 800123e + 800177c: 687b ldr r3, [r7, #4] + 800177e: 681b ldr r3, [r3, #0] + 8001780: 4a15 ldr r2, [pc, #84] @ (80017d8 ) + 8001782: 4293 cmp r3, r2 + 8001784: d123 bne.n 80017ce { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 80011e6: 4b19 ldr r3, [pc, #100] @ (800124c ) - 80011e8: 6a1b ldr r3, [r3, #32] - 80011ea: 4a18 ldr r2, [pc, #96] @ (800124c ) - 80011ec: f443 7300 orr.w r3, r3, #512 @ 0x200 - 80011f0: 6213 str r3, [r2, #32] - 80011f2: 4b16 ldr r3, [pc, #88] @ (800124c ) - 80011f4: 6a1b ldr r3, [r3, #32] - 80011f6: f403 7300 and.w r3, r3, #512 @ 0x200 - 80011fa: 613b str r3, [r7, #16] - 80011fc: 693b ldr r3, [r7, #16] + 8001786: 4b15 ldr r3, [pc, #84] @ (80017dc ) + 8001788: 6a1b ldr r3, [r3, #32] + 800178a: 4a14 ldr r2, [pc, #80] @ (80017dc ) + 800178c: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8001790: 6213 str r3, [r2, #32] + 8001792: 4b12 ldr r3, [pc, #72] @ (80017dc ) + 8001794: 6a1b ldr r3, [r3, #32] + 8001796: f403 7300 and.w r3, r3, #512 @ 0x200 + 800179a: 613b str r3, [r7, #16] + 800179c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80011fe: 4b13 ldr r3, [pc, #76] @ (800124c ) - 8001200: 69db ldr r3, [r3, #28] - 8001202: 4a12 ldr r2, [pc, #72] @ (800124c ) - 8001204: f043 0301 orr.w r3, r3, #1 - 8001208: 61d3 str r3, [r2, #28] - 800120a: 4b10 ldr r3, [pc, #64] @ (800124c ) - 800120c: 69db ldr r3, [r3, #28] - 800120e: f003 0301 and.w r3, r3, #1 - 8001212: 60fb str r3, [r7, #12] - 8001214: 68fb ldr r3, [r7, #12] + 800179e: 4b0f ldr r3, [pc, #60] @ (80017dc ) + 80017a0: 69db ldr r3, [r3, #28] + 80017a2: 4a0e ldr r2, [pc, #56] @ (80017dc ) + 80017a4: f043 0301 orr.w r3, r3, #1 + 80017a8: 61d3 str r3, [r2, #28] + 80017aa: 4b0c ldr r3, [pc, #48] @ (80017dc ) + 80017ac: 69db ldr r3, [r3, #28] + 80017ae: f003 0301 and.w r3, r3, #1 + 80017b2: 60fb str r3, [r7, #12] + 80017b4: 68fb ldr r3, [r7, #12] /**ADC GPIO Configuration PA0-WKUP1 ------> ADC_IN0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; - 8001216: 2301 movs r3, #1 - 8001218: 617b str r3, [r7, #20] + 80017b6: 2301 movs r3, #1 + 80017b8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800121a: 2303 movs r3, #3 - 800121c: 61bb str r3, [r7, #24] + 80017ba: 2303 movs r3, #3 + 80017bc: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800121e: 2300 movs r3, #0 - 8001220: 61fb str r3, [r7, #28] + 80017be: 2300 movs r3, #0 + 80017c0: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001222: f107 0314 add.w r3, r7, #20 - 8001226: 4619 mov r1, r3 - 8001228: 4809 ldr r0, [pc, #36] @ (8001250 ) - 800122a: f001 f865 bl 80022f8 - - /* ADC1 interrupt Init */ - HAL_NVIC_SetPriority(ADC1_IRQn, 0, 0); - 800122e: 2200 movs r2, #0 - 8001230: 2100 movs r1, #0 - 8001232: 2012 movs r0, #18 - 8001234: f001 f829 bl 800228a - HAL_NVIC_EnableIRQ(ADC1_IRQn); - 8001238: 2012 movs r0, #18 - 800123a: f001 f842 bl 80022c2 + 80017c2: f107 0314 add.w r3, r7, #20 + 80017c6: 4619 mov r1, r3 + 80017c8: 4805 ldr r0, [pc, #20] @ (80017e0 ) + 80017ca: f000 ff0f bl 80025ec /* USER CODE END ADC1_MspInit 1 */ } } - 800123e: bf00 nop - 8001240: 3728 adds r7, #40 @ 0x28 - 8001242: 46bd mov sp, r7 - 8001244: bd80 pop {r7, pc} - 8001246: bf00 nop - 8001248: 40012400 .word 0x40012400 - 800124c: 40023800 .word 0x40023800 - 8001250: 40020000 .word 0x40020000 + 80017ce: bf00 nop + 80017d0: 3728 adds r7, #40 @ 0x28 + 80017d2: 46bd mov sp, r7 + 80017d4: bd80 pop {r7, pc} + 80017d6: bf00 nop + 80017d8: 40012400 .word 0x40012400 + 80017dc: 40023800 .word 0x40023800 + 80017e0: 40020000 .word 0x40020000 -08001254 : +080017e4 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { - 8001254: b580 push {r7, lr} - 8001256: b08a sub sp, #40 @ 0x28 - 8001258: af00 add r7, sp, #0 - 800125a: 6078 str r0, [r7, #4] + 80017e4: b580 push {r7, lr} + 80017e6: b08a sub sp, #40 @ 0x28 + 80017e8: af00 add r7, sp, #0 + 80017ea: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800125c: f107 0314 add.w r3, r7, #20 - 8001260: 2200 movs r2, #0 - 8001262: 601a str r2, [r3, #0] - 8001264: 605a str r2, [r3, #4] - 8001266: 609a str r2, [r3, #8] - 8001268: 60da str r2, [r3, #12] - 800126a: 611a str r2, [r3, #16] + 80017ec: f107 0314 add.w r3, r7, #20 + 80017f0: 2200 movs r2, #0 + 80017f2: 601a str r2, [r3, #0] + 80017f4: 605a str r2, [r3, #4] + 80017f6: 609a str r2, [r3, #8] + 80017f8: 60da str r2, [r3, #12] + 80017fa: 611a str r2, [r3, #16] if(hspi->Instance==SPI1) - 800126c: 687b ldr r3, [r7, #4] - 800126e: 681b ldr r3, [r3, #0] - 8001270: 4a17 ldr r2, [pc, #92] @ (80012d0 ) - 8001272: 4293 cmp r3, r2 - 8001274: d127 bne.n 80012c6 + 80017fc: 687b ldr r3, [r7, #4] + 80017fe: 681b ldr r3, [r3, #0] + 8001800: 4a17 ldr r2, [pc, #92] @ (8001860 ) + 8001802: 4293 cmp r3, r2 + 8001804: d127 bne.n 8001856 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); - 8001276: 4b17 ldr r3, [pc, #92] @ (80012d4 ) - 8001278: 6a1b ldr r3, [r3, #32] - 800127a: 4a16 ldr r2, [pc, #88] @ (80012d4 ) - 800127c: f443 5380 orr.w r3, r3, #4096 @ 0x1000 - 8001280: 6213 str r3, [r2, #32] - 8001282: 4b14 ldr r3, [pc, #80] @ (80012d4 ) - 8001284: 6a1b ldr r3, [r3, #32] - 8001286: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 800128a: 613b str r3, [r7, #16] - 800128c: 693b ldr r3, [r7, #16] + 8001806: 4b17 ldr r3, [pc, #92] @ (8001864 ) + 8001808: 6a1b ldr r3, [r3, #32] + 800180a: 4a16 ldr r2, [pc, #88] @ (8001864 ) + 800180c: f443 5380 orr.w r3, r3, #4096 @ 0x1000 + 8001810: 6213 str r3, [r2, #32] + 8001812: 4b14 ldr r3, [pc, #80] @ (8001864 ) + 8001814: 6a1b ldr r3, [r3, #32] + 8001816: f403 5380 and.w r3, r3, #4096 @ 0x1000 + 800181a: 613b str r3, [r7, #16] + 800181c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800128e: 4b11 ldr r3, [pc, #68] @ (80012d4 ) - 8001290: 69db ldr r3, [r3, #28] - 8001292: 4a10 ldr r2, [pc, #64] @ (80012d4 ) - 8001294: f043 0301 orr.w r3, r3, #1 - 8001298: 61d3 str r3, [r2, #28] - 800129a: 4b0e ldr r3, [pc, #56] @ (80012d4 ) - 800129c: 69db ldr r3, [r3, #28] - 800129e: f003 0301 and.w r3, r3, #1 - 80012a2: 60fb str r3, [r7, #12] - 80012a4: 68fb ldr r3, [r7, #12] + 800181e: 4b11 ldr r3, [pc, #68] @ (8001864 ) + 8001820: 69db ldr r3, [r3, #28] + 8001822: 4a10 ldr r2, [pc, #64] @ (8001864 ) + 8001824: f043 0301 orr.w r3, r3, #1 + 8001828: 61d3 str r3, [r2, #28] + 800182a: 4b0e ldr r3, [pc, #56] @ (8001864 ) + 800182c: 69db ldr r3, [r3, #28] + 800182e: f003 0301 and.w r3, r3, #1 + 8001832: 60fb str r3, [r7, #12] + 8001834: 68fb ldr r3, [r7, #12] /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; - 80012a6: 23e0 movs r3, #224 @ 0xe0 - 80012a8: 617b str r3, [r7, #20] + 8001836: 23e0 movs r3, #224 @ 0xe0 + 8001838: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80012aa: 2302 movs r3, #2 - 80012ac: 61bb str r3, [r7, #24] + 800183a: 2302 movs r3, #2 + 800183c: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80012ae: 2300 movs r3, #0 - 80012b0: 61fb str r3, [r7, #28] + 800183e: 2300 movs r3, #0 + 8001840: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 80012b2: 2303 movs r3, #3 - 80012b4: 623b str r3, [r7, #32] + 8001842: 2303 movs r3, #3 + 8001844: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; - 80012b6: 2305 movs r3, #5 - 80012b8: 627b str r3, [r7, #36] @ 0x24 + 8001846: 2305 movs r3, #5 + 8001848: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80012ba: f107 0314 add.w r3, r7, #20 - 80012be: 4619 mov r1, r3 - 80012c0: 4805 ldr r0, [pc, #20] @ (80012d8 ) - 80012c2: f001 f819 bl 80022f8 + 800184a: f107 0314 add.w r3, r7, #20 + 800184e: 4619 mov r1, r3 + 8001850: 4805 ldr r0, [pc, #20] @ (8001868 ) + 8001852: f000 fecb bl 80025ec /* USER CODE END SPI1_MspInit 1 */ } } - 80012c6: bf00 nop - 80012c8: 3728 adds r7, #40 @ 0x28 - 80012ca: 46bd mov sp, r7 - 80012cc: bd80 pop {r7, pc} - 80012ce: bf00 nop - 80012d0: 40013000 .word 0x40013000 - 80012d4: 40023800 .word 0x40023800 - 80012d8: 40020000 .word 0x40020000 + 8001856: bf00 nop + 8001858: 3728 adds r7, #40 @ 0x28 + 800185a: 46bd mov sp, r7 + 800185c: bd80 pop {r7, pc} + 800185e: bf00 nop + 8001860: 40013000 .word 0x40013000 + 8001864: 40023800 .word 0x40023800 + 8001868: 40020000 .word 0x40020000 -080012dc : +0800186c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 80012dc: b480 push {r7} - 80012de: af00 add r7, sp, #0 + 800186c: b480 push {r7} + 800186e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 80012e0: bf00 nop - 80012e2: e7fd b.n 80012e0 + 8001870: bf00 nop + 8001872: e7fd b.n 8001870 -080012e4 : +08001874 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 80012e4: b480 push {r7} - 80012e6: af00 add r7, sp, #0 + 8001874: b480 push {r7} + 8001876: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 80012e8: bf00 nop - 80012ea: e7fd b.n 80012e8 + 8001878: bf00 nop + 800187a: e7fd b.n 8001878 -080012ec : +0800187c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 80012ec: b480 push {r7} - 80012ee: af00 add r7, sp, #0 + 800187c: b480 push {r7} + 800187e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 80012f0: bf00 nop - 80012f2: e7fd b.n 80012f0 + 8001880: bf00 nop + 8001882: e7fd b.n 8001880 -080012f4 : +08001884 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 80012f4: b480 push {r7} - 80012f6: af00 add r7, sp, #0 + 8001884: b480 push {r7} + 8001886: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 80012f8: bf00 nop - 80012fa: e7fd b.n 80012f8 + 8001888: bf00 nop + 800188a: e7fd b.n 8001888 -080012fc : +0800188c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 80012fc: b480 push {r7} - 80012fe: af00 add r7, sp, #0 + 800188c: b480 push {r7} + 800188e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8001300: bf00 nop - 8001302: e7fd b.n 8001300 + 8001890: bf00 nop + 8001892: e7fd b.n 8001890 -08001304 : +08001894 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8001304: b480 push {r7} - 8001306: af00 add r7, sp, #0 + 8001894: b480 push {r7} + 8001896: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 8001308: bf00 nop - 800130a: 46bd mov sp, r7 - 800130c: bc80 pop {r7} - 800130e: 4770 bx lr + 8001898: bf00 nop + 800189a: 46bd mov sp, r7 + 800189c: bc80 pop {r7} + 800189e: 4770 bx lr -08001310 : +080018a0 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8001310: b480 push {r7} - 8001312: af00 add r7, sp, #0 + 80018a0: b480 push {r7} + 80018a2: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8001314: bf00 nop - 8001316: 46bd mov sp, r7 - 8001318: bc80 pop {r7} - 800131a: 4770 bx lr + 80018a4: bf00 nop + 80018a6: 46bd mov sp, r7 + 80018a8: bc80 pop {r7} + 80018aa: 4770 bx lr -0800131c : +080018ac : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 800131c: b480 push {r7} - 800131e: af00 add r7, sp, #0 + 80018ac: b480 push {r7} + 80018ae: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8001320: bf00 nop - 8001322: 46bd mov sp, r7 - 8001324: bc80 pop {r7} - 8001326: 4770 bx lr + 80018b0: bf00 nop + 80018b2: 46bd mov sp, r7 + 80018b4: bc80 pop {r7} + 80018b6: 4770 bx lr -08001328 : +080018b8 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8001328: b580 push {r7, lr} - 800132a: af00 add r7, sp, #0 + 80018b8: b580 push {r7, lr} + 80018ba: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 800132c: f000 f906 bl 800153c + 80018bc: f000 f8fc bl 8001ab8 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8001330: bf00 nop - 8001332: bd80 pop {r7, pc} + 80018c0: bf00 nop + 80018c2: bd80 pop {r7, pc} -08001334 : - -/** - * @brief This function handles ADC global interrupt. - */ -void ADC1_IRQHandler(void) -{ - 8001334: b580 push {r7, lr} - 8001336: af00 add r7, sp, #0 - /* USER CODE BEGIN ADC1_IRQn 0 */ - - /* USER CODE END ADC1_IRQn 0 */ - HAL_ADC_IRQHandler(&hadc); - 8001338: 4802 ldr r0, [pc, #8] @ (8001344 ) - 800133a: f000 fbab bl 8001a94 - /* USER CODE BEGIN ADC1_IRQn 1 */ - - /* USER CODE END ADC1_IRQn 1 */ -} - 800133e: bf00 nop - 8001340: bd80 pop {r7, pc} - 8001342: bf00 nop - 8001344: 20000028 .word 0x20000028 - -08001348 : +080018c4 : * SystemCoreClock variable. * @param None * @retval None */ void SystemInit (void) { - 8001348: b480 push {r7} - 800134a: af00 add r7, sp, #0 + 80018c4: b480 push {r7} + 80018c6: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 800134c: bf00 nop - 800134e: 46bd mov sp, r7 - 8001350: bc80 pop {r7} - 8001352: 4770 bx lr + 80018c8: bf00 nop + 80018ca: 46bd mov sp, r7 + 80018cc: bc80 pop {r7} + 80018ce: 4770 bx lr -08001354 : +080018d0 : .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 8001354: f7ff fff8 bl 8001348 + 80018d0: f7ff fff8 bl 80018c4 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8001358: 480b ldr r0, [pc, #44] @ (8001388 ) + 80018d4: 480b ldr r0, [pc, #44] @ (8001904 ) ldr r1, =_edata - 800135a: 490c ldr r1, [pc, #48] @ (800138c ) + 80018d6: 490c ldr r1, [pc, #48] @ (8001908 ) ldr r2, =_sidata - 800135c: 4a0c ldr r2, [pc, #48] @ (8001390 ) + 80018d8: 4a0c ldr r2, [pc, #48] @ (800190c ) movs r3, #0 - 800135e: 2300 movs r3, #0 + 80018da: 2300 movs r3, #0 b LoopCopyDataInit - 8001360: e002 b.n 8001368 + 80018dc: e002 b.n 80018e4 -08001362 : +080018de : CopyDataInit: ldr r4, [r2, r3] - 8001362: 58d4 ldr r4, [r2, r3] + 80018de: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8001364: 50c4 str r4, [r0, r3] + 80018e0: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8001366: 3304 adds r3, #4 + 80018e2: 3304 adds r3, #4 -08001368 : +080018e4 : LoopCopyDataInit: adds r4, r0, r3 - 8001368: 18c4 adds r4, r0, r3 + 80018e4: 18c4 adds r4, r0, r3 cmp r4, r1 - 800136a: 428c cmp r4, r1 + 80018e6: 428c cmp r4, r1 bcc CopyDataInit - 800136c: d3f9 bcc.n 8001362 + 80018e8: d3f9 bcc.n 80018de /* Zero fill the bss segment. */ ldr r2, =_sbss - 800136e: 4a09 ldr r2, [pc, #36] @ (8001394 ) + 80018ea: 4a09 ldr r2, [pc, #36] @ (8001910 ) ldr r4, =_ebss - 8001370: 4c09 ldr r4, [pc, #36] @ (8001398 ) + 80018ec: 4c09 ldr r4, [pc, #36] @ (8001914 ) movs r3, #0 - 8001372: 2300 movs r3, #0 + 80018ee: 2300 movs r3, #0 b LoopFillZerobss - 8001374: e001 b.n 800137a + 80018f0: e001 b.n 80018f6 -08001376 : +080018f2 : FillZerobss: str r3, [r2] - 8001376: 6013 str r3, [r2, #0] + 80018f2: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8001378: 3204 adds r2, #4 + 80018f4: 3204 adds r2, #4 -0800137a : +080018f6 : LoopFillZerobss: cmp r2, r4 - 800137a: 42a2 cmp r2, r4 + 80018f6: 42a2 cmp r2, r4 bcc FillZerobss - 800137c: d3fb bcc.n 8001376 + 80018f8: d3fb bcc.n 80018f2 /* Call static constructors */ bl __libc_init_array - 800137e: f002 fcdb bl 8003d38 <__libc_init_array> + 80018fa: f002 fb97 bl 800402c <__libc_init_array> /* Call the application's entry point.*/ bl main - 8001382: f7ff fd31 bl 8000de8
+ 80018fe: f7ff fcf3 bl 80012e8
bx lr - 8001386: 4770 bx lr + 8001902: 4770 bx lr ldr r0, =_sdata - 8001388: 20000000 .word 0x20000000 + 8001904: 20000000 .word 0x20000000 ldr r1, =_edata - 800138c: 2000000c .word 0x2000000c + 8001908: 2000000c .word 0x2000000c ldr r2, =_sidata - 8001390: 08004608 .word 0x08004608 + 800190c: 080048fc .word 0x080048fc ldr r2, =_sbss - 8001394: 2000000c .word 0x2000000c + 8001910: 2000000c .word 0x2000000c ldr r4, =_ebss - 8001398: 200000d8 .word 0x200000d8 + 8001914: 200000d8 .word 0x200000d8 -0800139c : +08001918 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 800139c: e7fe b.n 800139c + 8001918: e7fe b.n 8001918 -0800139e : +0800191a : * Arguments : none * Returns : none ********************************************************************************************************* */ void MAX7219_Init (void) { - 800139e: b580 push {r7, lr} - 80013a0: af00 add r7, sp, #0 + 800191a: b580 push {r7, lr} + 800191c: af00 add r7, sp, #0 // configure "LOAD" as output MAX7219_Write(REG_SCAN_LIMIT, 7); // set up to scan all eight digits - 80013a2: 2107 movs r1, #7 - 80013a4: 200b movs r0, #11 - 80013a6: f000 f847 bl 8001438 + 800191e: 2107 movs r1, #7 + 8001920: 200b movs r0, #11 + 8001922: f000 f847 bl 80019b4 MAX7219_Write(REG_DECODE, 0x00); // set to "no decode" for all digits - 80013aa: 2100 movs r1, #0 - 80013ac: 2009 movs r0, #9 - 80013ae: f000 f843 bl 8001438 + 8001926: 2100 movs r1, #0 + 8001928: 2009 movs r0, #9 + 800192a: f000 f843 bl 80019b4 MAX7219_ShutdownStop(); // select normal operation (i.e. not shutdown) - 80013b2: f000 f809 bl 80013c8 + 800192e: f000 f809 bl 8001944 MAX7219_DisplayTestStop(); // select normal operation (i.e. not test mode) - 80013b6: f000 f80f bl 80013d8 + 8001932: f000 f80f bl 8001954 MAX7219_Clear(); // clear all digits - 80013ba: f000 f827 bl 800140c + 8001936: f000 f827 bl 8001988 MAX7219_SetBrightness(INTENSITY_MAX); // set to maximum intensity - 80013be: 200f movs r0, #15 - 80013c0: f000 f812 bl 80013e8 + 800193a: 200f movs r0, #15 + 800193c: f000 f812 bl 8001964 } - 80013c4: bf00 nop - 80013c6: bd80 pop {r7, pc} + 8001940: bf00 nop + 8001942: bd80 pop {r7, pc} -080013c8 : +08001944 : * Arguments : none * Returns : none ********************************************************************************************************* */ void MAX7219_ShutdownStop (void) { - 80013c8: b580 push {r7, lr} - 80013ca: af00 add r7, sp, #0 + 8001944: b580 push {r7, lr} + 8001946: af00 add r7, sp, #0 MAX7219_Write(REG_SHUTDOWN, 1); // put MAX7219 into "normal" mode - 80013cc: 2101 movs r1, #1 - 80013ce: 200c movs r0, #12 - 80013d0: f000 f832 bl 8001438 + 8001948: 2101 movs r1, #1 + 800194a: 200c movs r0, #12 + 800194c: f000 f832 bl 80019b4 } - 80013d4: bf00 nop - 80013d6: bd80 pop {r7, pc} + 8001950: bf00 nop + 8001952: bd80 pop {r7, pc} -080013d8 : +08001954 : * Arguments : none * Returns : none ********************************************************************************************************* */ void MAX7219_DisplayTestStop (void) { - 80013d8: b580 push {r7, lr} - 80013da: af00 add r7, sp, #0 + 8001954: b580 push {r7, lr} + 8001956: af00 add r7, sp, #0 MAX7219_Write(REG_DISPLAY_TEST, 0); // put MAX7219 into "normal" mode - 80013dc: 2100 movs r1, #0 - 80013de: 200f movs r0, #15 - 80013e0: f000 f82a bl 8001438 + 8001958: 2100 movs r1, #0 + 800195a: 200f movs r0, #15 + 800195c: f000 f82a bl 80019b4 } - 80013e4: bf00 nop - 80013e6: bd80 pop {r7, pc} + 8001960: bf00 nop + 8001962: bd80 pop {r7, pc} -080013e8 : +08001964 : * Arguments : brightness (0-15) * Returns : none ********************************************************************************************************* */ void MAX7219_SetBrightness (char brightness) { - 80013e8: b580 push {r7, lr} - 80013ea: b082 sub sp, #8 - 80013ec: af00 add r7, sp, #0 - 80013ee: 4603 mov r3, r0 - 80013f0: 71fb strb r3, [r7, #7] + 8001964: b580 push {r7, lr} + 8001966: b082 sub sp, #8 + 8001968: af00 add r7, sp, #0 + 800196a: 4603 mov r3, r0 + 800196c: 71fb strb r3, [r7, #7] brightness &= 0x0f; // mask off extra bits - 80013f2: 79fb ldrb r3, [r7, #7] - 80013f4: f003 030f and.w r3, r3, #15 - 80013f8: 71fb strb r3, [r7, #7] + 800196e: 79fb ldrb r3, [r7, #7] + 8001970: f003 030f and.w r3, r3, #15 + 8001974: 71fb strb r3, [r7, #7] MAX7219_Write(REG_INTENSITY, brightness); // set brightness - 80013fa: 79fb ldrb r3, [r7, #7] - 80013fc: 4619 mov r1, r3 - 80013fe: 200a movs r0, #10 - 8001400: f000 f81a bl 8001438 + 8001976: 79fb ldrb r3, [r7, #7] + 8001978: 4619 mov r1, r3 + 800197a: 200a movs r0, #10 + 800197c: f000 f81a bl 80019b4 } - 8001404: bf00 nop - 8001406: 3708 adds r7, #8 - 8001408: 46bd mov sp, r7 - 800140a: bd80 pop {r7, pc} + 8001980: bf00 nop + 8001982: 3708 adds r7, #8 + 8001984: 46bd mov sp, r7 + 8001986: bd80 pop {r7, pc} -0800140c : +08001988 : * Arguments : none * Returns : none ********************************************************************************************************* */ void MAX7219_Clear (void) { - 800140c: b580 push {r7, lr} - 800140e: b082 sub sp, #8 - 8001410: af00 add r7, sp, #0 + 8001988: b580 push {r7, lr} + 800198a: b082 sub sp, #8 + 800198c: af00 add r7, sp, #0 char i; for (i=0; i < 8; i++) - 8001412: 2300 movs r3, #0 - 8001414: 71fb strb r3, [r7, #7] - 8001416: e007 b.n 8001428 + 800198e: 2300 movs r3, #0 + 8001990: 71fb strb r3, [r7, #7] + 8001992: e007 b.n 80019a4 MAX7219_Write(i, 0x00); // turn all segments off - 8001418: 79fb ldrb r3, [r7, #7] - 800141a: 2100 movs r1, #0 - 800141c: 4618 mov r0, r3 - 800141e: f000 f80b bl 8001438 + 8001994: 79fb ldrb r3, [r7, #7] + 8001996: 2100 movs r1, #0 + 8001998: 4618 mov r0, r3 + 800199a: f000 f80b bl 80019b4 for (i=0; i < 8; i++) - 8001422: 79fb ldrb r3, [r7, #7] - 8001424: 3301 adds r3, #1 - 8001426: 71fb strb r3, [r7, #7] - 8001428: 79fb ldrb r3, [r7, #7] - 800142a: 2b07 cmp r3, #7 - 800142c: d9f4 bls.n 8001418 + 800199e: 79fb ldrb r3, [r7, #7] + 80019a0: 3301 adds r3, #1 + 80019a2: 71fb strb r3, [r7, #7] + 80019a4: 79fb ldrb r3, [r7, #7] + 80019a6: 2b07 cmp r3, #7 + 80019a8: d9f4 bls.n 8001994 } - 800142e: bf00 nop - 8001430: bf00 nop - 8001432: 3708 adds r7, #8 - 8001434: 46bd mov sp, r7 - 8001436: bd80 pop {r7, pc} + 80019aa: bf00 nop + 80019ac: bf00 nop + 80019ae: 3708 adds r7, #8 + 80019b0: 46bd mov sp, r7 + 80019b2: bd80 pop {r7, pc} -08001438 : +080019b4 : * dataout = data to write to MAX7219 * Returns : none ********************************************************************************************************* */ void MAX7219_Write (unsigned char reg_number, unsigned char dataout) { - 8001438: b580 push {r7, lr} - 800143a: b082 sub sp, #8 - 800143c: af00 add r7, sp, #0 - 800143e: 4603 mov r3, r0 - 8001440: 460a mov r2, r1 - 8001442: 71fb strb r3, [r7, #7] - 8001444: 4613 mov r3, r2 - 8001446: 71bb strb r3, [r7, #6] + 80019b4: b580 push {r7, lr} + 80019b6: b082 sub sp, #8 + 80019b8: af00 add r7, sp, #0 + 80019ba: 4603 mov r3, r0 + 80019bc: 460a mov r2, r1 + 80019be: 71fb strb r3, [r7, #7] + 80019c0: 4613 mov r3, r2 + 80019c2: 71bb strb r3, [r7, #6] MAX7219_nCS_PORT->BSRR = (uint32_t)MAX7219_nCS_PIN<<16;// nCS = 0 // take LOAD high to begin - 8001448: 4b09 ldr r3, [pc, #36] @ (8001470 ) - 800144a: f44f 3280 mov.w r2, #65536 @ 0x10000 - 800144e: 619a str r2, [r3, #24] + 80019c4: 4b09 ldr r3, [pc, #36] @ (80019ec ) + 80019c6: f44f 3280 mov.w r2, #65536 @ 0x10000 + 80019ca: 619a str r2, [r3, #24] MAX7219_SendByte(reg_number); // write register number to MAX7219 - 8001450: 79fb ldrb r3, [r7, #7] - 8001452: 4618 mov r0, r3 - 8001454: f000 f80e bl 8001474 + 80019cc: 79fb ldrb r3, [r7, #7] + 80019ce: 4618 mov r0, r3 + 80019d0: f000 f80e bl 80019f0 MAX7219_SendByte(dataout); // write data to MAX7219 - 8001458: 79bb ldrb r3, [r7, #6] - 800145a: 4618 mov r0, r3 - 800145c: f000 f80a bl 8001474 + 80019d4: 79bb ldrb r3, [r7, #6] + 80019d6: 4618 mov r0, r3 + 80019d8: f000 f80a bl 80019f0 MAX7219_nCS_PORT->BSRR = (uint32_t)MAX7219_nCS_PIN;// nCS = 1 // take LOAD low to latch in data - 8001460: 4b03 ldr r3, [pc, #12] @ (8001470 ) - 8001462: 2201 movs r2, #1 - 8001464: 619a str r2, [r3, #24] + 80019dc: 4b03 ldr r3, [pc, #12] @ (80019ec ) + 80019de: 2201 movs r2, #1 + 80019e0: 619a str r2, [r3, #24] } - 8001466: bf00 nop - 8001468: 3708 adds r7, #8 - 800146a: 46bd mov sp, r7 - 800146c: bd80 pop {r7, pc} - 800146e: bf00 nop - 8001470: 40020800 .word 0x40020800 + 80019e2: bf00 nop + 80019e4: 3708 adds r7, #8 + 80019e6: 46bd mov sp, r7 + 80019e8: bd80 pop {r7, pc} + 80019ea: bf00 nop + 80019ec: 40020800 .word 0x40020800 -08001474 : +080019f0 : * Returns : none ********************************************************************************************************* */ static void MAX7219_SendByte (unsigned char dataout) { - 8001474: b580 push {r7, lr} - 8001476: b082 sub sp, #8 - 8001478: af00 add r7, sp, #0 - 800147a: 4603 mov r3, r0 - 800147c: 71fb strb r3, [r7, #7] + 80019f0: b580 push {r7, lr} + 80019f2: b082 sub sp, #8 + 80019f4: af00 add r7, sp, #0 + 80019f6: 4603 mov r3, r0 + 80019f8: 71fb strb r3, [r7, #7] HAL_SPI_Transmit(&hspi1, &dataout, 1, 1000); - 800147e: 1df9 adds r1, r7, #7 - 8001480: f44f 737a mov.w r3, #1000 @ 0x3e8 - 8001484: 2201 movs r2, #1 - 8001486: 4803 ldr r0, [pc, #12] @ (8001494 ) - 8001488: f001 fee9 bl 800325e + 80019fa: 1df9 adds r1, r7, #7 + 80019fc: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8001a00: 2201 movs r2, #1 + 8001a02: 4803 ldr r0, [pc, #12] @ (8001a10 ) + 8001a04: f001 fda5 bl 8003552 } - 800148c: bf00 nop - 800148e: 3708 adds r7, #8 - 8001490: 46bd mov sp, r7 - 8001492: bd80 pop {r7, pc} - 8001494: 2000007c .word 0x2000007c + 8001a08: bf00 nop + 8001a0a: 3708 adds r7, #8 + 8001a0c: 46bd mov sp, r7 + 8001a0e: bd80 pop {r7, pc} + 8001a10: 2000007c .word 0x2000007c -08001498 : +08001a14 : * In the default implementation,Systick is used as source of time base. * the tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8001498: b580 push {r7, lr} - 800149a: b082 sub sp, #8 - 800149c: af00 add r7, sp, #0 + 8001a14: b580 push {r7, lr} + 8001a16: b082 sub sp, #8 + 8001a18: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 800149e: 2300 movs r3, #0 - 80014a0: 71fb strb r3, [r7, #7] + 8001a1a: 2300 movs r3, #0 + 8001a1c: 71fb strb r3, [r7, #7] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 80014a2: 2003 movs r0, #3 - 80014a4: f000 fee6 bl 8002274 + 8001a1e: 2003 movs r0, #3 + 8001a20: f000 fdb0 bl 8002584 /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 80014a8: 200f movs r0, #15 - 80014aa: f000 f80d bl 80014c8 - 80014ae: 4603 mov r3, r0 - 80014b0: 2b00 cmp r3, #0 - 80014b2: d002 beq.n 80014ba + 8001a24: 200f movs r0, #15 + 8001a26: f000 f80d bl 8001a44 + 8001a2a: 4603 mov r3, r0 + 8001a2c: 2b00 cmp r3, #0 + 8001a2e: d002 beq.n 8001a36 { status = HAL_ERROR; - 80014b4: 2301 movs r3, #1 - 80014b6: 71fb strb r3, [r7, #7] - 80014b8: e001 b.n 80014be + 8001a30: 2301 movs r3, #1 + 8001a32: 71fb strb r3, [r7, #7] + 8001a34: e001 b.n 8001a3a } else { /* Init the low level hardware */ HAL_MspInit(); - 80014ba: f7ff fe55 bl 8001168 + 8001a36: f7ff fe67 bl 8001708 } /* Return function status */ return status; - 80014be: 79fb ldrb r3, [r7, #7] + 8001a3a: 79fb ldrb r3, [r7, #7] } - 80014c0: 4618 mov r0, r3 - 80014c2: 3708 adds r7, #8 - 80014c4: 46bd mov sp, r7 - 80014c6: bd80 pop {r7, pc} + 8001a3c: 4618 mov r0, r3 + 8001a3e: 3708 adds r7, #8 + 8001a40: 46bd mov sp, r7 + 8001a42: bd80 pop {r7, pc} -080014c8 : +08001a44 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80014c8: b580 push {r7, lr} - 80014ca: b084 sub sp, #16 - 80014cc: af00 add r7, sp, #0 - 80014ce: 6078 str r0, [r7, #4] + 8001a44: b580 push {r7, lr} + 8001a46: b084 sub sp, #16 + 8001a48: af00 add r7, sp, #0 + 8001a4a: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 80014d0: 2300 movs r3, #0 - 80014d2: 73fb strb r3, [r7, #15] + 8001a4c: 2300 movs r3, #0 + 8001a4e: 73fb strb r3, [r7, #15] if (uwTickFreq != 0U) - 80014d4: 4b16 ldr r3, [pc, #88] @ (8001530 ) - 80014d6: 681b ldr r3, [r3, #0] - 80014d8: 2b00 cmp r3, #0 - 80014da: d022 beq.n 8001522 + 8001a50: 4b16 ldr r3, [pc, #88] @ (8001aac ) + 8001a52: 681b ldr r3, [r3, #0] + 8001a54: 2b00 cmp r3, #0 + 8001a56: d022 beq.n 8001a9e { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U) - 80014dc: 4b15 ldr r3, [pc, #84] @ (8001534 ) - 80014de: 681a ldr r2, [r3, #0] - 80014e0: 4b13 ldr r3, [pc, #76] @ (8001530 ) - 80014e2: 681b ldr r3, [r3, #0] - 80014e4: f44f 717a mov.w r1, #1000 @ 0x3e8 - 80014e8: fbb1 f3f3 udiv r3, r1, r3 - 80014ec: fbb2 f3f3 udiv r3, r2, r3 - 80014f0: 4618 mov r0, r3 - 80014f2: f000 fef4 bl 80022de - 80014f6: 4603 mov r3, r0 - 80014f8: 2b00 cmp r3, #0 - 80014fa: d10f bne.n 800151c + 8001a58: 4b15 ldr r3, [pc, #84] @ (8001ab0 ) + 8001a5a: 681a ldr r2, [r3, #0] + 8001a5c: 4b13 ldr r3, [pc, #76] @ (8001aac ) + 8001a5e: 681b ldr r3, [r3, #0] + 8001a60: f44f 717a mov.w r1, #1000 @ 0x3e8 + 8001a64: fbb1 f3f3 udiv r3, r1, r3 + 8001a68: fbb2 f3f3 udiv r3, r2, r3 + 8001a6c: 4618 mov r0, r3 + 8001a6e: f000 fdb0 bl 80025d2 + 8001a72: 4603 mov r3, r0 + 8001a74: 2b00 cmp r3, #0 + 8001a76: d10f bne.n 8001a98 { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80014fc: 687b ldr r3, [r7, #4] - 80014fe: 2b0f cmp r3, #15 - 8001500: d809 bhi.n 8001516 + 8001a78: 687b ldr r3, [r7, #4] + 8001a7a: 2b0f cmp r3, #15 + 8001a7c: d809 bhi.n 8001a92 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8001502: 2200 movs r2, #0 - 8001504: 6879 ldr r1, [r7, #4] - 8001506: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff - 800150a: f000 febe bl 800228a + 8001a7e: 2200 movs r2, #0 + 8001a80: 6879 ldr r1, [r7, #4] + 8001a82: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 8001a86: f000 fd88 bl 800259a uwTickPrio = TickPriority; - 800150e: 4a0a ldr r2, [pc, #40] @ (8001538 ) - 8001510: 687b ldr r3, [r7, #4] - 8001512: 6013 str r3, [r2, #0] - 8001514: e007 b.n 8001526 + 8001a8a: 4a0a ldr r2, [pc, #40] @ (8001ab4 ) + 8001a8c: 687b ldr r3, [r7, #4] + 8001a8e: 6013 str r3, [r2, #0] + 8001a90: e007 b.n 8001aa2 } else { status = HAL_ERROR; - 8001516: 2301 movs r3, #1 - 8001518: 73fb strb r3, [r7, #15] - 800151a: e004 b.n 8001526 + 8001a92: 2301 movs r3, #1 + 8001a94: 73fb strb r3, [r7, #15] + 8001a96: e004 b.n 8001aa2 } } else { status = HAL_ERROR; - 800151c: 2301 movs r3, #1 - 800151e: 73fb strb r3, [r7, #15] - 8001520: e001 b.n 8001526 + 8001a98: 2301 movs r3, #1 + 8001a9a: 73fb strb r3, [r7, #15] + 8001a9c: e001 b.n 8001aa2 } } else { status = HAL_ERROR; - 8001522: 2301 movs r3, #1 - 8001524: 73fb strb r3, [r7, #15] + 8001a9e: 2301 movs r3, #1 + 8001aa0: 73fb strb r3, [r7, #15] } /* Return function status */ return status; - 8001526: 7bfb ldrb r3, [r7, #15] + 8001aa2: 7bfb ldrb r3, [r7, #15] } - 8001528: 4618 mov r0, r3 - 800152a: 3710 adds r7, #16 - 800152c: 46bd mov sp, r7 - 800152e: bd80 pop {r7, pc} - 8001530: 20000008 .word 0x20000008 - 8001534: 20000000 .word 0x20000000 - 8001538: 20000004 .word 0x20000004 + 8001aa4: 4618 mov r0, r3 + 8001aa6: 3710 adds r7, #16 + 8001aa8: 46bd mov sp, r7 + 8001aaa: bd80 pop {r7, pc} + 8001aac: 20000008 .word 0x20000008 + 8001ab0: 20000000 .word 0x20000000 + 8001ab4: 20000004 .word 0x20000004 -0800153c : +08001ab8 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 800153c: b480 push {r7} - 800153e: af00 add r7, sp, #0 + 8001ab8: b480 push {r7} + 8001aba: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8001540: 4b05 ldr r3, [pc, #20] @ (8001558 ) - 8001542: 681a ldr r2, [r3, #0] - 8001544: 4b05 ldr r3, [pc, #20] @ (800155c ) - 8001546: 681b ldr r3, [r3, #0] - 8001548: 4413 add r3, r2 - 800154a: 4a03 ldr r2, [pc, #12] @ (8001558 ) - 800154c: 6013 str r3, [r2, #0] + 8001abc: 4b05 ldr r3, [pc, #20] @ (8001ad4 ) + 8001abe: 681a ldr r2, [r3, #0] + 8001ac0: 4b05 ldr r3, [pc, #20] @ (8001ad8 ) + 8001ac2: 681b ldr r3, [r3, #0] + 8001ac4: 4413 add r3, r2 + 8001ac6: 4a03 ldr r2, [pc, #12] @ (8001ad4 ) + 8001ac8: 6013 str r3, [r2, #0] } - 800154e: bf00 nop - 8001550: 46bd mov sp, r7 - 8001552: bc80 pop {r7} - 8001554: 4770 bx lr - 8001556: bf00 nop - 8001558: 200000d4 .word 0x200000d4 - 800155c: 20000008 .word 0x20000008 + 8001aca: bf00 nop + 8001acc: 46bd mov sp, r7 + 8001ace: bc80 pop {r7} + 8001ad0: 4770 bx lr + 8001ad2: bf00 nop + 8001ad4: 200000d4 .word 0x200000d4 + 8001ad8: 20000008 .word 0x20000008 -08001560 : +08001adc : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8001560: b480 push {r7} - 8001562: af00 add r7, sp, #0 + 8001adc: b480 push {r7} + 8001ade: af00 add r7, sp, #0 return uwTick; - 8001564: 4b02 ldr r3, [pc, #8] @ (8001570 ) - 8001566: 681b ldr r3, [r3, #0] + 8001ae0: 4b02 ldr r3, [pc, #8] @ (8001aec ) + 8001ae2: 681b ldr r3, [r3, #0] } - 8001568: 4618 mov r0, r3 - 800156a: 46bd mov sp, r7 - 800156c: bc80 pop {r7} - 800156e: 4770 bx lr - 8001570: 200000d4 .word 0x200000d4 + 8001ae4: 4618 mov r0, r3 + 8001ae6: 46bd mov sp, r7 + 8001ae8: bc80 pop {r7} + 8001aea: 4770 bx lr + 8001aec: 200000d4 .word 0x200000d4 -08001574 : +08001af0 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8001574: b580 push {r7, lr} - 8001576: b084 sub sp, #16 - 8001578: af00 add r7, sp, #0 - 800157a: 6078 str r0, [r7, #4] + 8001af0: b580 push {r7, lr} + 8001af2: b084 sub sp, #16 + 8001af4: af00 add r7, sp, #0 + 8001af6: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 800157c: f7ff fff0 bl 8001560 - 8001580: 60b8 str r0, [r7, #8] + 8001af8: f7ff fff0 bl 8001adc + 8001afc: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 8001582: 687b ldr r3, [r7, #4] - 8001584: 60fb str r3, [r7, #12] + 8001afe: 687b ldr r3, [r7, #4] + 8001b00: 60fb str r3, [r7, #12] /* Add a period to guaranty minimum wait */ if (wait < HAL_MAX_DELAY) - 8001586: 68fb ldr r3, [r7, #12] - 8001588: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff - 800158c: d004 beq.n 8001598 + 8001b02: 68fb ldr r3, [r7, #12] + 8001b04: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 8001b08: d004 beq.n 8001b14 { wait += (uint32_t)(uwTickFreq); - 800158e: 4b09 ldr r3, [pc, #36] @ (80015b4 ) - 8001590: 681b ldr r3, [r3, #0] - 8001592: 68fa ldr r2, [r7, #12] - 8001594: 4413 add r3, r2 - 8001596: 60fb str r3, [r7, #12] + 8001b0a: 4b09 ldr r3, [pc, #36] @ (8001b30 ) + 8001b0c: 681b ldr r3, [r3, #0] + 8001b0e: 68fa ldr r2, [r7, #12] + 8001b10: 4413 add r3, r2 + 8001b12: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) - 8001598: bf00 nop - 800159a: f7ff ffe1 bl 8001560 - 800159e: 4602 mov r2, r0 - 80015a0: 68bb ldr r3, [r7, #8] - 80015a2: 1ad3 subs r3, r2, r3 - 80015a4: 68fa ldr r2, [r7, #12] - 80015a6: 429a cmp r2, r3 - 80015a8: d8f7 bhi.n 800159a + 8001b14: bf00 nop + 8001b16: f7ff ffe1 bl 8001adc + 8001b1a: 4602 mov r2, r0 + 8001b1c: 68bb ldr r3, [r7, #8] + 8001b1e: 1ad3 subs r3, r2, r3 + 8001b20: 68fa ldr r2, [r7, #12] + 8001b22: 429a cmp r2, r3 + 8001b24: d8f7 bhi.n 8001b16 { } } - 80015aa: bf00 nop - 80015ac: bf00 nop - 80015ae: 3710 adds r7, #16 - 80015b0: 46bd mov sp, r7 - 80015b2: bd80 pop {r7, pc} - 80015b4: 20000008 .word 0x20000008 + 8001b26: bf00 nop + 8001b28: bf00 nop + 8001b2a: 3710 adds r7, #16 + 8001b2c: 46bd mov sp, r7 + 8001b2e: bd80 pop {r7, pc} + 8001b30: 20000008 .word 0x20000008 -080015b8 : +08001b34 : * of structure "ADC_InitTypeDef". * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 80015b8: b580 push {r7, lr} - 80015ba: b08e sub sp, #56 @ 0x38 - 80015bc: af00 add r7, sp, #0 - 80015be: 6078 str r0, [r7, #4] + 8001b34: b580 push {r7, lr} + 8001b36: b08e sub sp, #56 @ 0x38 + 8001b38: af00 add r7, sp, #0 + 8001b3a: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80015c0: 2300 movs r3, #0 - 80015c2: f887 3037 strb.w r3, [r7, #55] @ 0x37 + 8001b3c: 2300 movs r3, #0 + 8001b3e: f887 3037 strb.w r3, [r7, #55] @ 0x37 uint32_t tmp_cr1 = 0; - 80015c6: 2300 movs r3, #0 - 80015c8: 633b str r3, [r7, #48] @ 0x30 + 8001b42: 2300 movs r3, #0 + 8001b44: 633b str r3, [r7, #48] @ 0x30 uint32_t tmp_cr2 = 0; - 80015ca: 2300 movs r3, #0 - 80015cc: 62fb str r3, [r7, #44] @ 0x2c + 8001b46: 2300 movs r3, #0 + 8001b48: 62fb str r3, [r7, #44] @ 0x2c /* Check ADC handle */ if(hadc == NULL) - 80015ce: 687b ldr r3, [r7, #4] - 80015d0: 2b00 cmp r3, #0 - 80015d2: d101 bne.n 80015d8 + 8001b4a: 687b ldr r3, [r7, #4] + 8001b4c: 2b00 cmp r3, #0 + 8001b4e: d101 bne.n 8001b54 { return HAL_ERROR; - 80015d4: 2301 movs r3, #1 - 80015d6: e127 b.n 8001828 + 8001b50: 2301 movs r3, #1 + 8001b52: e127 b.n 8001da4 assert_param(IS_ADC_CHANNELSBANK(hadc->Init.ChannelsBank)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 80015d8: 687b ldr r3, [r7, #4] - 80015da: 691b ldr r3, [r3, #16] - 80015dc: 2b00 cmp r3, #0 + 8001b54: 687b ldr r3, [r7, #4] + 8001b56: 691b ldr r3, [r3, #16] + 8001b58: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 80015de: 687b ldr r3, [r7, #4] - 80015e0: 6cdb ldr r3, [r3, #76] @ 0x4c - 80015e2: 2b00 cmp r3, #0 - 80015e4: d115 bne.n 8001612 + 8001b5a: 687b ldr r3, [r7, #4] + 8001b5c: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001b5e: 2b00 cmp r3, #0 + 8001b60: d115 bne.n 8001b8e { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 80015e6: 687b ldr r3, [r7, #4] - 80015e8: 2200 movs r2, #0 - 80015ea: 651a str r2, [r3, #80] @ 0x50 + 8001b62: 687b ldr r3, [r7, #4] + 8001b64: 2200 movs r2, #0 + 8001b66: 651a str r2, [r3, #80] @ 0x50 /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 80015ec: 687b ldr r3, [r7, #4] - 80015ee: 2200 movs r2, #0 - 80015f0: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001b68: 687b ldr r3, [r7, #4] + 8001b6a: 2200 movs r2, #0 + 8001b6c: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Enable SYSCFG clock to control the routing Interface (RI) */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80015f4: 4b8e ldr r3, [pc, #568] @ (8001830 ) - 80015f6: 6a1b ldr r3, [r3, #32] - 80015f8: 4a8d ldr r2, [pc, #564] @ (8001830 ) - 80015fa: f043 0301 orr.w r3, r3, #1 - 80015fe: 6213 str r3, [r2, #32] - 8001600: 4b8b ldr r3, [pc, #556] @ (8001830 ) - 8001602: 6a1b ldr r3, [r3, #32] - 8001604: f003 0301 and.w r3, r3, #1 - 8001608: 60bb str r3, [r7, #8] - 800160a: 68bb ldr r3, [r7, #8] + 8001b70: 4b8e ldr r3, [pc, #568] @ (8001dac ) + 8001b72: 6a1b ldr r3, [r3, #32] + 8001b74: 4a8d ldr r2, [pc, #564] @ (8001dac ) + 8001b76: f043 0301 orr.w r3, r3, #1 + 8001b7a: 6213 str r3, [r2, #32] + 8001b7c: 4b8b ldr r3, [pc, #556] @ (8001dac ) + 8001b7e: 6a1b ldr r3, [r3, #32] + 8001b80: f003 0301 and.w r3, r3, #1 + 8001b84: 60bb str r3, [r7, #8] + 8001b86: 68bb ldr r3, [r7, #8] /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 800160c: 6878 ldr r0, [r7, #4] - 800160e: f7ff fdd9 bl 80011c4 + 8001b88: 6878 ldr r0, [r7, #4] + 8001b8a: f7ff fdeb bl 8001764 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - 8001612: 687b ldr r3, [r7, #4] - 8001614: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001616: f003 0310 and.w r3, r3, #16 - 800161a: 2b00 cmp r3, #0 - 800161c: f040 80ff bne.w 800181e + 8001b8e: 687b ldr r3, [r7, #4] + 8001b90: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001b92: f003 0310 and.w r3, r3, #16 + 8001b96: 2b00 cmp r3, #0 + 8001b98: f040 80ff bne.w 8001d9a { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8001620: 687b ldr r3, [r7, #4] - 8001622: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001624: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 8001628: f023 0302 bic.w r3, r3, #2 - 800162c: f043 0202 orr.w r2, r3, #2 - 8001630: 687b ldr r3, [r7, #4] - 8001632: 64da str r2, [r3, #76] @ 0x4c + 8001b9c: 687b ldr r3, [r7, #4] + 8001b9e: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001ba0: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8001ba4: f023 0302 bic.w r3, r3, #2 + 8001ba8: f043 0202 orr.w r2, r3, #2 + 8001bac: 687b ldr r3, [r7, #4] + 8001bae: 64da str r2, [r3, #76] @ 0x4c /* Set ADC parameters */ /* Configuration of common ADC clock: clock source HSI with selectable */ /* prescaler */ MODIFY_REG(ADC->CCR , - 8001634: 4b7f ldr r3, [pc, #508] @ (8001834 ) - 8001636: 685b ldr r3, [r3, #4] - 8001638: f423 3240 bic.w r2, r3, #196608 @ 0x30000 - 800163c: 687b ldr r3, [r7, #4] - 800163e: 685b ldr r3, [r3, #4] - 8001640: 497c ldr r1, [pc, #496] @ (8001834 ) - 8001642: 4313 orrs r3, r2 - 8001644: 604b str r3, [r1, #4] + 8001bb0: 4b7f ldr r3, [pc, #508] @ (8001db0 ) + 8001bb2: 685b ldr r3, [r3, #4] + 8001bb4: f423 3240 bic.w r2, r3, #196608 @ 0x30000 + 8001bb8: 687b ldr r3, [r7, #4] + 8001bba: 685b ldr r3, [r3, #4] + 8001bbc: 497c ldr r1, [pc, #496] @ (8001db0 ) + 8001bbe: 4313 orrs r3, r2 + 8001bc0: 604b str r3, [r1, #4] /* - external trigger polarity */ /* - End of conversion selection */ /* - DMA continuous request */ /* - Channels bank (Banks availability depends on devices categories) */ /* - continuous conversion mode */ tmp_cr2 |= (hadc->Init.DataAlign | - 8001646: 687b ldr r3, [r7, #4] - 8001648: 68da ldr r2, [r3, #12] + 8001bc2: 687b ldr r3, [r7, #4] + 8001bc4: 68da ldr r2, [r3, #12] hadc->Init.EOCSelection | - 800164a: 687b ldr r3, [r7, #4] - 800164c: 695b ldr r3, [r3, #20] + 8001bc6: 687b ldr r3, [r7, #4] + 8001bc8: 695b ldr r3, [r3, #20] tmp_cr2 |= (hadc->Init.DataAlign | - 800164e: 431a orrs r2, r3 + 8001bca: 431a orrs r2, r3 ADC_CR2_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) | - 8001650: 687b ldr r3, [r7, #4] - 8001652: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001656: 4619 mov r1, r3 - 8001658: f44f 7300 mov.w r3, #512 @ 0x200 - 800165c: 623b str r3, [r7, #32] + 8001bcc: 687b ldr r3, [r7, #4] + 8001bce: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001bd2: 4619 mov r1, r3 + 8001bd4: f44f 7300 mov.w r3, #512 @ 0x200 + 8001bd8: 623b str r3, [r7, #32] uint32_t result; #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800165e: 6a3b ldr r3, [r7, #32] - 8001660: fa93 f3a3 rbit r3, r3 - 8001664: 61fb str r3, [r7, #28] + 8001bda: 6a3b ldr r3, [r7, #32] + 8001bdc: fa93 f3a3 rbit r3, r3 + 8001be0: 61fb str r3, [r7, #28] result |= value & 1U; s--; } result <<= s; /* shift when v's highest bits are zero */ #endif return result; - 8001666: 69fb ldr r3, [r7, #28] - 8001668: fab3 f383 clz r3, r3 - 800166c: b2db uxtb r3, r3 - 800166e: fa01 f303 lsl.w r3, r1, r3 + 8001be2: 69fb ldr r3, [r7, #28] + 8001be4: fab3 f383 clz r3, r3 + 8001be8: b2db uxtb r3, r3 + 8001bea: fa01 f303 lsl.w r3, r1, r3 hadc->Init.EOCSelection | - 8001672: 431a orrs r2, r3 + 8001bee: 431a orrs r2, r3 hadc->Init.ChannelsBank | - 8001674: 687b ldr r3, [r7, #4] - 8001676: 6a1b ldr r3, [r3, #32] + 8001bf0: 687b ldr r3, [r7, #4] + 8001bf2: 6a1b ldr r3, [r3, #32] ADC_CR2_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) | - 8001678: 431a orrs r2, r3 + 8001bf4: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 800167a: 687b ldr r3, [r7, #4] - 800167c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 8001680: 4619 mov r1, r3 - 8001682: 2302 movs r3, #2 - 8001684: 62bb str r3, [r7, #40] @ 0x28 + 8001bf6: 687b ldr r3, [r7, #4] + 8001bf8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8001bfc: 4619 mov r1, r3 + 8001bfe: 2302 movs r3, #2 + 8001c00: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8001686: 6abb ldr r3, [r7, #40] @ 0x28 - 8001688: fa93 f3a3 rbit r3, r3 - 800168c: 627b str r3, [r7, #36] @ 0x24 + 8001c02: 6abb ldr r3, [r7, #40] @ 0x28 + 8001c04: fa93 f3a3 rbit r3, r3 + 8001c08: 627b str r3, [r7, #36] @ 0x24 return result; - 800168e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8001690: fab3 f383 clz r3, r3 - 8001694: b2db uxtb r3, r3 - 8001696: fa01 f303 lsl.w r3, r1, r3 + 8001c0a: 6a7b ldr r3, [r7, #36] @ 0x24 + 8001c0c: fab3 f383 clz r3, r3 + 8001c10: b2db uxtb r3, r3 + 8001c12: fa01 f303 lsl.w r3, r1, r3 hadc->Init.ChannelsBank | - 800169a: 4313 orrs r3, r2 + 8001c16: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 800169c: 6afa ldr r2, [r7, #44] @ 0x2c - 800169e: 4313 orrs r3, r2 - 80016a0: 62fb str r3, [r7, #44] @ 0x2c + 8001c18: 6afa ldr r2, [r7, #44] @ 0x2c + 8001c1a: 4313 orrs r3, r2 + 8001c1c: 62fb str r3, [r7, #44] @ 0x2c /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 80016a2: 687b ldr r3, [r7, #4] - 80016a4: 6b5b ldr r3, [r3, #52] @ 0x34 - 80016a6: 2b10 cmp r3, #16 - 80016a8: d007 beq.n 80016ba + 8001c1e: 687b ldr r3, [r7, #4] + 8001c20: 6b5b ldr r3, [r3, #52] @ 0x34 + 8001c22: 2b10 cmp r3, #16 + 8001c24: d007 beq.n 8001c36 { tmp_cr2 |= ( hadc->Init.ExternalTrigConv | - 80016aa: 687b ldr r3, [r7, #4] - 80016ac: 6b5a ldr r2, [r3, #52] @ 0x34 + 8001c26: 687b ldr r3, [r7, #4] + 8001c28: 6b5a ldr r2, [r3, #52] @ 0x34 hadc->Init.ExternalTrigConvEdge ); - 80016ae: 687b ldr r3, [r7, #4] - 80016b0: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001c2a: 687b ldr r3, [r7, #4] + 8001c2c: 6b9b ldr r3, [r3, #56] @ 0x38 tmp_cr2 |= ( hadc->Init.ExternalTrigConv | - 80016b2: 4313 orrs r3, r2 - 80016b4: 6afa ldr r2, [r7, #44] @ 0x2c - 80016b6: 4313 orrs r3, r2 - 80016b8: 62fb str r3, [r7, #44] @ 0x2c + 8001c2e: 4313 orrs r3, r2 + 8001c30: 6afa ldr r2, [r7, #44] @ 0x2c + 8001c32: 4313 orrs r3, r2 + 8001c34: 62fb str r3, [r7, #44] @ 0x2c /* - resolution */ /* - auto power off (LowPowerAutoPowerOff mode) */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ if (ADC_IS_ENABLE(hadc) == RESET) - 80016ba: 687b ldr r3, [r7, #4] - 80016bc: 681b ldr r3, [r3, #0] - 80016be: 681b ldr r3, [r3, #0] - 80016c0: f003 0340 and.w r3, r3, #64 @ 0x40 - 80016c4: 2b40 cmp r3, #64 @ 0x40 - 80016c6: d04f beq.n 8001768 + 8001c36: 687b ldr r3, [r7, #4] + 8001c38: 681b ldr r3, [r3, #0] + 8001c3a: 681b ldr r3, [r3, #0] + 8001c3c: f003 0340 and.w r3, r3, #64 @ 0x40 + 8001c40: 2b40 cmp r3, #64 @ 0x40 + 8001c42: d04f beq.n 8001ce4 { tmp_cr2 |= hadc->Init.LowPowerAutoWait; - 80016c8: 687b ldr r3, [r7, #4] - 80016ca: 699b ldr r3, [r3, #24] - 80016cc: 6afa ldr r2, [r7, #44] @ 0x2c - 80016ce: 4313 orrs r3, r2 - 80016d0: 62fb str r3, [r7, #44] @ 0x2c + 8001c44: 687b ldr r3, [r7, #4] + 8001c46: 699b ldr r3, [r3, #24] + 8001c48: 6afa ldr r2, [r7, #44] @ 0x2c + 8001c4a: 4313 orrs r3, r2 + 8001c4c: 62fb str r3, [r7, #44] @ 0x2c tmp_cr1 |= (hadc->Init.Resolution | - 80016d2: 687b ldr r3, [r7, #4] - 80016d4: 689a ldr r2, [r3, #8] + 8001c4e: 687b ldr r3, [r7, #4] + 8001c50: 689a ldr r2, [r3, #8] hadc->Init.LowPowerAutoPowerOff | - 80016d6: 687b ldr r3, [r7, #4] - 80016d8: 69db ldr r3, [r3, #28] + 8001c52: 687b ldr r3, [r7, #4] + 8001c54: 69db ldr r3, [r3, #28] tmp_cr1 |= (hadc->Init.Resolution | - 80016da: 4313 orrs r3, r2 + 8001c56: 4313 orrs r3, r2 ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) ); - 80016dc: 687a ldr r2, [r7, #4] - 80016de: 6912 ldr r2, [r2, #16] - 80016e0: f5b2 7f80 cmp.w r2, #256 @ 0x100 - 80016e4: d003 beq.n 80016ee - 80016e6: 687a ldr r2, [r7, #4] - 80016e8: 6912 ldr r2, [r2, #16] - 80016ea: 2a01 cmp r2, #1 - 80016ec: d102 bne.n 80016f4 - 80016ee: f44f 7280 mov.w r2, #256 @ 0x100 - 80016f2: e000 b.n 80016f6 - 80016f4: 2200 movs r2, #0 + 8001c58: 687a ldr r2, [r7, #4] + 8001c5a: 6912 ldr r2, [r2, #16] + 8001c5c: f5b2 7f80 cmp.w r2, #256 @ 0x100 + 8001c60: d003 beq.n 8001c6a + 8001c62: 687a ldr r2, [r7, #4] + 8001c64: 6912 ldr r2, [r2, #16] + 8001c66: 2a01 cmp r2, #1 + 8001c68: d102 bne.n 8001c70 + 8001c6a: f44f 7280 mov.w r2, #256 @ 0x100 + 8001c6e: e000 b.n 8001c72 + 8001c70: 2200 movs r2, #0 hadc->Init.LowPowerAutoPowerOff | - 80016f6: 4313 orrs r3, r2 + 8001c72: 4313 orrs r3, r2 tmp_cr1 |= (hadc->Init.Resolution | - 80016f8: 6b3a ldr r2, [r7, #48] @ 0x30 - 80016fa: 4313 orrs r3, r2 - 80016fc: 633b str r3, [r7, #48] @ 0x30 + 8001c74: 6b3a ldr r2, [r7, #48] @ 0x30 + 8001c76: 4313 orrs r3, r2 + 8001c78: 633b str r3, [r7, #48] @ 0x30 /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but has no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 80016fe: 687b ldr r3, [r7, #4] - 8001700: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8001704: 2b01 cmp r3, #1 - 8001706: d125 bne.n 8001754 + 8001c7a: 687b ldr r3, [r7, #4] + 8001c7c: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8001c80: 2b01 cmp r3, #1 + 8001c82: d125 bne.n 8001cd0 { if (hadc->Init.ContinuousConvMode == DISABLE) - 8001708: 687b ldr r3, [r7, #4] - 800170a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 800170e: 2b00 cmp r3, #0 - 8001710: d114 bne.n 800173c + 8001c84: 687b ldr r3, [r7, #4] + 8001c86: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8001c8a: 2b00 cmp r3, #0 + 8001c8c: d114 bne.n 8001cb8 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 8001712: 687b ldr r3, [r7, #4] - 8001714: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001716: 3b01 subs r3, #1 - 8001718: f44f 4260 mov.w r2, #57344 @ 0xe000 - 800171c: 61ba str r2, [r7, #24] + 8001c8e: 687b ldr r3, [r7, #4] + 8001c90: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001c92: 3b01 subs r3, #1 + 8001c94: f44f 4260 mov.w r2, #57344 @ 0xe000 + 8001c98: 61ba str r2, [r7, #24] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 800171e: 69ba ldr r2, [r7, #24] - 8001720: fa92 f2a2 rbit r2, r2 - 8001724: 617a str r2, [r7, #20] + 8001c9a: 69ba ldr r2, [r7, #24] + 8001c9c: fa92 f2a2 rbit r2, r2 + 8001ca0: 617a str r2, [r7, #20] return result; - 8001726: 697a ldr r2, [r7, #20] - 8001728: fab2 f282 clz r2, r2 - 800172c: b2d2 uxtb r2, r2 - 800172e: 4093 lsls r3, r2 - 8001730: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8001734: 6b3a ldr r2, [r7, #48] @ 0x30 - 8001736: 4313 orrs r3, r2 - 8001738: 633b str r3, [r7, #48] @ 0x30 - 800173a: e00b b.n 8001754 + 8001ca2: 697a ldr r2, [r7, #20] + 8001ca4: fab2 f282 clz r2, r2 + 8001ca8: b2d2 uxtb r2, r2 + 8001caa: 4093 lsls r3, r2 + 8001cac: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8001cb0: 6b3a ldr r2, [r7, #48] @ 0x30 + 8001cb2: 4313 orrs r3, r2 + 8001cb4: 633b str r3, [r7, #48] @ 0x30 + 8001cb6: e00b b.n 8001cd0 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 800173c: 687b ldr r3, [r7, #4] - 800173e: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001740: f043 0220 orr.w r2, r3, #32 - 8001744: 687b ldr r3, [r7, #4] - 8001746: 64da str r2, [r3, #76] @ 0x4c + 8001cb8: 687b ldr r3, [r7, #4] + 8001cba: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001cbc: f043 0220 orr.w r2, r3, #32 + 8001cc0: 687b ldr r3, [r7, #4] + 8001cc2: 64da str r2, [r3, #76] @ 0x4c /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8001748: 687b ldr r3, [r7, #4] - 800174a: 6d1b ldr r3, [r3, #80] @ 0x50 - 800174c: f043 0201 orr.w r2, r3, #1 - 8001750: 687b ldr r3, [r7, #4] - 8001752: 651a str r2, [r3, #80] @ 0x50 + 8001cc4: 687b ldr r3, [r7, #4] + 8001cc6: 6d1b ldr r3, [r3, #80] @ 0x50 + 8001cc8: f043 0201 orr.w r2, r3, #1 + 8001ccc: 687b ldr r3, [r7, #4] + 8001cce: 651a str r2, [r3, #80] @ 0x50 else { /* do nothing */ } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 8001754: 687b ldr r3, [r7, #4] - 8001756: 681b ldr r3, [r3, #0] - 8001758: 685a ldr r2, [r3, #4] - 800175a: 4b37 ldr r3, [pc, #220] @ (8001838 ) - 800175c: 4013 ands r3, r2 - 800175e: 687a ldr r2, [r7, #4] - 8001760: 6812 ldr r2, [r2, #0] - 8001762: 6b39 ldr r1, [r7, #48] @ 0x30 - 8001764: 430b orrs r3, r1 - 8001766: 6053 str r3, [r2, #4] + 8001cd0: 687b ldr r3, [r7, #4] + 8001cd2: 681b ldr r3, [r3, #0] + 8001cd4: 685a ldr r2, [r3, #4] + 8001cd6: 4b37 ldr r3, [pc, #220] @ (8001db4 ) + 8001cd8: 4013 ands r3, r2 + 8001cda: 687a ldr r2, [r7, #4] + 8001cdc: 6812 ldr r2, [r2, #0] + 8001cde: 6b39 ldr r1, [r7, #48] @ 0x30 + 8001ce0: 430b orrs r3, r1 + 8001ce2: 6053 str r3, [r2, #4] ADC_CR1_SCAN , tmp_cr1 ); } /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2 , - 8001768: 687b ldr r3, [r7, #4] - 800176a: 681b ldr r3, [r3, #0] - 800176c: 689a ldr r2, [r3, #8] - 800176e: 4b33 ldr r3, [pc, #204] @ (800183c ) - 8001770: 4013 ands r3, r2 - 8001772: 687a ldr r2, [r7, #4] - 8001774: 6812 ldr r2, [r2, #0] - 8001776: 6af9 ldr r1, [r7, #44] @ 0x2c - 8001778: 430b orrs r3, r1 - 800177a: 6093 str r3, [r2, #8] + 8001ce4: 687b ldr r3, [r7, #4] + 8001ce6: 681b ldr r3, [r3, #0] + 8001ce8: 689a ldr r2, [r3, #8] + 8001cea: 4b33 ldr r3, [pc, #204] @ (8001db8 ) + 8001cec: 4013 ands r3, r2 + 8001cee: 687a ldr r2, [r7, #4] + 8001cf0: 6812 ldr r2, [r2, #0] + 8001cf2: 6af9 ldr r1, [r7, #44] @ 0x2c + 8001cf4: 430b orrs r3, r1 + 8001cf6: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 800177c: 687b ldr r3, [r7, #4] - 800177e: 691b ldr r3, [r3, #16] - 8001780: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8001784: d003 beq.n 800178e - 8001786: 687b ldr r3, [r7, #4] - 8001788: 691b ldr r3, [r3, #16] - 800178a: 2b01 cmp r3, #1 - 800178c: d119 bne.n 80017c2 + 8001cf8: 687b ldr r3, [r7, #4] + 8001cfa: 691b ldr r3, [r3, #16] + 8001cfc: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8001d00: d003 beq.n 8001d0a + 8001d02: 687b ldr r3, [r7, #4] + 8001d04: 691b ldr r3, [r3, #16] + 8001d06: 2b01 cmp r3, #1 + 8001d08: d119 bne.n 8001d3e { MODIFY_REG(hadc->Instance->SQR1 , - 800178e: 687b ldr r3, [r7, #4] - 8001790: 681b ldr r3, [r3, #0] - 8001792: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001794: f023 71f8 bic.w r1, r3, #32505856 @ 0x1f00000 - 8001798: 687b ldr r3, [r7, #4] - 800179a: 6a9b ldr r3, [r3, #40] @ 0x28 - 800179c: 3b01 subs r3, #1 - 800179e: f04f 72f8 mov.w r2, #32505856 @ 0x1f00000 - 80017a2: 613a str r2, [r7, #16] + 8001d0a: 687b ldr r3, [r7, #4] + 8001d0c: 681b ldr r3, [r3, #0] + 8001d0e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001d10: f023 71f8 bic.w r1, r3, #32505856 @ 0x1f00000 + 8001d14: 687b ldr r3, [r7, #4] + 8001d16: 6a9b ldr r3, [r3, #40] @ 0x28 + 8001d18: 3b01 subs r3, #1 + 8001d1a: f04f 72f8 mov.w r2, #32505856 @ 0x1f00000 + 8001d1e: 613a str r2, [r7, #16] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 80017a4: 693a ldr r2, [r7, #16] - 80017a6: fa92 f2a2 rbit r2, r2 - 80017aa: 60fa str r2, [r7, #12] + 8001d20: 693a ldr r2, [r7, #16] + 8001d22: fa92 f2a2 rbit r2, r2 + 8001d26: 60fa str r2, [r7, #12] return result; - 80017ac: 68fa ldr r2, [r7, #12] - 80017ae: fab2 f282 clz r2, r2 - 80017b2: b2d2 uxtb r2, r2 - 80017b4: fa03 f202 lsl.w r2, r3, r2 - 80017b8: 687b ldr r3, [r7, #4] - 80017ba: 681b ldr r3, [r3, #0] - 80017bc: 430a orrs r2, r1 - 80017be: 631a str r2, [r3, #48] @ 0x30 - 80017c0: e007 b.n 80017d2 + 8001d28: 68fa ldr r2, [r7, #12] + 8001d2a: fab2 f282 clz r2, r2 + 8001d2e: b2d2 uxtb r2, r2 + 8001d30: fa03 f202 lsl.w r2, r3, r2 + 8001d34: 687b ldr r3, [r7, #4] + 8001d36: 681b ldr r3, [r3, #0] + 8001d38: 430a orrs r2, r1 + 8001d3a: 631a str r2, [r3, #48] @ 0x30 + 8001d3c: e007 b.n 8001d4e ADC_SQR1_L , ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion) ); } else { MODIFY_REG(hadc->Instance->SQR1, - 80017c2: 687b ldr r3, [r7, #4] - 80017c4: 681b ldr r3, [r3, #0] - 80017c6: 6b1a ldr r2, [r3, #48] @ 0x30 - 80017c8: 687b ldr r3, [r7, #4] - 80017ca: 681b ldr r3, [r3, #0] - 80017cc: f022 72f8 bic.w r2, r2, #32505856 @ 0x1f00000 - 80017d0: 631a str r2, [r3, #48] @ 0x30 + 8001d3e: 687b ldr r3, [r7, #4] + 8001d40: 681b ldr r3, [r3, #0] + 8001d42: 6b1a ldr r2, [r3, #48] @ 0x30 + 8001d44: 687b ldr r3, [r7, #4] + 8001d46: 681b ldr r3, [r3, #0] + 8001d48: f022 72f8 bic.w r2, r2, #32505856 @ 0x1f00000 + 8001d4c: 631a str r2, [r3, #48] @ 0x30 /* Check back that ADC registers have effectively been configured to */ /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding execution control bits ADON, */ /* JSWSTART, SWSTART and injected trigger bits JEXTEN and JEXTSEL). */ if ((READ_REG(hadc->Instance->CR2) & ~(ADC_CR2_ADON | - 80017d2: 687b ldr r3, [r7, #4] - 80017d4: 681b ldr r3, [r3, #0] - 80017d6: 689a ldr r2, [r3, #8] - 80017d8: 4b19 ldr r3, [pc, #100] @ (8001840 ) - 80017da: 4013 ands r3, r2 - 80017dc: 6afa ldr r2, [r7, #44] @ 0x2c - 80017de: 429a cmp r2, r3 - 80017e0: d10b bne.n 80017fa + 8001d4e: 687b ldr r3, [r7, #4] + 8001d50: 681b ldr r3, [r3, #0] + 8001d52: 689a ldr r2, [r3, #8] + 8001d54: 4b19 ldr r3, [pc, #100] @ (8001dbc ) + 8001d56: 4013 ands r3, r2 + 8001d58: 6afa ldr r2, [r7, #44] @ 0x2c + 8001d5a: 429a cmp r2, r3 + 8001d5c: d10b bne.n 8001d76 ADC_CR2_SWSTART | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 80017e2: 687b ldr r3, [r7, #4] - 80017e4: 2200 movs r2, #0 - 80017e6: 651a str r2, [r3, #80] @ 0x50 + 8001d5e: 687b ldr r3, [r7, #4] + 8001d60: 2200 movs r2, #0 + 8001d62: 651a str r2, [r3, #80] @ 0x50 /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80017e8: 687b ldr r3, [r7, #4] - 80017ea: 6cdb ldr r3, [r3, #76] @ 0x4c - 80017ec: f023 0303 bic.w r3, r3, #3 - 80017f0: f043 0201 orr.w r2, r3, #1 - 80017f4: 687b ldr r3, [r7, #4] - 80017f6: 64da str r2, [r3, #76] @ 0x4c - 80017f8: e014 b.n 8001824 + 8001d64: 687b ldr r3, [r7, #4] + 8001d66: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001d68: f023 0303 bic.w r3, r3, #3 + 8001d6c: f043 0201 orr.w r2, r3, #1 + 8001d70: 687b ldr r3, [r7, #4] + 8001d72: 64da str r2, [r3, #76] @ 0x4c + 8001d74: e014 b.n 8001da0 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 80017fa: 687b ldr r3, [r7, #4] - 80017fc: 6cdb ldr r3, [r3, #76] @ 0x4c - 80017fe: f023 0312 bic.w r3, r3, #18 - 8001802: f043 0210 orr.w r2, r3, #16 - 8001806: 687b ldr r3, [r7, #4] - 8001808: 64da str r2, [r3, #76] @ 0x4c + 8001d76: 687b ldr r3, [r7, #4] + 8001d78: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001d7a: f023 0312 bic.w r3, r3, #18 + 8001d7e: f043 0210 orr.w r2, r3, #16 + 8001d82: 687b ldr r3, [r7, #4] + 8001d84: 64da str r2, [r3, #76] @ 0x4c HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800180a: 687b ldr r3, [r7, #4] - 800180c: 6d1b ldr r3, [r3, #80] @ 0x50 - 800180e: f043 0201 orr.w r2, r3, #1 - 8001812: 687b ldr r3, [r7, #4] - 8001814: 651a str r2, [r3, #80] @ 0x50 + 8001d86: 687b ldr r3, [r7, #4] + 8001d88: 6d1b ldr r3, [r3, #80] @ 0x50 + 8001d8a: f043 0201 orr.w r2, r3, #1 + 8001d8e: 687b ldr r3, [r7, #4] + 8001d90: 651a str r2, [r3, #80] @ 0x50 tmp_hal_status = HAL_ERROR; - 8001816: 2301 movs r3, #1 - 8001818: f887 3037 strb.w r3, [r7, #55] @ 0x37 - 800181c: e002 b.n 8001824 + 8001d92: 2301 movs r3, #1 + 8001d94: f887 3037 strb.w r3, [r7, #55] @ 0x37 + 8001d98: e002 b.n 8001da0 } } else { tmp_hal_status = HAL_ERROR; - 800181e: 2301 movs r3, #1 - 8001820: f887 3037 strb.w r3, [r7, #55] @ 0x37 + 8001d9a: 2301 movs r3, #1 + 8001d9c: f887 3037 strb.w r3, [r7, #55] @ 0x37 } /* Return function status */ return tmp_hal_status; - 8001824: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 + 8001da0: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 } - 8001828: 4618 mov r0, r3 - 800182a: 3738 adds r7, #56 @ 0x38 - 800182c: 46bd mov sp, r7 - 800182e: bd80 pop {r7, pc} - 8001830: 40023800 .word 0x40023800 - 8001834: 40012700 .word 0x40012700 - 8001838: fcfc16ff .word 0xfcfc16ff - 800183c: c0fff189 .word 0xc0fff189 - 8001840: bf80fffe .word 0xbf80fffe + 8001da4: 4618 mov r0, r3 + 8001da6: 3738 adds r7, #56 @ 0x38 + 8001da8: 46bd mov sp, r7 + 8001daa: bd80 pop {r7, pc} + 8001dac: 40023800 .word 0x40023800 + 8001db0: 40012700 .word 0x40012700 + 8001db4: fcfc16ff .word 0xfcfc16ff + 8001db8: c0fff189 .word 0xc0fff189 + 8001dbc: bf80fffe .word 0xbf80fffe -08001844 : +08001dc0 : * Interruptions enabled in this function: None. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { - 8001844: b580 push {r7, lr} - 8001846: b084 sub sp, #16 - 8001848: af00 add r7, sp, #0 - 800184a: 6078 str r0, [r7, #4] + 8001dc0: b580 push {r7, lr} + 8001dc2: b084 sub sp, #16 + 8001dc4: af00 add r7, sp, #0 + 8001dc6: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800184c: 2300 movs r3, #0 - 800184e: 73fb strb r3, [r7, #15] + 8001dc8: 2300 movs r3, #0 + 8001dca: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); - 8001850: 687b ldr r3, [r7, #4] - 8001852: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 - 8001856: 2b01 cmp r3, #1 - 8001858: d101 bne.n 800185e - 800185a: 2302 movs r3, #2 - 800185c: e04e b.n 80018fc - 800185e: 687b ldr r3, [r7, #4] - 8001860: 2201 movs r2, #1 - 8001862: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001dcc: 687b ldr r3, [r7, #4] + 8001dce: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 8001dd2: 2b01 cmp r3, #1 + 8001dd4: d101 bne.n 8001dda + 8001dd6: 2302 movs r3, #2 + 8001dd8: e04e b.n 8001e78 + 8001dda: 687b ldr r3, [r7, #4] + 8001ddc: 2201 movs r2, #1 + 8001dde: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); - 8001866: 6878 ldr r0, [r7, #4] - 8001868: f000 fb92 bl 8001f90 - 800186c: 4603 mov r3, r0 - 800186e: 73fb strb r3, [r7, #15] + 8001de2: 6878 ldr r0, [r7, #4] + 8001de4: f000 fa80 bl 80022e8 + 8001de8: 4603 mov r3, r0 + 8001dea: 73fb strb r3, [r7, #15] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) - 8001870: 7bfb ldrb r3, [r7, #15] - 8001872: 2b00 cmp r3, #0 - 8001874: d141 bne.n 80018fa + 8001dec: 7bfb ldrb r3, [r7, #15] + 8001dee: 2b00 cmp r3, #0 + 8001df0: d141 bne.n 8001e76 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular group operation */ ADC_STATE_CLR_SET(hadc->State, - 8001876: 687b ldr r3, [r7, #4] - 8001878: 6cdb ldr r3, [r3, #76] @ 0x4c - 800187a: f423 63e0 bic.w r3, r3, #1792 @ 0x700 - 800187e: f023 0301 bic.w r3, r3, #1 - 8001882: f443 7280 orr.w r2, r3, #256 @ 0x100 - 8001886: 687b ldr r3, [r7, #4] - 8001888: 64da str r2, [r3, #76] @ 0x4c + 8001df2: 687b ldr r3, [r7, #4] + 8001df4: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001df6: f423 63e0 bic.w r3, r3, #1792 @ 0x700 + 8001dfa: f023 0301 bic.w r3, r3, #1 + 8001dfe: f443 7280 orr.w r2, r3, #256 @ 0x100 + 8001e02: 687b ldr r3, [r7, #4] + 8001e04: 64da str r2, [r3, #76] @ 0x4c HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR, HAL_ADC_STATE_REG_BUSY); /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) - 800188a: 687b ldr r3, [r7, #4] - 800188c: 681b ldr r3, [r3, #0] - 800188e: 685b ldr r3, [r3, #4] - 8001890: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8001894: 2b00 cmp r3, #0 - 8001896: d007 beq.n 80018a8 + 8001e06: 687b ldr r3, [r7, #4] + 8001e08: 681b ldr r3, [r3, #0] + 8001e0a: 685b ldr r3, [r3, #4] + 8001e0c: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8001e10: 2b00 cmp r3, #0 + 8001e12: d007 beq.n 8001e24 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 8001898: 687b ldr r3, [r7, #4] - 800189a: 6cdb ldr r3, [r3, #76] @ 0x4c - 800189c: f423 5340 bic.w r3, r3, #12288 @ 0x3000 - 80018a0: f443 5280 orr.w r2, r3, #4096 @ 0x1000 - 80018a4: 687b ldr r3, [r7, #4] - 80018a6: 64da str r2, [r3, #76] @ 0x4c + 8001e14: 687b ldr r3, [r7, #4] + 8001e16: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001e18: f423 5340 bic.w r3, r3, #12288 @ 0x3000 + 8001e1c: f443 5280 orr.w r2, r3, #4096 @ 0x1000 + 8001e20: 687b ldr r3, [r7, #4] + 8001e22: 64da str r2, [r3, #76] @ 0x4c } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 80018a8: 687b ldr r3, [r7, #4] - 80018aa: 6cdb ldr r3, [r3, #76] @ 0x4c - 80018ac: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 80018b0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80018b4: d106 bne.n 80018c4 + 8001e24: 687b ldr r3, [r7, #4] + 8001e26: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001e28: f403 5380 and.w r3, r3, #4096 @ 0x1000 + 8001e2c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8001e30: d106 bne.n 8001e40 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); - 80018b6: 687b ldr r3, [r7, #4] - 80018b8: 6d1b ldr r3, [r3, #80] @ 0x50 - 80018ba: f023 0206 bic.w r2, r3, #6 - 80018be: 687b ldr r3, [r7, #4] - 80018c0: 651a str r2, [r3, #80] @ 0x50 - 80018c2: e002 b.n 80018ca + 8001e32: 687b ldr r3, [r7, #4] + 8001e34: 6d1b ldr r3, [r3, #80] @ 0x50 + 8001e36: f023 0206 bic.w r2, r3, #6 + 8001e3a: 687b ldr r3, [r7, #4] + 8001e3c: 651a str r2, [r3, #80] @ 0x50 + 8001e3e: e002 b.n 8001e46 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); - 80018c4: 687b ldr r3, [r7, #4] - 80018c6: 2200 movs r2, #0 - 80018c8: 651a str r2, [r3, #80] @ 0x50 + 8001e40: 687b ldr r3, [r7, #4] + 8001e42: 2200 movs r2, #0 + 8001e44: 651a str r2, [r3, #80] @ 0x50 } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); - 80018ca: 687b ldr r3, [r7, #4] - 80018cc: 2200 movs r2, #0 - 80018ce: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001e46: 687b ldr r3, [r7, #4] + 8001e48: 2200 movs r2, #0 + 8001e4a: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR); - 80018d2: 687b ldr r3, [r7, #4] - 80018d4: 681b ldr r3, [r3, #0] - 80018d6: f06f 0222 mvn.w r2, #34 @ 0x22 - 80018da: 601a str r2, [r3, #0] + 8001e4e: 687b ldr r3, [r7, #4] + 8001e50: 681b ldr r3, [r3, #0] + 8001e52: f06f 0222 mvn.w r2, #34 @ 0x22 + 8001e56: 601a str r2, [r3, #0] /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) - 80018dc: 687b ldr r3, [r7, #4] - 80018de: 681b ldr r3, [r3, #0] - 80018e0: 689b ldr r3, [r3, #8] - 80018e2: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 - 80018e6: 2b00 cmp r3, #0 - 80018e8: d107 bne.n 80018fa + 8001e58: 687b ldr r3, [r7, #4] + 8001e5a: 681b ldr r3, [r3, #0] + 8001e5c: 689b ldr r3, [r3, #8] + 8001e5e: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 + 8001e62: 2b00 cmp r3, #0 + 8001e64: d107 bne.n 8001e76 { /* Start ADC conversion on regular group */ SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART); - 80018ea: 687b ldr r3, [r7, #4] - 80018ec: 681b ldr r3, [r3, #0] - 80018ee: 689a ldr r2, [r3, #8] - 80018f0: 687b ldr r3, [r7, #4] - 80018f2: 681b ldr r3, [r3, #0] - 80018f4: f042 4280 orr.w r2, r2, #1073741824 @ 0x40000000 - 80018f8: 609a str r2, [r3, #8] + 8001e66: 687b ldr r3, [r7, #4] + 8001e68: 681b ldr r3, [r3, #0] + 8001e6a: 689a ldr r2, [r3, #8] + 8001e6c: 687b ldr r3, [r7, #4] + 8001e6e: 681b ldr r3, [r3, #0] + 8001e70: f042 4280 orr.w r2, r2, #1073741824 @ 0x40000000 + 8001e74: 609a str r2, [r3, #8] } } /* Return function status */ return tmp_hal_status; - 80018fa: 7bfb ldrb r3, [r7, #15] + 8001e76: 7bfb ldrb r3, [r7, #15] } - 80018fc: 4618 mov r0, r3 - 80018fe: 3710 adds r7, #16 - 8001900: 46bd mov sp, r7 - 8001902: bd80 pop {r7, pc} + 8001e78: 4618 mov r0, r3 + 8001e7a: 3710 adds r7, #16 + 8001e7c: 46bd mov sp, r7 + 8001e7e: bd80 pop {r7, pc} -08001904 : +08001e80 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { - 8001904: b580 push {r7, lr} - 8001906: b084 sub sp, #16 - 8001908: af00 add r7, sp, #0 - 800190a: 6078 str r0, [r7, #4] + 8001e80: b580 push {r7, lr} + 8001e82: b084 sub sp, #16 + 8001e84: af00 add r7, sp, #0 + 8001e86: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800190c: 2300 movs r3, #0 - 800190e: 73fb strb r3, [r7, #15] + 8001e88: 2300 movs r3, #0 + 8001e8a: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); - 8001910: 687b ldr r3, [r7, #4] - 8001912: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 - 8001916: 2b01 cmp r3, #1 - 8001918: d101 bne.n 800191e - 800191a: 2302 movs r3, #2 - 800191c: e01a b.n 8001954 - 800191e: 687b ldr r3, [r7, #4] - 8001920: 2201 movs r2, #1 - 8001922: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001e8c: 687b ldr r3, [r7, #4] + 8001e8e: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 8001e92: 2b01 cmp r3, #1 + 8001e94: d101 bne.n 8001e9a + 8001e96: 2302 movs r3, #2 + 8001e98: e01a b.n 8001ed0 + 8001e9a: 687b ldr r3, [r7, #4] + 8001e9c: 2201 movs r2, #1 + 8001e9e: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8001926: 6878 ldr r0, [r7, #4] - 8001928: f000 fb8e bl 8002048 - 800192c: 4603 mov r3, r0 - 800192e: 73fb strb r3, [r7, #15] + 8001ea2: 6878 ldr r0, [r7, #4] + 8001ea4: f000 fa7c bl 80023a0 + 8001ea8: 4603 mov r3, r0 + 8001eaa: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) - 8001930: 7bfb ldrb r3, [r7, #15] - 8001932: 2b00 cmp r3, #0 - 8001934: d109 bne.n 800194a + 8001eac: 7bfb ldrb r3, [r7, #15] + 8001eae: 2b00 cmp r3, #0 + 8001eb0: d109 bne.n 8001ec6 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8001936: 687b ldr r3, [r7, #4] - 8001938: 6cdb ldr r3, [r3, #76] @ 0x4c - 800193a: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 800193e: f023 0301 bic.w r3, r3, #1 - 8001942: f043 0201 orr.w r2, r3, #1 - 8001946: 687b ldr r3, [r7, #4] - 8001948: 64da str r2, [r3, #76] @ 0x4c + 8001eb2: 687b ldr r3, [r7, #4] + 8001eb4: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001eb6: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8001eba: f023 0301 bic.w r3, r3, #1 + 8001ebe: f043 0201 orr.w r2, r3, #1 + 8001ec2: 687b ldr r3, [r7, #4] + 8001ec4: 64da str r2, [r3, #76] @ 0x4c HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); } /* Process unlocked */ __HAL_UNLOCK(hadc); - 800194a: 687b ldr r3, [r7, #4] - 800194c: 2200 movs r2, #0 - 800194e: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001ec6: 687b ldr r3, [r7, #4] + 8001ec8: 2200 movs r2, #0 + 8001eca: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Return function status */ return tmp_hal_status; - 8001952: 7bfb ldrb r3, [r7, #15] + 8001ece: 7bfb ldrb r3, [r7, #15] } - 8001954: 4618 mov r0, r3 - 8001956: 3710 adds r7, #16 - 8001958: 46bd mov sp, r7 - 800195a: bd80 pop {r7, pc} + 8001ed0: 4618 mov r0, r3 + 8001ed2: 3710 adds r7, #16 + 8001ed4: 46bd mov sp, r7 + 8001ed6: bd80 pop {r7, pc} -0800195c : +08001ed8 : * @param hadc ADC handle * @param Timeout Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) { - 800195c: b580 push {r7, lr} - 800195e: b084 sub sp, #16 - 8001960: af00 add r7, sp, #0 - 8001962: 6078 str r0, [r7, #4] - 8001964: 6039 str r1, [r7, #0] + 8001ed8: b580 push {r7, lr} + 8001eda: b084 sub sp, #16 + 8001edc: af00 add r7, sp, #0 + 8001ede: 6078 str r0, [r7, #4] + 8001ee0: 6039 str r1, [r7, #0] uint32_t tickstart = 0; - 8001966: 2300 movs r3, #0 - 8001968: 60fb str r3, [r7, #12] + 8001ee2: 2300 movs r3, #0 + 8001ee4: 60fb str r3, [r7, #12] /* each conversion: */ /* Particular case is ADC configured in DMA mode and ADC sequencer with */ /* several ranks and polling for end of each conversion. */ /* For code simplicity sake, this particular case is generalized to */ /* ADC configured in DMA mode and and polling for end of each conversion. */ if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) && - 800196a: 687b ldr r3, [r7, #4] - 800196c: 681b ldr r3, [r3, #0] - 800196e: 689b ldr r3, [r3, #8] - 8001970: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8001974: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8001978: d113 bne.n 80019a2 + 8001ee6: 687b ldr r3, [r7, #4] + 8001ee8: 681b ldr r3, [r3, #0] + 8001eea: 689b ldr r3, [r3, #8] + 8001eec: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8001ef0: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8001ef4: d113 bne.n 8001f1e HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) ) - 800197a: 687b ldr r3, [r7, #4] - 800197c: 681b ldr r3, [r3, #0] - 800197e: 689b ldr r3, [r3, #8] - 8001980: f403 7380 and.w r3, r3, #256 @ 0x100 + 8001ef6: 687b ldr r3, [r7, #4] + 8001ef8: 681b ldr r3, [r3, #0] + 8001efa: 689b ldr r3, [r3, #8] + 8001efc: f403 7380 and.w r3, r3, #256 @ 0x100 if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) && - 8001984: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8001988: d10b bne.n 80019a2 + 8001f00: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8001f04: d10b bne.n 8001f1e { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 800198a: 687b ldr r3, [r7, #4] - 800198c: 6cdb ldr r3, [r3, #76] @ 0x4c - 800198e: f043 0220 orr.w r2, r3, #32 - 8001992: 687b ldr r3, [r7, #4] - 8001994: 64da str r2, [r3, #76] @ 0x4c + 8001f06: 687b ldr r3, [r7, #4] + 8001f08: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001f0a: f043 0220 orr.w r2, r3, #32 + 8001f0e: 687b ldr r3, [r7, #4] + 8001f10: 64da str r2, [r3, #76] @ 0x4c /* Process unlocked */ __HAL_UNLOCK(hadc); - 8001996: 687b ldr r3, [r7, #4] - 8001998: 2200 movs r2, #0 - 800199a: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001f12: 687b ldr r3, [r7, #4] + 8001f14: 2200 movs r2, #0 + 8001f16: f883 2048 strb.w r2, [r3, #72] @ 0x48 return HAL_ERROR; - 800199e: 2301 movs r3, #1 - 80019a0: e068 b.n 8001a74 + 8001f1a: 2301 movs r3, #1 + 8001f1c: e068 b.n 8001ff0 } /* Get tick count */ tickstart = HAL_GetTick(); - 80019a2: f7ff fddd bl 8001560 - 80019a6: 60f8 str r0, [r7, #12] + 8001f1e: f7ff fddd bl 8001adc + 8001f22: 60f8 str r0, [r7, #12] /* Wait until End of Conversion flag is raised */ while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) - 80019a8: e021 b.n 80019ee + 8001f24: e021 b.n 8001f6a { /* Check if timeout is disabled (set to infinite wait) */ if(Timeout != HAL_MAX_DELAY) - 80019aa: 683b ldr r3, [r7, #0] - 80019ac: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff - 80019b0: d01d beq.n 80019ee + 8001f26: 683b ldr r3, [r7, #0] + 8001f28: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 8001f2c: d01d beq.n 8001f6a { if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout)) - 80019b2: 683b ldr r3, [r7, #0] - 80019b4: 2b00 cmp r3, #0 - 80019b6: d007 beq.n 80019c8 - 80019b8: f7ff fdd2 bl 8001560 - 80019bc: 4602 mov r2, r0 - 80019be: 68fb ldr r3, [r7, #12] - 80019c0: 1ad3 subs r3, r2, r3 - 80019c2: 683a ldr r2, [r7, #0] - 80019c4: 429a cmp r2, r3 - 80019c6: d212 bcs.n 80019ee + 8001f2e: 683b ldr r3, [r7, #0] + 8001f30: 2b00 cmp r3, #0 + 8001f32: d007 beq.n 8001f44 + 8001f34: f7ff fdd2 bl 8001adc + 8001f38: 4602 mov r2, r0 + 8001f3a: 68fb ldr r3, [r7, #12] + 8001f3c: 1ad3 subs r3, r2, r3 + 8001f3e: 683a ldr r2, [r7, #0] + 8001f40: 429a cmp r2, r3 + 8001f42: d212 bcs.n 8001f6a { /* New check to avoid false timeout detection in case of preemption */ if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) - 80019c8: 687b ldr r3, [r7, #4] - 80019ca: 681b ldr r3, [r3, #0] - 80019cc: 681b ldr r3, [r3, #0] - 80019ce: f003 0302 and.w r3, r3, #2 - 80019d2: 2b00 cmp r3, #0 - 80019d4: d10b bne.n 80019ee + 8001f44: 687b ldr r3, [r7, #4] + 8001f46: 681b ldr r3, [r3, #0] + 8001f48: 681b ldr r3, [r3, #0] + 8001f4a: f003 0302 and.w r3, r3, #2 + 8001f4e: 2b00 cmp r3, #0 + 8001f50: d10b bne.n 8001f6a { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - 80019d6: 687b ldr r3, [r7, #4] - 80019d8: 6cdb ldr r3, [r3, #76] @ 0x4c - 80019da: f043 0204 orr.w r2, r3, #4 - 80019de: 687b ldr r3, [r7, #4] - 80019e0: 64da str r2, [r3, #76] @ 0x4c + 8001f52: 687b ldr r3, [r7, #4] + 8001f54: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001f56: f043 0204 orr.w r2, r3, #4 + 8001f5a: 687b ldr r3, [r7, #4] + 8001f5c: 64da str r2, [r3, #76] @ 0x4c /* Process unlocked */ __HAL_UNLOCK(hadc); - 80019e2: 687b ldr r3, [r7, #4] - 80019e4: 2200 movs r2, #0 - 80019e6: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001f5e: 687b ldr r3, [r7, #4] + 8001f60: 2200 movs r2, #0 + 8001f62: f883 2048 strb.w r2, [r3, #72] @ 0x48 return HAL_TIMEOUT; - 80019ea: 2303 movs r3, #3 - 80019ec: e042 b.n 8001a74 + 8001f66: 2303 movs r3, #3 + 8001f68: e042 b.n 8001ff0 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC)) - 80019ee: 687b ldr r3, [r7, #4] - 80019f0: 681b ldr r3, [r3, #0] - 80019f2: 681b ldr r3, [r3, #0] - 80019f4: f003 0302 and.w r3, r3, #2 - 80019f8: 2b00 cmp r3, #0 - 80019fa: d0d6 beq.n 80019aa + 8001f6a: 687b ldr r3, [r7, #4] + 8001f6c: 681b ldr r3, [r3, #0] + 8001f6e: 681b ldr r3, [r3, #0] + 8001f70: f003 0302 and.w r3, r3, #2 + 8001f74: 2b00 cmp r3, #0 + 8001f76: d0d6 beq.n 8001f26 } /* Clear end of conversion flag of regular group if low power feature */ /* "Auto Wait" is disabled, to not interfere with this feature until data */ /* register is read using function HAL_ADC_GetValue(). */ if (hadc->Init.LowPowerAutoWait == DISABLE) - 80019fc: 687b ldr r3, [r7, #4] - 80019fe: 699b ldr r3, [r3, #24] - 8001a00: 2b00 cmp r3, #0 - 8001a02: d104 bne.n 8001a0e + 8001f78: 687b ldr r3, [r7, #4] + 8001f7a: 699b ldr r3, [r3, #24] + 8001f7c: 2b00 cmp r3, #0 + 8001f7e: d104 bne.n 8001f8a { /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); - 8001a04: 687b ldr r3, [r7, #4] - 8001a06: 681b ldr r3, [r3, #0] - 8001a08: f06f 0212 mvn.w r2, #18 - 8001a0c: 601a str r2, [r3, #0] + 8001f80: 687b ldr r3, [r7, #4] + 8001f82: 681b ldr r3, [r3, #0] + 8001f84: f06f 0212 mvn.w r2, #18 + 8001f88: 601a str r2, [r3, #0] } /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8001a0e: 687b ldr r3, [r7, #4] - 8001a10: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001a12: f443 7200 orr.w r2, r3, #512 @ 0x200 - 8001a16: 687b ldr r3, [r7, #4] - 8001a18: 64da str r2, [r3, #76] @ 0x4c + 8001f8a: 687b ldr r3, [r7, #4] + 8001f8c: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001f8e: f443 7200 orr.w r2, r3, #512 @ 0x200 + 8001f92: 687b ldr r3, [r7, #4] + 8001f94: 64da str r2, [r3, #76] @ 0x4c /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32L1, there is no independent flag of end of sequence. */ /* The test of scan sequence on going is done either with scan */ /* sequence disabled or with end of conversion flag set to */ /* of end of sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001a1a: 687b ldr r3, [r7, #4] - 8001a1c: 681b ldr r3, [r3, #0] - 8001a1e: 689b ldr r3, [r3, #8] - 8001a20: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 - 8001a24: 2b00 cmp r3, #0 - 8001a26: d124 bne.n 8001a72 + 8001f96: 687b ldr r3, [r7, #4] + 8001f98: 681b ldr r3, [r3, #0] + 8001f9a: 689b ldr r3, [r3, #8] + 8001f9c: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 + 8001fa0: 2b00 cmp r3, #0 + 8001fa2: d124 bne.n 8001fee (hadc->Init.ContinuousConvMode == DISABLE) && - 8001a28: 687b ldr r3, [r7, #4] - 8001a2a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8001fa4: 687b ldr r3, [r7, #4] + 8001fa6: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001a2e: 2b00 cmp r3, #0 - 8001a30: d11f bne.n 8001a72 + 8001faa: 2b00 cmp r3, #0 + 8001fac: d11f bne.n 8001fee (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || - 8001a32: 687b ldr r3, [r7, #4] - 8001a34: 681b ldr r3, [r3, #0] - 8001a36: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001a38: f003 73f8 and.w r3, r3, #32505856 @ 0x1f00000 + 8001fae: 687b ldr r3, [r7, #4] + 8001fb0: 681b ldr r3, [r3, #0] + 8001fb2: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001fb4: f003 73f8 and.w r3, r3, #32505856 @ 0x1f00000 (hadc->Init.ContinuousConvMode == DISABLE) && - 8001a3c: 2b00 cmp r3, #0 - 8001a3e: d006 beq.n 8001a4e + 8001fb8: 2b00 cmp r3, #0 + 8001fba: d006 beq.n 8001fca HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) - 8001a40: 687b ldr r3, [r7, #4] - 8001a42: 681b ldr r3, [r3, #0] - 8001a44: 689b ldr r3, [r3, #8] - 8001a46: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8001fbc: 687b ldr r3, [r7, #4] + 8001fbe: 681b ldr r3, [r3, #0] + 8001fc0: 689b ldr r3, [r3, #8] + 8001fc2: f403 6380 and.w r3, r3, #1024 @ 0x400 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || - 8001a4a: 2b00 cmp r3, #0 - 8001a4c: d111 bne.n 8001a72 + 8001fc6: 2b00 cmp r3, #0 + 8001fc8: d111 bne.n 8001fee { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8001a4e: 687b ldr r3, [r7, #4] - 8001a50: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001a52: f423 7280 bic.w r2, r3, #256 @ 0x100 - 8001a56: 687b ldr r3, [r7, #4] - 8001a58: 64da str r2, [r3, #76] @ 0x4c + 8001fca: 687b ldr r3, [r7, #4] + 8001fcc: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001fce: f423 7280 bic.w r2, r3, #256 @ 0x100 + 8001fd2: 687b ldr r3, [r7, #4] + 8001fd4: 64da str r2, [r3, #76] @ 0x4c if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 8001a5a: 687b ldr r3, [r7, #4] - 8001a5c: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001a5e: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 8001a62: 2b00 cmp r3, #0 - 8001a64: d105 bne.n 8001a72 + 8001fd6: 687b ldr r3, [r7, #4] + 8001fd8: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001fda: f403 5380 and.w r3, r3, #4096 @ 0x1000 + 8001fde: 2b00 cmp r3, #0 + 8001fe0: d105 bne.n 8001fee { SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8001a66: 687b ldr r3, [r7, #4] - 8001a68: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001a6a: f043 0201 orr.w r2, r3, #1 - 8001a6e: 687b ldr r3, [r7, #4] - 8001a70: 64da str r2, [r3, #76] @ 0x4c + 8001fe2: 687b ldr r3, [r7, #4] + 8001fe4: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001fe6: f043 0201 orr.w r2, r3, #1 + 8001fea: 687b ldr r3, [r7, #4] + 8001fec: 64da str r2, [r3, #76] @ 0x4c } } /* Return ADC state */ return HAL_OK; - 8001a72: 2300 movs r3, #0 + 8001fee: 2300 movs r3, #0 } - 8001a74: 4618 mov r0, r3 - 8001a76: 3710 adds r7, #16 - 8001a78: 46bd mov sp, r7 - 8001a7a: bd80 pop {r7, pc} + 8001ff0: 4618 mov r0, r3 + 8001ff2: 3710 adds r7, #16 + 8001ff4: 46bd mov sp, r7 + 8001ff6: bd80 pop {r7, pc} -08001a7c : +08001ff8 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { - 8001a7c: b480 push {r7} - 8001a7e: b083 sub sp, #12 - 8001a80: af00 add r7, sp, #0 - 8001a82: 6078 str r0, [r7, #4] + 8001ff8: b480 push {r7} + 8001ffa: b083 sub sp, #12 + 8001ffc: af00 add r7, sp, #0 + 8001ffe: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; - 8001a84: 687b ldr r3, [r7, #4] - 8001a86: 681b ldr r3, [r3, #0] - 8001a88: 6d9b ldr r3, [r3, #88] @ 0x58 + 8002000: 687b ldr r3, [r7, #4] + 8002002: 681b ldr r3, [r3, #0] + 8002004: 6d9b ldr r3, [r3, #88] @ 0x58 } - 8001a8a: 4618 mov r0, r3 - 8001a8c: 370c adds r7, #12 - 8001a8e: 46bd mov sp, r7 - 8001a90: bc80 pop {r7} - 8001a92: 4770 bx lr + 8002006: 4618 mov r0, r3 + 8002008: 370c adds r7, #12 + 800200a: 46bd mov sp, r7 + 800200c: bc80 pop {r7} + 800200e: 4770 bx lr -08001a94 : - * @brief Handles ADC interrupt request - * @param hadc ADC handle - * @retval None - */ -void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) -{ - 8001a94: b580 push {r7, lr} - 8001a96: b084 sub sp, #16 - 8001a98: af00 add r7, sp, #0 - 8001a9a: 6078 str r0, [r7, #4] - uint32_t tmp_sr = hadc->Instance->SR; - 8001a9c: 687b ldr r3, [r7, #4] - 8001a9e: 681b ldr r3, [r3, #0] - 8001aa0: 681b ldr r3, [r3, #0] - 8001aa2: 60fb str r3, [r7, #12] - uint32_t tmp_cr1 = hadc->Instance->CR1; - 8001aa4: 687b ldr r3, [r7, #4] - 8001aa6: 681b ldr r3, [r3, #0] - 8001aa8: 685b ldr r3, [r3, #4] - 8001aaa: 60bb str r3, [r7, #8] - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); - assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); - - - /* ========== Check End of Conversion flag for regular group ========== */ - if((tmp_cr1 & ADC_IT_EOC) == ADC_IT_EOC) - 8001aac: 68bb ldr r3, [r7, #8] - 8001aae: f003 0320 and.w r3, r3, #32 - 8001ab2: 2b00 cmp r3, #0 - 8001ab4: d04c beq.n 8001b50 - { - if((tmp_sr & ADC_FLAG_EOC) == ADC_FLAG_EOC) - 8001ab6: 68fb ldr r3, [r7, #12] - 8001ab8: f003 0302 and.w r3, r3, #2 - 8001abc: 2b00 cmp r3, #0 - 8001abe: d047 beq.n 8001b50 - { - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - 8001ac0: 687b ldr r3, [r7, #4] - 8001ac2: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001ac4: f003 0310 and.w r3, r3, #16 - 8001ac8: 2b00 cmp r3, #0 - 8001aca: d105 bne.n 8001ad8 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8001acc: 687b ldr r3, [r7, #4] - 8001ace: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001ad0: f443 7200 orr.w r2, r3, #512 @ 0x200 - 8001ad4: 687b ldr r3, [r7, #4] - 8001ad6: 64da str r2, [r3, #76] @ 0x4c - /* by external trigger, continuous mode or scan sequence on going. */ - /* Note: On STM32L1, there is no independent flag of end of sequence. */ - /* The test of scan sequence on going is done either with scan */ - /* sequence disabled or with end of conversion flag set to */ - /* of end of sequence. */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001ad8: 687b ldr r3, [r7, #4] - 8001ada: 681b ldr r3, [r3, #0] - 8001adc: 689b ldr r3, [r3, #8] - 8001ade: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 - 8001ae2: 2b00 cmp r3, #0 - 8001ae4: d12c bne.n 8001b40 - (hadc->Init.ContinuousConvMode == DISABLE) && - 8001ae6: 687b ldr r3, [r7, #4] - 8001ae8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001aec: 2b00 cmp r3, #0 - 8001aee: d127 bne.n 8001b40 - (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || - 8001af0: 687b ldr r3, [r7, #4] - 8001af2: 681b ldr r3, [r3, #0] - 8001af4: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001af6: f003 73f8 and.w r3, r3, #32505856 @ 0x1f00000 - (hadc->Init.ContinuousConvMode == DISABLE) && - 8001afa: 2b00 cmp r3, #0 - 8001afc: d006 beq.n 8001b0c - HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) - 8001afe: 687b ldr r3, [r7, #4] - 8001b00: 681b ldr r3, [r3, #0] - 8001b02: 689b ldr r3, [r3, #8] - 8001b04: f403 6380 and.w r3, r3, #1024 @ 0x400 - (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || - 8001b08: 2b00 cmp r3, #0 - 8001b0a: d119 bne.n 8001b40 - { - /* Disable ADC end of single conversion interrupt on group regular */ - /* Note: Overrun interrupt was enabled with EOC interrupt in */ - /* HAL_ADC_Start_IT(), but is not disabled here because can be used */ - /* by overrun IRQ process below. */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); - 8001b0c: 687b ldr r3, [r7, #4] - 8001b0e: 681b ldr r3, [r3, #0] - 8001b10: 685a ldr r2, [r3, #4] - 8001b12: 687b ldr r3, [r7, #4] - 8001b14: 681b ldr r3, [r3, #0] - 8001b16: f022 0220 bic.w r2, r2, #32 - 8001b1a: 605a str r2, [r3, #4] - - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8001b1c: 687b ldr r3, [r7, #4] - 8001b1e: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001b20: f423 7280 bic.w r2, r3, #256 @ 0x100 - 8001b24: 687b ldr r3, [r7, #4] - 8001b26: 64da str r2, [r3, #76] @ 0x4c - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 8001b28: 687b ldr r3, [r7, #4] - 8001b2a: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001b2c: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 8001b30: 2b00 cmp r3, #0 - 8001b32: d105 bne.n 8001b40 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8001b34: 687b ldr r3, [r7, #4] - 8001b36: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001b38: f043 0201 orr.w r2, r3, #1 - 8001b3c: 687b ldr r3, [r7, #4] - 8001b3e: 64da str r2, [r3, #76] @ 0x4c - } - -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvCpltCallback(hadc); -#else - HAL_ADC_ConvCpltCallback(hadc); - 8001b40: 6878 ldr r0, [r7, #4] - 8001b42: f000 f89e bl 8001c82 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Clear regular group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); - 8001b46: 687b ldr r3, [r7, #4] - 8001b48: 681b ldr r3, [r3, #0] - 8001b4a: f06f 0212 mvn.w r2, #18 - 8001b4e: 601a str r2, [r3, #0] - } - } - - /* ========== Check End of Conversion flag for injected group ========== */ - if((tmp_cr1 & ADC_IT_JEOC) == ADC_IT_JEOC) - 8001b50: 68bb ldr r3, [r7, #8] - 8001b52: f003 0380 and.w r3, r3, #128 @ 0x80 - 8001b56: 2b00 cmp r3, #0 - 8001b58: d05a beq.n 8001c10 - { - if((tmp_sr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) - 8001b5a: 68fb ldr r3, [r7, #12] - 8001b5c: f003 0304 and.w r3, r3, #4 - 8001b60: 2b00 cmp r3, #0 - 8001b62: d055 beq.n 8001c10 - { - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - 8001b64: 687b ldr r3, [r7, #4] - 8001b66: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001b68: f003 0310 and.w r3, r3, #16 - 8001b6c: 2b00 cmp r3, #0 - 8001b6e: d105 bne.n 8001b7c - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); - 8001b70: 687b ldr r3, [r7, #4] - 8001b72: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001b74: f443 5200 orr.w r2, r3, #8192 @ 0x2000 - 8001b78: 687b ldr r3, [r7, #4] - 8001b7a: 64da str r2, [r3, #76] @ 0x4c - - /* Determine whether any further conversion upcoming on group injected */ - /* by external trigger, scan sequence on going or by automatic injected */ - /* conversion from group regular (same conditions as group regular */ - /* interruption disabling above). */ - if(ADC_IS_SOFTWARE_START_INJECTED(hadc) && - 8001b7c: 687b ldr r3, [r7, #4] - 8001b7e: 681b ldr r3, [r3, #0] - 8001b80: 689b ldr r3, [r3, #8] - 8001b82: f403 1340 and.w r3, r3, #3145728 @ 0x300000 - 8001b86: 2b00 cmp r3, #0 - 8001b88: d13a bne.n 8001c00 - (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) || - 8001b8a: 687b ldr r3, [r7, #4] - 8001b8c: 681b ldr r3, [r3, #0] - 8001b8e: 6c5b ldr r3, [r3, #68] @ 0x44 - 8001b90: f403 1340 and.w r3, r3, #3145728 @ 0x300000 - if(ADC_IS_SOFTWARE_START_INJECTED(hadc) && - 8001b94: 2b00 cmp r3, #0 - 8001b96: d006 beq.n 8001ba6 - HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) && - 8001b98: 687b ldr r3, [r7, #4] - 8001b9a: 681b ldr r3, [r3, #0] - 8001b9c: 689b ldr r3, [r3, #8] - 8001b9e: f403 6380 and.w r3, r3, #1024 @ 0x400 - (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) || - 8001ba2: 2b00 cmp r3, #0 - 8001ba4: d12c bne.n 8001c00 - (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && - 8001ba6: 687b ldr r3, [r7, #4] - 8001ba8: 681b ldr r3, [r3, #0] - 8001baa: 685b ldr r3, [r3, #4] - 8001bac: f403 6380 and.w r3, r3, #1024 @ 0x400 - HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) && - 8001bb0: 2b00 cmp r3, #0 - 8001bb2: d125 bne.n 8001c00 - (ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001bb4: 687b ldr r3, [r7, #4] - 8001bb6: 681b ldr r3, [r3, #0] - 8001bb8: 689b ldr r3, [r3, #8] - 8001bba: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 - (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && - 8001bbe: 2b00 cmp r3, #0 - 8001bc0: d11e bne.n 8001c00 - (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) - 8001bc2: 687b ldr r3, [r7, #4] - 8001bc4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - (ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8001bc8: 2b00 cmp r3, #0 - 8001bca: d119 bne.n 8001c00 - { - /* Disable ADC end of single conversion interrupt on group injected */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); - 8001bcc: 687b ldr r3, [r7, #4] - 8001bce: 681b ldr r3, [r3, #0] - 8001bd0: 685a ldr r2, [r3, #4] - 8001bd2: 687b ldr r3, [r7, #4] - 8001bd4: 681b ldr r3, [r3, #0] - 8001bd6: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8001bda: 605a str r2, [r3, #4] - - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - 8001bdc: 687b ldr r3, [r7, #4] - 8001bde: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001be0: f423 5280 bic.w r2, r3, #4096 @ 0x1000 - 8001be4: 687b ldr r3, [r7, #4] - 8001be6: 64da str r2, [r3, #76] @ 0x4c - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) - 8001be8: 687b ldr r3, [r7, #4] - 8001bea: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001bec: f403 7380 and.w r3, r3, #256 @ 0x100 - 8001bf0: 2b00 cmp r3, #0 - 8001bf2: d105 bne.n 8001c00 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8001bf4: 687b ldr r3, [r7, #4] - 8001bf6: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001bf8: f043 0201 orr.w r2, r3, #1 - 8001bfc: 687b ldr r3, [r7, #4] - 8001bfe: 64da str r2, [r3, #76] @ 0x4c - } - -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->InjectedConvCpltCallback(hadc); -#else - HAL_ADCEx_InjectedConvCpltCallback(hadc); - 8001c00: 6878 ldr r0, [r7, #4] - 8001c02: f000 fa62 bl 80020ca -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Clear injected group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC)); - 8001c06: 687b ldr r3, [r7, #4] - 8001c08: 681b ldr r3, [r3, #0] - 8001c0a: f06f 020c mvn.w r2, #12 - 8001c0e: 601a str r2, [r3, #0] - } - } - - /* ========== Check Analog watchdog flags ========== */ - if((tmp_cr1 & ADC_IT_AWD) == ADC_IT_AWD) - 8001c10: 68bb ldr r3, [r7, #8] - 8001c12: f003 0340 and.w r3, r3, #64 @ 0x40 - 8001c16: 2b00 cmp r3, #0 - 8001c18: d012 beq.n 8001c40 - { - if((tmp_sr & ADC_FLAG_AWD) == ADC_FLAG_AWD) - 8001c1a: 68fb ldr r3, [r7, #12] - 8001c1c: f003 0301 and.w r3, r3, #1 - 8001c20: 2b00 cmp r3, #0 - 8001c22: d00d beq.n 8001c40 - { - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); - 8001c24: 687b ldr r3, [r7, #4] - 8001c26: 6cdb ldr r3, [r3, #76] @ 0x4c - 8001c28: f443 3280 orr.w r2, r3, #65536 @ 0x10000 - 8001c2c: 687b ldr r3, [r7, #4] - 8001c2e: 64da str r2, [r3, #76] @ 0x4c - -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->LevelOutOfWindowCallback(hadc); -#else - HAL_ADC_LevelOutOfWindowCallback(hadc); - 8001c30: 6878 ldr r0, [r7, #4] - 8001c32: f000 f82f bl 8001c94 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Clear the ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); - 8001c36: 687b ldr r3, [r7, #4] - 8001c38: 681b ldr r3, [r3, #0] - 8001c3a: f06f 0201 mvn.w r2, #1 - 8001c3e: 601a str r2, [r3, #0] - } - } - - /* ========== Check Overrun flag ========== */ - if((tmp_cr1 & ADC_IT_OVR) == ADC_IT_OVR) - 8001c40: 68bb ldr r3, [r7, #8] - 8001c42: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 - 8001c46: 2b00 cmp r3, #0 - 8001c48: d017 beq.n 8001c7a - { - if((tmp_sr & ADC_FLAG_OVR) == ADC_FLAG_OVR) - 8001c4a: 68fb ldr r3, [r7, #12] - 8001c4c: f003 0320 and.w r3, r3, #32 - 8001c50: 2b00 cmp r3, #0 - 8001c52: d012 beq.n 8001c7a - /* Note: On STM32L1, ADC overrun can be set through other parameters */ - /* refer to description of parameter "EOCSelection" for more */ - /* details. */ - - /* Set ADC error code to overrun */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); - 8001c54: 687b ldr r3, [r7, #4] - 8001c56: 6d1b ldr r3, [r3, #80] @ 0x50 - 8001c58: f043 0202 orr.w r2, r3, #2 - 8001c5c: 687b ldr r3, [r7, #4] - 8001c5e: 651a str r2, [r3, #80] @ 0x50 - - /* Clear ADC overrun flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - 8001c60: 687b ldr r3, [r7, #4] - 8001c62: 681b ldr r3, [r3, #0] - 8001c64: f06f 0220 mvn.w r2, #32 - 8001c68: 601a str r2, [r3, #0] - -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ErrorCallback(hadc); -#else - HAL_ADC_ErrorCallback(hadc); - 8001c6a: 6878 ldr r0, [r7, #4] - 8001c6c: f000 f81b bl 8001ca6 -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ - - /* Clear the Overrun flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - 8001c70: 687b ldr r3, [r7, #4] - 8001c72: 681b ldr r3, [r3, #0] - 8001c74: f06f 0220 mvn.w r2, #32 - 8001c78: 601a str r2, [r3, #0] - } - } - -} - 8001c7a: bf00 nop - 8001c7c: 3710 adds r7, #16 - 8001c7e: 46bd mov sp, r7 - 8001c80: bd80 pop {r7, pc} - -08001c82 : - * @brief Conversion complete callback in non blocking mode - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - 8001c82: b480 push {r7} - 8001c84: b083 sub sp, #12 - 8001c86: af00 add r7, sp, #0 - 8001c88: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvCpltCallback must be implemented in the user file. - */ -} - 8001c8a: bf00 nop - 8001c8c: 370c adds r7, #12 - 8001c8e: 46bd mov sp, r7 - 8001c90: bc80 pop {r7} - 8001c92: 4770 bx lr - -08001c94 : - * @brief Analog watchdog callback in non blocking mode. - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) -{ - 8001c94: b480 push {r7} - 8001c96: b083 sub sp, #12 - 8001c98: af00 add r7, sp, #0 - 8001c9a: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. - */ -} - 8001c9c: bf00 nop - 8001c9e: 370c adds r7, #12 - 8001ca0: 46bd mov sp, r7 - 8001ca2: bc80 pop {r7} - 8001ca4: 4770 bx lr - -08001ca6 : - * (this function is also clearing overrun flag) - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) -{ - 8001ca6: b480 push {r7} - 8001ca8: b083 sub sp, #12 - 8001caa: af00 add r7, sp, #0 - 8001cac: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ErrorCallback must be implemented in the user file. - */ -} - 8001cae: bf00 nop - 8001cb0: 370c adds r7, #12 - 8001cb2: 46bd mov sp, r7 - 8001cb4: bc80 pop {r7} - 8001cb6: 4770 bx lr - -08001cb8 : +08002010 : * @param hadc ADC handle * @param sConfig Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 8001cb8: b480 push {r7} - 8001cba: b085 sub sp, #20 - 8001cbc: af00 add r7, sp, #0 - 8001cbe: 6078 str r0, [r7, #4] - 8001cc0: 6039 str r1, [r7, #0] + 8002010: b480 push {r7} + 8002012: b085 sub sp, #20 + 8002014: af00 add r7, sp, #0 + 8002016: 6078 str r0, [r7, #4] + 8002018: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8001cc2: 2300 movs r3, #0 - 8001cc4: 73fb strb r3, [r7, #15] + 800201a: 2300 movs r3, #0 + 800201c: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0; - 8001cc6: 2300 movs r3, #0 - 8001cc8: 60bb str r3, [r7, #8] + 800201e: 2300 movs r3, #0 + 8002020: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 8001cca: 687b ldr r3, [r7, #4] - 8001ccc: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 - 8001cd0: 2b01 cmp r3, #1 - 8001cd2: d101 bne.n 8001cd8 - 8001cd4: 2302 movs r3, #2 - 8001cd6: e14f b.n 8001f78 - 8001cd8: 687b ldr r3, [r7, #4] - 8001cda: 2201 movs r2, #1 - 8001cdc: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8002022: 687b ldr r3, [r7, #4] + 8002024: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 8002028: 2b01 cmp r3, #1 + 800202a: d101 bne.n 8002030 + 800202c: 2302 movs r3, #2 + 800202e: e14f b.n 80022d0 + 8002030: 687b ldr r3, [r7, #4] + 8002032: 2201 movs r2, #1 + 8002034: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7) - 8001ce0: 683b ldr r3, [r7, #0] - 8001ce2: 685b ldr r3, [r3, #4] - 8001ce4: 2b06 cmp r3, #6 - 8001ce6: d81c bhi.n 8001d22 + 8002038: 683b ldr r3, [r7, #0] + 800203a: 685b ldr r3, [r3, #4] + 800203c: 2b06 cmp r3, #6 + 800203e: d81c bhi.n 800207a { MODIFY_REG(hadc->Instance->SQR5, - 8001ce8: 687b ldr r3, [r7, #4] - 8001cea: 681b ldr r3, [r3, #0] - 8001cec: 6c19 ldr r1, [r3, #64] @ 0x40 - 8001cee: 683b ldr r3, [r7, #0] - 8001cf0: 685a ldr r2, [r3, #4] - 8001cf2: 4613 mov r3, r2 - 8001cf4: 009b lsls r3, r3, #2 - 8001cf6: 4413 add r3, r2 - 8001cf8: 3b05 subs r3, #5 - 8001cfa: 221f movs r2, #31 - 8001cfc: fa02 f303 lsl.w r3, r2, r3 - 8001d00: 43db mvns r3, r3 - 8001d02: 4019 ands r1, r3 - 8001d04: 683b ldr r3, [r7, #0] - 8001d06: 6818 ldr r0, [r3, #0] - 8001d08: 683b ldr r3, [r7, #0] - 8001d0a: 685a ldr r2, [r3, #4] - 8001d0c: 4613 mov r3, r2 - 8001d0e: 009b lsls r3, r3, #2 - 8001d10: 4413 add r3, r2 - 8001d12: 3b05 subs r3, #5 - 8001d14: fa00 f203 lsl.w r2, r0, r3 - 8001d18: 687b ldr r3, [r7, #4] - 8001d1a: 681b ldr r3, [r3, #0] - 8001d1c: 430a orrs r2, r1 - 8001d1e: 641a str r2, [r3, #64] @ 0x40 - 8001d20: e07e b.n 8001e20 + 8002040: 687b ldr r3, [r7, #4] + 8002042: 681b ldr r3, [r3, #0] + 8002044: 6c19 ldr r1, [r3, #64] @ 0x40 + 8002046: 683b ldr r3, [r7, #0] + 8002048: 685a ldr r2, [r3, #4] + 800204a: 4613 mov r3, r2 + 800204c: 009b lsls r3, r3, #2 + 800204e: 4413 add r3, r2 + 8002050: 3b05 subs r3, #5 + 8002052: 221f movs r2, #31 + 8002054: fa02 f303 lsl.w r3, r2, r3 + 8002058: 43db mvns r3, r3 + 800205a: 4019 ands r1, r3 + 800205c: 683b ldr r3, [r7, #0] + 800205e: 6818 ldr r0, [r3, #0] + 8002060: 683b ldr r3, [r7, #0] + 8002062: 685a ldr r2, [r3, #4] + 8002064: 4613 mov r3, r2 + 8002066: 009b lsls r3, r3, #2 + 8002068: 4413 add r3, r2 + 800206a: 3b05 subs r3, #5 + 800206c: fa00 f203 lsl.w r2, r0, r3 + 8002070: 687b ldr r3, [r7, #4] + 8002072: 681b ldr r3, [r3, #0] + 8002074: 430a orrs r2, r1 + 8002076: 641a str r2, [r3, #64] @ 0x40 + 8002078: e07e b.n 8002178 ADC_SQR5_RK(ADC_SQR5_SQ1, sConfig->Rank), ADC_SQR5_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13) - 8001d22: 683b ldr r3, [r7, #0] - 8001d24: 685b ldr r3, [r3, #4] - 8001d26: 2b0c cmp r3, #12 - 8001d28: d81c bhi.n 8001d64 + 800207a: 683b ldr r3, [r7, #0] + 800207c: 685b ldr r3, [r3, #4] + 800207e: 2b0c cmp r3, #12 + 8002080: d81c bhi.n 80020bc { MODIFY_REG(hadc->Instance->SQR4, - 8001d2a: 687b ldr r3, [r7, #4] - 8001d2c: 681b ldr r3, [r3, #0] - 8001d2e: 6bd9 ldr r1, [r3, #60] @ 0x3c - 8001d30: 683b ldr r3, [r7, #0] - 8001d32: 685a ldr r2, [r3, #4] - 8001d34: 4613 mov r3, r2 - 8001d36: 009b lsls r3, r3, #2 - 8001d38: 4413 add r3, r2 - 8001d3a: 3b23 subs r3, #35 @ 0x23 - 8001d3c: 221f movs r2, #31 - 8001d3e: fa02 f303 lsl.w r3, r2, r3 - 8001d42: 43db mvns r3, r3 - 8001d44: 4019 ands r1, r3 - 8001d46: 683b ldr r3, [r7, #0] - 8001d48: 6818 ldr r0, [r3, #0] - 8001d4a: 683b ldr r3, [r7, #0] - 8001d4c: 685a ldr r2, [r3, #4] - 8001d4e: 4613 mov r3, r2 - 8001d50: 009b lsls r3, r3, #2 - 8001d52: 4413 add r3, r2 - 8001d54: 3b23 subs r3, #35 @ 0x23 - 8001d56: fa00 f203 lsl.w r2, r0, r3 - 8001d5a: 687b ldr r3, [r7, #4] - 8001d5c: 681b ldr r3, [r3, #0] - 8001d5e: 430a orrs r2, r1 - 8001d60: 63da str r2, [r3, #60] @ 0x3c - 8001d62: e05d b.n 8001e20 + 8002082: 687b ldr r3, [r7, #4] + 8002084: 681b ldr r3, [r3, #0] + 8002086: 6bd9 ldr r1, [r3, #60] @ 0x3c + 8002088: 683b ldr r3, [r7, #0] + 800208a: 685a ldr r2, [r3, #4] + 800208c: 4613 mov r3, r2 + 800208e: 009b lsls r3, r3, #2 + 8002090: 4413 add r3, r2 + 8002092: 3b23 subs r3, #35 @ 0x23 + 8002094: 221f movs r2, #31 + 8002096: fa02 f303 lsl.w r3, r2, r3 + 800209a: 43db mvns r3, r3 + 800209c: 4019 ands r1, r3 + 800209e: 683b ldr r3, [r7, #0] + 80020a0: 6818 ldr r0, [r3, #0] + 80020a2: 683b ldr r3, [r7, #0] + 80020a4: 685a ldr r2, [r3, #4] + 80020a6: 4613 mov r3, r2 + 80020a8: 009b lsls r3, r3, #2 + 80020aa: 4413 add r3, r2 + 80020ac: 3b23 subs r3, #35 @ 0x23 + 80020ae: fa00 f203 lsl.w r2, r0, r3 + 80020b2: 687b ldr r3, [r7, #4] + 80020b4: 681b ldr r3, [r3, #0] + 80020b6: 430a orrs r2, r1 + 80020b8: 63da str r2, [r3, #60] @ 0x3c + 80020ba: e05d b.n 8002178 ADC_SQR4_RK(ADC_SQR4_SQ7, sConfig->Rank), ADC_SQR4_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 18 */ else if (sConfig->Rank < 19) - 8001d64: 683b ldr r3, [r7, #0] - 8001d66: 685b ldr r3, [r3, #4] - 8001d68: 2b12 cmp r3, #18 - 8001d6a: d81c bhi.n 8001da6 + 80020bc: 683b ldr r3, [r7, #0] + 80020be: 685b ldr r3, [r3, #4] + 80020c0: 2b12 cmp r3, #18 + 80020c2: d81c bhi.n 80020fe { MODIFY_REG(hadc->Instance->SQR3, - 8001d6c: 687b ldr r3, [r7, #4] - 8001d6e: 681b ldr r3, [r3, #0] - 8001d70: 6b99 ldr r1, [r3, #56] @ 0x38 - 8001d72: 683b ldr r3, [r7, #0] - 8001d74: 685a ldr r2, [r3, #4] - 8001d76: 4613 mov r3, r2 - 8001d78: 009b lsls r3, r3, #2 - 8001d7a: 4413 add r3, r2 - 8001d7c: 3b41 subs r3, #65 @ 0x41 - 8001d7e: 221f movs r2, #31 - 8001d80: fa02 f303 lsl.w r3, r2, r3 - 8001d84: 43db mvns r3, r3 - 8001d86: 4019 ands r1, r3 - 8001d88: 683b ldr r3, [r7, #0] - 8001d8a: 6818 ldr r0, [r3, #0] - 8001d8c: 683b ldr r3, [r7, #0] - 8001d8e: 685a ldr r2, [r3, #4] - 8001d90: 4613 mov r3, r2 - 8001d92: 009b lsls r3, r3, #2 - 8001d94: 4413 add r3, r2 - 8001d96: 3b41 subs r3, #65 @ 0x41 - 8001d98: fa00 f203 lsl.w r2, r0, r3 - 8001d9c: 687b ldr r3, [r7, #4] - 8001d9e: 681b ldr r3, [r3, #0] - 8001da0: 430a orrs r2, r1 - 8001da2: 639a str r2, [r3, #56] @ 0x38 - 8001da4: e03c b.n 8001e20 + 80020c4: 687b ldr r3, [r7, #4] + 80020c6: 681b ldr r3, [r3, #0] + 80020c8: 6b99 ldr r1, [r3, #56] @ 0x38 + 80020ca: 683b ldr r3, [r7, #0] + 80020cc: 685a ldr r2, [r3, #4] + 80020ce: 4613 mov r3, r2 + 80020d0: 009b lsls r3, r3, #2 + 80020d2: 4413 add r3, r2 + 80020d4: 3b41 subs r3, #65 @ 0x41 + 80020d6: 221f movs r2, #31 + 80020d8: fa02 f303 lsl.w r3, r2, r3 + 80020dc: 43db mvns r3, r3 + 80020de: 4019 ands r1, r3 + 80020e0: 683b ldr r3, [r7, #0] + 80020e2: 6818 ldr r0, [r3, #0] + 80020e4: 683b ldr r3, [r7, #0] + 80020e6: 685a ldr r2, [r3, #4] + 80020e8: 4613 mov r3, r2 + 80020ea: 009b lsls r3, r3, #2 + 80020ec: 4413 add r3, r2 + 80020ee: 3b41 subs r3, #65 @ 0x41 + 80020f0: fa00 f203 lsl.w r2, r0, r3 + 80020f4: 687b ldr r3, [r7, #4] + 80020f6: 681b ldr r3, [r3, #0] + 80020f8: 430a orrs r2, r1 + 80020fa: 639a str r2, [r3, #56] @ 0x38 + 80020fc: e03c b.n 8002178 ADC_SQR3_RK(ADC_SQR3_SQ13, sConfig->Rank), ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 19 to 24 */ else if (sConfig->Rank < 25) - 8001da6: 683b ldr r3, [r7, #0] - 8001da8: 685b ldr r3, [r3, #4] - 8001daa: 2b18 cmp r3, #24 - 8001dac: d81c bhi.n 8001de8 + 80020fe: 683b ldr r3, [r7, #0] + 8002100: 685b ldr r3, [r3, #4] + 8002102: 2b18 cmp r3, #24 + 8002104: d81c bhi.n 8002140 { MODIFY_REG(hadc->Instance->SQR2, - 8001dae: 687b ldr r3, [r7, #4] - 8001db0: 681b ldr r3, [r3, #0] - 8001db2: 6b59 ldr r1, [r3, #52] @ 0x34 - 8001db4: 683b ldr r3, [r7, #0] - 8001db6: 685a ldr r2, [r3, #4] - 8001db8: 4613 mov r3, r2 - 8001dba: 009b lsls r3, r3, #2 - 8001dbc: 4413 add r3, r2 - 8001dbe: 3b5f subs r3, #95 @ 0x5f - 8001dc0: 221f movs r2, #31 - 8001dc2: fa02 f303 lsl.w r3, r2, r3 - 8001dc6: 43db mvns r3, r3 - 8001dc8: 4019 ands r1, r3 - 8001dca: 683b ldr r3, [r7, #0] - 8001dcc: 6818 ldr r0, [r3, #0] - 8001dce: 683b ldr r3, [r7, #0] - 8001dd0: 685a ldr r2, [r3, #4] - 8001dd2: 4613 mov r3, r2 - 8001dd4: 009b lsls r3, r3, #2 - 8001dd6: 4413 add r3, r2 - 8001dd8: 3b5f subs r3, #95 @ 0x5f - 8001dda: fa00 f203 lsl.w r2, r0, r3 - 8001dde: 687b ldr r3, [r7, #4] - 8001de0: 681b ldr r3, [r3, #0] - 8001de2: 430a orrs r2, r1 - 8001de4: 635a str r2, [r3, #52] @ 0x34 - 8001de6: e01b b.n 8001e20 + 8002106: 687b ldr r3, [r7, #4] + 8002108: 681b ldr r3, [r3, #0] + 800210a: 6b59 ldr r1, [r3, #52] @ 0x34 + 800210c: 683b ldr r3, [r7, #0] + 800210e: 685a ldr r2, [r3, #4] + 8002110: 4613 mov r3, r2 + 8002112: 009b lsls r3, r3, #2 + 8002114: 4413 add r3, r2 + 8002116: 3b5f subs r3, #95 @ 0x5f + 8002118: 221f movs r2, #31 + 800211a: fa02 f303 lsl.w r3, r2, r3 + 800211e: 43db mvns r3, r3 + 8002120: 4019 ands r1, r3 + 8002122: 683b ldr r3, [r7, #0] + 8002124: 6818 ldr r0, [r3, #0] + 8002126: 683b ldr r3, [r7, #0] + 8002128: 685a ldr r2, [r3, #4] + 800212a: 4613 mov r3, r2 + 800212c: 009b lsls r3, r3, #2 + 800212e: 4413 add r3, r2 + 8002130: 3b5f subs r3, #95 @ 0x5f + 8002132: fa00 f203 lsl.w r2, r0, r3 + 8002136: 687b ldr r3, [r7, #4] + 8002138: 681b ldr r3, [r3, #0] + 800213a: 430a orrs r2, r1 + 800213c: 635a str r2, [r3, #52] @ 0x34 + 800213e: e01b b.n 8002178 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 25 to 28 */ else { MODIFY_REG(hadc->Instance->SQR1, - 8001de8: 687b ldr r3, [r7, #4] - 8001dea: 681b ldr r3, [r3, #0] - 8001dec: 6b19 ldr r1, [r3, #48] @ 0x30 - 8001dee: 683b ldr r3, [r7, #0] - 8001df0: 685a ldr r2, [r3, #4] - 8001df2: 4613 mov r3, r2 - 8001df4: 009b lsls r3, r3, #2 - 8001df6: 4413 add r3, r2 - 8001df8: 3b7d subs r3, #125 @ 0x7d - 8001dfa: 221f movs r2, #31 - 8001dfc: fa02 f303 lsl.w r3, r2, r3 - 8001e00: 43db mvns r3, r3 - 8001e02: 4019 ands r1, r3 - 8001e04: 683b ldr r3, [r7, #0] - 8001e06: 6818 ldr r0, [r3, #0] - 8001e08: 683b ldr r3, [r7, #0] - 8001e0a: 685a ldr r2, [r3, #4] - 8001e0c: 4613 mov r3, r2 - 8001e0e: 009b lsls r3, r3, #2 - 8001e10: 4413 add r3, r2 - 8001e12: 3b7d subs r3, #125 @ 0x7d - 8001e14: fa00 f203 lsl.w r2, r0, r3 - 8001e18: 687b ldr r3, [r7, #4] - 8001e1a: 681b ldr r3, [r3, #0] - 8001e1c: 430a orrs r2, r1 - 8001e1e: 631a str r2, [r3, #48] @ 0x30 + 8002140: 687b ldr r3, [r7, #4] + 8002142: 681b ldr r3, [r3, #0] + 8002144: 6b19 ldr r1, [r3, #48] @ 0x30 + 8002146: 683b ldr r3, [r7, #0] + 8002148: 685a ldr r2, [r3, #4] + 800214a: 4613 mov r3, r2 + 800214c: 009b lsls r3, r3, #2 + 800214e: 4413 add r3, r2 + 8002150: 3b7d subs r3, #125 @ 0x7d + 8002152: 221f movs r2, #31 + 8002154: fa02 f303 lsl.w r3, r2, r3 + 8002158: 43db mvns r3, r3 + 800215a: 4019 ands r1, r3 + 800215c: 683b ldr r3, [r7, #0] + 800215e: 6818 ldr r0, [r3, #0] + 8002160: 683b ldr r3, [r7, #0] + 8002162: 685a ldr r2, [r3, #4] + 8002164: 4613 mov r3, r2 + 8002166: 009b lsls r3, r3, #2 + 8002168: 4413 add r3, r2 + 800216a: 3b7d subs r3, #125 @ 0x7d + 800216c: fa00 f203 lsl.w r2, r0, r3 + 8002170: 687b ldr r3, [r7, #4] + 8002172: 681b ldr r3, [r3, #0] + 8002174: 430a orrs r2, r1 + 8002176: 631a str r2, [r3, #48] @ 0x30 } /* Channel sampling time configuration */ /* For channels 0 to 9 */ if (sConfig->Channel < ADC_CHANNEL_10) - 8001e20: 683b ldr r3, [r7, #0] - 8001e22: 681b ldr r3, [r3, #0] - 8001e24: 2b09 cmp r3, #9 - 8001e26: d81a bhi.n 8001e5e + 8002178: 683b ldr r3, [r7, #0] + 800217a: 681b ldr r3, [r3, #0] + 800217c: 2b09 cmp r3, #9 + 800217e: d81a bhi.n 80021b6 { MODIFY_REG(hadc->Instance->SMPR3, - 8001e28: 687b ldr r3, [r7, #4] - 8001e2a: 681b ldr r3, [r3, #0] - 8001e2c: 6959 ldr r1, [r3, #20] - 8001e2e: 683b ldr r3, [r7, #0] - 8001e30: 681a ldr r2, [r3, #0] - 8001e32: 4613 mov r3, r2 - 8001e34: 005b lsls r3, r3, #1 - 8001e36: 4413 add r3, r2 - 8001e38: 2207 movs r2, #7 - 8001e3a: fa02 f303 lsl.w r3, r2, r3 - 8001e3e: 43db mvns r3, r3 - 8001e40: 4019 ands r1, r3 - 8001e42: 683b ldr r3, [r7, #0] - 8001e44: 6898 ldr r0, [r3, #8] - 8001e46: 683b ldr r3, [r7, #0] - 8001e48: 681a ldr r2, [r3, #0] - 8001e4a: 4613 mov r3, r2 - 8001e4c: 005b lsls r3, r3, #1 - 8001e4e: 4413 add r3, r2 - 8001e50: fa00 f203 lsl.w r2, r0, r3 - 8001e54: 687b ldr r3, [r7, #4] - 8001e56: 681b ldr r3, [r3, #0] - 8001e58: 430a orrs r2, r1 - 8001e5a: 615a str r2, [r3, #20] - 8001e5c: e05d b.n 8001f1a + 8002180: 687b ldr r3, [r7, #4] + 8002182: 681b ldr r3, [r3, #0] + 8002184: 6959 ldr r1, [r3, #20] + 8002186: 683b ldr r3, [r7, #0] + 8002188: 681a ldr r2, [r3, #0] + 800218a: 4613 mov r3, r2 + 800218c: 005b lsls r3, r3, #1 + 800218e: 4413 add r3, r2 + 8002190: 2207 movs r2, #7 + 8002192: fa02 f303 lsl.w r3, r2, r3 + 8002196: 43db mvns r3, r3 + 8002198: 4019 ands r1, r3 + 800219a: 683b ldr r3, [r7, #0] + 800219c: 6898 ldr r0, [r3, #8] + 800219e: 683b ldr r3, [r7, #0] + 80021a0: 681a ldr r2, [r3, #0] + 80021a2: 4613 mov r3, r2 + 80021a4: 005b lsls r3, r3, #1 + 80021a6: 4413 add r3, r2 + 80021a8: fa00 f203 lsl.w r2, r0, r3 + 80021ac: 687b ldr r3, [r7, #4] + 80021ae: 681b ldr r3, [r3, #0] + 80021b0: 430a orrs r2, r1 + 80021b2: 615a str r2, [r3, #20] + 80021b4: e05d b.n 8002272 ADC_SMPR3(ADC_SMPR3_SMP0, sConfig->Channel), ADC_SMPR3(sConfig->SamplingTime, sConfig->Channel) ); } /* For channels 10 to 19 */ else if (sConfig->Channel < ADC_CHANNEL_20) - 8001e5e: 683b ldr r3, [r7, #0] - 8001e60: 681b ldr r3, [r3, #0] - 8001e62: 2b13 cmp r3, #19 - 8001e64: d81c bhi.n 8001ea0 + 80021b6: 683b ldr r3, [r7, #0] + 80021b8: 681b ldr r3, [r3, #0] + 80021ba: 2b13 cmp r3, #19 + 80021bc: d81c bhi.n 80021f8 { MODIFY_REG(hadc->Instance->SMPR2, - 8001e66: 687b ldr r3, [r7, #4] - 8001e68: 681b ldr r3, [r3, #0] - 8001e6a: 6919 ldr r1, [r3, #16] - 8001e6c: 683b ldr r3, [r7, #0] - 8001e6e: 681a ldr r2, [r3, #0] - 8001e70: 4613 mov r3, r2 - 8001e72: 005b lsls r3, r3, #1 - 8001e74: 4413 add r3, r2 - 8001e76: 3b1e subs r3, #30 - 8001e78: 2207 movs r2, #7 - 8001e7a: fa02 f303 lsl.w r3, r2, r3 - 8001e7e: 43db mvns r3, r3 - 8001e80: 4019 ands r1, r3 - 8001e82: 683b ldr r3, [r7, #0] - 8001e84: 6898 ldr r0, [r3, #8] - 8001e86: 683b ldr r3, [r7, #0] - 8001e88: 681a ldr r2, [r3, #0] - 8001e8a: 4613 mov r3, r2 - 8001e8c: 005b lsls r3, r3, #1 - 8001e8e: 4413 add r3, r2 - 8001e90: 3b1e subs r3, #30 - 8001e92: fa00 f203 lsl.w r2, r0, r3 - 8001e96: 687b ldr r3, [r7, #4] - 8001e98: 681b ldr r3, [r3, #0] - 8001e9a: 430a orrs r2, r1 - 8001e9c: 611a str r2, [r3, #16] - 8001e9e: e03c b.n 8001f1a + 80021be: 687b ldr r3, [r7, #4] + 80021c0: 681b ldr r3, [r3, #0] + 80021c2: 6919 ldr r1, [r3, #16] + 80021c4: 683b ldr r3, [r7, #0] + 80021c6: 681a ldr r2, [r3, #0] + 80021c8: 4613 mov r3, r2 + 80021ca: 005b lsls r3, r3, #1 + 80021cc: 4413 add r3, r2 + 80021ce: 3b1e subs r3, #30 + 80021d0: 2207 movs r2, #7 + 80021d2: fa02 f303 lsl.w r3, r2, r3 + 80021d6: 43db mvns r3, r3 + 80021d8: 4019 ands r1, r3 + 80021da: 683b ldr r3, [r7, #0] + 80021dc: 6898 ldr r0, [r3, #8] + 80021de: 683b ldr r3, [r7, #0] + 80021e0: 681a ldr r2, [r3, #0] + 80021e2: 4613 mov r3, r2 + 80021e4: 005b lsls r3, r3, #1 + 80021e6: 4413 add r3, r2 + 80021e8: 3b1e subs r3, #30 + 80021ea: fa00 f203 lsl.w r2, r0, r3 + 80021ee: 687b ldr r3, [r7, #4] + 80021f0: 681b ldr r3, [r3, #0] + 80021f2: 430a orrs r2, r1 + 80021f4: 611a str r2, [r3, #16] + 80021f6: e03c b.n 8002272 ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel), ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* For channels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */ /* For channels 20 to 29 for devices Cat4, Cat.5 */ else if (sConfig->Channel <= ADC_SMPR1_CHANNEL_MAX) - 8001ea0: 683b ldr r3, [r7, #0] - 8001ea2: 681b ldr r3, [r3, #0] - 8001ea4: 2b1d cmp r3, #29 - 8001ea6: d81c bhi.n 8001ee2 + 80021f8: 683b ldr r3, [r7, #0] + 80021fa: 681b ldr r3, [r3, #0] + 80021fc: 2b1d cmp r3, #29 + 80021fe: d81c bhi.n 800223a { MODIFY_REG(hadc->Instance->SMPR1, - 8001ea8: 687b ldr r3, [r7, #4] - 8001eaa: 681b ldr r3, [r3, #0] - 8001eac: 68d9 ldr r1, [r3, #12] - 8001eae: 683b ldr r3, [r7, #0] - 8001eb0: 681a ldr r2, [r3, #0] - 8001eb2: 4613 mov r3, r2 - 8001eb4: 005b lsls r3, r3, #1 - 8001eb6: 4413 add r3, r2 - 8001eb8: 3b3c subs r3, #60 @ 0x3c - 8001eba: 2207 movs r2, #7 - 8001ebc: fa02 f303 lsl.w r3, r2, r3 - 8001ec0: 43db mvns r3, r3 - 8001ec2: 4019 ands r1, r3 - 8001ec4: 683b ldr r3, [r7, #0] - 8001ec6: 6898 ldr r0, [r3, #8] - 8001ec8: 683b ldr r3, [r7, #0] - 8001eca: 681a ldr r2, [r3, #0] - 8001ecc: 4613 mov r3, r2 - 8001ece: 005b lsls r3, r3, #1 - 8001ed0: 4413 add r3, r2 - 8001ed2: 3b3c subs r3, #60 @ 0x3c - 8001ed4: fa00 f203 lsl.w r2, r0, r3 - 8001ed8: 687b ldr r3, [r7, #4] - 8001eda: 681b ldr r3, [r3, #0] - 8001edc: 430a orrs r2, r1 - 8001ede: 60da str r2, [r3, #12] - 8001ee0: e01b b.n 8001f1a + 8002200: 687b ldr r3, [r7, #4] + 8002202: 681b ldr r3, [r3, #0] + 8002204: 68d9 ldr r1, [r3, #12] + 8002206: 683b ldr r3, [r7, #0] + 8002208: 681a ldr r2, [r3, #0] + 800220a: 4613 mov r3, r2 + 800220c: 005b lsls r3, r3, #1 + 800220e: 4413 add r3, r2 + 8002210: 3b3c subs r3, #60 @ 0x3c + 8002212: 2207 movs r2, #7 + 8002214: fa02 f303 lsl.w r3, r2, r3 + 8002218: 43db mvns r3, r3 + 800221a: 4019 ands r1, r3 + 800221c: 683b ldr r3, [r7, #0] + 800221e: 6898 ldr r0, [r3, #8] + 8002220: 683b ldr r3, [r7, #0] + 8002222: 681a ldr r2, [r3, #0] + 8002224: 4613 mov r3, r2 + 8002226: 005b lsls r3, r3, #1 + 8002228: 4413 add r3, r2 + 800222a: 3b3c subs r3, #60 @ 0x3c + 800222c: fa00 f203 lsl.w r2, r0, r3 + 8002230: 687b ldr r3, [r7, #4] + 8002232: 681b ldr r3, [r3, #0] + 8002234: 430a orrs r2, r1 + 8002236: 60da str r2, [r3, #12] + 8002238: e01b b.n 8002272 ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } /* For channels 30 to 31 for devices Cat4, Cat.5 */ else { ADC_SMPR0_CHANNEL_SET(hadc, sConfig->SamplingTime, sConfig->Channel); - 8001ee2: 687b ldr r3, [r7, #4] - 8001ee4: 681b ldr r3, [r3, #0] - 8001ee6: 6dd9 ldr r1, [r3, #92] @ 0x5c - 8001ee8: 683b ldr r3, [r7, #0] - 8001eea: 681a ldr r2, [r3, #0] - 8001eec: 4613 mov r3, r2 - 8001eee: 005b lsls r3, r3, #1 - 8001ef0: 4413 add r3, r2 - 8001ef2: 3b5a subs r3, #90 @ 0x5a - 8001ef4: 2207 movs r2, #7 - 8001ef6: fa02 f303 lsl.w r3, r2, r3 - 8001efa: 43db mvns r3, r3 - 8001efc: 4019 ands r1, r3 - 8001efe: 683b ldr r3, [r7, #0] - 8001f00: 6898 ldr r0, [r3, #8] - 8001f02: 683b ldr r3, [r7, #0] - 8001f04: 681a ldr r2, [r3, #0] - 8001f06: 4613 mov r3, r2 - 8001f08: 005b lsls r3, r3, #1 - 8001f0a: 4413 add r3, r2 - 8001f0c: 3b5a subs r3, #90 @ 0x5a - 8001f0e: fa00 f203 lsl.w r2, r0, r3 - 8001f12: 687b ldr r3, [r7, #4] - 8001f14: 681b ldr r3, [r3, #0] - 8001f16: 430a orrs r2, r1 - 8001f18: 65da str r2, [r3, #92] @ 0x5c + 800223a: 687b ldr r3, [r7, #4] + 800223c: 681b ldr r3, [r3, #0] + 800223e: 6dd9 ldr r1, [r3, #92] @ 0x5c + 8002240: 683b ldr r3, [r7, #0] + 8002242: 681a ldr r2, [r3, #0] + 8002244: 4613 mov r3, r2 + 8002246: 005b lsls r3, r3, #1 + 8002248: 4413 add r3, r2 + 800224a: 3b5a subs r3, #90 @ 0x5a + 800224c: 2207 movs r2, #7 + 800224e: fa02 f303 lsl.w r3, r2, r3 + 8002252: 43db mvns r3, r3 + 8002254: 4019 ands r1, r3 + 8002256: 683b ldr r3, [r7, #0] + 8002258: 6898 ldr r0, [r3, #8] + 800225a: 683b ldr r3, [r7, #0] + 800225c: 681a ldr r2, [r3, #0] + 800225e: 4613 mov r3, r2 + 8002260: 005b lsls r3, r3, #1 + 8002262: 4413 add r3, r2 + 8002264: 3b5a subs r3, #90 @ 0x5a + 8002266: fa00 f203 lsl.w r2, r0, r3 + 800226a: 687b ldr r3, [r7, #4] + 800226c: 681b ldr r3, [r3, #0] + 800226e: 430a orrs r2, r1 + 8002270: 65da str r2, [r3, #92] @ 0x5c } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8001f1a: 683b ldr r3, [r7, #0] - 8001f1c: 681b ldr r3, [r3, #0] - 8001f1e: 2b10 cmp r3, #16 - 8001f20: d003 beq.n 8001f2a + 8002272: 683b ldr r3, [r7, #0] + 8002274: 681b ldr r3, [r3, #0] + 8002276: 2b10 cmp r3, #16 + 8002278: d003 beq.n 8002282 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8001f22: 683b ldr r3, [r7, #0] - 8001f24: 681b ldr r3, [r3, #0] + 800227a: 683b ldr r3, [r7, #0] + 800227c: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8001f26: 2b11 cmp r3, #17 - 8001f28: d121 bne.n 8001f6e + 800227e: 2b11 cmp r3, #17 + 8002280: d121 bne.n 80022c6 { if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET) - 8001f2a: 4b16 ldr r3, [pc, #88] @ (8001f84 ) - 8001f2c: 685b ldr r3, [r3, #4] - 8001f2e: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 8001f32: 2b00 cmp r3, #0 - 8001f34: d11b bne.n 8001f6e + 8002282: 4b16 ldr r3, [pc, #88] @ (80022dc ) + 8002284: 685b ldr r3, [r3, #4] + 8002286: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 800228a: 2b00 cmp r3, #0 + 800228c: d11b bne.n 80022c6 { SET_BIT(ADC->CCR, ADC_CCR_TSVREFE); - 8001f36: 4b13 ldr r3, [pc, #76] @ (8001f84 ) - 8001f38: 685b ldr r3, [r3, #4] - 8001f3a: 4a12 ldr r2, [pc, #72] @ (8001f84 ) - 8001f3c: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 - 8001f40: 6053 str r3, [r2, #4] + 800228e: 4b13 ldr r3, [pc, #76] @ (80022dc ) + 8002290: 685b ldr r3, [r3, #4] + 8002292: 4a12 ldr r2, [pc, #72] @ (80022dc ) + 8002294: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 + 8002298: 6053 str r3, [r2, #4] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8001f42: 683b ldr r3, [r7, #0] - 8001f44: 681b ldr r3, [r3, #0] - 8001f46: 2b10 cmp r3, #16 - 8001f48: d111 bne.n 8001f6e + 800229a: 683b ldr r3, [r7, #0] + 800229c: 681b ldr r3, [r3, #0] + 800229e: 2b10 cmp r3, #16 + 80022a0: d111 bne.n 80022c6 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000)); - 8001f4a: 4b0f ldr r3, [pc, #60] @ (8001f88 ) - 8001f4c: 681b ldr r3, [r3, #0] - 8001f4e: 4a0f ldr r2, [pc, #60] @ (8001f8c ) - 8001f50: fba2 2303 umull r2, r3, r2, r3 - 8001f54: 0c9a lsrs r2, r3, #18 - 8001f56: 4613 mov r3, r2 - 8001f58: 009b lsls r3, r3, #2 - 8001f5a: 4413 add r3, r2 - 8001f5c: 005b lsls r3, r3, #1 - 8001f5e: 60bb str r3, [r7, #8] + 80022a2: 4b0f ldr r3, [pc, #60] @ (80022e0 ) + 80022a4: 681b ldr r3, [r3, #0] + 80022a6: 4a0f ldr r2, [pc, #60] @ (80022e4 ) + 80022a8: fba2 2303 umull r2, r3, r2, r3 + 80022ac: 0c9a lsrs r2, r3, #18 + 80022ae: 4613 mov r3, r2 + 80022b0: 009b lsls r3, r3, #2 + 80022b2: 4413 add r3, r2 + 80022b4: 005b lsls r3, r3, #1 + 80022b6: 60bb str r3, [r7, #8] while(wait_loop_index != 0) - 8001f60: e002 b.n 8001f68 + 80022b8: e002 b.n 80022c0 { wait_loop_index--; - 8001f62: 68bb ldr r3, [r7, #8] - 8001f64: 3b01 subs r3, #1 - 8001f66: 60bb str r3, [r7, #8] + 80022ba: 68bb ldr r3, [r7, #8] + 80022bc: 3b01 subs r3, #1 + 80022be: 60bb str r3, [r7, #8] while(wait_loop_index != 0) - 8001f68: 68bb ldr r3, [r7, #8] - 8001f6a: 2b00 cmp r3, #0 - 8001f6c: d1f9 bne.n 8001f62 + 80022c0: 68bb ldr r3, [r7, #8] + 80022c2: 2b00 cmp r3, #0 + 80022c4: d1f9 bne.n 80022ba } } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8001f6e: 687b ldr r3, [r7, #4] - 8001f70: 2200 movs r2, #0 - 8001f72: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 80022c6: 687b ldr r3, [r7, #4] + 80022c8: 2200 movs r2, #0 + 80022ca: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Return function status */ return tmp_hal_status; - 8001f76: 7bfb ldrb r3, [r7, #15] + 80022ce: 7bfb ldrb r3, [r7, #15] } - 8001f78: 4618 mov r0, r3 - 8001f7a: 3714 adds r7, #20 - 8001f7c: 46bd mov sp, r7 - 8001f7e: bc80 pop {r7} - 8001f80: 4770 bx lr - 8001f82: bf00 nop - 8001f84: 40012700 .word 0x40012700 - 8001f88: 20000000 .word 0x20000000 - 8001f8c: 431bde83 .word 0x431bde83 + 80022d0: 4618 mov r0, r3 + 80022d2: 3714 adds r7, #20 + 80022d4: 46bd mov sp, r7 + 80022d6: bc80 pop {r7} + 80022d8: 4770 bx lr + 80022da: bf00 nop + 80022dc: 40012700 .word 0x40012700 + 80022e0: 20000000 .word 0x20000000 + 80022e4: 431bde83 .word 0x431bde83 -08001f90 : +080022e8 : * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { - 8001f90: b580 push {r7, lr} - 8001f92: b084 sub sp, #16 - 8001f94: af00 add r7, sp, #0 - 8001f96: 6078 str r0, [r7, #4] + 80022e8: b580 push {r7, lr} + 80022ea: b084 sub sp, #16 + 80022ec: af00 add r7, sp, #0 + 80022ee: 6078 str r0, [r7, #4] uint32_t tickstart = 0; - 8001f98: 2300 movs r3, #0 - 8001f9a: 60fb str r3, [r7, #12] + 80022f0: 2300 movs r3, #0 + 80022f2: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0; - 8001f9c: 2300 movs r3, #0 - 8001f9e: 60bb str r3, [r7, #8] + 80022f4: 2300 movs r3, #0 + 80022f6: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) - 8001fa0: 687b ldr r3, [r7, #4] - 8001fa2: 681b ldr r3, [r3, #0] - 8001fa4: 681b ldr r3, [r3, #0] - 8001fa6: f003 0340 and.w r3, r3, #64 @ 0x40 - 8001faa: 2b40 cmp r3, #64 @ 0x40 - 8001fac: d043 beq.n 8002036 + 80022f8: 687b ldr r3, [r7, #4] + 80022fa: 681b ldr r3, [r3, #0] + 80022fc: 681b ldr r3, [r3, #0] + 80022fe: f003 0340 and.w r3, r3, #64 @ 0x40 + 8002302: 2b40 cmp r3, #64 @ 0x40 + 8002304: d043 beq.n 800238e { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); - 8001fae: 687b ldr r3, [r7, #4] - 8001fb0: 681b ldr r3, [r3, #0] - 8001fb2: 689a ldr r2, [r3, #8] - 8001fb4: 687b ldr r3, [r7, #4] - 8001fb6: 681b ldr r3, [r3, #0] - 8001fb8: f042 0201 orr.w r2, r2, #1 - 8001fbc: 609a str r2, [r3, #8] + 8002306: 687b ldr r3, [r7, #4] + 8002308: 681b ldr r3, [r3, #0] + 800230a: 689a ldr r2, [r3, #8] + 800230c: 687b ldr r3, [r7, #4] + 800230e: 681b ldr r3, [r3, #0] + 8002310: f042 0201 orr.w r2, r2, #1 + 8002314: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); - 8001fbe: 4b20 ldr r3, [pc, #128] @ (8002040 ) - 8001fc0: 681b ldr r3, [r3, #0] - 8001fc2: 4a20 ldr r2, [pc, #128] @ (8002044 ) - 8001fc4: fba2 2303 umull r2, r3, r2, r3 - 8001fc8: 0c9a lsrs r2, r3, #18 - 8001fca: 4613 mov r3, r2 - 8001fcc: 005b lsls r3, r3, #1 - 8001fce: 4413 add r3, r2 - 8001fd0: 60bb str r3, [r7, #8] + 8002316: 4b20 ldr r3, [pc, #128] @ (8002398 ) + 8002318: 681b ldr r3, [r3, #0] + 800231a: 4a20 ldr r2, [pc, #128] @ (800239c ) + 800231c: fba2 2303 umull r2, r3, r2, r3 + 8002320: 0c9a lsrs r2, r3, #18 + 8002322: 4613 mov r3, r2 + 8002324: 005b lsls r3, r3, #1 + 8002326: 4413 add r3, r2 + 8002328: 60bb str r3, [r7, #8] while(wait_loop_index != 0) - 8001fd2: e002 b.n 8001fda + 800232a: e002 b.n 8002332 { wait_loop_index--; - 8001fd4: 68bb ldr r3, [r7, #8] - 8001fd6: 3b01 subs r3, #1 - 8001fd8: 60bb str r3, [r7, #8] + 800232c: 68bb ldr r3, [r7, #8] + 800232e: 3b01 subs r3, #1 + 8002330: 60bb str r3, [r7, #8] while(wait_loop_index != 0) - 8001fda: 68bb ldr r3, [r7, #8] - 8001fdc: 2b00 cmp r3, #0 - 8001fde: d1f9 bne.n 8001fd4 + 8002332: 68bb ldr r3, [r7, #8] + 8002334: 2b00 cmp r3, #0 + 8002336: d1f9 bne.n 800232c } /* Get tick count */ tickstart = HAL_GetTick(); - 8001fe0: f7ff fabe bl 8001560 - 8001fe4: 60f8 str r0, [r7, #12] + 8002338: f7ff fbd0 bl 8001adc + 800233c: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) - 8001fe6: e01f b.n 8002028 + 800233e: e01f b.n 8002380 { if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT) - 8001fe8: f7ff faba bl 8001560 - 8001fec: 4602 mov r2, r0 - 8001fee: 68fb ldr r3, [r7, #12] - 8001ff0: 1ad3 subs r3, r2, r3 - 8001ff2: 2b02 cmp r3, #2 - 8001ff4: d918 bls.n 8002028 + 8002340: f7ff fbcc bl 8001adc + 8002344: 4602 mov r2, r0 + 8002346: 68fb ldr r3, [r7, #12] + 8002348: 1ad3 subs r3, r2, r3 + 800234a: 2b02 cmp r3, #2 + 800234c: d918 bls.n 8002380 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) - 8001ff6: 687b ldr r3, [r7, #4] - 8001ff8: 681b ldr r3, [r3, #0] - 8001ffa: 681b ldr r3, [r3, #0] - 8001ffc: f003 0340 and.w r3, r3, #64 @ 0x40 - 8002000: 2b40 cmp r3, #64 @ 0x40 - 8002002: d011 beq.n 8002028 + 800234e: 687b ldr r3, [r7, #4] + 8002350: 681b ldr r3, [r3, #0] + 8002352: 681b ldr r3, [r3, #0] + 8002354: f003 0340 and.w r3, r3, #64 @ 0x40 + 8002358: 2b40 cmp r3, #64 @ 0x40 + 800235a: d011 beq.n 8002380 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002004: 687b ldr r3, [r7, #4] - 8002006: 6cdb ldr r3, [r3, #76] @ 0x4c - 8002008: f043 0210 orr.w r2, r3, #16 - 800200c: 687b ldr r3, [r7, #4] - 800200e: 64da str r2, [r3, #76] @ 0x4c + 800235c: 687b ldr r3, [r7, #4] + 800235e: 6cdb ldr r3, [r3, #76] @ 0x4c + 8002360: f043 0210 orr.w r2, r3, #16 + 8002364: 687b ldr r3, [r7, #4] + 8002366: 64da str r2, [r3, #76] @ 0x4c /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002010: 687b ldr r3, [r7, #4] - 8002012: 6d1b ldr r3, [r3, #80] @ 0x50 - 8002014: f043 0201 orr.w r2, r3, #1 - 8002018: 687b ldr r3, [r7, #4] - 800201a: 651a str r2, [r3, #80] @ 0x50 + 8002368: 687b ldr r3, [r7, #4] + 800236a: 6d1b ldr r3, [r3, #80] @ 0x50 + 800236c: f043 0201 orr.w r2, r3, #1 + 8002370: 687b ldr r3, [r7, #4] + 8002372: 651a str r2, [r3, #80] @ 0x50 /* Process unlocked */ __HAL_UNLOCK(hadc); - 800201c: 687b ldr r3, [r7, #4] - 800201e: 2200 movs r2, #0 - 8002020: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8002374: 687b ldr r3, [r7, #4] + 8002376: 2200 movs r2, #0 + 8002378: f883 2048 strb.w r2, [r3, #72] @ 0x48 return HAL_ERROR; - 8002024: 2301 movs r3, #1 - 8002026: e007 b.n 8002038 + 800237c: 2301 movs r3, #1 + 800237e: e007 b.n 8002390 while(ADC_IS_ENABLE(hadc) == RESET) - 8002028: 687b ldr r3, [r7, #4] - 800202a: 681b ldr r3, [r3, #0] - 800202c: 681b ldr r3, [r3, #0] - 800202e: f003 0340 and.w r3, r3, #64 @ 0x40 - 8002032: 2b40 cmp r3, #64 @ 0x40 - 8002034: d1d8 bne.n 8001fe8 + 8002380: 687b ldr r3, [r7, #4] + 8002382: 681b ldr r3, [r3, #0] + 8002384: 681b ldr r3, [r3, #0] + 8002386: f003 0340 and.w r3, r3, #64 @ 0x40 + 800238a: 2b40 cmp r3, #64 @ 0x40 + 800238c: d1d8 bne.n 8002340 } } } /* Return HAL status */ return HAL_OK; - 8002036: 2300 movs r3, #0 + 800238e: 2300 movs r3, #0 } - 8002038: 4618 mov r0, r3 - 800203a: 3710 adds r7, #16 - 800203c: 46bd mov sp, r7 - 800203e: bd80 pop {r7, pc} - 8002040: 20000000 .word 0x20000000 - 8002044: 431bde83 .word 0x431bde83 + 8002390: 4618 mov r0, r3 + 8002392: 3710 adds r7, #16 + 8002394: 46bd mov sp, r7 + 8002396: bd80 pop {r7, pc} + 8002398: 20000000 .word 0x20000000 + 800239c: 431bde83 .word 0x431bde83 -08002048 : +080023a0 : * stopped to disable the ADC. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 8002048: b580 push {r7, lr} - 800204a: b084 sub sp, #16 - 800204c: af00 add r7, sp, #0 - 800204e: 6078 str r0, [r7, #4] + 80023a0: b580 push {r7, lr} + 80023a2: b084 sub sp, #16 + 80023a4: af00 add r7, sp, #0 + 80023a6: 6078 str r0, [r7, #4] uint32_t tickstart = 0; - 8002050: 2300 movs r3, #0 - 8002052: 60fb str r3, [r7, #12] + 80023a8: 2300 movs r3, #0 + 80023aa: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 8002054: 687b ldr r3, [r7, #4] - 8002056: 681b ldr r3, [r3, #0] - 8002058: 681b ldr r3, [r3, #0] - 800205a: f003 0340 and.w r3, r3, #64 @ 0x40 - 800205e: 2b40 cmp r3, #64 @ 0x40 - 8002060: d12e bne.n 80020c0 + 80023ac: 687b ldr r3, [r7, #4] + 80023ae: 681b ldr r3, [r3, #0] + 80023b0: 681b ldr r3, [r3, #0] + 80023b2: f003 0340 and.w r3, r3, #64 @ 0x40 + 80023b6: 2b40 cmp r3, #64 @ 0x40 + 80023b8: d12e bne.n 8002418 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 8002062: 687b ldr r3, [r7, #4] - 8002064: 681b ldr r3, [r3, #0] - 8002066: 689a ldr r2, [r3, #8] - 8002068: 687b ldr r3, [r7, #4] - 800206a: 681b ldr r3, [r3, #0] - 800206c: f022 0201 bic.w r2, r2, #1 - 8002070: 609a str r2, [r3, #8] + 80023ba: 687b ldr r3, [r7, #4] + 80023bc: 681b ldr r3, [r3, #0] + 80023be: 689a ldr r2, [r3, #8] + 80023c0: 687b ldr r3, [r7, #4] + 80023c2: 681b ldr r3, [r3, #0] + 80023c4: f022 0201 bic.w r2, r2, #1 + 80023c8: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 8002072: f7ff fa75 bl 8001560 - 8002076: 60f8 str r0, [r7, #12] + 80023ca: f7ff fb87 bl 8001adc + 80023ce: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8002078: e01b b.n 80020b2 + 80023d0: e01b b.n 800240a { if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT) - 800207a: f7ff fa71 bl 8001560 - 800207e: 4602 mov r2, r0 - 8002080: 68fb ldr r3, [r7, #12] - 8002082: 1ad3 subs r3, r2, r3 - 8002084: 2b02 cmp r3, #2 - 8002086: d914 bls.n 80020b2 + 80023d2: f7ff fb83 bl 8001adc + 80023d6: 4602 mov r2, r0 + 80023d8: 68fb ldr r3, [r7, #12] + 80023da: 1ad3 subs r3, r2, r3 + 80023dc: 2b02 cmp r3, #2 + 80023de: d914 bls.n 800240a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 8002088: 687b ldr r3, [r7, #4] - 800208a: 681b ldr r3, [r3, #0] - 800208c: 681b ldr r3, [r3, #0] - 800208e: f003 0340 and.w r3, r3, #64 @ 0x40 - 8002092: 2b40 cmp r3, #64 @ 0x40 - 8002094: d10d bne.n 80020b2 + 80023e0: 687b ldr r3, [r7, #4] + 80023e2: 681b ldr r3, [r3, #0] + 80023e4: 681b ldr r3, [r3, #0] + 80023e6: f003 0340 and.w r3, r3, #64 @ 0x40 + 80023ea: 2b40 cmp r3, #64 @ 0x40 + 80023ec: d10d bne.n 800240a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002096: 687b ldr r3, [r7, #4] - 8002098: 6cdb ldr r3, [r3, #76] @ 0x4c - 800209a: f043 0210 orr.w r2, r3, #16 - 800209e: 687b ldr r3, [r7, #4] - 80020a0: 64da str r2, [r3, #76] @ 0x4c + 80023ee: 687b ldr r3, [r7, #4] + 80023f0: 6cdb ldr r3, [r3, #76] @ 0x4c + 80023f2: f043 0210 orr.w r2, r3, #16 + 80023f6: 687b ldr r3, [r7, #4] + 80023f8: 64da str r2, [r3, #76] @ 0x4c /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80020a2: 687b ldr r3, [r7, #4] - 80020a4: 6d1b ldr r3, [r3, #80] @ 0x50 - 80020a6: f043 0201 orr.w r2, r3, #1 - 80020aa: 687b ldr r3, [r7, #4] - 80020ac: 651a str r2, [r3, #80] @ 0x50 + 80023fa: 687b ldr r3, [r7, #4] + 80023fc: 6d1b ldr r3, [r3, #80] @ 0x50 + 80023fe: f043 0201 orr.w r2, r3, #1 + 8002402: 687b ldr r3, [r7, #4] + 8002404: 651a str r2, [r3, #80] @ 0x50 return HAL_ERROR; - 80020ae: 2301 movs r3, #1 - 80020b0: e007 b.n 80020c2 + 8002406: 2301 movs r3, #1 + 8002408: e007 b.n 800241a while(ADC_IS_ENABLE(hadc) != RESET) - 80020b2: 687b ldr r3, [r7, #4] - 80020b4: 681b ldr r3, [r3, #0] - 80020b6: 681b ldr r3, [r3, #0] - 80020b8: f003 0340 and.w r3, r3, #64 @ 0x40 - 80020bc: 2b40 cmp r3, #64 @ 0x40 - 80020be: d0dc beq.n 800207a + 800240a: 687b ldr r3, [r7, #4] + 800240c: 681b ldr r3, [r3, #0] + 800240e: 681b ldr r3, [r3, #0] + 8002410: f003 0340 and.w r3, r3, #64 @ 0x40 + 8002414: 2b40 cmp r3, #64 @ 0x40 + 8002416: d0dc beq.n 80023d2 } } } /* Return HAL status */ return HAL_OK; - 80020c0: 2300 movs r3, #0 + 8002418: 2300 movs r3, #0 } - 80020c2: 4618 mov r0, r3 - 80020c4: 3710 adds r7, #16 - 80020c6: 46bd mov sp, r7 - 80020c8: bd80 pop {r7, pc} + 800241a: 4618 mov r0, r3 + 800241c: 3710 adds r7, #16 + 800241e: 46bd mov sp, r7 + 8002420: bd80 pop {r7, pc} + ... -080020ca : - * @brief Injected conversion complete callback in non blocking mode - * @param hadc ADC handle - * @retval None - */ -__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - 80020ca: b480 push {r7} - 80020cc: b083 sub sp, #12 - 80020ce: af00 add r7, sp, #0 - 80020d0: 6078 str r0, [r7, #4] - UNUSED(hadc); - - /* NOTE : This function Should not be modified, when the callback is needed, - the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file - */ -} - 80020d2: bf00 nop - 80020d4: 370c adds r7, #12 - 80020d6: 46bd mov sp, r7 - 80020d8: bc80 pop {r7} - 80020da: 4770 bx lr - -080020dc <__NVIC_SetPriorityGrouping>: +08002424 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 80020dc: b480 push {r7} - 80020de: b085 sub sp, #20 - 80020e0: af00 add r7, sp, #0 - 80020e2: 6078 str r0, [r7, #4] + 8002424: b480 push {r7} + 8002426: b085 sub sp, #20 + 8002428: af00 add r7, sp, #0 + 800242a: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80020e4: 687b ldr r3, [r7, #4] - 80020e6: f003 0307 and.w r3, r3, #7 - 80020ea: 60fb str r3, [r7, #12] + 800242c: 687b ldr r3, [r7, #4] + 800242e: f003 0307 and.w r3, r3, #7 + 8002432: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 80020ec: 4b0c ldr r3, [pc, #48] @ (8002120 <__NVIC_SetPriorityGrouping+0x44>) - 80020ee: 68db ldr r3, [r3, #12] - 80020f0: 60bb str r3, [r7, #8] + 8002434: 4b0c ldr r3, [pc, #48] @ (8002468 <__NVIC_SetPriorityGrouping+0x44>) + 8002436: 68db ldr r3, [r3, #12] + 8002438: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 80020f2: 68ba ldr r2, [r7, #8] - 80020f4: f64f 03ff movw r3, #63743 @ 0xf8ff - 80020f8: 4013 ands r3, r2 - 80020fa: 60bb str r3, [r7, #8] + 800243a: 68ba ldr r2, [r7, #8] + 800243c: f64f 03ff movw r3, #63743 @ 0xf8ff + 8002440: 4013 ands r3, r2 + 8002442: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 80020fc: 68fb ldr r3, [r7, #12] - 80020fe: 021a lsls r2, r3, #8 + 8002444: 68fb ldr r3, [r7, #12] + 8002446: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8002100: 68bb ldr r3, [r7, #8] - 8002102: 4313 orrs r3, r2 + 8002448: 68bb ldr r3, [r7, #8] + 800244a: 4313 orrs r3, r2 reg_value = (reg_value | - 8002104: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8002108: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 800210c: 60bb str r3, [r7, #8] + 800244c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8002450: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8002454: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 800210e: 4a04 ldr r2, [pc, #16] @ (8002120 <__NVIC_SetPriorityGrouping+0x44>) - 8002110: 68bb ldr r3, [r7, #8] - 8002112: 60d3 str r3, [r2, #12] + 8002456: 4a04 ldr r2, [pc, #16] @ (8002468 <__NVIC_SetPriorityGrouping+0x44>) + 8002458: 68bb ldr r3, [r7, #8] + 800245a: 60d3 str r3, [r2, #12] } - 8002114: bf00 nop - 8002116: 3714 adds r7, #20 - 8002118: 46bd mov sp, r7 - 800211a: bc80 pop {r7} - 800211c: 4770 bx lr - 800211e: bf00 nop - 8002120: e000ed00 .word 0xe000ed00 + 800245c: bf00 nop + 800245e: 3714 adds r7, #20 + 8002460: 46bd mov sp, r7 + 8002462: bc80 pop {r7} + 8002464: 4770 bx lr + 8002466: bf00 nop + 8002468: e000ed00 .word 0xe000ed00 -08002124 <__NVIC_GetPriorityGrouping>: +0800246c <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8002124: b480 push {r7} - 8002126: af00 add r7, sp, #0 + 800246c: b480 push {r7} + 800246e: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8002128: 4b04 ldr r3, [pc, #16] @ (800213c <__NVIC_GetPriorityGrouping+0x18>) - 800212a: 68db ldr r3, [r3, #12] - 800212c: 0a1b lsrs r3, r3, #8 - 800212e: f003 0307 and.w r3, r3, #7 + 8002470: 4b04 ldr r3, [pc, #16] @ (8002484 <__NVIC_GetPriorityGrouping+0x18>) + 8002472: 68db ldr r3, [r3, #12] + 8002474: 0a1b lsrs r3, r3, #8 + 8002476: f003 0307 and.w r3, r3, #7 } - 8002132: 4618 mov r0, r3 - 8002134: 46bd mov sp, r7 - 8002136: bc80 pop {r7} - 8002138: 4770 bx lr - 800213a: bf00 nop - 800213c: e000ed00 .word 0xe000ed00 + 800247a: 4618 mov r0, r3 + 800247c: 46bd mov sp, r7 + 800247e: bc80 pop {r7} + 8002480: 4770 bx lr + 8002482: bf00 nop + 8002484: e000ed00 .word 0xe000ed00 -08002140 <__NVIC_EnableIRQ>: - \details Enables a device specific interrupt in the NVIC interrupt controller. - \param [in] IRQn Device specific interrupt number. - \note IRQn must not be negative. - */ -__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 8002140: b480 push {r7} - 8002142: b083 sub sp, #12 - 8002144: af00 add r7, sp, #0 - 8002146: 4603 mov r3, r0 - 8002148: 71fb strb r3, [r7, #7] - if ((int32_t)(IRQn) >= 0) - 800214a: f997 3007 ldrsb.w r3, [r7, #7] - 800214e: 2b00 cmp r3, #0 - 8002150: db0b blt.n 800216a <__NVIC_EnableIRQ+0x2a> - { - NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8002152: 79fb ldrb r3, [r7, #7] - 8002154: f003 021f and.w r2, r3, #31 - 8002158: 4906 ldr r1, [pc, #24] @ (8002174 <__NVIC_EnableIRQ+0x34>) - 800215a: f997 3007 ldrsb.w r3, [r7, #7] - 800215e: 095b lsrs r3, r3, #5 - 8002160: 2001 movs r0, #1 - 8002162: fa00 f202 lsl.w r2, r0, r2 - 8002166: f841 2023 str.w r2, [r1, r3, lsl #2] - } -} - 800216a: bf00 nop - 800216c: 370c adds r7, #12 - 800216e: 46bd mov sp, r7 - 8002170: bc80 pop {r7} - 8002172: 4770 bx lr - 8002174: e000e100 .word 0xe000e100 - -08002178 <__NVIC_SetPriority>: +08002488 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8002178: b480 push {r7} - 800217a: b083 sub sp, #12 - 800217c: af00 add r7, sp, #0 - 800217e: 4603 mov r3, r0 - 8002180: 6039 str r1, [r7, #0] - 8002182: 71fb strb r3, [r7, #7] + 8002488: b480 push {r7} + 800248a: b083 sub sp, #12 + 800248c: af00 add r7, sp, #0 + 800248e: 4603 mov r3, r0 + 8002490: 6039 str r1, [r7, #0] + 8002492: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002184: f997 3007 ldrsb.w r3, [r7, #7] - 8002188: 2b00 cmp r3, #0 - 800218a: db0a blt.n 80021a2 <__NVIC_SetPriority+0x2a> + 8002494: f997 3007 ldrsb.w r3, [r7, #7] + 8002498: 2b00 cmp r3, #0 + 800249a: db0a blt.n 80024b2 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 800218c: 683b ldr r3, [r7, #0] - 800218e: b2da uxtb r2, r3 - 8002190: 490c ldr r1, [pc, #48] @ (80021c4 <__NVIC_SetPriority+0x4c>) - 8002192: f997 3007 ldrsb.w r3, [r7, #7] - 8002196: 0112 lsls r2, r2, #4 - 8002198: b2d2 uxtb r2, r2 - 800219a: 440b add r3, r1 - 800219c: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 800249c: 683b ldr r3, [r7, #0] + 800249e: b2da uxtb r2, r3 + 80024a0: 490c ldr r1, [pc, #48] @ (80024d4 <__NVIC_SetPriority+0x4c>) + 80024a2: f997 3007 ldrsb.w r3, [r7, #7] + 80024a6: 0112 lsls r2, r2, #4 + 80024a8: b2d2 uxtb r2, r2 + 80024aa: 440b add r3, r1 + 80024ac: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 80021a0: e00a b.n 80021b8 <__NVIC_SetPriority+0x40> + 80024b0: e00a b.n 80024c8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80021a2: 683b ldr r3, [r7, #0] - 80021a4: b2da uxtb r2, r3 - 80021a6: 4908 ldr r1, [pc, #32] @ (80021c8 <__NVIC_SetPriority+0x50>) - 80021a8: 79fb ldrb r3, [r7, #7] - 80021aa: f003 030f and.w r3, r3, #15 - 80021ae: 3b04 subs r3, #4 - 80021b0: 0112 lsls r2, r2, #4 - 80021b2: b2d2 uxtb r2, r2 - 80021b4: 440b add r3, r1 - 80021b6: 761a strb r2, [r3, #24] + 80024b2: 683b ldr r3, [r7, #0] + 80024b4: b2da uxtb r2, r3 + 80024b6: 4908 ldr r1, [pc, #32] @ (80024d8 <__NVIC_SetPriority+0x50>) + 80024b8: 79fb ldrb r3, [r7, #7] + 80024ba: f003 030f and.w r3, r3, #15 + 80024be: 3b04 subs r3, #4 + 80024c0: 0112 lsls r2, r2, #4 + 80024c2: b2d2 uxtb r2, r2 + 80024c4: 440b add r3, r1 + 80024c6: 761a strb r2, [r3, #24] } - 80021b8: bf00 nop - 80021ba: 370c adds r7, #12 - 80021bc: 46bd mov sp, r7 - 80021be: bc80 pop {r7} - 80021c0: 4770 bx lr - 80021c2: bf00 nop - 80021c4: e000e100 .word 0xe000e100 - 80021c8: e000ed00 .word 0xe000ed00 + 80024c8: bf00 nop + 80024ca: 370c adds r7, #12 + 80024cc: 46bd mov sp, r7 + 80024ce: bc80 pop {r7} + 80024d0: 4770 bx lr + 80024d2: bf00 nop + 80024d4: e000e100 .word 0xe000e100 + 80024d8: e000ed00 .word 0xe000ed00 -080021cc : +080024dc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 80021cc: b480 push {r7} - 80021ce: b089 sub sp, #36 @ 0x24 - 80021d0: af00 add r7, sp, #0 - 80021d2: 60f8 str r0, [r7, #12] - 80021d4: 60b9 str r1, [r7, #8] - 80021d6: 607a str r2, [r7, #4] + 80024dc: b480 push {r7} + 80024de: b089 sub sp, #36 @ 0x24 + 80024e0: af00 add r7, sp, #0 + 80024e2: 60f8 str r0, [r7, #12] + 80024e4: 60b9 str r1, [r7, #8] + 80024e6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80021d8: 68fb ldr r3, [r7, #12] - 80021da: f003 0307 and.w r3, r3, #7 - 80021de: 61fb str r3, [r7, #28] + 80024e8: 68fb ldr r3, [r7, #12] + 80024ea: f003 0307 and.w r3, r3, #7 + 80024ee: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 80021e0: 69fb ldr r3, [r7, #28] - 80021e2: f1c3 0307 rsb r3, r3, #7 - 80021e6: 2b04 cmp r3, #4 - 80021e8: bf28 it cs - 80021ea: 2304 movcs r3, #4 - 80021ec: 61bb str r3, [r7, #24] + 80024f0: 69fb ldr r3, [r7, #28] + 80024f2: f1c3 0307 rsb r3, r3, #7 + 80024f6: 2b04 cmp r3, #4 + 80024f8: bf28 it cs + 80024fa: 2304 movcs r3, #4 + 80024fc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 80021ee: 69fb ldr r3, [r7, #28] - 80021f0: 3304 adds r3, #4 - 80021f2: 2b06 cmp r3, #6 - 80021f4: d902 bls.n 80021fc - 80021f6: 69fb ldr r3, [r7, #28] - 80021f8: 3b03 subs r3, #3 - 80021fa: e000 b.n 80021fe - 80021fc: 2300 movs r3, #0 - 80021fe: 617b str r3, [r7, #20] + 80024fe: 69fb ldr r3, [r7, #28] + 8002500: 3304 adds r3, #4 + 8002502: 2b06 cmp r3, #6 + 8002504: d902 bls.n 800250c + 8002506: 69fb ldr r3, [r7, #28] + 8002508: 3b03 subs r3, #3 + 800250a: e000 b.n 800250e + 800250c: 2300 movs r3, #0 + 800250e: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002200: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff - 8002204: 69bb ldr r3, [r7, #24] - 8002206: fa02 f303 lsl.w r3, r2, r3 - 800220a: 43da mvns r2, r3 - 800220c: 68bb ldr r3, [r7, #8] - 800220e: 401a ands r2, r3 - 8002210: 697b ldr r3, [r7, #20] - 8002212: 409a lsls r2, r3 + 8002510: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff + 8002514: 69bb ldr r3, [r7, #24] + 8002516: fa02 f303 lsl.w r3, r2, r3 + 800251a: 43da mvns r2, r3 + 800251c: 68bb ldr r3, [r7, #8] + 800251e: 401a ands r2, r3 + 8002520: 697b ldr r3, [r7, #20] + 8002522: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8002214: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff - 8002218: 697b ldr r3, [r7, #20] - 800221a: fa01 f303 lsl.w r3, r1, r3 - 800221e: 43d9 mvns r1, r3 - 8002220: 687b ldr r3, [r7, #4] - 8002222: 400b ands r3, r1 + 8002524: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff + 8002528: 697b ldr r3, [r7, #20] + 800252a: fa01 f303 lsl.w r3, r1, r3 + 800252e: 43d9 mvns r1, r3 + 8002530: 687b ldr r3, [r7, #4] + 8002532: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002224: 4313 orrs r3, r2 + 8002534: 4313 orrs r3, r2 ); } - 8002226: 4618 mov r0, r3 - 8002228: 3724 adds r7, #36 @ 0x24 - 800222a: 46bd mov sp, r7 - 800222c: bc80 pop {r7} - 800222e: 4770 bx lr + 8002536: 4618 mov r0, r3 + 8002538: 3724 adds r7, #36 @ 0x24 + 800253a: 46bd mov sp, r7 + 800253c: bc80 pop {r7} + 800253e: 4770 bx lr -08002230 : +08002540 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8002230: b580 push {r7, lr} - 8002232: b082 sub sp, #8 - 8002234: af00 add r7, sp, #0 - 8002236: 6078 str r0, [r7, #4] + 8002540: b580 push {r7, lr} + 8002542: b082 sub sp, #8 + 8002544: af00 add r7, sp, #0 + 8002546: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002238: 687b ldr r3, [r7, #4] - 800223a: 3b01 subs r3, #1 - 800223c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8002240: d301 bcc.n 8002246 + 8002548: 687b ldr r3, [r7, #4] + 800254a: 3b01 subs r3, #1 + 800254c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8002550: d301 bcc.n 8002556 { return (1UL); /* Reload value impossible */ - 8002242: 2301 movs r3, #1 - 8002244: e00f b.n 8002266 + 8002552: 2301 movs r3, #1 + 8002554: e00f b.n 8002576 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002246: 4a0a ldr r2, [pc, #40] @ (8002270 ) - 8002248: 687b ldr r3, [r7, #4] - 800224a: 3b01 subs r3, #1 - 800224c: 6053 str r3, [r2, #4] + 8002556: 4a0a ldr r2, [pc, #40] @ (8002580 ) + 8002558: 687b ldr r3, [r7, #4] + 800255a: 3b01 subs r3, #1 + 800255c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 800224e: 210f movs r1, #15 - 8002250: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff - 8002254: f7ff ff90 bl 8002178 <__NVIC_SetPriority> + 800255e: 210f movs r1, #15 + 8002560: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 8002564: f7ff ff90 bl 8002488 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002258: 4b05 ldr r3, [pc, #20] @ (8002270 ) - 800225a: 2200 movs r2, #0 - 800225c: 609a str r2, [r3, #8] + 8002568: 4b05 ldr r3, [pc, #20] @ (8002580 ) + 800256a: 2200 movs r2, #0 + 800256c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800225e: 4b04 ldr r3, [pc, #16] @ (8002270 ) - 8002260: 2207 movs r2, #7 - 8002262: 601a str r2, [r3, #0] + 800256e: 4b04 ldr r3, [pc, #16] @ (8002580 ) + 8002570: 2207 movs r2, #7 + 8002572: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8002264: 2300 movs r3, #0 + 8002574: 2300 movs r3, #0 } - 8002266: 4618 mov r0, r3 - 8002268: 3708 adds r7, #8 - 800226a: 46bd mov sp, r7 - 800226c: bd80 pop {r7, pc} - 800226e: bf00 nop - 8002270: e000e010 .word 0xe000e010 + 8002576: 4618 mov r0, r3 + 8002578: 3708 adds r7, #8 + 800257a: 46bd mov sp, r7 + 800257c: bd80 pop {r7, pc} + 800257e: bf00 nop + 8002580: e000e010 .word 0xe000e010 -08002274 : +08002584 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002274: b580 push {r7, lr} - 8002276: b082 sub sp, #8 - 8002278: af00 add r7, sp, #0 - 800227a: 6078 str r0, [r7, #4] + 8002584: b580 push {r7, lr} + 8002586: b082 sub sp, #8 + 8002588: af00 add r7, sp, #0 + 800258a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 800227c: 6878 ldr r0, [r7, #4] - 800227e: f7ff ff2d bl 80020dc <__NVIC_SetPriorityGrouping> + 800258c: 6878 ldr r0, [r7, #4] + 800258e: f7ff ff49 bl 8002424 <__NVIC_SetPriorityGrouping> } - 8002282: bf00 nop - 8002284: 3708 adds r7, #8 - 8002286: 46bd mov sp, r7 - 8002288: bd80 pop {r7, pc} + 8002592: bf00 nop + 8002594: 3708 adds r7, #8 + 8002596: 46bd mov sp, r7 + 8002598: bd80 pop {r7, pc} -0800228a : +0800259a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 800228a: b580 push {r7, lr} - 800228c: b086 sub sp, #24 - 800228e: af00 add r7, sp, #0 - 8002290: 4603 mov r3, r0 - 8002292: 60b9 str r1, [r7, #8] - 8002294: 607a str r2, [r7, #4] - 8002296: 73fb strb r3, [r7, #15] + 800259a: b580 push {r7, lr} + 800259c: b086 sub sp, #24 + 800259e: af00 add r7, sp, #0 + 80025a0: 4603 mov r3, r0 + 80025a2: 60b9 str r1, [r7, #8] + 80025a4: 607a str r2, [r7, #4] + 80025a6: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; - 8002298: 2300 movs r3, #0 - 800229a: 617b str r3, [r7, #20] + 80025a8: 2300 movs r3, #0 + 80025aa: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 800229c: f7ff ff42 bl 8002124 <__NVIC_GetPriorityGrouping> - 80022a0: 6178 str r0, [r7, #20] + 80025ac: f7ff ff5e bl 800246c <__NVIC_GetPriorityGrouping> + 80025b0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 80022a2: 687a ldr r2, [r7, #4] - 80022a4: 68b9 ldr r1, [r7, #8] - 80022a6: 6978 ldr r0, [r7, #20] - 80022a8: f7ff ff90 bl 80021cc - 80022ac: 4602 mov r2, r0 - 80022ae: f997 300f ldrsb.w r3, [r7, #15] - 80022b2: 4611 mov r1, r2 - 80022b4: 4618 mov r0, r3 - 80022b6: f7ff ff5f bl 8002178 <__NVIC_SetPriority> + 80025b2: 687a ldr r2, [r7, #4] + 80025b4: 68b9 ldr r1, [r7, #8] + 80025b6: 6978 ldr r0, [r7, #20] + 80025b8: f7ff ff90 bl 80024dc + 80025bc: 4602 mov r2, r0 + 80025be: f997 300f ldrsb.w r3, [r7, #15] + 80025c2: 4611 mov r1, r2 + 80025c4: 4618 mov r0, r3 + 80025c6: f7ff ff5f bl 8002488 <__NVIC_SetPriority> } - 80022ba: bf00 nop - 80022bc: 3718 adds r7, #24 - 80022be: 46bd mov sp, r7 - 80022c0: bd80 pop {r7, pc} + 80025ca: bf00 nop + 80025cc: 3718 adds r7, #24 + 80025ce: 46bd mov sp, r7 + 80025d0: bd80 pop {r7, pc} -080022c2 : - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - 80022c2: b580 push {r7, lr} - 80022c4: b082 sub sp, #8 - 80022c6: af00 add r7, sp, #0 - 80022c8: 4603 mov r3, r0 - 80022ca: 71fb strb r3, [r7, #7] - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); - 80022cc: f997 3007 ldrsb.w r3, [r7, #7] - 80022d0: 4618 mov r0, r3 - 80022d2: f7ff ff35 bl 8002140 <__NVIC_EnableIRQ> -} - 80022d6: bf00 nop - 80022d8: 3708 adds r7, #8 - 80022da: 46bd mov sp, r7 - 80022dc: bd80 pop {r7, pc} - -080022de : +080025d2 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 80022de: b580 push {r7, lr} - 80022e0: b082 sub sp, #8 - 80022e2: af00 add r7, sp, #0 - 80022e4: 6078 str r0, [r7, #4] + 80025d2: b580 push {r7, lr} + 80025d4: b082 sub sp, #8 + 80025d6: af00 add r7, sp, #0 + 80025d8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 80022e6: 6878 ldr r0, [r7, #4] - 80022e8: f7ff ffa2 bl 8002230 - 80022ec: 4603 mov r3, r0 + 80025da: 6878 ldr r0, [r7, #4] + 80025dc: f7ff ffb0 bl 8002540 + 80025e0: 4603 mov r3, r0 } - 80022ee: 4618 mov r0, r3 - 80022f0: 3708 adds r7, #8 - 80022f2: 46bd mov sp, r7 - 80022f4: bd80 pop {r7, pc} + 80025e2: 4618 mov r0, r3 + 80025e4: 3708 adds r7, #8 + 80025e6: 46bd mov sp, r7 + 80025e8: bd80 pop {r7, pc} ... -080022f8 : +080025ec : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 80022f8: b480 push {r7} - 80022fa: b087 sub sp, #28 - 80022fc: af00 add r7, sp, #0 - 80022fe: 6078 str r0, [r7, #4] - 8002300: 6039 str r1, [r7, #0] + 80025ec: b480 push {r7} + 80025ee: b087 sub sp, #28 + 80025f0: af00 add r7, sp, #0 + 80025f2: 6078 str r0, [r7, #4] + 80025f4: 6039 str r1, [r7, #0] uint32_t position = 0x00; - 8002302: 2300 movs r3, #0 - 8002304: 617b str r3, [r7, #20] + 80025f6: 2300 movs r3, #0 + 80025f8: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00; - 8002306: 2300 movs r3, #0 - 8002308: 60fb str r3, [r7, #12] + 80025fa: 2300 movs r3, #0 + 80025fc: 60fb str r3, [r7, #12] uint32_t temp = 0x00; - 800230a: 2300 movs r3, #0 - 800230c: 613b str r3, [r7, #16] + 80025fe: 2300 movs r3, #0 + 8002600: 613b str r3, [r7, #16] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0) - 800230e: e160 b.n 80025d2 + 8002602: e160 b.n 80028c6 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1U << position); - 8002310: 683b ldr r3, [r7, #0] - 8002312: 681a ldr r2, [r3, #0] - 8002314: 2101 movs r1, #1 - 8002316: 697b ldr r3, [r7, #20] - 8002318: fa01 f303 lsl.w r3, r1, r3 - 800231c: 4013 ands r3, r2 - 800231e: 60fb str r3, [r7, #12] + 8002604: 683b ldr r3, [r7, #0] + 8002606: 681a ldr r2, [r3, #0] + 8002608: 2101 movs r1, #1 + 800260a: 697b ldr r3, [r7, #20] + 800260c: fa01 f303 lsl.w r3, r1, r3 + 8002610: 4013 ands r3, r2 + 8002612: 60fb str r3, [r7, #12] if (iocurrent) - 8002320: 68fb ldr r3, [r7, #12] - 8002322: 2b00 cmp r3, #0 - 8002324: f000 8152 beq.w 80025cc + 8002614: 68fb ldr r3, [r7, #12] + 8002616: 2b00 cmp r3, #0 + 8002618: f000 8152 beq.w 80028c0 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8002328: 683b ldr r3, [r7, #0] - 800232a: 685b ldr r3, [r3, #4] - 800232c: f003 0303 and.w r3, r3, #3 - 8002330: 2b01 cmp r3, #1 - 8002332: d005 beq.n 8002340 + 800261c: 683b ldr r3, [r7, #0] + 800261e: 685b ldr r3, [r3, #4] + 8002620: f003 0303 and.w r3, r3, #3 + 8002624: 2b01 cmp r3, #1 + 8002626: d005 beq.n 8002634 ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8002334: 683b ldr r3, [r7, #0] - 8002336: 685b ldr r3, [r3, #4] - 8002338: f003 0303 and.w r3, r3, #3 + 8002628: 683b ldr r3, [r7, #0] + 800262a: 685b ldr r3, [r3, #4] + 800262c: f003 0303 and.w r3, r3, #3 if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 800233c: 2b02 cmp r3, #2 - 800233e: d130 bne.n 80023a2 + 8002630: 2b02 cmp r3, #2 + 8002632: d130 bne.n 8002696 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8002340: 687b ldr r3, [r7, #4] - 8002342: 689b ldr r3, [r3, #8] - 8002344: 613b str r3, [r7, #16] + 8002634: 687b ldr r3, [r7, #4] + 8002636: 689b ldr r3, [r3, #8] + 8002638: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); - 8002346: 697b ldr r3, [r7, #20] - 8002348: 005b lsls r3, r3, #1 - 800234a: 2203 movs r2, #3 - 800234c: fa02 f303 lsl.w r3, r2, r3 - 8002350: 43db mvns r3, r3 - 8002352: 693a ldr r2, [r7, #16] - 8002354: 4013 ands r3, r2 - 8002356: 613b str r3, [r7, #16] + 800263a: 697b ldr r3, [r7, #20] + 800263c: 005b lsls r3, r3, #1 + 800263e: 2203 movs r2, #3 + 8002640: fa02 f303 lsl.w r3, r2, r3 + 8002644: 43db mvns r3, r3 + 8002646: 693a ldr r2, [r7, #16] + 8002648: 4013 ands r3, r2 + 800264a: 613b str r3, [r7, #16] SET_BIT(temp, GPIO_Init->Speed << (position * 2)); - 8002358: 683b ldr r3, [r7, #0] - 800235a: 68da ldr r2, [r3, #12] - 800235c: 697b ldr r3, [r7, #20] - 800235e: 005b lsls r3, r3, #1 - 8002360: fa02 f303 lsl.w r3, r2, r3 - 8002364: 693a ldr r2, [r7, #16] - 8002366: 4313 orrs r3, r2 - 8002368: 613b str r3, [r7, #16] + 800264c: 683b ldr r3, [r7, #0] + 800264e: 68da ldr r2, [r3, #12] + 8002650: 697b ldr r3, [r7, #20] + 8002652: 005b lsls r3, r3, #1 + 8002654: fa02 f303 lsl.w r3, r2, r3 + 8002658: 693a ldr r2, [r7, #16] + 800265a: 4313 orrs r3, r2 + 800265c: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 800236a: 687b ldr r3, [r7, #4] - 800236c: 693a ldr r2, [r7, #16] - 800236e: 609a str r2, [r3, #8] + 800265e: 687b ldr r3, [r7, #4] + 8002660: 693a ldr r2, [r7, #16] + 8002662: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8002370: 687b ldr r3, [r7, #4] - 8002372: 685b ldr r3, [r3, #4] - 8002374: 613b str r3, [r7, #16] + 8002664: 687b ldr r3, [r7, #4] + 8002666: 685b ldr r3, [r3, #4] + 8002668: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ; - 8002376: 2201 movs r2, #1 - 8002378: 697b ldr r3, [r7, #20] - 800237a: fa02 f303 lsl.w r3, r2, r3 - 800237e: 43db mvns r3, r3 - 8002380: 693a ldr r2, [r7, #16] - 8002382: 4013 ands r3, r2 - 8002384: 613b str r3, [r7, #16] + 800266a: 2201 movs r2, #1 + 800266c: 697b ldr r3, [r7, #20] + 800266e: fa02 f303 lsl.w r3, r2, r3 + 8002672: 43db mvns r3, r3 + 8002674: 693a ldr r2, [r7, #16] + 8002676: 4013 ands r3, r2 + 8002678: 613b str r3, [r7, #16] SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8002386: 683b ldr r3, [r7, #0] - 8002388: 685b ldr r3, [r3, #4] - 800238a: 091b lsrs r3, r3, #4 - 800238c: f003 0201 and.w r2, r3, #1 - 8002390: 697b ldr r3, [r7, #20] - 8002392: fa02 f303 lsl.w r3, r2, r3 - 8002396: 693a ldr r2, [r7, #16] - 8002398: 4313 orrs r3, r2 - 800239a: 613b str r3, [r7, #16] + 800267a: 683b ldr r3, [r7, #0] + 800267c: 685b ldr r3, [r3, #4] + 800267e: 091b lsrs r3, r3, #4 + 8002680: f003 0201 and.w r2, r3, #1 + 8002684: 697b ldr r3, [r7, #20] + 8002686: fa02 f303 lsl.w r3, r2, r3 + 800268a: 693a ldr r2, [r7, #16] + 800268c: 4313 orrs r3, r2 + 800268e: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 800239c: 687b ldr r3, [r7, #4] - 800239e: 693a ldr r2, [r7, #16] - 80023a0: 605a str r2, [r3, #4] + 8002690: 687b ldr r3, [r7, #4] + 8002692: 693a ldr r2, [r7, #16] + 8002694: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 80023a2: 683b ldr r3, [r7, #0] - 80023a4: 685b ldr r3, [r3, #4] - 80023a6: f003 0303 and.w r3, r3, #3 - 80023aa: 2b03 cmp r3, #3 - 80023ac: d017 beq.n 80023de + 8002696: 683b ldr r3, [r7, #0] + 8002698: 685b ldr r3, [r3, #4] + 800269a: f003 0303 and.w r3, r3, #3 + 800269e: 2b03 cmp r3, #3 + 80026a0: d017 beq.n 80026d2 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 80023ae: 687b ldr r3, [r7, #4] - 80023b0: 68db ldr r3, [r3, #12] - 80023b2: 613b str r3, [r7, #16] + 80026a2: 687b ldr r3, [r7, #4] + 80026a4: 68db ldr r3, [r3, #12] + 80026a6: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); - 80023b4: 697b ldr r3, [r7, #20] - 80023b6: 005b lsls r3, r3, #1 - 80023b8: 2203 movs r2, #3 - 80023ba: fa02 f303 lsl.w r3, r2, r3 - 80023be: 43db mvns r3, r3 - 80023c0: 693a ldr r2, [r7, #16] - 80023c2: 4013 ands r3, r2 - 80023c4: 613b str r3, [r7, #16] + 80026a8: 697b ldr r3, [r7, #20] + 80026aa: 005b lsls r3, r3, #1 + 80026ac: 2203 movs r2, #3 + 80026ae: fa02 f303 lsl.w r3, r2, r3 + 80026b2: 43db mvns r3, r3 + 80026b4: 693a ldr r2, [r7, #16] + 80026b6: 4013 ands r3, r2 + 80026b8: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); - 80023c6: 683b ldr r3, [r7, #0] - 80023c8: 689a ldr r2, [r3, #8] - 80023ca: 697b ldr r3, [r7, #20] - 80023cc: 005b lsls r3, r3, #1 - 80023ce: fa02 f303 lsl.w r3, r2, r3 - 80023d2: 693a ldr r2, [r7, #16] - 80023d4: 4313 orrs r3, r2 - 80023d6: 613b str r3, [r7, #16] + 80026ba: 683b ldr r3, [r7, #0] + 80026bc: 689a ldr r2, [r3, #8] + 80026be: 697b ldr r3, [r7, #20] + 80026c0: 005b lsls r3, r3, #1 + 80026c2: fa02 f303 lsl.w r3, r2, r3 + 80026c6: 693a ldr r2, [r7, #16] + 80026c8: 4313 orrs r3, r2 + 80026ca: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 80023d8: 687b ldr r3, [r7, #4] - 80023da: 693a ldr r2, [r7, #16] - 80023dc: 60da str r2, [r3, #12] + 80026cc: 687b ldr r3, [r7, #4] + 80026ce: 693a ldr r2, [r7, #16] + 80026d0: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 80023de: 683b ldr r3, [r7, #0] - 80023e0: 685b ldr r3, [r3, #4] - 80023e2: f003 0303 and.w r3, r3, #3 - 80023e6: 2b02 cmp r3, #2 - 80023e8: d123 bne.n 8002432 + 80026d2: 683b ldr r3, [r7, #0] + 80026d4: 685b ldr r3, [r3, #4] + 80026d6: f003 0303 and.w r3, r3, #3 + 80026da: 2b02 cmp r3, #2 + 80026dc: d123 bne.n 8002726 assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ /* Identify AFRL or AFRH register based on IO position*/ temp = GPIOx->AFR[position >> 3]; - 80023ea: 697b ldr r3, [r7, #20] - 80023ec: 08da lsrs r2, r3, #3 - 80023ee: 687b ldr r3, [r7, #4] - 80023f0: 3208 adds r2, #8 - 80023f2: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 80023f6: 613b str r3, [r7, #16] + 80026de: 697b ldr r3, [r7, #20] + 80026e0: 08da lsrs r2, r3, #3 + 80026e2: 687b ldr r3, [r7, #4] + 80026e4: 3208 adds r2, #8 + 80026e6: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 80026ea: 613b str r3, [r7, #16] CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)); - 80023f8: 697b ldr r3, [r7, #20] - 80023fa: f003 0307 and.w r3, r3, #7 - 80023fe: 009b lsls r3, r3, #2 - 8002400: 220f movs r2, #15 - 8002402: fa02 f303 lsl.w r3, r2, r3 - 8002406: 43db mvns r3, r3 - 8002408: 693a ldr r2, [r7, #16] - 800240a: 4013 ands r3, r2 - 800240c: 613b str r3, [r7, #16] + 80026ec: 697b ldr r3, [r7, #20] + 80026ee: f003 0307 and.w r3, r3, #7 + 80026f2: 009b lsls r3, r3, #2 + 80026f4: 220f movs r2, #15 + 80026f6: fa02 f303 lsl.w r3, r2, r3 + 80026fa: 43db mvns r3, r3 + 80026fc: 693a ldr r2, [r7, #16] + 80026fe: 4013 ands r3, r2 + 8002700: 613b str r3, [r7, #16] SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4)); - 800240e: 683b ldr r3, [r7, #0] - 8002410: 691a ldr r2, [r3, #16] - 8002412: 697b ldr r3, [r7, #20] - 8002414: f003 0307 and.w r3, r3, #7 - 8002418: 009b lsls r3, r3, #2 - 800241a: fa02 f303 lsl.w r3, r2, r3 - 800241e: 693a ldr r2, [r7, #16] - 8002420: 4313 orrs r3, r2 - 8002422: 613b str r3, [r7, #16] + 8002702: 683b ldr r3, [r7, #0] + 8002704: 691a ldr r2, [r3, #16] + 8002706: 697b ldr r3, [r7, #20] + 8002708: f003 0307 and.w r3, r3, #7 + 800270c: 009b lsls r3, r3, #2 + 800270e: fa02 f303 lsl.w r3, r2, r3 + 8002712: 693a ldr r2, [r7, #16] + 8002714: 4313 orrs r3, r2 + 8002716: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3] = temp; - 8002424: 697b ldr r3, [r7, #20] - 8002426: 08da lsrs r2, r3, #3 - 8002428: 687b ldr r3, [r7, #4] - 800242a: 3208 adds r2, #8 - 800242c: 6939 ldr r1, [r7, #16] - 800242e: f843 1022 str.w r1, [r3, r2, lsl #2] + 8002718: 697b ldr r3, [r7, #20] + 800271a: 08da lsrs r2, r3, #3 + 800271c: 687b ldr r3, [r7, #4] + 800271e: 3208 adds r2, #8 + 8002720: 6939 ldr r1, [r7, #16] + 8002722: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8002432: 687b ldr r3, [r7, #4] - 8002434: 681b ldr r3, [r3, #0] - 8002436: 613b str r3, [r7, #16] + 8002726: 687b ldr r3, [r7, #4] + 8002728: 681b ldr r3, [r3, #0] + 800272a: 613b str r3, [r7, #16] CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); - 8002438: 697b ldr r3, [r7, #20] - 800243a: 005b lsls r3, r3, #1 - 800243c: 2203 movs r2, #3 - 800243e: fa02 f303 lsl.w r3, r2, r3 - 8002442: 43db mvns r3, r3 - 8002444: 693a ldr r2, [r7, #16] - 8002446: 4013 ands r3, r2 - 8002448: 613b str r3, [r7, #16] + 800272c: 697b ldr r3, [r7, #20] + 800272e: 005b lsls r3, r3, #1 + 8002730: 2203 movs r2, #3 + 8002732: fa02 f303 lsl.w r3, r2, r3 + 8002736: 43db mvns r3, r3 + 8002738: 693a ldr r2, [r7, #16] + 800273a: 4013 ands r3, r2 + 800273c: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); - 800244a: 683b ldr r3, [r7, #0] - 800244c: 685b ldr r3, [r3, #4] - 800244e: f003 0203 and.w r2, r3, #3 - 8002452: 697b ldr r3, [r7, #20] - 8002454: 005b lsls r3, r3, #1 - 8002456: fa02 f303 lsl.w r3, r2, r3 - 800245a: 693a ldr r2, [r7, #16] - 800245c: 4313 orrs r3, r2 - 800245e: 613b str r3, [r7, #16] + 800273e: 683b ldr r3, [r7, #0] + 8002740: 685b ldr r3, [r3, #4] + 8002742: f003 0203 and.w r2, r3, #3 + 8002746: 697b ldr r3, [r7, #20] + 8002748: 005b lsls r3, r3, #1 + 800274a: fa02 f303 lsl.w r3, r2, r3 + 800274e: 693a ldr r2, [r7, #16] + 8002750: 4313 orrs r3, r2 + 8002752: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8002460: 687b ldr r3, [r7, #4] - 8002462: 693a ldr r2, [r7, #16] - 8002464: 601a str r2, [r3, #0] + 8002754: 687b ldr r3, [r7, #4] + 8002756: 693a ldr r2, [r7, #16] + 8002758: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8002466: 683b ldr r3, [r7, #0] - 8002468: 685b ldr r3, [r3, #4] - 800246a: f403 3340 and.w r3, r3, #196608 @ 0x30000 - 800246e: 2b00 cmp r3, #0 - 8002470: f000 80ac beq.w 80025cc + 800275a: 683b ldr r3, [r7, #0] + 800275c: 685b ldr r3, [r3, #4] + 800275e: f403 3340 and.w r3, r3, #196608 @ 0x30000 + 8002762: 2b00 cmp r3, #0 + 8002764: f000 80ac beq.w 80028c0 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8002474: 4b5e ldr r3, [pc, #376] @ (80025f0 ) - 8002476: 6a1b ldr r3, [r3, #32] - 8002478: 4a5d ldr r2, [pc, #372] @ (80025f0 ) - 800247a: f043 0301 orr.w r3, r3, #1 - 800247e: 6213 str r3, [r2, #32] - 8002480: 4b5b ldr r3, [pc, #364] @ (80025f0 ) - 8002482: 6a1b ldr r3, [r3, #32] - 8002484: f003 0301 and.w r3, r3, #1 - 8002488: 60bb str r3, [r7, #8] - 800248a: 68bb ldr r3, [r7, #8] + 8002768: 4b5e ldr r3, [pc, #376] @ (80028e4 ) + 800276a: 6a1b ldr r3, [r3, #32] + 800276c: 4a5d ldr r2, [pc, #372] @ (80028e4 ) + 800276e: f043 0301 orr.w r3, r3, #1 + 8002772: 6213 str r3, [r2, #32] + 8002774: 4b5b ldr r3, [pc, #364] @ (80028e4 ) + 8002776: 6a1b ldr r3, [r3, #32] + 8002778: f003 0301 and.w r3, r3, #1 + 800277c: 60bb str r3, [r7, #8] + 800277e: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2]; - 800248c: 4a59 ldr r2, [pc, #356] @ (80025f4 ) - 800248e: 697b ldr r3, [r7, #20] - 8002490: 089b lsrs r3, r3, #2 - 8002492: 3302 adds r3, #2 - 8002494: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8002498: 613b str r3, [r7, #16] + 8002780: 4a59 ldr r2, [pc, #356] @ (80028e8 ) + 8002782: 697b ldr r3, [r7, #20] + 8002784: 089b lsrs r3, r3, #2 + 8002786: 3302 adds r3, #2 + 8002788: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 800278c: 613b str r3, [r7, #16] CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03))); - 800249a: 697b ldr r3, [r7, #20] - 800249c: f003 0303 and.w r3, r3, #3 - 80024a0: 009b lsls r3, r3, #2 - 80024a2: 220f movs r2, #15 - 80024a4: fa02 f303 lsl.w r3, r2, r3 - 80024a8: 43db mvns r3, r3 - 80024aa: 693a ldr r2, [r7, #16] - 80024ac: 4013 ands r3, r2 - 80024ae: 613b str r3, [r7, #16] + 800278e: 697b ldr r3, [r7, #20] + 8002790: f003 0303 and.w r3, r3, #3 + 8002794: 009b lsls r3, r3, #2 + 8002796: 220f movs r2, #15 + 8002798: fa02 f303 lsl.w r3, r2, r3 + 800279c: 43db mvns r3, r3 + 800279e: 693a ldr r2, [r7, #16] + 80027a0: 4013 ands r3, r2 + 80027a2: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); - 80024b0: 687b ldr r3, [r7, #4] - 80024b2: 4a51 ldr r2, [pc, #324] @ (80025f8 ) - 80024b4: 4293 cmp r3, r2 - 80024b6: d025 beq.n 8002504 - 80024b8: 687b ldr r3, [r7, #4] - 80024ba: 4a50 ldr r2, [pc, #320] @ (80025fc ) - 80024bc: 4293 cmp r3, r2 - 80024be: d01f beq.n 8002500 - 80024c0: 687b ldr r3, [r7, #4] - 80024c2: 4a4f ldr r2, [pc, #316] @ (8002600 ) - 80024c4: 4293 cmp r3, r2 - 80024c6: d019 beq.n 80024fc - 80024c8: 687b ldr r3, [r7, #4] - 80024ca: 4a4e ldr r2, [pc, #312] @ (8002604 ) - 80024cc: 4293 cmp r3, r2 - 80024ce: d013 beq.n 80024f8 - 80024d0: 687b ldr r3, [r7, #4] - 80024d2: 4a4d ldr r2, [pc, #308] @ (8002608 ) - 80024d4: 4293 cmp r3, r2 - 80024d6: d00d beq.n 80024f4 - 80024d8: 687b ldr r3, [r7, #4] - 80024da: 4a4c ldr r2, [pc, #304] @ (800260c ) - 80024dc: 4293 cmp r3, r2 - 80024de: d007 beq.n 80024f0 - 80024e0: 687b ldr r3, [r7, #4] - 80024e2: 4a4b ldr r2, [pc, #300] @ (8002610 ) - 80024e4: 4293 cmp r3, r2 - 80024e6: d101 bne.n 80024ec - 80024e8: 2306 movs r3, #6 - 80024ea: e00c b.n 8002506 - 80024ec: 2307 movs r3, #7 - 80024ee: e00a b.n 8002506 - 80024f0: 2305 movs r3, #5 - 80024f2: e008 b.n 8002506 - 80024f4: 2304 movs r3, #4 - 80024f6: e006 b.n 8002506 - 80024f8: 2303 movs r3, #3 - 80024fa: e004 b.n 8002506 - 80024fc: 2302 movs r3, #2 - 80024fe: e002 b.n 8002506 - 8002500: 2301 movs r3, #1 - 8002502: e000 b.n 8002506 - 8002504: 2300 movs r3, #0 - 8002506: 697a ldr r2, [r7, #20] - 8002508: f002 0203 and.w r2, r2, #3 - 800250c: 0092 lsls r2, r2, #2 - 800250e: 4093 lsls r3, r2 - 8002510: 693a ldr r2, [r7, #16] - 8002512: 4313 orrs r3, r2 - 8002514: 613b str r3, [r7, #16] + 80027a4: 687b ldr r3, [r7, #4] + 80027a6: 4a51 ldr r2, [pc, #324] @ (80028ec ) + 80027a8: 4293 cmp r3, r2 + 80027aa: d025 beq.n 80027f8 + 80027ac: 687b ldr r3, [r7, #4] + 80027ae: 4a50 ldr r2, [pc, #320] @ (80028f0 ) + 80027b0: 4293 cmp r3, r2 + 80027b2: d01f beq.n 80027f4 + 80027b4: 687b ldr r3, [r7, #4] + 80027b6: 4a4f ldr r2, [pc, #316] @ (80028f4 ) + 80027b8: 4293 cmp r3, r2 + 80027ba: d019 beq.n 80027f0 + 80027bc: 687b ldr r3, [r7, #4] + 80027be: 4a4e ldr r2, [pc, #312] @ (80028f8 ) + 80027c0: 4293 cmp r3, r2 + 80027c2: d013 beq.n 80027ec + 80027c4: 687b ldr r3, [r7, #4] + 80027c6: 4a4d ldr r2, [pc, #308] @ (80028fc ) + 80027c8: 4293 cmp r3, r2 + 80027ca: d00d beq.n 80027e8 + 80027cc: 687b ldr r3, [r7, #4] + 80027ce: 4a4c ldr r2, [pc, #304] @ (8002900 ) + 80027d0: 4293 cmp r3, r2 + 80027d2: d007 beq.n 80027e4 + 80027d4: 687b ldr r3, [r7, #4] + 80027d6: 4a4b ldr r2, [pc, #300] @ (8002904 ) + 80027d8: 4293 cmp r3, r2 + 80027da: d101 bne.n 80027e0 + 80027dc: 2306 movs r3, #6 + 80027de: e00c b.n 80027fa + 80027e0: 2307 movs r3, #7 + 80027e2: e00a b.n 80027fa + 80027e4: 2305 movs r3, #5 + 80027e6: e008 b.n 80027fa + 80027e8: 2304 movs r3, #4 + 80027ea: e006 b.n 80027fa + 80027ec: 2303 movs r3, #3 + 80027ee: e004 b.n 80027fa + 80027f0: 2302 movs r3, #2 + 80027f2: e002 b.n 80027fa + 80027f4: 2301 movs r3, #1 + 80027f6: e000 b.n 80027fa + 80027f8: 2300 movs r3, #0 + 80027fa: 697a ldr r2, [r7, #20] + 80027fc: f002 0203 and.w r2, r2, #3 + 8002800: 0092 lsls r2, r2, #2 + 8002802: 4093 lsls r3, r2 + 8002804: 693a ldr r2, [r7, #16] + 8002806: 4313 orrs r3, r2 + 8002808: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2] = temp; - 8002516: 4937 ldr r1, [pc, #220] @ (80025f4 ) - 8002518: 697b ldr r3, [r7, #20] - 800251a: 089b lsrs r3, r3, #2 - 800251c: 3302 adds r3, #2 - 800251e: 693a ldr r2, [r7, #16] - 8002520: f841 2023 str.w r2, [r1, r3, lsl #2] + 800280a: 4937 ldr r1, [pc, #220] @ (80028e8 ) + 800280c: 697b ldr r3, [r7, #20] + 800280e: 089b lsrs r3, r3, #2 + 8002810: 3302 adds r3, #2 + 8002812: 693a ldr r2, [r7, #16] + 8002814: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8002524: 4b3b ldr r3, [pc, #236] @ (8002614 ) - 8002526: 689b ldr r3, [r3, #8] - 8002528: 613b str r3, [r7, #16] + 8002818: 4b3b ldr r3, [pc, #236] @ (8002908 ) + 800281a: 689b ldr r3, [r3, #8] + 800281c: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 800252a: 68fb ldr r3, [r7, #12] - 800252c: 43db mvns r3, r3 - 800252e: 693a ldr r2, [r7, #16] - 8002530: 4013 ands r3, r2 - 8002532: 613b str r3, [r7, #16] + 800281e: 68fb ldr r3, [r7, #12] + 8002820: 43db mvns r3, r3 + 8002822: 693a ldr r2, [r7, #16] + 8002824: 4013 ands r3, r2 + 8002826: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8002534: 683b ldr r3, [r7, #0] - 8002536: 685b ldr r3, [r3, #4] - 8002538: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 800253c: 2b00 cmp r3, #0 - 800253e: d003 beq.n 8002548 + 8002828: 683b ldr r3, [r7, #0] + 800282a: 685b ldr r3, [r3, #4] + 800282c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8002830: 2b00 cmp r3, #0 + 8002832: d003 beq.n 800283c { SET_BIT(temp, iocurrent); - 8002540: 693a ldr r2, [r7, #16] - 8002542: 68fb ldr r3, [r7, #12] - 8002544: 4313 orrs r3, r2 - 8002546: 613b str r3, [r7, #16] + 8002834: 693a ldr r2, [r7, #16] + 8002836: 68fb ldr r3, [r7, #12] + 8002838: 4313 orrs r3, r2 + 800283a: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 8002548: 4a32 ldr r2, [pc, #200] @ (8002614 ) - 800254a: 693b ldr r3, [r7, #16] - 800254c: 6093 str r3, [r2, #8] + 800283c: 4a32 ldr r2, [pc, #200] @ (8002908 ) + 800283e: 693b ldr r3, [r7, #16] + 8002840: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 800254e: 4b31 ldr r3, [pc, #196] @ (8002614 ) - 8002550: 68db ldr r3, [r3, #12] - 8002552: 613b str r3, [r7, #16] + 8002842: 4b31 ldr r3, [pc, #196] @ (8002908 ) + 8002844: 68db ldr r3, [r3, #12] + 8002846: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 8002554: 68fb ldr r3, [r7, #12] - 8002556: 43db mvns r3, r3 - 8002558: 693a ldr r2, [r7, #16] - 800255a: 4013 ands r3, r2 - 800255c: 613b str r3, [r7, #16] + 8002848: 68fb ldr r3, [r7, #12] + 800284a: 43db mvns r3, r3 + 800284c: 693a ldr r2, [r7, #16] + 800284e: 4013 ands r3, r2 + 8002850: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 800255e: 683b ldr r3, [r7, #0] - 8002560: 685b ldr r3, [r3, #4] - 8002562: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8002566: 2b00 cmp r3, #0 - 8002568: d003 beq.n 8002572 + 8002852: 683b ldr r3, [r7, #0] + 8002854: 685b ldr r3, [r3, #4] + 8002856: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 800285a: 2b00 cmp r3, #0 + 800285c: d003 beq.n 8002866 { SET_BIT(temp, iocurrent); - 800256a: 693a ldr r2, [r7, #16] - 800256c: 68fb ldr r3, [r7, #12] - 800256e: 4313 orrs r3, r2 - 8002570: 613b str r3, [r7, #16] + 800285e: 693a ldr r2, [r7, #16] + 8002860: 68fb ldr r3, [r7, #12] + 8002862: 4313 orrs r3, r2 + 8002864: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 8002572: 4a28 ldr r2, [pc, #160] @ (8002614 ) - 8002574: 693b ldr r3, [r7, #16] - 8002576: 60d3 str r3, [r2, #12] + 8002866: 4a28 ldr r2, [pc, #160] @ (8002908 ) + 8002868: 693b ldr r3, [r7, #16] + 800286a: 60d3 str r3, [r2, #12] temp = EXTI->EMR; - 8002578: 4b26 ldr r3, [pc, #152] @ (8002614 ) - 800257a: 685b ldr r3, [r3, #4] - 800257c: 613b str r3, [r7, #16] + 800286c: 4b26 ldr r3, [pc, #152] @ (8002908 ) + 800286e: 685b ldr r3, [r3, #4] + 8002870: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 800257e: 68fb ldr r3, [r7, #12] - 8002580: 43db mvns r3, r3 - 8002582: 693a ldr r2, [r7, #16] - 8002584: 4013 ands r3, r2 - 8002586: 613b str r3, [r7, #16] + 8002872: 68fb ldr r3, [r7, #12] + 8002874: 43db mvns r3, r3 + 8002876: 693a ldr r2, [r7, #16] + 8002878: 4013 ands r3, r2 + 800287a: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 8002588: 683b ldr r3, [r7, #0] - 800258a: 685b ldr r3, [r3, #4] - 800258c: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8002590: 2b00 cmp r3, #0 - 8002592: d003 beq.n 800259c + 800287c: 683b ldr r3, [r7, #0] + 800287e: 685b ldr r3, [r3, #4] + 8002880: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8002884: 2b00 cmp r3, #0 + 8002886: d003 beq.n 8002890 { SET_BIT(temp, iocurrent); - 8002594: 693a ldr r2, [r7, #16] - 8002596: 68fb ldr r3, [r7, #12] - 8002598: 4313 orrs r3, r2 - 800259a: 613b str r3, [r7, #16] + 8002888: 693a ldr r2, [r7, #16] + 800288a: 68fb ldr r3, [r7, #12] + 800288c: 4313 orrs r3, r2 + 800288e: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 800259c: 4a1d ldr r2, [pc, #116] @ (8002614 ) - 800259e: 693b ldr r3, [r7, #16] - 80025a0: 6053 str r3, [r2, #4] + 8002890: 4a1d ldr r2, [pc, #116] @ (8002908 ) + 8002892: 693b ldr r3, [r7, #16] + 8002894: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 80025a2: 4b1c ldr r3, [pc, #112] @ (8002614 ) - 80025a4: 681b ldr r3, [r3, #0] - 80025a6: 613b str r3, [r7, #16] + 8002896: 4b1c ldr r3, [pc, #112] @ (8002908 ) + 8002898: 681b ldr r3, [r3, #0] + 800289a: 613b str r3, [r7, #16] CLEAR_BIT(temp, (uint32_t)iocurrent); - 80025a8: 68fb ldr r3, [r7, #12] - 80025aa: 43db mvns r3, r3 - 80025ac: 693a ldr r2, [r7, #16] - 80025ae: 4013 ands r3, r2 - 80025b0: 613b str r3, [r7, #16] + 800289c: 68fb ldr r3, [r7, #12] + 800289e: 43db mvns r3, r3 + 80028a0: 693a ldr r2, [r7, #16] + 80028a2: 4013 ands r3, r2 + 80028a4: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 80025b2: 683b ldr r3, [r7, #0] - 80025b4: 685b ldr r3, [r3, #4] - 80025b6: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80025ba: 2b00 cmp r3, #0 - 80025bc: d003 beq.n 80025c6 + 80028a6: 683b ldr r3, [r7, #0] + 80028a8: 685b ldr r3, [r3, #4] + 80028aa: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80028ae: 2b00 cmp r3, #0 + 80028b0: d003 beq.n 80028ba { SET_BIT(temp, iocurrent); - 80025be: 693a ldr r2, [r7, #16] - 80025c0: 68fb ldr r3, [r7, #12] - 80025c2: 4313 orrs r3, r2 - 80025c4: 613b str r3, [r7, #16] + 80028b2: 693a ldr r2, [r7, #16] + 80028b4: 68fb ldr r3, [r7, #12] + 80028b6: 4313 orrs r3, r2 + 80028b8: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 80025c6: 4a13 ldr r2, [pc, #76] @ (8002614 ) - 80025c8: 693b ldr r3, [r7, #16] - 80025ca: 6013 str r3, [r2, #0] + 80028ba: 4a13 ldr r2, [pc, #76] @ (8002908 ) + 80028bc: 693b ldr r3, [r7, #16] + 80028be: 6013 str r3, [r2, #0] } } position++; - 80025cc: 697b ldr r3, [r7, #20] - 80025ce: 3301 adds r3, #1 - 80025d0: 617b str r3, [r7, #20] + 80028c0: 697b ldr r3, [r7, #20] + 80028c2: 3301 adds r3, #1 + 80028c4: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0) - 80025d2: 683b ldr r3, [r7, #0] - 80025d4: 681a ldr r2, [r3, #0] - 80025d6: 697b ldr r3, [r7, #20] - 80025d8: fa22 f303 lsr.w r3, r2, r3 - 80025dc: 2b00 cmp r3, #0 - 80025de: f47f ae97 bne.w 8002310 + 80028c6: 683b ldr r3, [r7, #0] + 80028c8: 681a ldr r2, [r3, #0] + 80028ca: 697b ldr r3, [r7, #20] + 80028cc: fa22 f303 lsr.w r3, r2, r3 + 80028d0: 2b00 cmp r3, #0 + 80028d2: f47f ae97 bne.w 8002604 } } - 80025e2: bf00 nop - 80025e4: bf00 nop - 80025e6: 371c adds r7, #28 - 80025e8: 46bd mov sp, r7 - 80025ea: bc80 pop {r7} - 80025ec: 4770 bx lr - 80025ee: bf00 nop - 80025f0: 40023800 .word 0x40023800 - 80025f4: 40010000 .word 0x40010000 - 80025f8: 40020000 .word 0x40020000 - 80025fc: 40020400 .word 0x40020400 - 8002600: 40020800 .word 0x40020800 - 8002604: 40020c00 .word 0x40020c00 - 8002608: 40021000 .word 0x40021000 - 800260c: 40021400 .word 0x40021400 - 8002610: 40021800 .word 0x40021800 - 8002614: 40010400 .word 0x40010400 + 80028d6: bf00 nop + 80028d8: bf00 nop + 80028da: 371c adds r7, #28 + 80028dc: 46bd mov sp, r7 + 80028de: bc80 pop {r7} + 80028e0: 4770 bx lr + 80028e2: bf00 nop + 80028e4: 40023800 .word 0x40023800 + 80028e8: 40010000 .word 0x40010000 + 80028ec: 40020000 .word 0x40020000 + 80028f0: 40020400 .word 0x40020400 + 80028f4: 40020800 .word 0x40020800 + 80028f8: 40020c00 .word 0x40020c00 + 80028fc: 40021000 .word 0x40021000 + 8002900: 40021400 .word 0x40021400 + 8002904: 40021800 .word 0x40021800 + 8002908: 40010400 .word 0x40010400 -08002618 : +0800290c : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8002618: b480 push {r7} - 800261a: b083 sub sp, #12 - 800261c: af00 add r7, sp, #0 - 800261e: 6078 str r0, [r7, #4] - 8002620: 460b mov r3, r1 - 8002622: 807b strh r3, [r7, #2] - 8002624: 4613 mov r3, r2 - 8002626: 707b strb r3, [r7, #1] + 800290c: b480 push {r7} + 800290e: b083 sub sp, #12 + 8002910: af00 add r7, sp, #0 + 8002912: 6078 str r0, [r7, #4] + 8002914: 460b mov r3, r1 + 8002916: 807b strh r3, [r7, #2] + 8002918: 4613 mov r3, r2 + 800291a: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8002628: 787b ldrb r3, [r7, #1] - 800262a: 2b00 cmp r3, #0 - 800262c: d003 beq.n 8002636 + 800291c: 787b ldrb r3, [r7, #1] + 800291e: 2b00 cmp r3, #0 + 8002920: d003 beq.n 800292a { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 800262e: 887a ldrh r2, [r7, #2] - 8002630: 687b ldr r3, [r7, #4] - 8002632: 619a str r2, [r3, #24] + 8002922: 887a ldrh r2, [r7, #2] + 8002924: 687b ldr r3, [r7, #4] + 8002926: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; } } - 8002634: e003 b.n 800263e + 8002928: e003 b.n 8002932 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; - 8002636: 887b ldrh r3, [r7, #2] - 8002638: 041a lsls r2, r3, #16 - 800263a: 687b ldr r3, [r7, #4] - 800263c: 619a str r2, [r3, #24] + 800292a: 887b ldrh r3, [r7, #2] + 800292c: 041a lsls r2, r3, #16 + 800292e: 687b ldr r3, [r7, #4] + 8002930: 619a str r2, [r3, #24] } - 800263e: bf00 nop - 8002640: 370c adds r7, #12 - 8002642: 46bd mov sp, r7 - 8002644: bc80 pop {r7} - 8002646: 4770 bx lr + 8002932: bf00 nop + 8002934: 370c adds r7, #12 + 8002936: 46bd mov sp, r7 + 8002938: bc80 pop {r7} + 800293a: 4770 bx lr -08002648 : +0800293c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8002648: b580 push {r7, lr} - 800264a: b088 sub sp, #32 - 800264c: af00 add r7, sp, #0 - 800264e: 6078 str r0, [r7, #4] + 800293c: b580 push {r7, lr} + 800293e: b088 sub sp, #32 + 8002940: af00 add r7, sp, #0 + 8002942: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check the parameters */ if(RCC_OscInitStruct == NULL) - 8002650: 687b ldr r3, [r7, #4] - 8002652: 2b00 cmp r3, #0 - 8002654: d101 bne.n 800265a + 8002944: 687b ldr r3, [r7, #4] + 8002946: 2b00 cmp r3, #0 + 8002948: d101 bne.n 800294e { return HAL_ERROR; - 8002656: 2301 movs r3, #1 - 8002658: e31d b.n 8002c96 + 800294a: 2301 movs r3, #1 + 800294c: e31d b.n 8002f8a } assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); - 800265a: 4b94 ldr r3, [pc, #592] @ (80028ac ) - 800265c: 689b ldr r3, [r3, #8] - 800265e: f003 030c and.w r3, r3, #12 - 8002662: 61bb str r3, [r7, #24] + 800294e: 4b94 ldr r3, [pc, #592] @ (8002ba0 ) + 8002950: 689b ldr r3, [r3, #8] + 8002952: f003 030c and.w r3, r3, #12 + 8002956: 61bb str r3, [r7, #24] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8002664: 4b91 ldr r3, [pc, #580] @ (80028ac ) - 8002666: 689b ldr r3, [r3, #8] - 8002668: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800266c: 617b str r3, [r7, #20] + 8002958: 4b91 ldr r3, [pc, #580] @ (8002ba0 ) + 800295a: 689b ldr r3, [r3, #8] + 800295c: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8002960: 617b str r3, [r7, #20] /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 800266e: 687b ldr r3, [r7, #4] - 8002670: 681b ldr r3, [r3, #0] - 8002672: f003 0301 and.w r3, r3, #1 - 8002676: 2b00 cmp r3, #0 - 8002678: d07b beq.n 8002772 + 8002962: 687b ldr r3, [r7, #4] + 8002964: 681b ldr r3, [r3, #0] + 8002966: f003 0301 and.w r3, r3, #1 + 800296a: 2b00 cmp r3, #0 + 800296c: d07b beq.n 8002a66 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE) - 800267a: 69bb ldr r3, [r7, #24] - 800267c: 2b08 cmp r3, #8 - 800267e: d006 beq.n 800268e + 800296e: 69bb ldr r3, [r7, #24] + 8002970: 2b08 cmp r3, #8 + 8002972: d006 beq.n 8002982 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE))) - 8002680: 69bb ldr r3, [r7, #24] - 8002682: 2b0c cmp r3, #12 - 8002684: d10f bne.n 80026a6 - 8002686: 697b ldr r3, [r7, #20] - 8002688: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 800268c: d10b bne.n 80026a6 + 8002974: 69bb ldr r3, [r7, #24] + 8002976: 2b0c cmp r3, #12 + 8002978: d10f bne.n 800299a + 800297a: 697b ldr r3, [r7, #20] + 800297c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8002980: d10b bne.n 800299a { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800268e: 4b87 ldr r3, [pc, #540] @ (80028ac ) - 8002690: 681b ldr r3, [r3, #0] - 8002692: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8002696: 2b00 cmp r3, #0 - 8002698: d06a beq.n 8002770 - 800269a: 687b ldr r3, [r7, #4] - 800269c: 685b ldr r3, [r3, #4] - 800269e: 2b00 cmp r3, #0 - 80026a0: d166 bne.n 8002770 + 8002982: 4b87 ldr r3, [pc, #540] @ (8002ba0 ) + 8002984: 681b ldr r3, [r3, #0] + 8002986: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800298a: 2b00 cmp r3, #0 + 800298c: d06a beq.n 8002a64 + 800298e: 687b ldr r3, [r7, #4] + 8002990: 685b ldr r3, [r3, #4] + 8002992: 2b00 cmp r3, #0 + 8002994: d166 bne.n 8002a64 { return HAL_ERROR; - 80026a2: 2301 movs r3, #1 - 80026a4: e2f7 b.n 8002c96 + 8002996: 2301 movs r3, #1 + 8002998: e2f7 b.n 8002f8a } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80026a6: 687b ldr r3, [r7, #4] - 80026a8: 685b ldr r3, [r3, #4] - 80026aa: 2b01 cmp r3, #1 - 80026ac: d106 bne.n 80026bc - 80026ae: 4b7f ldr r3, [pc, #508] @ (80028ac ) - 80026b0: 681b ldr r3, [r3, #0] - 80026b2: 4a7e ldr r2, [pc, #504] @ (80028ac ) - 80026b4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80026b8: 6013 str r3, [r2, #0] - 80026ba: e02d b.n 8002718 - 80026bc: 687b ldr r3, [r7, #4] - 80026be: 685b ldr r3, [r3, #4] - 80026c0: 2b00 cmp r3, #0 - 80026c2: d10c bne.n 80026de - 80026c4: 4b79 ldr r3, [pc, #484] @ (80028ac ) - 80026c6: 681b ldr r3, [r3, #0] - 80026c8: 4a78 ldr r2, [pc, #480] @ (80028ac ) - 80026ca: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 80026ce: 6013 str r3, [r2, #0] - 80026d0: 4b76 ldr r3, [pc, #472] @ (80028ac ) - 80026d2: 681b ldr r3, [r3, #0] - 80026d4: 4a75 ldr r2, [pc, #468] @ (80028ac ) - 80026d6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 80026da: 6013 str r3, [r2, #0] - 80026dc: e01c b.n 8002718 - 80026de: 687b ldr r3, [r7, #4] - 80026e0: 685b ldr r3, [r3, #4] - 80026e2: 2b05 cmp r3, #5 - 80026e4: d10c bne.n 8002700 - 80026e6: 4b71 ldr r3, [pc, #452] @ (80028ac ) - 80026e8: 681b ldr r3, [r3, #0] - 80026ea: 4a70 ldr r2, [pc, #448] @ (80028ac ) - 80026ec: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 80026f0: 6013 str r3, [r2, #0] - 80026f2: 4b6e ldr r3, [pc, #440] @ (80028ac ) - 80026f4: 681b ldr r3, [r3, #0] - 80026f6: 4a6d ldr r2, [pc, #436] @ (80028ac ) - 80026f8: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80026fc: 6013 str r3, [r2, #0] - 80026fe: e00b b.n 8002718 - 8002700: 4b6a ldr r3, [pc, #424] @ (80028ac ) - 8002702: 681b ldr r3, [r3, #0] - 8002704: 4a69 ldr r2, [pc, #420] @ (80028ac ) - 8002706: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 800270a: 6013 str r3, [r2, #0] - 800270c: 4b67 ldr r3, [pc, #412] @ (80028ac ) - 800270e: 681b ldr r3, [r3, #0] - 8002710: 4a66 ldr r2, [pc, #408] @ (80028ac ) - 8002712: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8002716: 6013 str r3, [r2, #0] + 800299a: 687b ldr r3, [r7, #4] + 800299c: 685b ldr r3, [r3, #4] + 800299e: 2b01 cmp r3, #1 + 80029a0: d106 bne.n 80029b0 + 80029a2: 4b7f ldr r3, [pc, #508] @ (8002ba0 ) + 80029a4: 681b ldr r3, [r3, #0] + 80029a6: 4a7e ldr r2, [pc, #504] @ (8002ba0 ) + 80029a8: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 80029ac: 6013 str r3, [r2, #0] + 80029ae: e02d b.n 8002a0c + 80029b0: 687b ldr r3, [r7, #4] + 80029b2: 685b ldr r3, [r3, #4] + 80029b4: 2b00 cmp r3, #0 + 80029b6: d10c bne.n 80029d2 + 80029b8: 4b79 ldr r3, [pc, #484] @ (8002ba0 ) + 80029ba: 681b ldr r3, [r3, #0] + 80029bc: 4a78 ldr r2, [pc, #480] @ (8002ba0 ) + 80029be: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 80029c2: 6013 str r3, [r2, #0] + 80029c4: 4b76 ldr r3, [pc, #472] @ (8002ba0 ) + 80029c6: 681b ldr r3, [r3, #0] + 80029c8: 4a75 ldr r2, [pc, #468] @ (8002ba0 ) + 80029ca: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 80029ce: 6013 str r3, [r2, #0] + 80029d0: e01c b.n 8002a0c + 80029d2: 687b ldr r3, [r7, #4] + 80029d4: 685b ldr r3, [r3, #4] + 80029d6: 2b05 cmp r3, #5 + 80029d8: d10c bne.n 80029f4 + 80029da: 4b71 ldr r3, [pc, #452] @ (8002ba0 ) + 80029dc: 681b ldr r3, [r3, #0] + 80029de: 4a70 ldr r2, [pc, #448] @ (8002ba0 ) + 80029e0: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 80029e4: 6013 str r3, [r2, #0] + 80029e6: 4b6e ldr r3, [pc, #440] @ (8002ba0 ) + 80029e8: 681b ldr r3, [r3, #0] + 80029ea: 4a6d ldr r2, [pc, #436] @ (8002ba0 ) + 80029ec: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 80029f0: 6013 str r3, [r2, #0] + 80029f2: e00b b.n 8002a0c + 80029f4: 4b6a ldr r3, [pc, #424] @ (8002ba0 ) + 80029f6: 681b ldr r3, [r3, #0] + 80029f8: 4a69 ldr r2, [pc, #420] @ (8002ba0 ) + 80029fa: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 80029fe: 6013 str r3, [r2, #0] + 8002a00: 4b67 ldr r3, [pc, #412] @ (8002ba0 ) + 8002a02: 681b ldr r3, [r3, #0] + 8002a04: 4a66 ldr r2, [pc, #408] @ (8002ba0 ) + 8002a06: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8002a0a: 6013 str r3, [r2, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8002718: 687b ldr r3, [r7, #4] - 800271a: 685b ldr r3, [r3, #4] - 800271c: 2b00 cmp r3, #0 - 800271e: d013 beq.n 8002748 + 8002a0c: 687b ldr r3, [r7, #4] + 8002a0e: 685b ldr r3, [r3, #4] + 8002a10: 2b00 cmp r3, #0 + 8002a12: d013 beq.n 8002a3c { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002720: f7fe ff1e bl 8001560 - 8002724: 6138 str r0, [r7, #16] + 8002a14: f7ff f862 bl 8001adc + 8002a18: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8002726: e008 b.n 800273a + 8002a1a: e008 b.n 8002a2e { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8002728: f7fe ff1a bl 8001560 - 800272c: 4602 mov r2, r0 - 800272e: 693b ldr r3, [r7, #16] - 8002730: 1ad3 subs r3, r2, r3 - 8002732: 2b64 cmp r3, #100 @ 0x64 - 8002734: d901 bls.n 800273a + 8002a1c: f7ff f85e bl 8001adc + 8002a20: 4602 mov r2, r0 + 8002a22: 693b ldr r3, [r7, #16] + 8002a24: 1ad3 subs r3, r2, r3 + 8002a26: 2b64 cmp r3, #100 @ 0x64 + 8002a28: d901 bls.n 8002a2e { return HAL_TIMEOUT; - 8002736: 2303 movs r3, #3 - 8002738: e2ad b.n 8002c96 + 8002a2a: 2303 movs r3, #3 + 8002a2c: e2ad b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 800273a: 4b5c ldr r3, [pc, #368] @ (80028ac ) - 800273c: 681b ldr r3, [r3, #0] - 800273e: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8002742: 2b00 cmp r3, #0 - 8002744: d0f0 beq.n 8002728 - 8002746: e014 b.n 8002772 + 8002a2e: 4b5c ldr r3, [pc, #368] @ (8002ba0 ) + 8002a30: 681b ldr r3, [r3, #0] + 8002a32: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8002a36: 2b00 cmp r3, #0 + 8002a38: d0f0 beq.n 8002a1c + 8002a3a: e014 b.n 8002a66 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002748: f7fe ff0a bl 8001560 - 800274c: 6138 str r0, [r7, #16] + 8002a3c: f7ff f84e bl 8001adc + 8002a40: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 800274e: e008 b.n 8002762 + 8002a42: e008 b.n 8002a56 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8002750: f7fe ff06 bl 8001560 - 8002754: 4602 mov r2, r0 - 8002756: 693b ldr r3, [r7, #16] - 8002758: 1ad3 subs r3, r2, r3 - 800275a: 2b64 cmp r3, #100 @ 0x64 - 800275c: d901 bls.n 8002762 + 8002a44: f7ff f84a bl 8001adc + 8002a48: 4602 mov r2, r0 + 8002a4a: 693b ldr r3, [r7, #16] + 8002a4c: 1ad3 subs r3, r2, r3 + 8002a4e: 2b64 cmp r3, #100 @ 0x64 + 8002a50: d901 bls.n 8002a56 { return HAL_TIMEOUT; - 800275e: 2303 movs r3, #3 - 8002760: e299 b.n 8002c96 + 8002a52: 2303 movs r3, #3 + 8002a54: e299 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8002762: 4b52 ldr r3, [pc, #328] @ (80028ac ) - 8002764: 681b ldr r3, [r3, #0] - 8002766: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800276a: 2b00 cmp r3, #0 - 800276c: d1f0 bne.n 8002750 - 800276e: e000 b.n 8002772 + 8002a56: 4b52 ldr r3, [pc, #328] @ (8002ba0 ) + 8002a58: 681b ldr r3, [r3, #0] + 8002a5a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8002a5e: 2b00 cmp r3, #0 + 8002a60: d1f0 bne.n 8002a44 + 8002a62: e000 b.n 8002a66 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8002770: bf00 nop + 8002a64: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8002772: 687b ldr r3, [r7, #4] - 8002774: 681b ldr r3, [r3, #0] - 8002776: f003 0302 and.w r3, r3, #2 - 800277a: 2b00 cmp r3, #0 - 800277c: d05a beq.n 8002834 + 8002a66: 687b ldr r3, [r7, #4] + 8002a68: 681b ldr r3, [r3, #0] + 8002a6a: f003 0302 and.w r3, r3, #2 + 8002a6e: 2b00 cmp r3, #0 + 8002a70: d05a beq.n 8002b28 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI) - 800277e: 69bb ldr r3, [r7, #24] - 8002780: 2b04 cmp r3, #4 - 8002782: d005 beq.n 8002790 + 8002a72: 69bb ldr r3, [r7, #24] + 8002a74: 2b04 cmp r3, #4 + 8002a76: d005 beq.n 8002a84 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI))) - 8002784: 69bb ldr r3, [r7, #24] - 8002786: 2b0c cmp r3, #12 - 8002788: d119 bne.n 80027be - 800278a: 697b ldr r3, [r7, #20] - 800278c: 2b00 cmp r3, #0 - 800278e: d116 bne.n 80027be + 8002a78: 69bb ldr r3, [r7, #24] + 8002a7a: 2b0c cmp r3, #12 + 8002a7c: d119 bne.n 8002ab2 + 8002a7e: 697b ldr r3, [r7, #20] + 8002a80: 2b00 cmp r3, #0 + 8002a82: d116 bne.n 8002ab2 { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8002790: 4b46 ldr r3, [pc, #280] @ (80028ac ) - 8002792: 681b ldr r3, [r3, #0] - 8002794: f003 0302 and.w r3, r3, #2 - 8002798: 2b00 cmp r3, #0 - 800279a: d005 beq.n 80027a8 - 800279c: 687b ldr r3, [r7, #4] - 800279e: 68db ldr r3, [r3, #12] - 80027a0: 2b01 cmp r3, #1 - 80027a2: d001 beq.n 80027a8 + 8002a84: 4b46 ldr r3, [pc, #280] @ (8002ba0 ) + 8002a86: 681b ldr r3, [r3, #0] + 8002a88: f003 0302 and.w r3, r3, #2 + 8002a8c: 2b00 cmp r3, #0 + 8002a8e: d005 beq.n 8002a9c + 8002a90: 687b ldr r3, [r7, #4] + 8002a92: 68db ldr r3, [r3, #12] + 8002a94: 2b01 cmp r3, #1 + 8002a96: d001 beq.n 8002a9c { return HAL_ERROR; - 80027a4: 2301 movs r3, #1 - 80027a6: e276 b.n 8002c96 + 8002a98: 2301 movs r3, #1 + 8002a9a: e276 b.n 8002f8a } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80027a8: 4b40 ldr r3, [pc, #256] @ (80028ac ) - 80027aa: 685b ldr r3, [r3, #4] - 80027ac: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 - 80027b0: 687b ldr r3, [r7, #4] - 80027b2: 691b ldr r3, [r3, #16] - 80027b4: 021b lsls r3, r3, #8 - 80027b6: 493d ldr r1, [pc, #244] @ (80028ac ) - 80027b8: 4313 orrs r3, r2 - 80027ba: 604b str r3, [r1, #4] + 8002a9c: 4b40 ldr r3, [pc, #256] @ (8002ba0 ) + 8002a9e: 685b ldr r3, [r3, #4] + 8002aa0: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 + 8002aa4: 687b ldr r3, [r7, #4] + 8002aa6: 691b ldr r3, [r3, #16] + 8002aa8: 021b lsls r3, r3, #8 + 8002aaa: 493d ldr r1, [pc, #244] @ (8002ba0 ) + 8002aac: 4313 orrs r3, r2 + 8002aae: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80027bc: e03a b.n 8002834 + 8002ab0: e03a b.n 8002b28 } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 80027be: 687b ldr r3, [r7, #4] - 80027c0: 68db ldr r3, [r3, #12] - 80027c2: 2b00 cmp r3, #0 - 80027c4: d020 beq.n 8002808 + 8002ab2: 687b ldr r3, [r7, #4] + 8002ab4: 68db ldr r3, [r3, #12] + 8002ab6: 2b00 cmp r3, #0 + 8002ab8: d020 beq.n 8002afc { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 80027c6: 4b3a ldr r3, [pc, #232] @ (80028b0 ) - 80027c8: 2201 movs r2, #1 - 80027ca: 601a str r2, [r3, #0] + 8002aba: 4b3a ldr r3, [pc, #232] @ (8002ba4 ) + 8002abc: 2201 movs r2, #1 + 8002abe: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80027cc: f7fe fec8 bl 8001560 - 80027d0: 6138 str r0, [r7, #16] + 8002ac0: f7ff f80c bl 8001adc + 8002ac4: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 80027d2: e008 b.n 80027e6 + 8002ac6: e008 b.n 8002ada { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80027d4: f7fe fec4 bl 8001560 - 80027d8: 4602 mov r2, r0 - 80027da: 693b ldr r3, [r7, #16] - 80027dc: 1ad3 subs r3, r2, r3 - 80027de: 2b02 cmp r3, #2 - 80027e0: d901 bls.n 80027e6 + 8002ac8: f7ff f808 bl 8001adc + 8002acc: 4602 mov r2, r0 + 8002ace: 693b ldr r3, [r7, #16] + 8002ad0: 1ad3 subs r3, r2, r3 + 8002ad2: 2b02 cmp r3, #2 + 8002ad4: d901 bls.n 8002ada { return HAL_TIMEOUT; - 80027e2: 2303 movs r3, #3 - 80027e4: e257 b.n 8002c96 + 8002ad6: 2303 movs r3, #3 + 8002ad8: e257 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 80027e6: 4b31 ldr r3, [pc, #196] @ (80028ac ) - 80027e8: 681b ldr r3, [r3, #0] - 80027ea: f003 0302 and.w r3, r3, #2 - 80027ee: 2b00 cmp r3, #0 - 80027f0: d0f0 beq.n 80027d4 + 8002ada: 4b31 ldr r3, [pc, #196] @ (8002ba0 ) + 8002adc: 681b ldr r3, [r3, #0] + 8002ade: f003 0302 and.w r3, r3, #2 + 8002ae2: 2b00 cmp r3, #0 + 8002ae4: d0f0 beq.n 8002ac8 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80027f2: 4b2e ldr r3, [pc, #184] @ (80028ac ) - 80027f4: 685b ldr r3, [r3, #4] - 80027f6: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 - 80027fa: 687b ldr r3, [r7, #4] - 80027fc: 691b ldr r3, [r3, #16] - 80027fe: 021b lsls r3, r3, #8 - 8002800: 492a ldr r1, [pc, #168] @ (80028ac ) - 8002802: 4313 orrs r3, r2 - 8002804: 604b str r3, [r1, #4] - 8002806: e015 b.n 8002834 + 8002ae6: 4b2e ldr r3, [pc, #184] @ (8002ba0 ) + 8002ae8: 685b ldr r3, [r3, #4] + 8002aea: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 + 8002aee: 687b ldr r3, [r7, #4] + 8002af0: 691b ldr r3, [r3, #16] + 8002af2: 021b lsls r3, r3, #8 + 8002af4: 492a ldr r1, [pc, #168] @ (8002ba0 ) + 8002af6: 4313 orrs r3, r2 + 8002af8: 604b str r3, [r1, #4] + 8002afa: e015 b.n 8002b28 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8002808: 4b29 ldr r3, [pc, #164] @ (80028b0 ) - 800280a: 2200 movs r2, #0 - 800280c: 601a str r2, [r3, #0] + 8002afc: 4b29 ldr r3, [pc, #164] @ (8002ba4 ) + 8002afe: 2200 movs r2, #0 + 8002b00: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800280e: f7fe fea7 bl 8001560 - 8002812: 6138 str r0, [r7, #16] + 8002b02: f7fe ffeb bl 8001adc + 8002b06: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 8002814: e008 b.n 8002828 + 8002b08: e008 b.n 8002b1c { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8002816: f7fe fea3 bl 8001560 - 800281a: 4602 mov r2, r0 - 800281c: 693b ldr r3, [r7, #16] - 800281e: 1ad3 subs r3, r2, r3 - 8002820: 2b02 cmp r3, #2 - 8002822: d901 bls.n 8002828 + 8002b0a: f7fe ffe7 bl 8001adc + 8002b0e: 4602 mov r2, r0 + 8002b10: 693b ldr r3, [r7, #16] + 8002b12: 1ad3 subs r3, r2, r3 + 8002b14: 2b02 cmp r3, #2 + 8002b16: d901 bls.n 8002b1c { return HAL_TIMEOUT; - 8002824: 2303 movs r3, #3 - 8002826: e236 b.n 8002c96 + 8002b18: 2303 movs r3, #3 + 8002b1a: e236 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 8002828: 4b20 ldr r3, [pc, #128] @ (80028ac ) - 800282a: 681b ldr r3, [r3, #0] - 800282c: f003 0302 and.w r3, r3, #2 - 8002830: 2b00 cmp r3, #0 - 8002832: d1f0 bne.n 8002816 + 8002b1c: 4b20 ldr r3, [pc, #128] @ (8002ba0 ) + 8002b1e: 681b ldr r3, [r3, #0] + 8002b20: f003 0302 and.w r3, r3, #2 + 8002b24: 2b00 cmp r3, #0 + 8002b26: d1f0 bne.n 8002b0a } } } } /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - 8002834: 687b ldr r3, [r7, #4] - 8002836: 681b ldr r3, [r3, #0] - 8002838: f003 0310 and.w r3, r3, #16 - 800283c: 2b00 cmp r3, #0 - 800283e: f000 80b8 beq.w 80029b2 + 8002b28: 687b ldr r3, [r7, #4] + 8002b2a: 681b ldr r3, [r3, #0] + 8002b2c: f003 0310 and.w r3, r3, #16 + 8002b30: 2b00 cmp r3, #0 + 8002b32: f000 80b8 beq.w 8002ca6 { /* When the MSI is used as system clock it will not be disabled */ if(sysclk_source == RCC_CFGR_SWS_MSI) - 8002842: 69bb ldr r3, [r7, #24] - 8002844: 2b00 cmp r3, #0 - 8002846: d170 bne.n 800292a + 8002b36: 69bb ldr r3, [r7, #24] + 8002b38: 2b00 cmp r3, #0 + 8002b3a: d170 bne.n 8002c1e { if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - 8002848: 4b18 ldr r3, [pc, #96] @ (80028ac ) - 800284a: 681b ldr r3, [r3, #0] - 800284c: f403 7300 and.w r3, r3, #512 @ 0x200 - 8002850: 2b00 cmp r3, #0 - 8002852: d005 beq.n 8002860 - 8002854: 687b ldr r3, [r7, #4] - 8002856: 699b ldr r3, [r3, #24] - 8002858: 2b00 cmp r3, #0 - 800285a: d101 bne.n 8002860 + 8002b3c: 4b18 ldr r3, [pc, #96] @ (8002ba0 ) + 8002b3e: 681b ldr r3, [r3, #0] + 8002b40: f403 7300 and.w r3, r3, #512 @ 0x200 + 8002b44: 2b00 cmp r3, #0 + 8002b46: d005 beq.n 8002b54 + 8002b48: 687b ldr r3, [r7, #4] + 8002b4a: 699b ldr r3, [r3, #24] + 8002b4c: 2b00 cmp r3, #0 + 8002b4e: d101 bne.n 8002b54 { return HAL_ERROR; - 800285c: 2301 movs r3, #1 - 800285e: e21a b.n 8002c96 + 8002b50: 2301 movs r3, #1 + 8002b52: e21a b.n 8002f8a assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) - 8002860: 687b ldr r3, [r7, #4] - 8002862: 6a1a ldr r2, [r3, #32] - 8002864: 4b11 ldr r3, [pc, #68] @ (80028ac ) - 8002866: 685b ldr r3, [r3, #4] - 8002868: f403 4360 and.w r3, r3, #57344 @ 0xe000 - 800286c: 429a cmp r2, r3 - 800286e: d921 bls.n 80028b4 + 8002b54: 687b ldr r3, [r7, #4] + 8002b56: 6a1a ldr r2, [r3, #32] + 8002b58: 4b11 ldr r3, [pc, #68] @ (8002ba0 ) + 8002b5a: 685b ldr r3, [r3, #4] + 8002b5c: f403 4360 and.w r3, r3, #57344 @ 0xe000 + 8002b60: 429a cmp r2, r3 + 8002b62: d921 bls.n 8002ba8 { /* First increase number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - 8002870: 687b ldr r3, [r7, #4] - 8002872: 6a1b ldr r3, [r3, #32] - 8002874: 4618 mov r0, r3 - 8002876: f000 fc09 bl 800308c - 800287a: 4603 mov r3, r0 - 800287c: 2b00 cmp r3, #0 - 800287e: d001 beq.n 8002884 + 8002b64: 687b ldr r3, [r7, #4] + 8002b66: 6a1b ldr r3, [r3, #32] + 8002b68: 4618 mov r0, r3 + 8002b6a: f000 fc09 bl 8003380 + 8002b6e: 4603 mov r3, r0 + 8002b70: 2b00 cmp r3, #0 + 8002b72: d001 beq.n 8002b78 { return HAL_ERROR; - 8002880: 2301 movs r3, #1 - 8002882: e208 b.n 8002c96 + 8002b74: 2301 movs r3, #1 + 8002b76: e208 b.n 8002f8a } /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 8002884: 4b09 ldr r3, [pc, #36] @ (80028ac ) - 8002886: 685b ldr r3, [r3, #4] - 8002888: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 800288c: 687b ldr r3, [r7, #4] - 800288e: 6a1b ldr r3, [r3, #32] - 8002890: 4906 ldr r1, [pc, #24] @ (80028ac ) - 8002892: 4313 orrs r3, r2 - 8002894: 604b str r3, [r1, #4] + 8002b78: 4b09 ldr r3, [pc, #36] @ (8002ba0 ) + 8002b7a: 685b ldr r3, [r3, #4] + 8002b7c: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 8002b80: 687b ldr r3, [r7, #4] + 8002b82: 6a1b ldr r3, [r3, #32] + 8002b84: 4906 ldr r1, [pc, #24] @ (8002ba0 ) + 8002b86: 4313 orrs r3, r2 + 8002b88: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8002896: 4b05 ldr r3, [pc, #20] @ (80028ac ) - 8002898: 685b ldr r3, [r3, #4] - 800289a: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 800289e: 687b ldr r3, [r7, #4] - 80028a0: 69db ldr r3, [r3, #28] - 80028a2: 061b lsls r3, r3, #24 - 80028a4: 4901 ldr r1, [pc, #4] @ (80028ac ) - 80028a6: 4313 orrs r3, r2 - 80028a8: 604b str r3, [r1, #4] - 80028aa: e020 b.n 80028ee - 80028ac: 40023800 .word 0x40023800 - 80028b0: 42470000 .word 0x42470000 + 8002b8a: 4b05 ldr r3, [pc, #20] @ (8002ba0 ) + 8002b8c: 685b ldr r3, [r3, #4] + 8002b8e: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 8002b92: 687b ldr r3, [r7, #4] + 8002b94: 69db ldr r3, [r3, #28] + 8002b96: 061b lsls r3, r3, #24 + 8002b98: 4901 ldr r1, [pc, #4] @ (8002ba0 ) + 8002b9a: 4313 orrs r3, r2 + 8002b9c: 604b str r3, [r1, #4] + 8002b9e: e020 b.n 8002be2 + 8002ba0: 40023800 .word 0x40023800 + 8002ba4: 42470000 .word 0x42470000 } else { /* Else, keep current flash latency while decreasing applies */ /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 80028b4: 4b99 ldr r3, [pc, #612] @ (8002b1c ) - 80028b6: 685b ldr r3, [r3, #4] - 80028b8: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 80028bc: 687b ldr r3, [r7, #4] - 80028be: 6a1b ldr r3, [r3, #32] - 80028c0: 4996 ldr r1, [pc, #600] @ (8002b1c ) - 80028c2: 4313 orrs r3, r2 - 80028c4: 604b str r3, [r1, #4] + 8002ba8: 4b99 ldr r3, [pc, #612] @ (8002e10 ) + 8002baa: 685b ldr r3, [r3, #4] + 8002bac: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 8002bb0: 687b ldr r3, [r7, #4] + 8002bb2: 6a1b ldr r3, [r3, #32] + 8002bb4: 4996 ldr r1, [pc, #600] @ (8002e10 ) + 8002bb6: 4313 orrs r3, r2 + 8002bb8: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 80028c6: 4b95 ldr r3, [pc, #596] @ (8002b1c ) - 80028c8: 685b ldr r3, [r3, #4] - 80028ca: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 80028ce: 687b ldr r3, [r7, #4] - 80028d0: 69db ldr r3, [r3, #28] - 80028d2: 061b lsls r3, r3, #24 - 80028d4: 4991 ldr r1, [pc, #580] @ (8002b1c ) - 80028d6: 4313 orrs r3, r2 - 80028d8: 604b str r3, [r1, #4] + 8002bba: 4b95 ldr r3, [pc, #596] @ (8002e10 ) + 8002bbc: 685b ldr r3, [r3, #4] + 8002bbe: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 8002bc2: 687b ldr r3, [r7, #4] + 8002bc4: 69db ldr r3, [r3, #28] + 8002bc6: 061b lsls r3, r3, #24 + 8002bc8: 4991 ldr r1, [pc, #580] @ (8002e10 ) + 8002bca: 4313 orrs r3, r2 + 8002bcc: 604b str r3, [r1, #4] /* Decrease number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - 80028da: 687b ldr r3, [r7, #4] - 80028dc: 6a1b ldr r3, [r3, #32] - 80028de: 4618 mov r0, r3 - 80028e0: f000 fbd4 bl 800308c - 80028e4: 4603 mov r3, r0 - 80028e6: 2b00 cmp r3, #0 - 80028e8: d001 beq.n 80028ee + 8002bce: 687b ldr r3, [r7, #4] + 8002bd0: 6a1b ldr r3, [r3, #32] + 8002bd2: 4618 mov r0, r3 + 8002bd4: f000 fbd4 bl 8003380 + 8002bd8: 4603 mov r3, r0 + 8002bda: 2b00 cmp r3, #0 + 8002bdc: d001 beq.n 8002be2 { return HAL_ERROR; - 80028ea: 2301 movs r3, #1 - 80028ec: e1d3 b.n 8002c96 + 8002bde: 2301 movs r3, #1 + 8002be0: e1d3 b.n 8002f8a } } /* Update the SystemCoreClock global variable */ SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 80028ee: 687b ldr r3, [r7, #4] - 80028f0: 6a1b ldr r3, [r3, #32] - 80028f2: 0b5b lsrs r3, r3, #13 - 80028f4: 3301 adds r3, #1 - 80028f6: f44f 4200 mov.w r2, #32768 @ 0x8000 - 80028fa: fa02 f303 lsl.w r3, r2, r3 + 8002be2: 687b ldr r3, [r7, #4] + 8002be4: 6a1b ldr r3, [r3, #32] + 8002be6: 0b5b lsrs r3, r3, #13 + 8002be8: 3301 adds r3, #1 + 8002bea: f44f 4200 mov.w r2, #32768 @ 0x8000 + 8002bee: fa02 f303 lsl.w r3, r2, r3 >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; - 80028fe: 4a87 ldr r2, [pc, #540] @ (8002b1c ) - 8002900: 6892 ldr r2, [r2, #8] - 8002902: 0912 lsrs r2, r2, #4 - 8002904: f002 020f and.w r2, r2, #15 - 8002908: 4985 ldr r1, [pc, #532] @ (8002b20 ) - 800290a: 5c8a ldrb r2, [r1, r2] - 800290c: 40d3 lsrs r3, r2 + 8002bf2: 4a87 ldr r2, [pc, #540] @ (8002e10 ) + 8002bf4: 6892 ldr r2, [r2, #8] + 8002bf6: 0912 lsrs r2, r2, #4 + 8002bf8: f002 020f and.w r2, r2, #15 + 8002bfc: 4985 ldr r1, [pc, #532] @ (8002e14 ) + 8002bfe: 5c8a ldrb r2, [r1, r2] + 8002c00: 40d3 lsrs r3, r2 SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 800290e: 4a85 ldr r2, [pc, #532] @ (8002b24 ) - 8002910: 6013 str r3, [r2, #0] + 8002c02: 4a85 ldr r2, [pc, #532] @ (8002e18 ) + 8002c04: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 8002912: 4b85 ldr r3, [pc, #532] @ (8002b28 ) - 8002914: 681b ldr r3, [r3, #0] - 8002916: 4618 mov r0, r3 - 8002918: f7fe fdd6 bl 80014c8 - 800291c: 4603 mov r3, r0 - 800291e: 73fb strb r3, [r7, #15] + 8002c06: 4b85 ldr r3, [pc, #532] @ (8002e1c ) + 8002c08: 681b ldr r3, [r3, #0] + 8002c0a: 4618 mov r0, r3 + 8002c0c: f7fe ff1a bl 8001a44 + 8002c10: 4603 mov r3, r0 + 8002c12: 73fb strb r3, [r7, #15] if(status != HAL_OK) - 8002920: 7bfb ldrb r3, [r7, #15] - 8002922: 2b00 cmp r3, #0 - 8002924: d045 beq.n 80029b2 + 8002c14: 7bfb ldrb r3, [r7, #15] + 8002c16: 2b00 cmp r3, #0 + 8002c18: d045 beq.n 8002ca6 { return status; - 8002926: 7bfb ldrb r3, [r7, #15] - 8002928: e1b5 b.n 8002c96 + 8002c1a: 7bfb ldrb r3, [r7, #15] + 8002c1c: e1b5 b.n 8002f8a { /* Check MSI State */ assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); /* Check the MSI State */ if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - 800292a: 687b ldr r3, [r7, #4] - 800292c: 699b ldr r3, [r3, #24] - 800292e: 2b00 cmp r3, #0 - 8002930: d029 beq.n 8002986 + 8002c1e: 687b ldr r3, [r7, #4] + 8002c20: 699b ldr r3, [r3, #24] + 8002c22: 2b00 cmp r3, #0 + 8002c24: d029 beq.n 8002c7a { /* Enable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_ENABLE(); - 8002932: 4b7e ldr r3, [pc, #504] @ (8002b2c ) - 8002934: 2201 movs r2, #1 - 8002936: 601a str r2, [r3, #0] + 8002c26: 4b7e ldr r3, [pc, #504] @ (8002e20 ) + 8002c28: 2201 movs r2, #1 + 8002c2a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002938: f7fe fe12 bl 8001560 - 800293c: 6138 str r0, [r7, #16] + 8002c2c: f7fe ff56 bl 8001adc + 8002c30: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 800293e: e008 b.n 8002952 + 8002c32: e008 b.n 8002c46 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8002940: f7fe fe0e bl 8001560 - 8002944: 4602 mov r2, r0 - 8002946: 693b ldr r3, [r7, #16] - 8002948: 1ad3 subs r3, r2, r3 - 800294a: 2b02 cmp r3, #2 - 800294c: d901 bls.n 8002952 + 8002c34: f7fe ff52 bl 8001adc + 8002c38: 4602 mov r2, r0 + 8002c3a: 693b ldr r3, [r7, #16] + 8002c3c: 1ad3 subs r3, r2, r3 + 8002c3e: 2b02 cmp r3, #2 + 8002c40: d901 bls.n 8002c46 { return HAL_TIMEOUT; - 800294e: 2303 movs r3, #3 - 8002950: e1a1 b.n 8002c96 + 8002c42: 2303 movs r3, #3 + 8002c44: e1a1 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8002952: 4b72 ldr r3, [pc, #456] @ (8002b1c ) - 8002954: 681b ldr r3, [r3, #0] - 8002956: f403 7300 and.w r3, r3, #512 @ 0x200 - 800295a: 2b00 cmp r3, #0 - 800295c: d0f0 beq.n 8002940 + 8002c46: 4b72 ldr r3, [pc, #456] @ (8002e10 ) + 8002c48: 681b ldr r3, [r3, #0] + 8002c4a: f403 7300 and.w r3, r3, #512 @ 0x200 + 8002c4e: 2b00 cmp r3, #0 + 8002c50: d0f0 beq.n 8002c34 /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 800295e: 4b6f ldr r3, [pc, #444] @ (8002b1c ) - 8002960: 685b ldr r3, [r3, #4] - 8002962: f423 4260 bic.w r2, r3, #57344 @ 0xe000 - 8002966: 687b ldr r3, [r7, #4] - 8002968: 6a1b ldr r3, [r3, #32] - 800296a: 496c ldr r1, [pc, #432] @ (8002b1c ) - 800296c: 4313 orrs r3, r2 - 800296e: 604b str r3, [r1, #4] + 8002c52: 4b6f ldr r3, [pc, #444] @ (8002e10 ) + 8002c54: 685b ldr r3, [r3, #4] + 8002c56: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 8002c5a: 687b ldr r3, [r7, #4] + 8002c5c: 6a1b ldr r3, [r3, #32] + 8002c5e: 496c ldr r1, [pc, #432] @ (8002e10 ) + 8002c60: 4313 orrs r3, r2 + 8002c62: 604b str r3, [r1, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8002970: 4b6a ldr r3, [pc, #424] @ (8002b1c ) - 8002972: 685b ldr r3, [r3, #4] - 8002974: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 - 8002978: 687b ldr r3, [r7, #4] - 800297a: 69db ldr r3, [r3, #28] - 800297c: 061b lsls r3, r3, #24 - 800297e: 4967 ldr r1, [pc, #412] @ (8002b1c ) - 8002980: 4313 orrs r3, r2 - 8002982: 604b str r3, [r1, #4] - 8002984: e015 b.n 80029b2 + 8002c64: 4b6a ldr r3, [pc, #424] @ (8002e10 ) + 8002c66: 685b ldr r3, [r3, #4] + 8002c68: f023 427f bic.w r2, r3, #4278190080 @ 0xff000000 + 8002c6c: 687b ldr r3, [r7, #4] + 8002c6e: 69db ldr r3, [r3, #28] + 8002c70: 061b lsls r3, r3, #24 + 8002c72: 4967 ldr r1, [pc, #412] @ (8002e10 ) + 8002c74: 4313 orrs r3, r2 + 8002c76: 604b str r3, [r1, #4] + 8002c78: e015 b.n 8002ca6 } else { /* Disable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_DISABLE(); - 8002986: 4b69 ldr r3, [pc, #420] @ (8002b2c ) - 8002988: 2200 movs r2, #0 - 800298a: 601a str r2, [r3, #0] + 8002c7a: 4b69 ldr r3, [pc, #420] @ (8002e20 ) + 8002c7c: 2200 movs r2, #0 + 8002c7e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800298c: f7fe fde8 bl 8001560 - 8002990: 6138 str r0, [r7, #16] + 8002c80: f7fe ff2c bl 8001adc + 8002c84: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 8002992: e008 b.n 80029a6 + 8002c86: e008 b.n 8002c9a { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8002994: f7fe fde4 bl 8001560 - 8002998: 4602 mov r2, r0 - 800299a: 693b ldr r3, [r7, #16] - 800299c: 1ad3 subs r3, r2, r3 - 800299e: 2b02 cmp r3, #2 - 80029a0: d901 bls.n 80029a6 + 8002c88: f7fe ff28 bl 8001adc + 8002c8c: 4602 mov r2, r0 + 8002c8e: 693b ldr r3, [r7, #16] + 8002c90: 1ad3 subs r3, r2, r3 + 8002c92: 2b02 cmp r3, #2 + 8002c94: d901 bls.n 8002c9a { return HAL_TIMEOUT; - 80029a2: 2303 movs r3, #3 - 80029a4: e177 b.n 8002c96 + 8002c96: 2303 movs r3, #3 + 8002c98: e177 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 80029a6: 4b5d ldr r3, [pc, #372] @ (8002b1c ) - 80029a8: 681b ldr r3, [r3, #0] - 80029aa: f403 7300 and.w r3, r3, #512 @ 0x200 - 80029ae: 2b00 cmp r3, #0 - 80029b0: d1f0 bne.n 8002994 + 8002c9a: 4b5d ldr r3, [pc, #372] @ (8002e10 ) + 8002c9c: 681b ldr r3, [r3, #0] + 8002c9e: f403 7300 and.w r3, r3, #512 @ 0x200 + 8002ca2: 2b00 cmp r3, #0 + 8002ca4: d1f0 bne.n 8002c88 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80029b2: 687b ldr r3, [r7, #4] - 80029b4: 681b ldr r3, [r3, #0] - 80029b6: f003 0308 and.w r3, r3, #8 - 80029ba: 2b00 cmp r3, #0 - 80029bc: d030 beq.n 8002a20 + 8002ca6: 687b ldr r3, [r7, #4] + 8002ca8: 681b ldr r3, [r3, #0] + 8002caa: f003 0308 and.w r3, r3, #8 + 8002cae: 2b00 cmp r3, #0 + 8002cb0: d030 beq.n 8002d14 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80029be: 687b ldr r3, [r7, #4] - 80029c0: 695b ldr r3, [r3, #20] - 80029c2: 2b00 cmp r3, #0 - 80029c4: d016 beq.n 80029f4 + 8002cb2: 687b ldr r3, [r7, #4] + 8002cb4: 695b ldr r3, [r3, #20] + 8002cb6: 2b00 cmp r3, #0 + 8002cb8: d016 beq.n 8002ce8 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80029c6: 4b5a ldr r3, [pc, #360] @ (8002b30 ) - 80029c8: 2201 movs r2, #1 - 80029ca: 601a str r2, [r3, #0] + 8002cba: 4b5a ldr r3, [pc, #360] @ (8002e24 ) + 8002cbc: 2201 movs r2, #1 + 8002cbe: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80029cc: f7fe fdc8 bl 8001560 - 80029d0: 6138 str r0, [r7, #16] + 8002cc0: f7fe ff0c bl 8001adc + 8002cc4: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 80029d2: e008 b.n 80029e6 + 8002cc6: e008 b.n 8002cda { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80029d4: f7fe fdc4 bl 8001560 - 80029d8: 4602 mov r2, r0 - 80029da: 693b ldr r3, [r7, #16] - 80029dc: 1ad3 subs r3, r2, r3 - 80029de: 2b02 cmp r3, #2 - 80029e0: d901 bls.n 80029e6 + 8002cc8: f7fe ff08 bl 8001adc + 8002ccc: 4602 mov r2, r0 + 8002cce: 693b ldr r3, [r7, #16] + 8002cd0: 1ad3 subs r3, r2, r3 + 8002cd2: 2b02 cmp r3, #2 + 8002cd4: d901 bls.n 8002cda { return HAL_TIMEOUT; - 80029e2: 2303 movs r3, #3 - 80029e4: e157 b.n 8002c96 + 8002cd6: 2303 movs r3, #3 + 8002cd8: e157 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 80029e6: 4b4d ldr r3, [pc, #308] @ (8002b1c ) - 80029e8: 6b5b ldr r3, [r3, #52] @ 0x34 - 80029ea: f003 0302 and.w r3, r3, #2 - 80029ee: 2b00 cmp r3, #0 - 80029f0: d0f0 beq.n 80029d4 - 80029f2: e015 b.n 8002a20 + 8002cda: 4b4d ldr r3, [pc, #308] @ (8002e10 ) + 8002cdc: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002cde: f003 0302 and.w r3, r3, #2 + 8002ce2: 2b00 cmp r3, #0 + 8002ce4: d0f0 beq.n 8002cc8 + 8002ce6: e015 b.n 8002d14 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 80029f4: 4b4e ldr r3, [pc, #312] @ (8002b30 ) - 80029f6: 2200 movs r2, #0 - 80029f8: 601a str r2, [r3, #0] + 8002ce8: 4b4e ldr r3, [pc, #312] @ (8002e24 ) + 8002cea: 2200 movs r2, #0 + 8002cec: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80029fa: f7fe fdb1 bl 8001560 - 80029fe: 6138 str r0, [r7, #16] + 8002cee: f7fe fef5 bl 8001adc + 8002cf2: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8002a00: e008 b.n 8002a14 + 8002cf4: e008 b.n 8002d08 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8002a02: f7fe fdad bl 8001560 - 8002a06: 4602 mov r2, r0 - 8002a08: 693b ldr r3, [r7, #16] - 8002a0a: 1ad3 subs r3, r2, r3 - 8002a0c: 2b02 cmp r3, #2 - 8002a0e: d901 bls.n 8002a14 + 8002cf6: f7fe fef1 bl 8001adc + 8002cfa: 4602 mov r2, r0 + 8002cfc: 693b ldr r3, [r7, #16] + 8002cfe: 1ad3 subs r3, r2, r3 + 8002d00: 2b02 cmp r3, #2 + 8002d02: d901 bls.n 8002d08 { return HAL_TIMEOUT; - 8002a10: 2303 movs r3, #3 - 8002a12: e140 b.n 8002c96 + 8002d04: 2303 movs r3, #3 + 8002d06: e140 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8002a14: 4b41 ldr r3, [pc, #260] @ (8002b1c ) - 8002a16: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002a18: f003 0302 and.w r3, r3, #2 - 8002a1c: 2b00 cmp r3, #0 - 8002a1e: d1f0 bne.n 8002a02 + 8002d08: 4b41 ldr r3, [pc, #260] @ (8002e10 ) + 8002d0a: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002d0c: f003 0302 and.w r3, r3, #2 + 8002d10: 2b00 cmp r3, #0 + 8002d12: d1f0 bne.n 8002cf6 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8002a20: 687b ldr r3, [r7, #4] - 8002a22: 681b ldr r3, [r3, #0] - 8002a24: f003 0304 and.w r3, r3, #4 - 8002a28: 2b00 cmp r3, #0 - 8002a2a: f000 80b5 beq.w 8002b98 + 8002d14: 687b ldr r3, [r7, #4] + 8002d16: 681b ldr r3, [r3, #0] + 8002d18: f003 0304 and.w r3, r3, #4 + 8002d1c: 2b00 cmp r3, #0 + 8002d1e: f000 80b5 beq.w 8002e8c { FlagStatus pwrclkchanged = RESET; - 8002a2e: 2300 movs r3, #0 - 8002a30: 77fb strb r3, [r7, #31] + 8002d22: 2300 movs r3, #0 + 8002d24: 77fb strb r3, [r7, #31] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8002a32: 4b3a ldr r3, [pc, #232] @ (8002b1c ) - 8002a34: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002a36: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002a3a: 2b00 cmp r3, #0 - 8002a3c: d10d bne.n 8002a5a + 8002d26: 4b3a ldr r3, [pc, #232] @ (8002e10 ) + 8002d28: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002d2a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002d2e: 2b00 cmp r3, #0 + 8002d30: d10d bne.n 8002d4e { __HAL_RCC_PWR_CLK_ENABLE(); - 8002a3e: 4b37 ldr r3, [pc, #220] @ (8002b1c ) - 8002a40: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002a42: 4a36 ldr r2, [pc, #216] @ (8002b1c ) - 8002a44: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8002a48: 6253 str r3, [r2, #36] @ 0x24 - 8002a4a: 4b34 ldr r3, [pc, #208] @ (8002b1c ) - 8002a4c: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002a4e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002a52: 60bb str r3, [r7, #8] - 8002a54: 68bb ldr r3, [r7, #8] + 8002d32: 4b37 ldr r3, [pc, #220] @ (8002e10 ) + 8002d34: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002d36: 4a36 ldr r2, [pc, #216] @ (8002e10 ) + 8002d38: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8002d3c: 6253 str r3, [r2, #36] @ 0x24 + 8002d3e: 4b34 ldr r3, [pc, #208] @ (8002e10 ) + 8002d40: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002d42: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002d46: 60bb str r3, [r7, #8] + 8002d48: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8002a56: 2301 movs r3, #1 - 8002a58: 77fb strb r3, [r7, #31] + 8002d4a: 2301 movs r3, #1 + 8002d4c: 77fb strb r3, [r7, #31] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002a5a: 4b36 ldr r3, [pc, #216] @ (8002b34 ) - 8002a5c: 681b ldr r3, [r3, #0] - 8002a5e: f403 7380 and.w r3, r3, #256 @ 0x100 - 8002a62: 2b00 cmp r3, #0 - 8002a64: d118 bne.n 8002a98 + 8002d4e: 4b36 ldr r3, [pc, #216] @ (8002e28 ) + 8002d50: 681b ldr r3, [r3, #0] + 8002d52: f403 7380 and.w r3, r3, #256 @ 0x100 + 8002d56: 2b00 cmp r3, #0 + 8002d58: d118 bne.n 8002d8c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8002a66: 4b33 ldr r3, [pc, #204] @ (8002b34 ) - 8002a68: 681b ldr r3, [r3, #0] - 8002a6a: 4a32 ldr r2, [pc, #200] @ (8002b34 ) - 8002a6c: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8002a70: 6013 str r3, [r2, #0] + 8002d5a: 4b33 ldr r3, [pc, #204] @ (8002e28 ) + 8002d5c: 681b ldr r3, [r3, #0] + 8002d5e: 4a32 ldr r2, [pc, #200] @ (8002e28 ) + 8002d60: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8002d64: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8002a72: f7fe fd75 bl 8001560 - 8002a76: 6138 str r0, [r7, #16] + 8002d66: f7fe feb9 bl 8001adc + 8002d6a: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002a78: e008 b.n 8002a8c + 8002d6c: e008 b.n 8002d80 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8002a7a: f7fe fd71 bl 8001560 - 8002a7e: 4602 mov r2, r0 - 8002a80: 693b ldr r3, [r7, #16] - 8002a82: 1ad3 subs r3, r2, r3 - 8002a84: 2b64 cmp r3, #100 @ 0x64 - 8002a86: d901 bls.n 8002a8c + 8002d6e: f7fe feb5 bl 8001adc + 8002d72: 4602 mov r2, r0 + 8002d74: 693b ldr r3, [r7, #16] + 8002d76: 1ad3 subs r3, r2, r3 + 8002d78: 2b64 cmp r3, #100 @ 0x64 + 8002d7a: d901 bls.n 8002d80 { return HAL_TIMEOUT; - 8002a88: 2303 movs r3, #3 - 8002a8a: e104 b.n 8002c96 + 8002d7c: 2303 movs r3, #3 + 8002d7e: e104 b.n 8002f8a while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002a8c: 4b29 ldr r3, [pc, #164] @ (8002b34 ) - 8002a8e: 681b ldr r3, [r3, #0] - 8002a90: f403 7380 and.w r3, r3, #256 @ 0x100 - 8002a94: 2b00 cmp r3, #0 - 8002a96: d0f0 beq.n 8002a7a + 8002d80: 4b29 ldr r3, [pc, #164] @ (8002e28 ) + 8002d82: 681b ldr r3, [r3, #0] + 8002d84: f403 7380 and.w r3, r3, #256 @ 0x100 + 8002d88: 2b00 cmp r3, #0 + 8002d8a: d0f0 beq.n 8002d6e } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8002a98: 687b ldr r3, [r7, #4] - 8002a9a: 689b ldr r3, [r3, #8] - 8002a9c: 2b01 cmp r3, #1 - 8002a9e: d106 bne.n 8002aae - 8002aa0: 4b1e ldr r3, [pc, #120] @ (8002b1c ) - 8002aa2: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002aa4: 4a1d ldr r2, [pc, #116] @ (8002b1c ) - 8002aa6: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8002aaa: 6353 str r3, [r2, #52] @ 0x34 - 8002aac: e02d b.n 8002b0a - 8002aae: 687b ldr r3, [r7, #4] - 8002ab0: 689b ldr r3, [r3, #8] - 8002ab2: 2b00 cmp r3, #0 - 8002ab4: d10c bne.n 8002ad0 - 8002ab6: 4b19 ldr r3, [pc, #100] @ (8002b1c ) - 8002ab8: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002aba: 4a18 ldr r2, [pc, #96] @ (8002b1c ) - 8002abc: f423 7380 bic.w r3, r3, #256 @ 0x100 - 8002ac0: 6353 str r3, [r2, #52] @ 0x34 - 8002ac2: 4b16 ldr r3, [pc, #88] @ (8002b1c ) - 8002ac4: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002ac6: 4a15 ldr r2, [pc, #84] @ (8002b1c ) - 8002ac8: f423 6380 bic.w r3, r3, #1024 @ 0x400 - 8002acc: 6353 str r3, [r2, #52] @ 0x34 - 8002ace: e01c b.n 8002b0a - 8002ad0: 687b ldr r3, [r7, #4] - 8002ad2: 689b ldr r3, [r3, #8] - 8002ad4: 2b05 cmp r3, #5 - 8002ad6: d10c bne.n 8002af2 - 8002ad8: 4b10 ldr r3, [pc, #64] @ (8002b1c ) - 8002ada: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002adc: 4a0f ldr r2, [pc, #60] @ (8002b1c ) - 8002ade: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 8002ae2: 6353 str r3, [r2, #52] @ 0x34 - 8002ae4: 4b0d ldr r3, [pc, #52] @ (8002b1c ) - 8002ae6: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002ae8: 4a0c ldr r2, [pc, #48] @ (8002b1c ) - 8002aea: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8002aee: 6353 str r3, [r2, #52] @ 0x34 - 8002af0: e00b b.n 8002b0a - 8002af2: 4b0a ldr r3, [pc, #40] @ (8002b1c ) - 8002af4: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002af6: 4a09 ldr r2, [pc, #36] @ (8002b1c ) - 8002af8: f423 7380 bic.w r3, r3, #256 @ 0x100 - 8002afc: 6353 str r3, [r2, #52] @ 0x34 - 8002afe: 4b07 ldr r3, [pc, #28] @ (8002b1c ) - 8002b00: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002b02: 4a06 ldr r2, [pc, #24] @ (8002b1c ) - 8002b04: f423 6380 bic.w r3, r3, #1024 @ 0x400 - 8002b08: 6353 str r3, [r2, #52] @ 0x34 + 8002d8c: 687b ldr r3, [r7, #4] + 8002d8e: 689b ldr r3, [r3, #8] + 8002d90: 2b01 cmp r3, #1 + 8002d92: d106 bne.n 8002da2 + 8002d94: 4b1e ldr r3, [pc, #120] @ (8002e10 ) + 8002d96: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002d98: 4a1d ldr r2, [pc, #116] @ (8002e10 ) + 8002d9a: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8002d9e: 6353 str r3, [r2, #52] @ 0x34 + 8002da0: e02d b.n 8002dfe + 8002da2: 687b ldr r3, [r7, #4] + 8002da4: 689b ldr r3, [r3, #8] + 8002da6: 2b00 cmp r3, #0 + 8002da8: d10c bne.n 8002dc4 + 8002daa: 4b19 ldr r3, [pc, #100] @ (8002e10 ) + 8002dac: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002dae: 4a18 ldr r2, [pc, #96] @ (8002e10 ) + 8002db0: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8002db4: 6353 str r3, [r2, #52] @ 0x34 + 8002db6: 4b16 ldr r3, [pc, #88] @ (8002e10 ) + 8002db8: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002dba: 4a15 ldr r2, [pc, #84] @ (8002e10 ) + 8002dbc: f423 6380 bic.w r3, r3, #1024 @ 0x400 + 8002dc0: 6353 str r3, [r2, #52] @ 0x34 + 8002dc2: e01c b.n 8002dfe + 8002dc4: 687b ldr r3, [r7, #4] + 8002dc6: 689b ldr r3, [r3, #8] + 8002dc8: 2b05 cmp r3, #5 + 8002dca: d10c bne.n 8002de6 + 8002dcc: 4b10 ldr r3, [pc, #64] @ (8002e10 ) + 8002dce: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002dd0: 4a0f ldr r2, [pc, #60] @ (8002e10 ) + 8002dd2: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 8002dd6: 6353 str r3, [r2, #52] @ 0x34 + 8002dd8: 4b0d ldr r3, [pc, #52] @ (8002e10 ) + 8002dda: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002ddc: 4a0c ldr r2, [pc, #48] @ (8002e10 ) + 8002dde: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8002de2: 6353 str r3, [r2, #52] @ 0x34 + 8002de4: e00b b.n 8002dfe + 8002de6: 4b0a ldr r3, [pc, #40] @ (8002e10 ) + 8002de8: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002dea: 4a09 ldr r2, [pc, #36] @ (8002e10 ) + 8002dec: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8002df0: 6353 str r3, [r2, #52] @ 0x34 + 8002df2: 4b07 ldr r3, [pc, #28] @ (8002e10 ) + 8002df4: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002df6: 4a06 ldr r2, [pc, #24] @ (8002e10 ) + 8002df8: f423 6380 bic.w r3, r3, #1024 @ 0x400 + 8002dfc: 6353 str r3, [r2, #52] @ 0x34 /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8002b0a: 687b ldr r3, [r7, #4] - 8002b0c: 689b ldr r3, [r3, #8] - 8002b0e: 2b00 cmp r3, #0 - 8002b10: d024 beq.n 8002b5c + 8002dfe: 687b ldr r3, [r7, #4] + 8002e00: 689b ldr r3, [r3, #8] + 8002e02: 2b00 cmp r3, #0 + 8002e04: d024 beq.n 8002e50 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002b12: f7fe fd25 bl 8001560 - 8002b16: 6138 str r0, [r7, #16] + 8002e06: f7fe fe69 bl 8001adc + 8002e0a: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8002b18: e019 b.n 8002b4e - 8002b1a: bf00 nop - 8002b1c: 40023800 .word 0x40023800 - 8002b20: 08003da4 .word 0x08003da4 - 8002b24: 20000000 .word 0x20000000 - 8002b28: 20000004 .word 0x20000004 - 8002b2c: 42470020 .word 0x42470020 - 8002b30: 42470680 .word 0x42470680 - 8002b34: 40007000 .word 0x40007000 + 8002e0c: e019 b.n 8002e42 + 8002e0e: bf00 nop + 8002e10: 40023800 .word 0x40023800 + 8002e14: 08004098 .word 0x08004098 + 8002e18: 20000000 .word 0x20000000 + 8002e1c: 20000004 .word 0x20000004 + 8002e20: 42470020 .word 0x42470020 + 8002e24: 42470680 .word 0x42470680 + 8002e28: 40007000 .word 0x40007000 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8002b38: f7fe fd12 bl 8001560 - 8002b3c: 4602 mov r2, r0 - 8002b3e: 693b ldr r3, [r7, #16] - 8002b40: 1ad3 subs r3, r2, r3 - 8002b42: f241 3288 movw r2, #5000 @ 0x1388 - 8002b46: 4293 cmp r3, r2 - 8002b48: d901 bls.n 8002b4e + 8002e2c: f7fe fe56 bl 8001adc + 8002e30: 4602 mov r2, r0 + 8002e32: 693b ldr r3, [r7, #16] + 8002e34: 1ad3 subs r3, r2, r3 + 8002e36: f241 3288 movw r2, #5000 @ 0x1388 + 8002e3a: 4293 cmp r3, r2 + 8002e3c: d901 bls.n 8002e42 { return HAL_TIMEOUT; - 8002b4a: 2303 movs r3, #3 - 8002b4c: e0a3 b.n 8002c96 + 8002e3e: 2303 movs r3, #3 + 8002e40: e0a3 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8002b4e: 4b54 ldr r3, [pc, #336] @ (8002ca0 ) - 8002b50: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002b52: f403 7300 and.w r3, r3, #512 @ 0x200 - 8002b56: 2b00 cmp r3, #0 - 8002b58: d0ee beq.n 8002b38 - 8002b5a: e014 b.n 8002b86 + 8002e42: 4b54 ldr r3, [pc, #336] @ (8002f94 ) + 8002e44: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002e46: f403 7300 and.w r3, r3, #512 @ 0x200 + 8002e4a: 2b00 cmp r3, #0 + 8002e4c: d0ee beq.n 8002e2c + 8002e4e: e014 b.n 8002e7a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002b5c: f7fe fd00 bl 8001560 - 8002b60: 6138 str r0, [r7, #16] + 8002e50: f7fe fe44 bl 8001adc + 8002e54: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 8002b62: e00a b.n 8002b7a + 8002e56: e00a b.n 8002e6e { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8002b64: f7fe fcfc bl 8001560 - 8002b68: 4602 mov r2, r0 - 8002b6a: 693b ldr r3, [r7, #16] - 8002b6c: 1ad3 subs r3, r2, r3 - 8002b6e: f241 3288 movw r2, #5000 @ 0x1388 - 8002b72: 4293 cmp r3, r2 - 8002b74: d901 bls.n 8002b7a + 8002e58: f7fe fe40 bl 8001adc + 8002e5c: 4602 mov r2, r0 + 8002e5e: 693b ldr r3, [r7, #16] + 8002e60: 1ad3 subs r3, r2, r3 + 8002e62: f241 3288 movw r2, #5000 @ 0x1388 + 8002e66: 4293 cmp r3, r2 + 8002e68: d901 bls.n 8002e6e { return HAL_TIMEOUT; - 8002b76: 2303 movs r3, #3 - 8002b78: e08d b.n 8002c96 + 8002e6a: 2303 movs r3, #3 + 8002e6c: e08d b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 8002b7a: 4b49 ldr r3, [pc, #292] @ (8002ca0 ) - 8002b7c: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002b7e: f403 7300 and.w r3, r3, #512 @ 0x200 - 8002b82: 2b00 cmp r3, #0 - 8002b84: d1ee bne.n 8002b64 + 8002e6e: 4b49 ldr r3, [pc, #292] @ (8002f94 ) + 8002e70: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002e72: f403 7300 and.w r3, r3, #512 @ 0x200 + 8002e76: 2b00 cmp r3, #0 + 8002e78: d1ee bne.n 8002e58 } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8002b86: 7ffb ldrb r3, [r7, #31] - 8002b88: 2b01 cmp r3, #1 - 8002b8a: d105 bne.n 8002b98 + 8002e7a: 7ffb ldrb r3, [r7, #31] + 8002e7c: 2b01 cmp r3, #1 + 8002e7e: d105 bne.n 8002e8c { __HAL_RCC_PWR_CLK_DISABLE(); - 8002b8c: 4b44 ldr r3, [pc, #272] @ (8002ca0 ) - 8002b8e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002b90: 4a43 ldr r2, [pc, #268] @ (8002ca0 ) - 8002b92: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8002b96: 6253 str r3, [r2, #36] @ 0x24 + 8002e80: 4b44 ldr r3, [pc, #272] @ (8002f94 ) + 8002e82: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002e84: 4a43 ldr r2, [pc, #268] @ (8002f94 ) + 8002e86: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8002e8a: 6253 str r3, [r2, #36] @ 0x24 } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8002b98: 687b ldr r3, [r7, #4] - 8002b9a: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002b9c: 2b00 cmp r3, #0 - 8002b9e: d079 beq.n 8002c94 + 8002e8c: 687b ldr r3, [r7, #4] + 8002e8e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002e90: 2b00 cmp r3, #0 + 8002e92: d079 beq.n 8002f88 { /* Check if the PLL is used as system clock or not */ if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8002ba0: 69bb ldr r3, [r7, #24] - 8002ba2: 2b0c cmp r3, #12 - 8002ba4: d056 beq.n 8002c54 + 8002e94: 69bb ldr r3, [r7, #24] + 8002e96: 2b0c cmp r3, #12 + 8002e98: d056 beq.n 8002f48 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8002ba6: 687b ldr r3, [r7, #4] - 8002ba8: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002baa: 2b02 cmp r3, #2 - 8002bac: d13b bne.n 8002c26 + 8002e9a: 687b ldr r3, [r7, #4] + 8002e9c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002e9e: 2b02 cmp r3, #2 + 8002ea0: d13b bne.n 8002f1a assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8002bae: 4b3d ldr r3, [pc, #244] @ (8002ca4 ) - 8002bb0: 2200 movs r2, #0 - 8002bb2: 601a str r2, [r3, #0] + 8002ea2: 4b3d ldr r3, [pc, #244] @ (8002f98 ) + 8002ea4: 2200 movs r2, #0 + 8002ea6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002bb4: f7fe fcd4 bl 8001560 - 8002bb8: 6138 str r0, [r7, #16] + 8002ea8: f7fe fe18 bl 8001adc + 8002eac: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002bba: e008 b.n 8002bce + 8002eae: e008 b.n 8002ec2 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002bbc: f7fe fcd0 bl 8001560 - 8002bc0: 4602 mov r2, r0 - 8002bc2: 693b ldr r3, [r7, #16] - 8002bc4: 1ad3 subs r3, r2, r3 - 8002bc6: 2b02 cmp r3, #2 - 8002bc8: d901 bls.n 8002bce + 8002eb0: f7fe fe14 bl 8001adc + 8002eb4: 4602 mov r2, r0 + 8002eb6: 693b ldr r3, [r7, #16] + 8002eb8: 1ad3 subs r3, r2, r3 + 8002eba: 2b02 cmp r3, #2 + 8002ebc: d901 bls.n 8002ec2 { return HAL_TIMEOUT; - 8002bca: 2303 movs r3, #3 - 8002bcc: e063 b.n 8002c96 + 8002ebe: 2303 movs r3, #3 + 8002ec0: e063 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002bce: 4b34 ldr r3, [pc, #208] @ (8002ca0 ) - 8002bd0: 681b ldr r3, [r3, #0] - 8002bd2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8002bd6: 2b00 cmp r3, #0 - 8002bd8: d1f0 bne.n 8002bbc + 8002ec2: 4b34 ldr r3, [pc, #208] @ (8002f94 ) + 8002ec4: 681b ldr r3, [r3, #0] + 8002ec6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8002eca: 2b00 cmp r3, #0 + 8002ecc: d1f0 bne.n 8002eb0 } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8002bda: 4b31 ldr r3, [pc, #196] @ (8002ca0 ) - 8002bdc: 689b ldr r3, [r3, #8] - 8002bde: f423 027d bic.w r2, r3, #16580608 @ 0xfd0000 - 8002be2: 687b ldr r3, [r7, #4] - 8002be4: 6a99 ldr r1, [r3, #40] @ 0x28 - 8002be6: 687b ldr r3, [r7, #4] - 8002be8: 6adb ldr r3, [r3, #44] @ 0x2c - 8002bea: 4319 orrs r1, r3 - 8002bec: 687b ldr r3, [r7, #4] - 8002bee: 6b1b ldr r3, [r3, #48] @ 0x30 - 8002bf0: 430b orrs r3, r1 - 8002bf2: 492b ldr r1, [pc, #172] @ (8002ca0 ) - 8002bf4: 4313 orrs r3, r2 - 8002bf6: 608b str r3, [r1, #8] + 8002ece: 4b31 ldr r3, [pc, #196] @ (8002f94 ) + 8002ed0: 689b ldr r3, [r3, #8] + 8002ed2: f423 027d bic.w r2, r3, #16580608 @ 0xfd0000 + 8002ed6: 687b ldr r3, [r7, #4] + 8002ed8: 6a99 ldr r1, [r3, #40] @ 0x28 + 8002eda: 687b ldr r3, [r7, #4] + 8002edc: 6adb ldr r3, [r3, #44] @ 0x2c + 8002ede: 4319 orrs r1, r3 + 8002ee0: 687b ldr r3, [r7, #4] + 8002ee2: 6b1b ldr r3, [r3, #48] @ 0x30 + 8002ee4: 430b orrs r3, r1 + 8002ee6: 492b ldr r1, [pc, #172] @ (8002f94 ) + 8002ee8: 4313 orrs r3, r2 + 8002eea: 608b str r3, [r1, #8] RCC_OscInitStruct->PLL.PLLMUL, RCC_OscInitStruct->PLL.PLLDIV); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8002bf8: 4b2a ldr r3, [pc, #168] @ (8002ca4 ) - 8002bfa: 2201 movs r2, #1 - 8002bfc: 601a str r2, [r3, #0] + 8002eec: 4b2a ldr r3, [pc, #168] @ (8002f98 ) + 8002eee: 2201 movs r2, #1 + 8002ef0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002bfe: f7fe fcaf bl 8001560 - 8002c02: 6138 str r0, [r7, #16] + 8002ef2: f7fe fdf3 bl 8001adc + 8002ef6: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8002c04: e008 b.n 8002c18 + 8002ef8: e008 b.n 8002f0c { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002c06: f7fe fcab bl 8001560 - 8002c0a: 4602 mov r2, r0 - 8002c0c: 693b ldr r3, [r7, #16] - 8002c0e: 1ad3 subs r3, r2, r3 - 8002c10: 2b02 cmp r3, #2 - 8002c12: d901 bls.n 8002c18 + 8002efa: f7fe fdef bl 8001adc + 8002efe: 4602 mov r2, r0 + 8002f00: 693b ldr r3, [r7, #16] + 8002f02: 1ad3 subs r3, r2, r3 + 8002f04: 2b02 cmp r3, #2 + 8002f06: d901 bls.n 8002f0c { return HAL_TIMEOUT; - 8002c14: 2303 movs r3, #3 - 8002c16: e03e b.n 8002c96 + 8002f08: 2303 movs r3, #3 + 8002f0a: e03e b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8002c18: 4b21 ldr r3, [pc, #132] @ (8002ca0 ) - 8002c1a: 681b ldr r3, [r3, #0] - 8002c1c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8002c20: 2b00 cmp r3, #0 - 8002c22: d0f0 beq.n 8002c06 - 8002c24: e036 b.n 8002c94 + 8002f0c: 4b21 ldr r3, [pc, #132] @ (8002f94 ) + 8002f0e: 681b ldr r3, [r3, #0] + 8002f10: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8002f14: 2b00 cmp r3, #0 + 8002f16: d0f0 beq.n 8002efa + 8002f18: e036 b.n 8002f88 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8002c26: 4b1f ldr r3, [pc, #124] @ (8002ca4 ) - 8002c28: 2200 movs r2, #0 - 8002c2a: 601a str r2, [r3, #0] + 8002f1a: 4b1f ldr r3, [pc, #124] @ (8002f98 ) + 8002f1c: 2200 movs r2, #0 + 8002f1e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002c2c: f7fe fc98 bl 8001560 - 8002c30: 6138 str r0, [r7, #16] + 8002f20: f7fe fddc bl 8001adc + 8002f24: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002c32: e008 b.n 8002c46 + 8002f26: e008 b.n 8002f3a { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002c34: f7fe fc94 bl 8001560 - 8002c38: 4602 mov r2, r0 - 8002c3a: 693b ldr r3, [r7, #16] - 8002c3c: 1ad3 subs r3, r2, r3 - 8002c3e: 2b02 cmp r3, #2 - 8002c40: d901 bls.n 8002c46 + 8002f28: f7fe fdd8 bl 8001adc + 8002f2c: 4602 mov r2, r0 + 8002f2e: 693b ldr r3, [r7, #16] + 8002f30: 1ad3 subs r3, r2, r3 + 8002f32: 2b02 cmp r3, #2 + 8002f34: d901 bls.n 8002f3a { return HAL_TIMEOUT; - 8002c42: 2303 movs r3, #3 - 8002c44: e027 b.n 8002c96 + 8002f36: 2303 movs r3, #3 + 8002f38: e027 b.n 8002f8a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002c46: 4b16 ldr r3, [pc, #88] @ (8002ca0 ) - 8002c48: 681b ldr r3, [r3, #0] - 8002c4a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8002c4e: 2b00 cmp r3, #0 - 8002c50: d1f0 bne.n 8002c34 - 8002c52: e01f b.n 8002c94 + 8002f3a: 4b16 ldr r3, [pc, #88] @ (8002f94 ) + 8002f3c: 681b ldr r3, [r3, #0] + 8002f3e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8002f42: 2b00 cmp r3, #0 + 8002f44: d1f0 bne.n 8002f28 + 8002f46: e01f b.n 8002f88 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8002c54: 687b ldr r3, [r7, #4] - 8002c56: 6a5b ldr r3, [r3, #36] @ 0x24 - 8002c58: 2b01 cmp r3, #1 - 8002c5a: d101 bne.n 8002c60 + 8002f48: 687b ldr r3, [r7, #4] + 8002f4a: 6a5b ldr r3, [r3, #36] @ 0x24 + 8002f4c: 2b01 cmp r3, #1 + 8002f4e: d101 bne.n 8002f54 { return HAL_ERROR; - 8002c5c: 2301 movs r3, #1 - 8002c5e: e01a b.n 8002c96 + 8002f50: 2301 movs r3, #1 + 8002f52: e01a b.n 8002f8a } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8002c60: 4b0f ldr r3, [pc, #60] @ (8002ca0 ) - 8002c62: 689b ldr r3, [r3, #8] - 8002c64: 617b str r3, [r7, #20] + 8002f54: 4b0f ldr r3, [pc, #60] @ (8002f94 ) + 8002f56: 689b ldr r3, [r3, #8] + 8002f58: 617b str r3, [r7, #20] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8002c66: 697b ldr r3, [r7, #20] - 8002c68: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 8002c6c: 687b ldr r3, [r7, #4] - 8002c6e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002c70: 429a cmp r2, r3 - 8002c72: d10d bne.n 8002c90 + 8002f5a: 697b ldr r3, [r7, #20] + 8002f5c: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8002f60: 687b ldr r3, [r7, #4] + 8002f62: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002f64: 429a cmp r2, r3 + 8002f66: d10d bne.n 8002f84 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 8002c74: 697b ldr r3, [r7, #20] - 8002c76: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 8002c7a: 687b ldr r3, [r7, #4] - 8002c7c: 6adb ldr r3, [r3, #44] @ 0x2c + 8002f68: 697b ldr r3, [r7, #20] + 8002f6a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 8002f6e: 687b ldr r3, [r7, #4] + 8002f70: 6adb ldr r3, [r3, #44] @ 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8002c7e: 429a cmp r2, r3 - 8002c80: d106 bne.n 8002c90 + 8002f72: 429a cmp r2, r3 + 8002f74: d106 bne.n 8002f84 (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV)) - 8002c82: 697b ldr r3, [r7, #20] - 8002c84: f403 0240 and.w r2, r3, #12582912 @ 0xc00000 - 8002c88: 687b ldr r3, [r7, #4] - 8002c8a: 6b1b ldr r3, [r3, #48] @ 0x30 + 8002f76: 697b ldr r3, [r7, #20] + 8002f78: f403 0240 and.w r2, r3, #12582912 @ 0xc00000 + 8002f7c: 687b ldr r3, [r7, #4] + 8002f7e: 6b1b ldr r3, [r3, #48] @ 0x30 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 8002c8c: 429a cmp r2, r3 - 8002c8e: d001 beq.n 8002c94 + 8002f80: 429a cmp r2, r3 + 8002f82: d001 beq.n 8002f88 { return HAL_ERROR; - 8002c90: 2301 movs r3, #1 - 8002c92: e000 b.n 8002c96 + 8002f84: 2301 movs r3, #1 + 8002f86: e000 b.n 8002f8a } } } } return HAL_OK; - 8002c94: 2300 movs r3, #0 + 8002f88: 2300 movs r3, #0 } - 8002c96: 4618 mov r0, r3 - 8002c98: 3720 adds r7, #32 - 8002c9a: 46bd mov sp, r7 - 8002c9c: bd80 pop {r7, pc} - 8002c9e: bf00 nop - 8002ca0: 40023800 .word 0x40023800 - 8002ca4: 42470060 .word 0x42470060 + 8002f8a: 4618 mov r0, r3 + 8002f8c: 3720 adds r7, #32 + 8002f8e: 46bd mov sp, r7 + 8002f90: bd80 pop {r7, pc} + 8002f92: bf00 nop + 8002f94: 40023800 .word 0x40023800 + 8002f98: 42470060 .word 0x42470060 -08002ca8 : +08002f9c : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8002ca8: b580 push {r7, lr} - 8002caa: b084 sub sp, #16 - 8002cac: af00 add r7, sp, #0 - 8002cae: 6078 str r0, [r7, #4] - 8002cb0: 6039 str r1, [r7, #0] + 8002f9c: b580 push {r7, lr} + 8002f9e: b084 sub sp, #16 + 8002fa0: af00 add r7, sp, #0 + 8002fa2: 6078 str r0, [r7, #4] + 8002fa4: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status; /* Check the parameters */ if(RCC_ClkInitStruct == NULL) - 8002cb2: 687b ldr r3, [r7, #4] - 8002cb4: 2b00 cmp r3, #0 - 8002cb6: d101 bne.n 8002cbc + 8002fa6: 687b ldr r3, [r7, #4] + 8002fa8: 2b00 cmp r3, #0 + 8002faa: d101 bne.n 8002fb0 { return HAL_ERROR; - 8002cb8: 2301 movs r3, #1 - 8002cba: e11a b.n 8002ef2 + 8002fac: 2301 movs r3, #1 + 8002fae: e11a b.n 80031e6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8002cbc: 4b8f ldr r3, [pc, #572] @ (8002efc ) - 8002cbe: 681b ldr r3, [r3, #0] - 8002cc0: f003 0301 and.w r3, r3, #1 - 8002cc4: 683a ldr r2, [r7, #0] - 8002cc6: 429a cmp r2, r3 - 8002cc8: d919 bls.n 8002cfe + 8002fb0: 4b8f ldr r3, [pc, #572] @ (80031f0 ) + 8002fb2: 681b ldr r3, [r3, #0] + 8002fb4: f003 0301 and.w r3, r3, #1 + 8002fb8: 683a ldr r2, [r7, #0] + 8002fba: 429a cmp r2, r3 + 8002fbc: d919 bls.n 8002ff2 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002cca: 683b ldr r3, [r7, #0] - 8002ccc: 2b01 cmp r3, #1 - 8002cce: d105 bne.n 8002cdc - 8002cd0: 4b8a ldr r3, [pc, #552] @ (8002efc ) - 8002cd2: 681b ldr r3, [r3, #0] - 8002cd4: 4a89 ldr r2, [pc, #548] @ (8002efc ) - 8002cd6: f043 0304 orr.w r3, r3, #4 - 8002cda: 6013 str r3, [r2, #0] - 8002cdc: 4b87 ldr r3, [pc, #540] @ (8002efc ) - 8002cde: 681b ldr r3, [r3, #0] - 8002ce0: f023 0201 bic.w r2, r3, #1 - 8002ce4: 4985 ldr r1, [pc, #532] @ (8002efc ) - 8002ce6: 683b ldr r3, [r7, #0] - 8002ce8: 4313 orrs r3, r2 - 8002cea: 600b str r3, [r1, #0] + 8002fbe: 683b ldr r3, [r7, #0] + 8002fc0: 2b01 cmp r3, #1 + 8002fc2: d105 bne.n 8002fd0 + 8002fc4: 4b8a ldr r3, [pc, #552] @ (80031f0 ) + 8002fc6: 681b ldr r3, [r3, #0] + 8002fc8: 4a89 ldr r2, [pc, #548] @ (80031f0 ) + 8002fca: f043 0304 orr.w r3, r3, #4 + 8002fce: 6013 str r3, [r2, #0] + 8002fd0: 4b87 ldr r3, [pc, #540] @ (80031f0 ) + 8002fd2: 681b ldr r3, [r3, #0] + 8002fd4: f023 0201 bic.w r2, r3, #1 + 8002fd8: 4985 ldr r1, [pc, #532] @ (80031f0 ) + 8002fda: 683b ldr r3, [r7, #0] + 8002fdc: 4313 orrs r3, r2 + 8002fde: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8002cec: 4b83 ldr r3, [pc, #524] @ (8002efc ) - 8002cee: 681b ldr r3, [r3, #0] - 8002cf0: f003 0301 and.w r3, r3, #1 - 8002cf4: 683a ldr r2, [r7, #0] - 8002cf6: 429a cmp r2, r3 - 8002cf8: d001 beq.n 8002cfe + 8002fe0: 4b83 ldr r3, [pc, #524] @ (80031f0 ) + 8002fe2: 681b ldr r3, [r3, #0] + 8002fe4: f003 0301 and.w r3, r3, #1 + 8002fe8: 683a ldr r2, [r7, #0] + 8002fea: 429a cmp r2, r3 + 8002fec: d001 beq.n 8002ff2 { return HAL_ERROR; - 8002cfa: 2301 movs r3, #1 - 8002cfc: e0f9 b.n 8002ef2 + 8002fee: 2301 movs r3, #1 + 8002ff0: e0f9 b.n 80031e6 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8002cfe: 687b ldr r3, [r7, #4] - 8002d00: 681b ldr r3, [r3, #0] - 8002d02: f003 0302 and.w r3, r3, #2 - 8002d06: 2b00 cmp r3, #0 - 8002d08: d008 beq.n 8002d1c + 8002ff2: 687b ldr r3, [r7, #4] + 8002ff4: 681b ldr r3, [r3, #0] + 8002ff6: f003 0302 and.w r3, r3, #2 + 8002ffa: 2b00 cmp r3, #0 + 8002ffc: d008 beq.n 8003010 { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8002d0a: 4b7d ldr r3, [pc, #500] @ (8002f00 ) - 8002d0c: 689b ldr r3, [r3, #8] - 8002d0e: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8002d12: 687b ldr r3, [r7, #4] - 8002d14: 689b ldr r3, [r3, #8] - 8002d16: 497a ldr r1, [pc, #488] @ (8002f00 ) - 8002d18: 4313 orrs r3, r2 - 8002d1a: 608b str r3, [r1, #8] + 8002ffe: 4b7d ldr r3, [pc, #500] @ (80031f4 ) + 8003000: 689b ldr r3, [r3, #8] + 8003002: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 8003006: 687b ldr r3, [r7, #4] + 8003008: 689b ldr r3, [r3, #8] + 800300a: 497a ldr r1, [pc, #488] @ (80031f4 ) + 800300c: 4313 orrs r3, r2 + 800300e: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8002d1c: 687b ldr r3, [r7, #4] - 8002d1e: 681b ldr r3, [r3, #0] - 8002d20: f003 0301 and.w r3, r3, #1 - 8002d24: 2b00 cmp r3, #0 - 8002d26: f000 808e beq.w 8002e46 + 8003010: 687b ldr r3, [r7, #4] + 8003012: 681b ldr r3, [r3, #0] + 8003014: f003 0301 and.w r3, r3, #1 + 8003018: 2b00 cmp r3, #0 + 800301a: f000 808e beq.w 800313a { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8002d2a: 687b ldr r3, [r7, #4] - 8002d2c: 685b ldr r3, [r3, #4] - 8002d2e: 2b02 cmp r3, #2 - 8002d30: d107 bne.n 8002d42 + 800301e: 687b ldr r3, [r7, #4] + 8003020: 685b ldr r3, [r3, #4] + 8003022: 2b02 cmp r3, #2 + 8003024: d107 bne.n 8003036 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8002d32: 4b73 ldr r3, [pc, #460] @ (8002f00 ) - 8002d34: 681b ldr r3, [r3, #0] - 8002d36: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8002d3a: 2b00 cmp r3, #0 - 8002d3c: d121 bne.n 8002d82 + 8003026: 4b73 ldr r3, [pc, #460] @ (80031f4 ) + 8003028: 681b ldr r3, [r3, #0] + 800302a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800302e: 2b00 cmp r3, #0 + 8003030: d121 bne.n 8003076 { return HAL_ERROR; - 8002d3e: 2301 movs r3, #1 - 8002d40: e0d7 b.n 8002ef2 + 8003032: 2301 movs r3, #1 + 8003034: e0d7 b.n 80031e6 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8002d42: 687b ldr r3, [r7, #4] - 8002d44: 685b ldr r3, [r3, #4] - 8002d46: 2b03 cmp r3, #3 - 8002d48: d107 bne.n 8002d5a + 8003036: 687b ldr r3, [r7, #4] + 8003038: 685b ldr r3, [r3, #4] + 800303a: 2b03 cmp r3, #3 + 800303c: d107 bne.n 800304e { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8002d4a: 4b6d ldr r3, [pc, #436] @ (8002f00 ) - 8002d4c: 681b ldr r3, [r3, #0] - 8002d4e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8002d52: 2b00 cmp r3, #0 - 8002d54: d115 bne.n 8002d82 + 800303e: 4b6d ldr r3, [pc, #436] @ (80031f4 ) + 8003040: 681b ldr r3, [r3, #0] + 8003042: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8003046: 2b00 cmp r3, #0 + 8003048: d115 bne.n 8003076 { return HAL_ERROR; - 8002d56: 2301 movs r3, #1 - 8002d58: e0cb b.n 8002ef2 + 800304a: 2301 movs r3, #1 + 800304c: e0cb b.n 80031e6 } } /* HSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8002d5a: 687b ldr r3, [r7, #4] - 8002d5c: 685b ldr r3, [r3, #4] - 8002d5e: 2b01 cmp r3, #1 - 8002d60: d107 bne.n 8002d72 + 800304e: 687b ldr r3, [r7, #4] + 8003050: 685b ldr r3, [r3, #4] + 8003052: 2b01 cmp r3, #1 + 8003054: d107 bne.n 8003066 { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8002d62: 4b67 ldr r3, [pc, #412] @ (8002f00 ) - 8002d64: 681b ldr r3, [r3, #0] - 8002d66: f003 0302 and.w r3, r3, #2 - 8002d6a: 2b00 cmp r3, #0 - 8002d6c: d109 bne.n 8002d82 + 8003056: 4b67 ldr r3, [pc, #412] @ (80031f4 ) + 8003058: 681b ldr r3, [r3, #0] + 800305a: f003 0302 and.w r3, r3, #2 + 800305e: 2b00 cmp r3, #0 + 8003060: d109 bne.n 8003076 { return HAL_ERROR; - 8002d6e: 2301 movs r3, #1 - 8002d70: e0bf b.n 8002ef2 + 8003062: 2301 movs r3, #1 + 8003064: e0bf b.n 80031e6 } /* MSI is selected as System Clock Source */ else { /* Check the MSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8002d72: 4b63 ldr r3, [pc, #396] @ (8002f00 ) - 8002d74: 681b ldr r3, [r3, #0] - 8002d76: f403 7300 and.w r3, r3, #512 @ 0x200 - 8002d7a: 2b00 cmp r3, #0 - 8002d7c: d101 bne.n 8002d82 + 8003066: 4b63 ldr r3, [pc, #396] @ (80031f4 ) + 8003068: 681b ldr r3, [r3, #0] + 800306a: f403 7300 and.w r3, r3, #512 @ 0x200 + 800306e: 2b00 cmp r3, #0 + 8003070: d101 bne.n 8003076 { return HAL_ERROR; - 8002d7e: 2301 movs r3, #1 - 8002d80: e0b7 b.n 8002ef2 + 8003072: 2301 movs r3, #1 + 8003074: e0b7 b.n 80031e6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8002d82: 4b5f ldr r3, [pc, #380] @ (8002f00 ) - 8002d84: 689b ldr r3, [r3, #8] - 8002d86: f023 0203 bic.w r2, r3, #3 - 8002d8a: 687b ldr r3, [r7, #4] - 8002d8c: 685b ldr r3, [r3, #4] - 8002d8e: 495c ldr r1, [pc, #368] @ (8002f00 ) - 8002d90: 4313 orrs r3, r2 - 8002d92: 608b str r3, [r1, #8] + 8003076: 4b5f ldr r3, [pc, #380] @ (80031f4 ) + 8003078: 689b ldr r3, [r3, #8] + 800307a: f023 0203 bic.w r2, r3, #3 + 800307e: 687b ldr r3, [r7, #4] + 8003080: 685b ldr r3, [r3, #4] + 8003082: 495c ldr r1, [pc, #368] @ (80031f4 ) + 8003084: 4313 orrs r3, r2 + 8003086: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002d94: f7fe fbe4 bl 8001560 - 8002d98: 60f8 str r0, [r7, #12] + 8003088: f7fe fd28 bl 8001adc + 800308c: 60f8 str r0, [r7, #12] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8002d9a: 687b ldr r3, [r7, #4] - 8002d9c: 685b ldr r3, [r3, #4] - 8002d9e: 2b02 cmp r3, #2 - 8002da0: d112 bne.n 8002dc8 + 800308e: 687b ldr r3, [r7, #4] + 8003090: 685b ldr r3, [r3, #4] + 8003092: 2b02 cmp r3, #2 + 8003094: d112 bne.n 80030bc { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 8002da2: e00a b.n 8002dba + 8003096: e00a b.n 80030ae { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8002da4: f7fe fbdc bl 8001560 - 8002da8: 4602 mov r2, r0 - 8002daa: 68fb ldr r3, [r7, #12] - 8002dac: 1ad3 subs r3, r2, r3 - 8002dae: f241 3288 movw r2, #5000 @ 0x1388 - 8002db2: 4293 cmp r3, r2 - 8002db4: d901 bls.n 8002dba + 8003098: f7fe fd20 bl 8001adc + 800309c: 4602 mov r2, r0 + 800309e: 68fb ldr r3, [r7, #12] + 80030a0: 1ad3 subs r3, r2, r3 + 80030a2: f241 3288 movw r2, #5000 @ 0x1388 + 80030a6: 4293 cmp r3, r2 + 80030a8: d901 bls.n 80030ae { return HAL_TIMEOUT; - 8002db6: 2303 movs r3, #3 - 8002db8: e09b b.n 8002ef2 + 80030aa: 2303 movs r3, #3 + 80030ac: e09b b.n 80031e6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 8002dba: 4b51 ldr r3, [pc, #324] @ (8002f00 ) - 8002dbc: 689b ldr r3, [r3, #8] - 8002dbe: f003 030c and.w r3, r3, #12 - 8002dc2: 2b08 cmp r3, #8 - 8002dc4: d1ee bne.n 8002da4 - 8002dc6: e03e b.n 8002e46 + 80030ae: 4b51 ldr r3, [pc, #324] @ (80031f4 ) + 80030b0: 689b ldr r3, [r3, #8] + 80030b2: f003 030c and.w r3, r3, #12 + 80030b6: 2b08 cmp r3, #8 + 80030b8: d1ee bne.n 8003098 + 80030ba: e03e b.n 800313a } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8002dc8: 687b ldr r3, [r7, #4] - 8002dca: 685b ldr r3, [r3, #4] - 8002dcc: 2b03 cmp r3, #3 - 8002dce: d112 bne.n 8002df6 + 80030bc: 687b ldr r3, [r7, #4] + 80030be: 685b ldr r3, [r3, #4] + 80030c0: 2b03 cmp r3, #3 + 80030c2: d112 bne.n 80030ea { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8002dd0: e00a b.n 8002de8 + 80030c4: e00a b.n 80030dc { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8002dd2: f7fe fbc5 bl 8001560 - 8002dd6: 4602 mov r2, r0 - 8002dd8: 68fb ldr r3, [r7, #12] - 8002dda: 1ad3 subs r3, r2, r3 - 8002ddc: f241 3288 movw r2, #5000 @ 0x1388 - 8002de0: 4293 cmp r3, r2 - 8002de2: d901 bls.n 8002de8 + 80030c6: f7fe fd09 bl 8001adc + 80030ca: 4602 mov r2, r0 + 80030cc: 68fb ldr r3, [r7, #12] + 80030ce: 1ad3 subs r3, r2, r3 + 80030d0: f241 3288 movw r2, #5000 @ 0x1388 + 80030d4: 4293 cmp r3, r2 + 80030d6: d901 bls.n 80030dc { return HAL_TIMEOUT; - 8002de4: 2303 movs r3, #3 - 8002de6: e084 b.n 8002ef2 + 80030d8: 2303 movs r3, #3 + 80030da: e084 b.n 80031e6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8002de8: 4b45 ldr r3, [pc, #276] @ (8002f00 ) - 8002dea: 689b ldr r3, [r3, #8] - 8002dec: f003 030c and.w r3, r3, #12 - 8002df0: 2b0c cmp r3, #12 - 8002df2: d1ee bne.n 8002dd2 - 8002df4: e027 b.n 8002e46 + 80030dc: 4b45 ldr r3, [pc, #276] @ (80031f4 ) + 80030de: 689b ldr r3, [r3, #8] + 80030e0: f003 030c and.w r3, r3, #12 + 80030e4: 2b0c cmp r3, #12 + 80030e6: d1ee bne.n 80030c6 + 80030e8: e027 b.n 800313a } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8002df6: 687b ldr r3, [r7, #4] - 8002df8: 685b ldr r3, [r3, #4] - 8002dfa: 2b01 cmp r3, #1 - 8002dfc: d11d bne.n 8002e3a + 80030ea: 687b ldr r3, [r7, #4] + 80030ec: 685b ldr r3, [r3, #4] + 80030ee: 2b01 cmp r3, #1 + 80030f0: d11d bne.n 800312e { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 8002dfe: e00a b.n 8002e16 + 80030f2: e00a b.n 800310a { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8002e00: f7fe fbae bl 8001560 - 8002e04: 4602 mov r2, r0 - 8002e06: 68fb ldr r3, [r7, #12] - 8002e08: 1ad3 subs r3, r2, r3 - 8002e0a: f241 3288 movw r2, #5000 @ 0x1388 - 8002e0e: 4293 cmp r3, r2 - 8002e10: d901 bls.n 8002e16 + 80030f4: f7fe fcf2 bl 8001adc + 80030f8: 4602 mov r2, r0 + 80030fa: 68fb ldr r3, [r7, #12] + 80030fc: 1ad3 subs r3, r2, r3 + 80030fe: f241 3288 movw r2, #5000 @ 0x1388 + 8003102: 4293 cmp r3, r2 + 8003104: d901 bls.n 800310a { return HAL_TIMEOUT; - 8002e12: 2303 movs r3, #3 - 8002e14: e06d b.n 8002ef2 + 8003106: 2303 movs r3, #3 + 8003108: e06d b.n 80031e6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 8002e16: 4b3a ldr r3, [pc, #232] @ (8002f00 ) - 8002e18: 689b ldr r3, [r3, #8] - 8002e1a: f003 030c and.w r3, r3, #12 - 8002e1e: 2b04 cmp r3, #4 - 8002e20: d1ee bne.n 8002e00 - 8002e22: e010 b.n 8002e46 + 800310a: 4b3a ldr r3, [pc, #232] @ (80031f4 ) + 800310c: 689b ldr r3, [r3, #8] + 800310e: f003 030c and.w r3, r3, #12 + 8003112: 2b04 cmp r3, #4 + 8003114: d1ee bne.n 80030f4 + 8003116: e010 b.n 800313a } else { while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8002e24: f7fe fb9c bl 8001560 - 8002e28: 4602 mov r2, r0 - 8002e2a: 68fb ldr r3, [r7, #12] - 8002e2c: 1ad3 subs r3, r2, r3 - 8002e2e: f241 3288 movw r2, #5000 @ 0x1388 - 8002e32: 4293 cmp r3, r2 - 8002e34: d901 bls.n 8002e3a + 8003118: f7fe fce0 bl 8001adc + 800311c: 4602 mov r2, r0 + 800311e: 68fb ldr r3, [r7, #12] + 8003120: 1ad3 subs r3, r2, r3 + 8003122: f241 3288 movw r2, #5000 @ 0x1388 + 8003126: 4293 cmp r3, r2 + 8003128: d901 bls.n 800312e { return HAL_TIMEOUT; - 8002e36: 2303 movs r3, #3 - 8002e38: e05b b.n 8002ef2 + 800312a: 2303 movs r3, #3 + 800312c: e05b b.n 80031e6 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) - 8002e3a: 4b31 ldr r3, [pc, #196] @ (8002f00 ) - 8002e3c: 689b ldr r3, [r3, #8] - 8002e3e: f003 030c and.w r3, r3, #12 - 8002e42: 2b00 cmp r3, #0 - 8002e44: d1ee bne.n 8002e24 + 800312e: 4b31 ldr r3, [pc, #196] @ (80031f4 ) + 8003130: 689b ldr r3, [r3, #8] + 8003132: f003 030c and.w r3, r3, #12 + 8003136: 2b00 cmp r3, #0 + 8003138: d1ee bne.n 8003118 } } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 8002e46: 4b2d ldr r3, [pc, #180] @ (8002efc ) - 8002e48: 681b ldr r3, [r3, #0] - 8002e4a: f003 0301 and.w r3, r3, #1 - 8002e4e: 683a ldr r2, [r7, #0] - 8002e50: 429a cmp r2, r3 - 8002e52: d219 bcs.n 8002e88 + 800313a: 4b2d ldr r3, [pc, #180] @ (80031f0 ) + 800313c: 681b ldr r3, [r3, #0] + 800313e: f003 0301 and.w r3, r3, #1 + 8003142: 683a ldr r2, [r7, #0] + 8003144: 429a cmp r2, r3 + 8003146: d219 bcs.n 800317c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002e54: 683b ldr r3, [r7, #0] - 8002e56: 2b01 cmp r3, #1 - 8002e58: d105 bne.n 8002e66 - 8002e5a: 4b28 ldr r3, [pc, #160] @ (8002efc ) - 8002e5c: 681b ldr r3, [r3, #0] - 8002e5e: 4a27 ldr r2, [pc, #156] @ (8002efc ) - 8002e60: f043 0304 orr.w r3, r3, #4 - 8002e64: 6013 str r3, [r2, #0] - 8002e66: 4b25 ldr r3, [pc, #148] @ (8002efc ) - 8002e68: 681b ldr r3, [r3, #0] - 8002e6a: f023 0201 bic.w r2, r3, #1 - 8002e6e: 4923 ldr r1, [pc, #140] @ (8002efc ) - 8002e70: 683b ldr r3, [r7, #0] - 8002e72: 4313 orrs r3, r2 - 8002e74: 600b str r3, [r1, #0] + 8003148: 683b ldr r3, [r7, #0] + 800314a: 2b01 cmp r3, #1 + 800314c: d105 bne.n 800315a + 800314e: 4b28 ldr r3, [pc, #160] @ (80031f0 ) + 8003150: 681b ldr r3, [r3, #0] + 8003152: 4a27 ldr r2, [pc, #156] @ (80031f0 ) + 8003154: f043 0304 orr.w r3, r3, #4 + 8003158: 6013 str r3, [r2, #0] + 800315a: 4b25 ldr r3, [pc, #148] @ (80031f0 ) + 800315c: 681b ldr r3, [r3, #0] + 800315e: f023 0201 bic.w r2, r3, #1 + 8003162: 4923 ldr r1, [pc, #140] @ (80031f0 ) + 8003164: 683b ldr r3, [r7, #0] + 8003166: 4313 orrs r3, r2 + 8003168: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8002e76: 4b21 ldr r3, [pc, #132] @ (8002efc ) - 8002e78: 681b ldr r3, [r3, #0] - 8002e7a: f003 0301 and.w r3, r3, #1 - 8002e7e: 683a ldr r2, [r7, #0] - 8002e80: 429a cmp r2, r3 - 8002e82: d001 beq.n 8002e88 + 800316a: 4b21 ldr r3, [pc, #132] @ (80031f0 ) + 800316c: 681b ldr r3, [r3, #0] + 800316e: f003 0301 and.w r3, r3, #1 + 8003172: 683a ldr r2, [r7, #0] + 8003174: 429a cmp r2, r3 + 8003176: d001 beq.n 800317c { return HAL_ERROR; - 8002e84: 2301 movs r3, #1 - 8002e86: e034 b.n 8002ef2 + 8003178: 2301 movs r3, #1 + 800317a: e034 b.n 80031e6 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8002e88: 687b ldr r3, [r7, #4] - 8002e8a: 681b ldr r3, [r3, #0] - 8002e8c: f003 0304 and.w r3, r3, #4 - 8002e90: 2b00 cmp r3, #0 - 8002e92: d008 beq.n 8002ea6 + 800317c: 687b ldr r3, [r7, #4] + 800317e: 681b ldr r3, [r3, #0] + 8003180: f003 0304 and.w r3, r3, #4 + 8003184: 2b00 cmp r3, #0 + 8003186: d008 beq.n 800319a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8002e94: 4b1a ldr r3, [pc, #104] @ (8002f00 ) - 8002e96: 689b ldr r3, [r3, #8] - 8002e98: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 8002e9c: 687b ldr r3, [r7, #4] - 8002e9e: 68db ldr r3, [r3, #12] - 8002ea0: 4917 ldr r1, [pc, #92] @ (8002f00 ) - 8002ea2: 4313 orrs r3, r2 - 8002ea4: 608b str r3, [r1, #8] + 8003188: 4b1a ldr r3, [pc, #104] @ (80031f4 ) + 800318a: 689b ldr r3, [r3, #8] + 800318c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 8003190: 687b ldr r3, [r7, #4] + 8003192: 68db ldr r3, [r3, #12] + 8003194: 4917 ldr r1, [pc, #92] @ (80031f4 ) + 8003196: 4313 orrs r3, r2 + 8003198: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8002ea6: 687b ldr r3, [r7, #4] - 8002ea8: 681b ldr r3, [r3, #0] - 8002eaa: f003 0308 and.w r3, r3, #8 - 8002eae: 2b00 cmp r3, #0 - 8002eb0: d009 beq.n 8002ec6 + 800319a: 687b ldr r3, [r7, #4] + 800319c: 681b ldr r3, [r3, #0] + 800319e: f003 0308 and.w r3, r3, #8 + 80031a2: 2b00 cmp r3, #0 + 80031a4: d009 beq.n 80031ba { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 8002eb2: 4b13 ldr r3, [pc, #76] @ (8002f00 ) - 8002eb4: 689b ldr r3, [r3, #8] - 8002eb6: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 8002eba: 687b ldr r3, [r7, #4] - 8002ebc: 691b ldr r3, [r3, #16] - 8002ebe: 00db lsls r3, r3, #3 - 8002ec0: 490f ldr r1, [pc, #60] @ (8002f00 ) - 8002ec2: 4313 orrs r3, r2 - 8002ec4: 608b str r3, [r1, #8] + 80031a6: 4b13 ldr r3, [pc, #76] @ (80031f4 ) + 80031a8: 689b ldr r3, [r3, #8] + 80031aa: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 80031ae: 687b ldr r3, [r7, #4] + 80031b0: 691b ldr r3, [r3, #16] + 80031b2: 00db lsls r3, r3, #3 + 80031b4: 490f ldr r1, [pc, #60] @ (80031f4 ) + 80031b6: 4313 orrs r3, r2 + 80031b8: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8002ec6: f000 f823 bl 8002f10 - 8002eca: 4602 mov r2, r0 - 8002ecc: 4b0c ldr r3, [pc, #48] @ (8002f00 ) - 8002ece: 689b ldr r3, [r3, #8] - 8002ed0: 091b lsrs r3, r3, #4 - 8002ed2: f003 030f and.w r3, r3, #15 - 8002ed6: 490b ldr r1, [pc, #44] @ (8002f04 ) - 8002ed8: 5ccb ldrb r3, [r1, r3] - 8002eda: fa22 f303 lsr.w r3, r2, r3 - 8002ede: 4a0a ldr r2, [pc, #40] @ (8002f08 ) - 8002ee0: 6013 str r3, [r2, #0] + 80031ba: f000 f823 bl 8003204 + 80031be: 4602 mov r2, r0 + 80031c0: 4b0c ldr r3, [pc, #48] @ (80031f4 ) + 80031c2: 689b ldr r3, [r3, #8] + 80031c4: 091b lsrs r3, r3, #4 + 80031c6: f003 030f and.w r3, r3, #15 + 80031ca: 490b ldr r1, [pc, #44] @ (80031f8 ) + 80031cc: 5ccb ldrb r3, [r1, r3] + 80031ce: fa22 f303 lsr.w r3, r2, r3 + 80031d2: 4a0a ldr r2, [pc, #40] @ (80031fc ) + 80031d4: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 8002ee2: 4b0a ldr r3, [pc, #40] @ (8002f0c ) - 8002ee4: 681b ldr r3, [r3, #0] - 8002ee6: 4618 mov r0, r3 - 8002ee8: f7fe faee bl 80014c8 - 8002eec: 4603 mov r3, r0 - 8002eee: 72fb strb r3, [r7, #11] + 80031d6: 4b0a ldr r3, [pc, #40] @ (8003200 ) + 80031d8: 681b ldr r3, [r3, #0] + 80031da: 4618 mov r0, r3 + 80031dc: f7fe fc32 bl 8001a44 + 80031e0: 4603 mov r3, r0 + 80031e2: 72fb strb r3, [r7, #11] return status; - 8002ef0: 7afb ldrb r3, [r7, #11] + 80031e4: 7afb ldrb r3, [r7, #11] } - 8002ef2: 4618 mov r0, r3 - 8002ef4: 3710 adds r7, #16 - 8002ef6: 46bd mov sp, r7 - 8002ef8: bd80 pop {r7, pc} - 8002efa: bf00 nop - 8002efc: 40023c00 .word 0x40023c00 - 8002f00: 40023800 .word 0x40023800 - 8002f04: 08003da4 .word 0x08003da4 - 8002f08: 20000000 .word 0x20000000 - 8002f0c: 20000004 .word 0x20000004 + 80031e6: 4618 mov r0, r3 + 80031e8: 3710 adds r7, #16 + 80031ea: 46bd mov sp, r7 + 80031ec: bd80 pop {r7, pc} + 80031ee: bf00 nop + 80031f0: 40023c00 .word 0x40023c00 + 80031f4: 40023800 .word 0x40023800 + 80031f8: 08004098 .word 0x08004098 + 80031fc: 20000000 .word 0x20000000 + 8003200: 20000004 .word 0x20000004 -08002f10 : +08003204 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8002f10: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 8002f14: b08e sub sp, #56 @ 0x38 - 8002f16: af00 add r7, sp, #0 + 8003204: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8003208: b08e sub sp, #56 @ 0x38 + 800320a: af00 add r7, sp, #0 uint32_t tmpreg, pllm, plld, pllvco, msiclkrange, sysclockfreq; tmpreg = RCC->CFGR; - 8002f18: 4b58 ldr r3, [pc, #352] @ (800307c ) - 8002f1a: 689b ldr r3, [r3, #8] - 8002f1c: 62fb str r3, [r7, #44] @ 0x2c + 800320c: 4b58 ldr r3, [pc, #352] @ (8003370 ) + 800320e: 689b ldr r3, [r3, #8] + 8003210: 62fb str r3, [r7, #44] @ 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8002f1e: 6afb ldr r3, [r7, #44] @ 0x2c - 8002f20: f003 030c and.w r3, r3, #12 - 8002f24: 2b0c cmp r3, #12 - 8002f26: d00d beq.n 8002f44 - 8002f28: 2b0c cmp r3, #12 - 8002f2a: f200 8092 bhi.w 8003052 - 8002f2e: 2b04 cmp r3, #4 - 8002f30: d002 beq.n 8002f38 - 8002f32: 2b08 cmp r3, #8 - 8002f34: d003 beq.n 8002f3e - 8002f36: e08c b.n 8003052 + 8003212: 6afb ldr r3, [r7, #44] @ 0x2c + 8003214: f003 030c and.w r3, r3, #12 + 8003218: 2b0c cmp r3, #12 + 800321a: d00d beq.n 8003238 + 800321c: 2b0c cmp r3, #12 + 800321e: f200 8092 bhi.w 8003346 + 8003222: 2b04 cmp r3, #4 + 8003224: d002 beq.n 800322c + 8003226: 2b08 cmp r3, #8 + 8003228: d003 beq.n 8003232 + 800322a: e08c b.n 8003346 { case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 8002f38: 4b51 ldr r3, [pc, #324] @ (8003080 ) - 8002f3a: 633b str r3, [r7, #48] @ 0x30 + 800322c: 4b51 ldr r3, [pc, #324] @ (8003374 ) + 800322e: 633b str r3, [r7, #48] @ 0x30 break; - 8002f3c: e097 b.n 800306e + 8003230: e097 b.n 8003362 } case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8002f3e: 4b51 ldr r3, [pc, #324] @ (8003084 ) - 8002f40: 633b str r3, [r7, #48] @ 0x30 + 8003232: 4b51 ldr r3, [pc, #324] @ (8003378 ) + 8003234: 633b str r3, [r7, #48] @ 0x30 break; - 8002f42: e094 b.n 800306e + 8003236: e094 b.n 8003362 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; - 8002f44: 6afb ldr r3, [r7, #44] @ 0x2c - 8002f46: 0c9b lsrs r3, r3, #18 - 8002f48: f003 020f and.w r2, r3, #15 - 8002f4c: 4b4e ldr r3, [pc, #312] @ (8003088 ) - 8002f4e: 5c9b ldrb r3, [r3, r2] - 8002f50: 62bb str r3, [r7, #40] @ 0x28 + 8003238: 6afb ldr r3, [r7, #44] @ 0x2c + 800323a: 0c9b lsrs r3, r3, #18 + 800323c: f003 020f and.w r2, r3, #15 + 8003240: 4b4e ldr r3, [pc, #312] @ (800337c ) + 8003242: 5c9b ldrb r3, [r3, r2] + 8003244: 62bb str r3, [r7, #40] @ 0x28 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U; - 8002f52: 6afb ldr r3, [r7, #44] @ 0x2c - 8002f54: 0d9b lsrs r3, r3, #22 - 8002f56: f003 0303 and.w r3, r3, #3 - 8002f5a: 3301 adds r3, #1 - 8002f5c: 627b str r3, [r7, #36] @ 0x24 + 8003246: 6afb ldr r3, [r7, #44] @ 0x2c + 8003248: 0d9b lsrs r3, r3, #22 + 800324a: f003 0303 and.w r3, r3, #3 + 800324e: 3301 adds r3, #1 + 8003250: 627b str r3, [r7, #36] @ 0x24 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8002f5e: 4b47 ldr r3, [pc, #284] @ (800307c ) - 8002f60: 689b ldr r3, [r3, #8] - 8002f62: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8002f66: 2b00 cmp r3, #0 - 8002f68: d021 beq.n 8002fae + 8003252: 4b47 ldr r3, [pc, #284] @ (8003370 ) + 8003254: 689b ldr r3, [r3, #8] + 8003256: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 800325a: 2b00 cmp r3, #0 + 800325c: d021 beq.n 80032a2 { /* HSE used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 8002f6a: 6abb ldr r3, [r7, #40] @ 0x28 - 8002f6c: 2200 movs r2, #0 - 8002f6e: 61bb str r3, [r7, #24] - 8002f70: 61fa str r2, [r7, #28] - 8002f72: 4b44 ldr r3, [pc, #272] @ (8003084 ) - 8002f74: e9d7 8906 ldrd r8, r9, [r7, #24] - 8002f78: 464a mov r2, r9 - 8002f7a: fb03 f202 mul.w r2, r3, r2 - 8002f7e: 2300 movs r3, #0 - 8002f80: 4644 mov r4, r8 - 8002f82: fb04 f303 mul.w r3, r4, r3 - 8002f86: 4413 add r3, r2 - 8002f88: 4a3e ldr r2, [pc, #248] @ (8003084 ) - 8002f8a: 4644 mov r4, r8 - 8002f8c: fba4 0102 umull r0, r1, r4, r2 - 8002f90: 440b add r3, r1 - 8002f92: 4619 mov r1, r3 - 8002f94: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002f96: 2200 movs r2, #0 - 8002f98: 613b str r3, [r7, #16] - 8002f9a: 617a str r2, [r7, #20] - 8002f9c: e9d7 2304 ldrd r2, r3, [r7, #16] - 8002fa0: f7fd fcdc bl 800095c <__aeabi_uldivmod> - 8002fa4: 4602 mov r2, r0 - 8002fa6: 460b mov r3, r1 - 8002fa8: 4613 mov r3, r2 - 8002faa: 637b str r3, [r7, #52] @ 0x34 - 8002fac: e04e b.n 800304c + 800325e: 6abb ldr r3, [r7, #40] @ 0x28 + 8003260: 2200 movs r2, #0 + 8003262: 61bb str r3, [r7, #24] + 8003264: 61fa str r2, [r7, #28] + 8003266: 4b44 ldr r3, [pc, #272] @ (8003378 ) + 8003268: e9d7 8906 ldrd r8, r9, [r7, #24] + 800326c: 464a mov r2, r9 + 800326e: fb03 f202 mul.w r2, r3, r2 + 8003272: 2300 movs r3, #0 + 8003274: 4644 mov r4, r8 + 8003276: fb04 f303 mul.w r3, r4, r3 + 800327a: 4413 add r3, r2 + 800327c: 4a3e ldr r2, [pc, #248] @ (8003378 ) + 800327e: 4644 mov r4, r8 + 8003280: fba4 0102 umull r0, r1, r4, r2 + 8003284: 440b add r3, r1 + 8003286: 4619 mov r1, r3 + 8003288: 6a7b ldr r3, [r7, #36] @ 0x24 + 800328a: 2200 movs r2, #0 + 800328c: 613b str r3, [r7, #16] + 800328e: 617a str r2, [r7, #20] + 8003290: e9d7 2304 ldrd r2, r3, [r7, #16] + 8003294: f7fd fde0 bl 8000e58 <__aeabi_uldivmod> + 8003298: 4602 mov r2, r0 + 800329a: 460b mov r3, r1 + 800329c: 4613 mov r3, r2 + 800329e: 637b str r3, [r7, #52] @ 0x34 + 80032a0: e04e b.n 8003340 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 8002fae: 6abb ldr r3, [r7, #40] @ 0x28 - 8002fb0: 2200 movs r2, #0 - 8002fb2: 469a mov sl, r3 - 8002fb4: 4693 mov fp, r2 - 8002fb6: 4652 mov r2, sl - 8002fb8: 465b mov r3, fp - 8002fba: f04f 0000 mov.w r0, #0 - 8002fbe: f04f 0100 mov.w r1, #0 - 8002fc2: 0159 lsls r1, r3, #5 - 8002fc4: ea41 61d2 orr.w r1, r1, r2, lsr #27 - 8002fc8: 0150 lsls r0, r2, #5 - 8002fca: 4602 mov r2, r0 - 8002fcc: 460b mov r3, r1 - 8002fce: ebb2 080a subs.w r8, r2, sl - 8002fd2: eb63 090b sbc.w r9, r3, fp - 8002fd6: f04f 0200 mov.w r2, #0 - 8002fda: f04f 0300 mov.w r3, #0 - 8002fde: ea4f 1389 mov.w r3, r9, lsl #6 - 8002fe2: ea43 6398 orr.w r3, r3, r8, lsr #26 - 8002fe6: ea4f 1288 mov.w r2, r8, lsl #6 - 8002fea: ebb2 0408 subs.w r4, r2, r8 - 8002fee: eb63 0509 sbc.w r5, r3, r9 - 8002ff2: f04f 0200 mov.w r2, #0 - 8002ff6: f04f 0300 mov.w r3, #0 - 8002ffa: 00eb lsls r3, r5, #3 - 8002ffc: ea43 7354 orr.w r3, r3, r4, lsr #29 - 8003000: 00e2 lsls r2, r4, #3 - 8003002: 4614 mov r4, r2 - 8003004: 461d mov r5, r3 - 8003006: eb14 030a adds.w r3, r4, sl - 800300a: 603b str r3, [r7, #0] - 800300c: eb45 030b adc.w r3, r5, fp - 8003010: 607b str r3, [r7, #4] - 8003012: f04f 0200 mov.w r2, #0 - 8003016: f04f 0300 mov.w r3, #0 - 800301a: e9d7 4500 ldrd r4, r5, [r7] - 800301e: 4629 mov r1, r5 - 8003020: 028b lsls r3, r1, #10 - 8003022: 4620 mov r0, r4 - 8003024: 4629 mov r1, r5 - 8003026: 4604 mov r4, r0 - 8003028: ea43 5394 orr.w r3, r3, r4, lsr #22 - 800302c: 4601 mov r1, r0 - 800302e: 028a lsls r2, r1, #10 - 8003030: 4610 mov r0, r2 - 8003032: 4619 mov r1, r3 - 8003034: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003036: 2200 movs r2, #0 - 8003038: 60bb str r3, [r7, #8] - 800303a: 60fa str r2, [r7, #12] - 800303c: e9d7 2302 ldrd r2, r3, [r7, #8] - 8003040: f7fd fc8c bl 800095c <__aeabi_uldivmod> - 8003044: 4602 mov r2, r0 - 8003046: 460b mov r3, r1 - 8003048: 4613 mov r3, r2 - 800304a: 637b str r3, [r7, #52] @ 0x34 + 80032a2: 6abb ldr r3, [r7, #40] @ 0x28 + 80032a4: 2200 movs r2, #0 + 80032a6: 469a mov sl, r3 + 80032a8: 4693 mov fp, r2 + 80032aa: 4652 mov r2, sl + 80032ac: 465b mov r3, fp + 80032ae: f04f 0000 mov.w r0, #0 + 80032b2: f04f 0100 mov.w r1, #0 + 80032b6: 0159 lsls r1, r3, #5 + 80032b8: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 80032bc: 0150 lsls r0, r2, #5 + 80032be: 4602 mov r2, r0 + 80032c0: 460b mov r3, r1 + 80032c2: ebb2 080a subs.w r8, r2, sl + 80032c6: eb63 090b sbc.w r9, r3, fp + 80032ca: f04f 0200 mov.w r2, #0 + 80032ce: f04f 0300 mov.w r3, #0 + 80032d2: ea4f 1389 mov.w r3, r9, lsl #6 + 80032d6: ea43 6398 orr.w r3, r3, r8, lsr #26 + 80032da: ea4f 1288 mov.w r2, r8, lsl #6 + 80032de: ebb2 0408 subs.w r4, r2, r8 + 80032e2: eb63 0509 sbc.w r5, r3, r9 + 80032e6: f04f 0200 mov.w r2, #0 + 80032ea: f04f 0300 mov.w r3, #0 + 80032ee: 00eb lsls r3, r5, #3 + 80032f0: ea43 7354 orr.w r3, r3, r4, lsr #29 + 80032f4: 00e2 lsls r2, r4, #3 + 80032f6: 4614 mov r4, r2 + 80032f8: 461d mov r5, r3 + 80032fa: eb14 030a adds.w r3, r4, sl + 80032fe: 603b str r3, [r7, #0] + 8003300: eb45 030b adc.w r3, r5, fp + 8003304: 607b str r3, [r7, #4] + 8003306: f04f 0200 mov.w r2, #0 + 800330a: f04f 0300 mov.w r3, #0 + 800330e: e9d7 4500 ldrd r4, r5, [r7] + 8003312: 4629 mov r1, r5 + 8003314: 028b lsls r3, r1, #10 + 8003316: 4620 mov r0, r4 + 8003318: 4629 mov r1, r5 + 800331a: 4604 mov r4, r0 + 800331c: ea43 5394 orr.w r3, r3, r4, lsr #22 + 8003320: 4601 mov r1, r0 + 8003322: 028a lsls r2, r1, #10 + 8003324: 4610 mov r0, r2 + 8003326: 4619 mov r1, r3 + 8003328: 6a7b ldr r3, [r7, #36] @ 0x24 + 800332a: 2200 movs r2, #0 + 800332c: 60bb str r3, [r7, #8] + 800332e: 60fa str r2, [r7, #12] + 8003330: e9d7 2302 ldrd r2, r3, [r7, #8] + 8003334: f7fd fd90 bl 8000e58 <__aeabi_uldivmod> + 8003338: 4602 mov r2, r0 + 800333a: 460b mov r3, r1 + 800333c: 4613 mov r3, r2 + 800333e: 637b str r3, [r7, #52] @ 0x34 } sysclockfreq = pllvco; - 800304c: 6b7b ldr r3, [r7, #52] @ 0x34 - 800304e: 633b str r3, [r7, #48] @ 0x30 + 8003340: 6b7b ldr r3, [r7, #52] @ 0x34 + 8003342: 633b str r3, [r7, #48] @ 0x30 break; - 8003050: e00d b.n 800306e + 8003344: e00d b.n 8003362 } case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */ default: /* MSI used as system clock */ { msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos; - 8003052: 4b0a ldr r3, [pc, #40] @ (800307c ) - 8003054: 685b ldr r3, [r3, #4] - 8003056: 0b5b lsrs r3, r3, #13 - 8003058: f003 0307 and.w r3, r3, #7 - 800305c: 623b str r3, [r7, #32] + 8003346: 4b0a ldr r3, [pc, #40] @ (8003370 ) + 8003348: 685b ldr r3, [r3, #4] + 800334a: 0b5b lsrs r3, r3, #13 + 800334c: f003 0307 and.w r3, r3, #7 + 8003350: 623b str r3, [r7, #32] sysclockfreq = (32768U * (1UL << (msiclkrange + 1U))); - 800305e: 6a3b ldr r3, [r7, #32] - 8003060: 3301 adds r3, #1 - 8003062: f44f 4200 mov.w r2, #32768 @ 0x8000 - 8003066: fa02 f303 lsl.w r3, r2, r3 - 800306a: 633b str r3, [r7, #48] @ 0x30 + 8003352: 6a3b ldr r3, [r7, #32] + 8003354: 3301 adds r3, #1 + 8003356: f44f 4200 mov.w r2, #32768 @ 0x8000 + 800335a: fa02 f303 lsl.w r3, r2, r3 + 800335e: 633b str r3, [r7, #48] @ 0x30 break; - 800306c: bf00 nop + 8003360: bf00 nop } } return sysclockfreq; - 800306e: 6b3b ldr r3, [r7, #48] @ 0x30 + 8003362: 6b3b ldr r3, [r7, #48] @ 0x30 } - 8003070: 4618 mov r0, r3 - 8003072: 3738 adds r7, #56 @ 0x38 - 8003074: 46bd mov sp, r7 - 8003076: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 800307a: bf00 nop - 800307c: 40023800 .word 0x40023800 - 8003080: 00f42400 .word 0x00f42400 - 8003084: 016e3600 .word 0x016e3600 - 8003088: 08003d98 .word 0x08003d98 + 8003364: 4618 mov r0, r3 + 8003366: 3738 adds r7, #56 @ 0x38 + 8003368: 46bd mov sp, r7 + 800336a: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 800336e: bf00 nop + 8003370: 40023800 .word 0x40023800 + 8003374: 00f42400 .word 0x00f42400 + 8003378: 016e3600 .word 0x016e3600 + 800337c: 0800408c .word 0x0800408c -0800308c : +08003380 : voltage range * @param MSIrange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_6 * @retval HAL status */ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange) { - 800308c: b480 push {r7} - 800308e: b087 sub sp, #28 - 8003090: af00 add r7, sp, #0 - 8003092: 6078 str r0, [r7, #4] + 8003380: b480 push {r7} + 8003382: b087 sub sp, #28 + 8003384: af00 add r7, sp, #0 + 8003386: 6078 str r0, [r7, #4] uint32_t vos; uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */ - 8003094: 2300 movs r3, #0 - 8003096: 613b str r3, [r7, #16] + 8003388: 2300 movs r3, #0 + 800338a: 613b str r3, [r7, #16] /* HCLK can reach 4 MHz only if AHB prescaler = 1 */ if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1) - 8003098: 4b29 ldr r3, [pc, #164] @ (8003140 ) - 800309a: 689b ldr r3, [r3, #8] - 800309c: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 80030a0: 2b00 cmp r3, #0 - 80030a2: d12c bne.n 80030fe + 800338c: 4b29 ldr r3, [pc, #164] @ (8003434 ) + 800338e: 689b ldr r3, [r3, #8] + 8003390: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 8003394: 2b00 cmp r3, #0 + 8003396: d12c bne.n 80033f2 { if(__HAL_RCC_PWR_IS_CLK_ENABLED()) - 80030a4: 4b26 ldr r3, [pc, #152] @ (8003140 ) - 80030a6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80030a8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80030ac: 2b00 cmp r3, #0 - 80030ae: d005 beq.n 80030bc + 8003398: 4b26 ldr r3, [pc, #152] @ (8003434 ) + 800339a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800339c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80033a0: 2b00 cmp r3, #0 + 80033a2: d005 beq.n 80033b0 { vos = READ_BIT(PWR->CR, PWR_CR_VOS); - 80030b0: 4b24 ldr r3, [pc, #144] @ (8003144 ) - 80030b2: 681b ldr r3, [r3, #0] - 80030b4: f403 53c0 and.w r3, r3, #6144 @ 0x1800 - 80030b8: 617b str r3, [r7, #20] - 80030ba: e016 b.n 80030ea + 80033a4: 4b24 ldr r3, [pc, #144] @ (8003438 ) + 80033a6: 681b ldr r3, [r3, #0] + 80033a8: f403 53c0 and.w r3, r3, #6144 @ 0x1800 + 80033ac: 617b str r3, [r7, #20] + 80033ae: e016 b.n 80033de } else { __HAL_RCC_PWR_CLK_ENABLE(); - 80030bc: 4b20 ldr r3, [pc, #128] @ (8003140 ) - 80030be: 6a5b ldr r3, [r3, #36] @ 0x24 - 80030c0: 4a1f ldr r2, [pc, #124] @ (8003140 ) - 80030c2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80030c6: 6253 str r3, [r2, #36] @ 0x24 - 80030c8: 4b1d ldr r3, [pc, #116] @ (8003140 ) - 80030ca: 6a5b ldr r3, [r3, #36] @ 0x24 - 80030cc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80030d0: 60fb str r3, [r7, #12] - 80030d2: 68fb ldr r3, [r7, #12] + 80033b0: 4b20 ldr r3, [pc, #128] @ (8003434 ) + 80033b2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80033b4: 4a1f ldr r2, [pc, #124] @ (8003434 ) + 80033b6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80033ba: 6253 str r3, [r2, #36] @ 0x24 + 80033bc: 4b1d ldr r3, [pc, #116] @ (8003434 ) + 80033be: 6a5b ldr r3, [r3, #36] @ 0x24 + 80033c0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80033c4: 60fb str r3, [r7, #12] + 80033c6: 68fb ldr r3, [r7, #12] vos = READ_BIT(PWR->CR, PWR_CR_VOS); - 80030d4: 4b1b ldr r3, [pc, #108] @ (8003144 ) - 80030d6: 681b ldr r3, [r3, #0] - 80030d8: f403 53c0 and.w r3, r3, #6144 @ 0x1800 - 80030dc: 617b str r3, [r7, #20] + 80033c8: 4b1b ldr r3, [pc, #108] @ (8003438 ) + 80033ca: 681b ldr r3, [r3, #0] + 80033cc: f403 53c0 and.w r3, r3, #6144 @ 0x1800 + 80033d0: 617b str r3, [r7, #20] __HAL_RCC_PWR_CLK_DISABLE(); - 80030de: 4b18 ldr r3, [pc, #96] @ (8003140 ) - 80030e0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80030e2: 4a17 ldr r2, [pc, #92] @ (8003140 ) - 80030e4: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80030e8: 6253 str r3, [r2, #36] @ 0x24 + 80033d2: 4b18 ldr r3, [pc, #96] @ (8003434 ) + 80033d4: 6a5b ldr r3, [r3, #36] @ 0x24 + 80033d6: 4a17 ldr r2, [pc, #92] @ (8003434 ) + 80033d8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80033dc: 6253 str r3, [r2, #36] @ 0x24 } /* Check if need to set latency 1 only for Range 3 & HCLK = 4MHz */ if((vos == PWR_REGULATOR_VOLTAGE_SCALE3) && (MSIrange == RCC_MSIRANGE_6)) - 80030ea: 697b ldr r3, [r7, #20] - 80030ec: f5b3 5fc0 cmp.w r3, #6144 @ 0x1800 - 80030f0: d105 bne.n 80030fe - 80030f2: 687b ldr r3, [r7, #4] - 80030f4: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 - 80030f8: d101 bne.n 80030fe + 80033de: 697b ldr r3, [r7, #20] + 80033e0: f5b3 5fc0 cmp.w r3, #6144 @ 0x1800 + 80033e4: d105 bne.n 80033f2 + 80033e6: 687b ldr r3, [r7, #4] + 80033e8: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 + 80033ec: d101 bne.n 80033f2 { latency = FLASH_LATENCY_1; /* 1WS */ - 80030fa: 2301 movs r3, #1 - 80030fc: 613b str r3, [r7, #16] + 80033ee: 2301 movs r3, #1 + 80033f0: 613b str r3, [r7, #16] } } __HAL_FLASH_SET_LATENCY(latency); - 80030fe: 693b ldr r3, [r7, #16] - 8003100: 2b01 cmp r3, #1 - 8003102: d105 bne.n 8003110 - 8003104: 4b10 ldr r3, [pc, #64] @ (8003148 ) - 8003106: 681b ldr r3, [r3, #0] - 8003108: 4a0f ldr r2, [pc, #60] @ (8003148 ) - 800310a: f043 0304 orr.w r3, r3, #4 - 800310e: 6013 str r3, [r2, #0] - 8003110: 4b0d ldr r3, [pc, #52] @ (8003148 ) - 8003112: 681b ldr r3, [r3, #0] - 8003114: f023 0201 bic.w r2, r3, #1 - 8003118: 490b ldr r1, [pc, #44] @ (8003148 ) - 800311a: 693b ldr r3, [r7, #16] - 800311c: 4313 orrs r3, r2 - 800311e: 600b str r3, [r1, #0] + 80033f2: 693b ldr r3, [r7, #16] + 80033f4: 2b01 cmp r3, #1 + 80033f6: d105 bne.n 8003404 + 80033f8: 4b10 ldr r3, [pc, #64] @ (800343c ) + 80033fa: 681b ldr r3, [r3, #0] + 80033fc: 4a0f ldr r2, [pc, #60] @ (800343c ) + 80033fe: f043 0304 orr.w r3, r3, #4 + 8003402: 6013 str r3, [r2, #0] + 8003404: 4b0d ldr r3, [pc, #52] @ (800343c ) + 8003406: 681b ldr r3, [r3, #0] + 8003408: f023 0201 bic.w r2, r3, #1 + 800340c: 490b ldr r1, [pc, #44] @ (800343c ) + 800340e: 693b ldr r3, [r7, #16] + 8003410: 4313 orrs r3, r2 + 8003412: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != latency) - 8003120: 4b09 ldr r3, [pc, #36] @ (8003148 ) - 8003122: 681b ldr r3, [r3, #0] - 8003124: f003 0301 and.w r3, r3, #1 - 8003128: 693a ldr r2, [r7, #16] - 800312a: 429a cmp r2, r3 - 800312c: d001 beq.n 8003132 + 8003414: 4b09 ldr r3, [pc, #36] @ (800343c ) + 8003416: 681b ldr r3, [r3, #0] + 8003418: f003 0301 and.w r3, r3, #1 + 800341c: 693a ldr r2, [r7, #16] + 800341e: 429a cmp r2, r3 + 8003420: d001 beq.n 8003426 { return HAL_ERROR; - 800312e: 2301 movs r3, #1 - 8003130: e000 b.n 8003134 + 8003422: 2301 movs r3, #1 + 8003424: e000 b.n 8003428 } return HAL_OK; - 8003132: 2300 movs r3, #0 + 8003426: 2300 movs r3, #0 } - 8003134: 4618 mov r0, r3 - 8003136: 371c adds r7, #28 - 8003138: 46bd mov sp, r7 - 800313a: bc80 pop {r7} - 800313c: 4770 bx lr - 800313e: bf00 nop - 8003140: 40023800 .word 0x40023800 - 8003144: 40007000 .word 0x40007000 - 8003148: 40023c00 .word 0x40023c00 + 8003428: 4618 mov r0, r3 + 800342a: 371c adds r7, #28 + 800342c: 46bd mov sp, r7 + 800342e: bc80 pop {r7} + 8003430: 4770 bx lr + 8003432: bf00 nop + 8003434: 40023800 .word 0x40023800 + 8003438: 40007000 .word 0x40007000 + 800343c: 40023c00 .word 0x40023c00 -0800314c : +08003440 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { - 800314c: b580 push {r7, lr} - 800314e: b082 sub sp, #8 - 8003150: af00 add r7, sp, #0 - 8003152: 6078 str r0, [r7, #4] + 8003440: b580 push {r7, lr} + 8003442: b082 sub sp, #8 + 8003444: af00 add r7, sp, #0 + 8003446: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) - 8003154: 687b ldr r3, [r7, #4] - 8003156: 2b00 cmp r3, #0 - 8003158: d101 bne.n 800315e + 8003448: 687b ldr r3, [r7, #4] + 800344a: 2b00 cmp r3, #0 + 800344c: d101 bne.n 8003452 { return HAL_ERROR; - 800315a: 2301 movs r3, #1 - 800315c: e07b b.n 8003256 + 800344e: 2301 movs r3, #1 + 8003450: e07b b.n 800354a assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); /* TI mode is not supported on all devices in stm32l1xx series. TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE if TI mode is not supported */ assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - 800315e: 687b ldr r3, [r7, #4] - 8003160: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003162: 2b00 cmp r3, #0 - 8003164: d108 bne.n 8003178 + 8003452: 687b ldr r3, [r7, #4] + 8003454: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003456: 2b00 cmp r3, #0 + 8003458: d108 bne.n 800346c { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) - 8003166: 687b ldr r3, [r7, #4] - 8003168: 685b ldr r3, [r3, #4] - 800316a: f5b3 7f82 cmp.w r3, #260 @ 0x104 - 800316e: d009 beq.n 8003184 + 800345a: 687b ldr r3, [r7, #4] + 800345c: 685b ldr r3, [r3, #4] + 800345e: f5b3 7f82 cmp.w r3, #260 @ 0x104 + 8003462: d009 beq.n 8003478 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 8003170: 687b ldr r3, [r7, #4] - 8003172: 2200 movs r2, #0 - 8003174: 61da str r2, [r3, #28] - 8003176: e005 b.n 8003184 + 8003464: 687b ldr r3, [r7, #4] + 8003466: 2200 movs r2, #0 + 8003468: 61da str r2, [r3, #28] + 800346a: e005 b.n 8003478 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - 8003178: 687b ldr r3, [r7, #4] - 800317a: 2200 movs r2, #0 - 800317c: 611a str r2, [r3, #16] + 800346c: 687b ldr r3, [r7, #4] + 800346e: 2200 movs r2, #0 + 8003470: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - 800317e: 687b ldr r3, [r7, #4] - 8003180: 2200 movs r2, #0 - 8003182: 615a str r2, [r3, #20] + 8003472: 687b ldr r3, [r7, #4] + 8003474: 2200 movs r2, #0 + 8003476: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8003184: 687b ldr r3, [r7, #4] - 8003186: 2200 movs r2, #0 - 8003188: 629a str r2, [r3, #40] @ 0x28 + 8003478: 687b ldr r3, [r7, #4] + 800347a: 2200 movs r2, #0 + 800347c: 629a str r2, [r3, #40] @ 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) - 800318a: 687b ldr r3, [r7, #4] - 800318c: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 - 8003190: b2db uxtb r3, r3 - 8003192: 2b00 cmp r3, #0 - 8003194: d106 bne.n 80031a4 + 800347e: 687b ldr r3, [r7, #4] + 8003480: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 + 8003484: b2db uxtb r3, r3 + 8003486: 2b00 cmp r3, #0 + 8003488: d106 bne.n 8003498 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; - 8003196: 687b ldr r3, [r7, #4] - 8003198: 2200 movs r2, #0 - 800319a: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 800348a: 687b ldr r3, [r7, #4] + 800348c: 2200 movs r2, #0 + 800348e: f883 2050 strb.w r2, [r3, #80] @ 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); - 800319e: 6878 ldr r0, [r7, #4] - 80031a0: f7fe f858 bl 8001254 + 8003492: 6878 ldr r0, [r7, #4] + 8003494: f7fe f9a6 bl 80017e4 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; - 80031a4: 687b ldr r3, [r7, #4] - 80031a6: 2202 movs r2, #2 - 80031a8: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 8003498: 687b ldr r3, [r7, #4] + 800349a: 2202 movs r2, #2 + 800349c: f883 2051 strb.w r2, [r3, #81] @ 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 80031ac: 687b ldr r3, [r7, #4] - 80031ae: 681b ldr r3, [r3, #0] - 80031b0: 681a ldr r2, [r3, #0] - 80031b2: 687b ldr r3, [r7, #4] - 80031b4: 681b ldr r3, [r3, #0] - 80031b6: f022 0240 bic.w r2, r2, #64 @ 0x40 - 80031ba: 601a str r2, [r3, #0] + 80034a0: 687b ldr r3, [r7, #4] + 80034a2: 681b ldr r3, [r3, #0] + 80034a4: 681a ldr r2, [r3, #0] + 80034a6: 687b ldr r3, [r7, #4] + 80034a8: 681b ldr r3, [r3, #0] + 80034aa: f022 0240 bic.w r2, r2, #64 @ 0x40 + 80034ae: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - 80031bc: 687b ldr r3, [r7, #4] - 80031be: 685b ldr r3, [r3, #4] - 80031c0: f403 7282 and.w r2, r3, #260 @ 0x104 - 80031c4: 687b ldr r3, [r7, #4] - 80031c6: 689b ldr r3, [r3, #8] - 80031c8: f403 4304 and.w r3, r3, #33792 @ 0x8400 - 80031cc: 431a orrs r2, r3 - 80031ce: 687b ldr r3, [r7, #4] - 80031d0: 68db ldr r3, [r3, #12] - 80031d2: f403 6300 and.w r3, r3, #2048 @ 0x800 - 80031d6: 431a orrs r2, r3 - 80031d8: 687b ldr r3, [r7, #4] - 80031da: 691b ldr r3, [r3, #16] - 80031dc: f003 0302 and.w r3, r3, #2 - 80031e0: 431a orrs r2, r3 - 80031e2: 687b ldr r3, [r7, #4] - 80031e4: 695b ldr r3, [r3, #20] - 80031e6: f003 0301 and.w r3, r3, #1 - 80031ea: 431a orrs r2, r3 - 80031ec: 687b ldr r3, [r7, #4] - 80031ee: 699b ldr r3, [r3, #24] - 80031f0: f403 7300 and.w r3, r3, #512 @ 0x200 - 80031f4: 431a orrs r2, r3 - 80031f6: 687b ldr r3, [r7, #4] - 80031f8: 69db ldr r3, [r3, #28] - 80031fa: f003 0338 and.w r3, r3, #56 @ 0x38 - 80031fe: 431a orrs r2, r3 - 8003200: 687b ldr r3, [r7, #4] - 8003202: 6a1b ldr r3, [r3, #32] - 8003204: f003 0380 and.w r3, r3, #128 @ 0x80 - 8003208: ea42 0103 orr.w r1, r2, r3 - 800320c: 687b ldr r3, [r7, #4] - 800320e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003210: f403 5200 and.w r2, r3, #8192 @ 0x2000 - 8003214: 687b ldr r3, [r7, #4] - 8003216: 681b ldr r3, [r3, #0] - 8003218: 430a orrs r2, r1 - 800321a: 601a str r2, [r3, #0] + 80034b0: 687b ldr r3, [r7, #4] + 80034b2: 685b ldr r3, [r3, #4] + 80034b4: f403 7282 and.w r2, r3, #260 @ 0x104 + 80034b8: 687b ldr r3, [r7, #4] + 80034ba: 689b ldr r3, [r3, #8] + 80034bc: f403 4304 and.w r3, r3, #33792 @ 0x8400 + 80034c0: 431a orrs r2, r3 + 80034c2: 687b ldr r3, [r7, #4] + 80034c4: 68db ldr r3, [r3, #12] + 80034c6: f403 6300 and.w r3, r3, #2048 @ 0x800 + 80034ca: 431a orrs r2, r3 + 80034cc: 687b ldr r3, [r7, #4] + 80034ce: 691b ldr r3, [r3, #16] + 80034d0: f003 0302 and.w r3, r3, #2 + 80034d4: 431a orrs r2, r3 + 80034d6: 687b ldr r3, [r7, #4] + 80034d8: 695b ldr r3, [r3, #20] + 80034da: f003 0301 and.w r3, r3, #1 + 80034de: 431a orrs r2, r3 + 80034e0: 687b ldr r3, [r7, #4] + 80034e2: 699b ldr r3, [r3, #24] + 80034e4: f403 7300 and.w r3, r3, #512 @ 0x200 + 80034e8: 431a orrs r2, r3 + 80034ea: 687b ldr r3, [r7, #4] + 80034ec: 69db ldr r3, [r3, #28] + 80034ee: f003 0338 and.w r3, r3, #56 @ 0x38 + 80034f2: 431a orrs r2, r3 + 80034f4: 687b ldr r3, [r7, #4] + 80034f6: 6a1b ldr r3, [r3, #32] + 80034f8: f003 0380 and.w r3, r3, #128 @ 0x80 + 80034fc: ea42 0103 orr.w r1, r2, r3 + 8003500: 687b ldr r3, [r7, #4] + 8003502: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003504: f403 5200 and.w r2, r3, #8192 @ 0x2000 + 8003508: 687b ldr r3, [r7, #4] + 800350a: 681b ldr r3, [r3, #0] + 800350c: 430a orrs r2, r1 + 800350e: 601a str r2, [r3, #0] (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); #if defined(SPI_CR2_FRF) /* Configure : NSS management, TI Mode */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF))); - 800321c: 687b ldr r3, [r7, #4] - 800321e: 699b ldr r3, [r3, #24] - 8003220: 0c1b lsrs r3, r3, #16 - 8003222: f003 0104 and.w r1, r3, #4 - 8003226: 687b ldr r3, [r7, #4] - 8003228: 6a5b ldr r3, [r3, #36] @ 0x24 - 800322a: f003 0210 and.w r2, r3, #16 - 800322e: 687b ldr r3, [r7, #4] - 8003230: 681b ldr r3, [r3, #0] - 8003232: 430a orrs r2, r1 - 8003234: 605a str r2, [r3, #4] + 8003510: 687b ldr r3, [r7, #4] + 8003512: 699b ldr r3, [r3, #24] + 8003514: 0c1b lsrs r3, r3, #16 + 8003516: f003 0104 and.w r1, r3, #4 + 800351a: 687b ldr r3, [r7, #4] + 800351c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800351e: f003 0210 and.w r2, r3, #16 + 8003522: 687b ldr r3, [r7, #4] + 8003524: 681b ldr r3, [r3, #0] + 8003526: 430a orrs r2, r1 + 8003528: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); - 8003236: 687b ldr r3, [r7, #4] - 8003238: 681b ldr r3, [r3, #0] - 800323a: 69da ldr r2, [r3, #28] - 800323c: 687b ldr r3, [r7, #4] - 800323e: 681b ldr r3, [r3, #0] - 8003240: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 8003244: 61da str r2, [r3, #28] + 800352a: 687b ldr r3, [r7, #4] + 800352c: 681b ldr r3, [r3, #0] + 800352e: 69da ldr r2, [r3, #28] + 8003530: 687b ldr r3, [r7, #4] + 8003532: 681b ldr r3, [r3, #0] + 8003534: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003538: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8003246: 687b ldr r3, [r7, #4] - 8003248: 2200 movs r2, #0 - 800324a: 655a str r2, [r3, #84] @ 0x54 + 800353a: 687b ldr r3, [r7, #4] + 800353c: 2200 movs r2, #0 + 800353e: 655a str r2, [r3, #84] @ 0x54 hspi->State = HAL_SPI_STATE_READY; - 800324c: 687b ldr r3, [r7, #4] - 800324e: 2201 movs r2, #1 - 8003250: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 8003540: 687b ldr r3, [r7, #4] + 8003542: 2201 movs r2, #1 + 8003544: f883 2051 strb.w r2, [r3, #81] @ 0x51 return HAL_OK; - 8003254: 2300 movs r3, #0 + 8003548: 2300 movs r3, #0 } - 8003256: 4618 mov r0, r3 - 8003258: 3708 adds r7, #8 - 800325a: 46bd mov sp, r7 - 800325c: bd80 pop {r7, pc} + 800354a: 4618 mov r0, r3 + 800354c: 3708 adds r7, #8 + 800354e: 46bd mov sp, r7 + 8003550: bd80 pop {r7, pc} -0800325e : +08003552 : * @param Size amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration in ms * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 800325e: b580 push {r7, lr} - 8003260: b088 sub sp, #32 - 8003262: af00 add r7, sp, #0 - 8003264: 60f8 str r0, [r7, #12] - 8003266: 60b9 str r1, [r7, #8] - 8003268: 603b str r3, [r7, #0] - 800326a: 4613 mov r3, r2 - 800326c: 80fb strh r3, [r7, #6] + 8003552: b580 push {r7, lr} + 8003554: b088 sub sp, #32 + 8003556: af00 add r7, sp, #0 + 8003558: 60f8 str r0, [r7, #12] + 800355a: 60b9 str r1, [r7, #8] + 800355c: 603b str r3, [r7, #0] + 800355e: 4613 mov r3, r2 + 8003560: 80fb strh r3, [r7, #6] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 800326e: f7fe f977 bl 8001560 - 8003272: 61f8 str r0, [r7, #28] + 8003562: f7fe fabb bl 8001adc + 8003566: 61f8 str r0, [r7, #28] initial_TxXferCount = Size; - 8003274: 88fb ldrh r3, [r7, #6] - 8003276: 837b strh r3, [r7, #26] + 8003568: 88fb ldrh r3, [r7, #6] + 800356a: 837b strh r3, [r7, #26] if (hspi->State != HAL_SPI_STATE_READY) - 8003278: 68fb ldr r3, [r7, #12] - 800327a: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 - 800327e: b2db uxtb r3, r3 - 8003280: 2b01 cmp r3, #1 - 8003282: d001 beq.n 8003288 + 800356c: 68fb ldr r3, [r7, #12] + 800356e: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 + 8003572: b2db uxtb r3, r3 + 8003574: 2b01 cmp r3, #1 + 8003576: d001 beq.n 800357c { return HAL_BUSY; - 8003284: 2302 movs r3, #2 - 8003286: e12a b.n 80034de + 8003578: 2302 movs r3, #2 + 800357a: e12a b.n 80037d2 } if ((pData == NULL) || (Size == 0U)) - 8003288: 68bb ldr r3, [r7, #8] - 800328a: 2b00 cmp r3, #0 - 800328c: d002 beq.n 8003294 - 800328e: 88fb ldrh r3, [r7, #6] - 8003290: 2b00 cmp r3, #0 - 8003292: d101 bne.n 8003298 + 800357c: 68bb ldr r3, [r7, #8] + 800357e: 2b00 cmp r3, #0 + 8003580: d002 beq.n 8003588 + 8003582: 88fb ldrh r3, [r7, #6] + 8003584: 2b00 cmp r3, #0 + 8003586: d101 bne.n 800358c { return HAL_ERROR; - 8003294: 2301 movs r3, #1 - 8003296: e122 b.n 80034de + 8003588: 2301 movs r3, #1 + 800358a: e122 b.n 80037d2 } /* Process Locked */ __HAL_LOCK(hspi); - 8003298: 68fb ldr r3, [r7, #12] - 800329a: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 - 800329e: 2b01 cmp r3, #1 - 80032a0: d101 bne.n 80032a6 - 80032a2: 2302 movs r3, #2 - 80032a4: e11b b.n 80034de - 80032a6: 68fb ldr r3, [r7, #12] - 80032a8: 2201 movs r2, #1 - 80032aa: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 800358c: 68fb ldr r3, [r7, #12] + 800358e: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 8003592: 2b01 cmp r3, #1 + 8003594: d101 bne.n 800359a + 8003596: 2302 movs r3, #2 + 8003598: e11b b.n 80037d2 + 800359a: 68fb ldr r3, [r7, #12] + 800359c: 2201 movs r2, #1 + 800359e: f883 2050 strb.w r2, [r3, #80] @ 0x50 /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; - 80032ae: 68fb ldr r3, [r7, #12] - 80032b0: 2203 movs r2, #3 - 80032b2: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 80035a2: 68fb ldr r3, [r7, #12] + 80035a4: 2203 movs r2, #3 + 80035a6: f883 2051 strb.w r2, [r3, #81] @ 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 80032b6: 68fb ldr r3, [r7, #12] - 80032b8: 2200 movs r2, #0 - 80032ba: 655a str r2, [r3, #84] @ 0x54 + 80035aa: 68fb ldr r3, [r7, #12] + 80035ac: 2200 movs r2, #0 + 80035ae: 655a str r2, [r3, #84] @ 0x54 hspi->pTxBuffPtr = (const uint8_t *)pData; - 80032bc: 68fb ldr r3, [r7, #12] - 80032be: 68ba ldr r2, [r7, #8] - 80032c0: 631a str r2, [r3, #48] @ 0x30 + 80035b0: 68fb ldr r3, [r7, #12] + 80035b2: 68ba ldr r2, [r7, #8] + 80035b4: 631a str r2, [r3, #48] @ 0x30 hspi->TxXferSize = Size; - 80032c2: 68fb ldr r3, [r7, #12] - 80032c4: 88fa ldrh r2, [r7, #6] - 80032c6: 869a strh r2, [r3, #52] @ 0x34 + 80035b6: 68fb ldr r3, [r7, #12] + 80035b8: 88fa ldrh r2, [r7, #6] + 80035ba: 869a strh r2, [r3, #52] @ 0x34 hspi->TxXferCount = Size; - 80032c8: 68fb ldr r3, [r7, #12] - 80032ca: 88fa ldrh r2, [r7, #6] - 80032cc: 86da strh r2, [r3, #54] @ 0x36 + 80035bc: 68fb ldr r3, [r7, #12] + 80035be: 88fa ldrh r2, [r7, #6] + 80035c0: 86da strh r2, [r3, #54] @ 0x36 /*Init field not used in handle to zero */ hspi->pRxBuffPtr = (uint8_t *)NULL; - 80032ce: 68fb ldr r3, [r7, #12] - 80032d0: 2200 movs r2, #0 - 80032d2: 639a str r2, [r3, #56] @ 0x38 + 80035c2: 68fb ldr r3, [r7, #12] + 80035c4: 2200 movs r2, #0 + 80035c6: 639a str r2, [r3, #56] @ 0x38 hspi->RxXferSize = 0U; - 80032d4: 68fb ldr r3, [r7, #12] - 80032d6: 2200 movs r2, #0 - 80032d8: 879a strh r2, [r3, #60] @ 0x3c + 80035c8: 68fb ldr r3, [r7, #12] + 80035ca: 2200 movs r2, #0 + 80035cc: 879a strh r2, [r3, #60] @ 0x3c hspi->RxXferCount = 0U; - 80032da: 68fb ldr r3, [r7, #12] - 80032dc: 2200 movs r2, #0 - 80032de: 87da strh r2, [r3, #62] @ 0x3e + 80035ce: 68fb ldr r3, [r7, #12] + 80035d0: 2200 movs r2, #0 + 80035d2: 87da strh r2, [r3, #62] @ 0x3e hspi->TxISR = NULL; - 80032e0: 68fb ldr r3, [r7, #12] - 80032e2: 2200 movs r2, #0 - 80032e4: 645a str r2, [r3, #68] @ 0x44 + 80035d4: 68fb ldr r3, [r7, #12] + 80035d6: 2200 movs r2, #0 + 80035d8: 645a str r2, [r3, #68] @ 0x44 hspi->RxISR = NULL; - 80032e6: 68fb ldr r3, [r7, #12] - 80032e8: 2200 movs r2, #0 - 80032ea: 641a str r2, [r3, #64] @ 0x40 + 80035da: 68fb ldr r3, [r7, #12] + 80035dc: 2200 movs r2, #0 + 80035de: 641a str r2, [r3, #64] @ 0x40 /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - 80032ec: 68fb ldr r3, [r7, #12] - 80032ee: 689b ldr r3, [r3, #8] - 80032f0: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 - 80032f4: d10f bne.n 8003316 + 80035e0: 68fb ldr r3, [r7, #12] + 80035e2: 689b ldr r3, [r3, #8] + 80035e4: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 + 80035e8: d10f bne.n 800360a { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); - 80032f6: 68fb ldr r3, [r7, #12] - 80032f8: 681b ldr r3, [r3, #0] - 80032fa: 681a ldr r2, [r3, #0] - 80032fc: 68fb ldr r3, [r7, #12] - 80032fe: 681b ldr r3, [r3, #0] - 8003300: f022 0240 bic.w r2, r2, #64 @ 0x40 - 8003304: 601a str r2, [r3, #0] + 80035ea: 68fb ldr r3, [r7, #12] + 80035ec: 681b ldr r3, [r3, #0] + 80035ee: 681a ldr r2, [r3, #0] + 80035f0: 68fb ldr r3, [r7, #12] + 80035f2: 681b ldr r3, [r3, #0] + 80035f4: f022 0240 bic.w r2, r2, #64 @ 0x40 + 80035f8: 601a str r2, [r3, #0] SPI_1LINE_TX(hspi); - 8003306: 68fb ldr r3, [r7, #12] - 8003308: 681b ldr r3, [r3, #0] - 800330a: 681a ldr r2, [r3, #0] - 800330c: 68fb ldr r3, [r7, #12] - 800330e: 681b ldr r3, [r3, #0] - 8003310: f442 4280 orr.w r2, r2, #16384 @ 0x4000 - 8003314: 601a str r2, [r3, #0] + 80035fa: 68fb ldr r3, [r7, #12] + 80035fc: 681b ldr r3, [r3, #0] + 80035fe: 681a ldr r2, [r3, #0] + 8003600: 68fb ldr r3, [r7, #12] + 8003602: 681b ldr r3, [r3, #0] + 8003604: f442 4280 orr.w r2, r2, #16384 @ 0x4000 + 8003608: 601a str r2, [r3, #0] SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 8003316: 68fb ldr r3, [r7, #12] - 8003318: 681b ldr r3, [r3, #0] - 800331a: 681b ldr r3, [r3, #0] - 800331c: f003 0340 and.w r3, r3, #64 @ 0x40 - 8003320: 2b40 cmp r3, #64 @ 0x40 - 8003322: d007 beq.n 8003334 + 800360a: 68fb ldr r3, [r7, #12] + 800360c: 681b ldr r3, [r3, #0] + 800360e: 681b ldr r3, [r3, #0] + 8003610: f003 0340 and.w r3, r3, #64 @ 0x40 + 8003614: 2b40 cmp r3, #64 @ 0x40 + 8003616: d007 beq.n 8003628 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 8003324: 68fb ldr r3, [r7, #12] - 8003326: 681b ldr r3, [r3, #0] - 8003328: 681a ldr r2, [r3, #0] - 800332a: 68fb ldr r3, [r7, #12] - 800332c: 681b ldr r3, [r3, #0] - 800332e: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8003332: 601a str r2, [r3, #0] + 8003618: 68fb ldr r3, [r7, #12] + 800361a: 681b ldr r3, [r3, #0] + 800361c: 681a ldr r2, [r3, #0] + 800361e: 68fb ldr r3, [r7, #12] + 8003620: 681b ldr r3, [r3, #0] + 8003622: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8003626: 601a str r2, [r3, #0] } /* Transmit data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - 8003334: 68fb ldr r3, [r7, #12] - 8003336: 68db ldr r3, [r3, #12] - 8003338: f5b3 6f00 cmp.w r3, #2048 @ 0x800 - 800333c: d152 bne.n 80033e4 + 8003628: 68fb ldr r3, [r7, #12] + 800362a: 68db ldr r3, [r3, #12] + 800362c: f5b3 6f00 cmp.w r3, #2048 @ 0x800 + 8003630: d152 bne.n 80036d8 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 800333e: 68fb ldr r3, [r7, #12] - 8003340: 685b ldr r3, [r3, #4] - 8003342: 2b00 cmp r3, #0 - 8003344: d002 beq.n 800334c - 8003346: 8b7b ldrh r3, [r7, #26] - 8003348: 2b01 cmp r3, #1 - 800334a: d145 bne.n 80033d8 + 8003632: 68fb ldr r3, [r7, #12] + 8003634: 685b ldr r3, [r3, #4] + 8003636: 2b00 cmp r3, #0 + 8003638: d002 beq.n 8003640 + 800363a: 8b7b ldrh r3, [r7, #26] + 800363c: 2b01 cmp r3, #1 + 800363e: d145 bne.n 80036cc { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); - 800334c: 68fb ldr r3, [r7, #12] - 800334e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003350: 881a ldrh r2, [r3, #0] - 8003352: 68fb ldr r3, [r7, #12] - 8003354: 681b ldr r3, [r3, #0] - 8003356: 60da str r2, [r3, #12] + 8003640: 68fb ldr r3, [r7, #12] + 8003642: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003644: 881a ldrh r2, [r3, #0] + 8003646: 68fb ldr r3, [r7, #12] + 8003648: 681b ldr r3, [r3, #0] + 800364a: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); - 8003358: 68fb ldr r3, [r7, #12] - 800335a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800335c: 1c9a adds r2, r3, #2 - 800335e: 68fb ldr r3, [r7, #12] - 8003360: 631a str r2, [r3, #48] @ 0x30 + 800364c: 68fb ldr r3, [r7, #12] + 800364e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003650: 1c9a adds r2, r3, #2 + 8003652: 68fb ldr r3, [r7, #12] + 8003654: 631a str r2, [r3, #48] @ 0x30 hspi->TxXferCount--; - 8003362: 68fb ldr r3, [r7, #12] - 8003364: 8edb ldrh r3, [r3, #54] @ 0x36 - 8003366: b29b uxth r3, r3 - 8003368: 3b01 subs r3, #1 - 800336a: b29a uxth r2, r3 - 800336c: 68fb ldr r3, [r7, #12] - 800336e: 86da strh r2, [r3, #54] @ 0x36 + 8003656: 68fb ldr r3, [r7, #12] + 8003658: 8edb ldrh r3, [r3, #54] @ 0x36 + 800365a: b29b uxth r3, r3 + 800365c: 3b01 subs r3, #1 + 800365e: b29a uxth r2, r3 + 8003660: 68fb ldr r3, [r7, #12] + 8003662: 86da strh r2, [r3, #54] @ 0x36 } /* Transmit data in 16 Bit mode */ while (hspi->TxXferCount > 0U) - 8003370: e032 b.n 80033d8 + 8003664: e032 b.n 80036cc { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - 8003372: 68fb ldr r3, [r7, #12] - 8003374: 681b ldr r3, [r3, #0] - 8003376: 689b ldr r3, [r3, #8] - 8003378: f003 0302 and.w r3, r3, #2 - 800337c: 2b02 cmp r3, #2 - 800337e: d112 bne.n 80033a6 + 8003666: 68fb ldr r3, [r7, #12] + 8003668: 681b ldr r3, [r3, #0] + 800366a: 689b ldr r3, [r3, #8] + 800366c: f003 0302 and.w r3, r3, #2 + 8003670: 2b02 cmp r3, #2 + 8003672: d112 bne.n 800369a { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); - 8003380: 68fb ldr r3, [r7, #12] - 8003382: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003384: 881a ldrh r2, [r3, #0] - 8003386: 68fb ldr r3, [r7, #12] - 8003388: 681b ldr r3, [r3, #0] - 800338a: 60da str r2, [r3, #12] + 8003674: 68fb ldr r3, [r7, #12] + 8003676: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003678: 881a ldrh r2, [r3, #0] + 800367a: 68fb ldr r3, [r7, #12] + 800367c: 681b ldr r3, [r3, #0] + 800367e: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); - 800338c: 68fb ldr r3, [r7, #12] - 800338e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003390: 1c9a adds r2, r3, #2 - 8003392: 68fb ldr r3, [r7, #12] - 8003394: 631a str r2, [r3, #48] @ 0x30 + 8003680: 68fb ldr r3, [r7, #12] + 8003682: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003684: 1c9a adds r2, r3, #2 + 8003686: 68fb ldr r3, [r7, #12] + 8003688: 631a str r2, [r3, #48] @ 0x30 hspi->TxXferCount--; - 8003396: 68fb ldr r3, [r7, #12] - 8003398: 8edb ldrh r3, [r3, #54] @ 0x36 - 800339a: b29b uxth r3, r3 - 800339c: 3b01 subs r3, #1 - 800339e: b29a uxth r2, r3 - 80033a0: 68fb ldr r3, [r7, #12] - 80033a2: 86da strh r2, [r3, #54] @ 0x36 - 80033a4: e018 b.n 80033d8 + 800368a: 68fb ldr r3, [r7, #12] + 800368c: 8edb ldrh r3, [r3, #54] @ 0x36 + 800368e: b29b uxth r3, r3 + 8003690: 3b01 subs r3, #1 + 8003692: b29a uxth r2, r3 + 8003694: 68fb ldr r3, [r7, #12] + 8003696: 86da strh r2, [r3, #54] @ 0x36 + 8003698: e018 b.n 80036cc } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 80033a6: f7fe f8db bl 8001560 - 80033aa: 4602 mov r2, r0 - 80033ac: 69fb ldr r3, [r7, #28] - 80033ae: 1ad3 subs r3, r2, r3 - 80033b0: 683a ldr r2, [r7, #0] - 80033b2: 429a cmp r2, r3 - 80033b4: d803 bhi.n 80033be - 80033b6: 683b ldr r3, [r7, #0] - 80033b8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff - 80033bc: d102 bne.n 80033c4 - 80033be: 683b ldr r3, [r7, #0] - 80033c0: 2b00 cmp r3, #0 - 80033c2: d109 bne.n 80033d8 + 800369a: f7fe fa1f bl 8001adc + 800369e: 4602 mov r2, r0 + 80036a0: 69fb ldr r3, [r7, #28] + 80036a2: 1ad3 subs r3, r2, r3 + 80036a4: 683a ldr r2, [r7, #0] + 80036a6: 429a cmp r2, r3 + 80036a8: d803 bhi.n 80036b2 + 80036aa: 683b ldr r3, [r7, #0] + 80036ac: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 80036b0: d102 bne.n 80036b8 + 80036b2: 683b ldr r3, [r7, #0] + 80036b4: 2b00 cmp r3, #0 + 80036b6: d109 bne.n 80036cc { hspi->State = HAL_SPI_STATE_READY; - 80033c4: 68fb ldr r3, [r7, #12] - 80033c6: 2201 movs r2, #1 - 80033c8: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 80036b8: 68fb ldr r3, [r7, #12] + 80036ba: 2201 movs r2, #1 + 80036bc: f883 2051 strb.w r2, [r3, #81] @ 0x51 __HAL_UNLOCK(hspi); - 80033cc: 68fb ldr r3, [r7, #12] - 80033ce: 2200 movs r2, #0 - 80033d0: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 80036c0: 68fb ldr r3, [r7, #12] + 80036c2: 2200 movs r2, #0 + 80036c4: f883 2050 strb.w r2, [r3, #80] @ 0x50 return HAL_TIMEOUT; - 80033d4: 2303 movs r3, #3 - 80033d6: e082 b.n 80034de + 80036c8: 2303 movs r3, #3 + 80036ca: e082 b.n 80037d2 while (hspi->TxXferCount > 0U) - 80033d8: 68fb ldr r3, [r7, #12] - 80033da: 8edb ldrh r3, [r3, #54] @ 0x36 - 80033dc: b29b uxth r3, r3 - 80033de: 2b00 cmp r3, #0 - 80033e0: d1c7 bne.n 8003372 - 80033e2: e053 b.n 800348c + 80036cc: 68fb ldr r3, [r7, #12] + 80036ce: 8edb ldrh r3, [r3, #54] @ 0x36 + 80036d0: b29b uxth r3, r3 + 80036d2: 2b00 cmp r3, #0 + 80036d4: d1c7 bne.n 8003666 + 80036d6: e053 b.n 8003780 } } /* Transmit data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 80033e4: 68fb ldr r3, [r7, #12] - 80033e6: 685b ldr r3, [r3, #4] - 80033e8: 2b00 cmp r3, #0 - 80033ea: d002 beq.n 80033f2 - 80033ec: 8b7b ldrh r3, [r7, #26] - 80033ee: 2b01 cmp r3, #1 - 80033f0: d147 bne.n 8003482 + 80036d8: 68fb ldr r3, [r7, #12] + 80036da: 685b ldr r3, [r3, #4] + 80036dc: 2b00 cmp r3, #0 + 80036de: d002 beq.n 80036e6 + 80036e0: 8b7b ldrh r3, [r7, #26] + 80036e2: 2b01 cmp r3, #1 + 80036e4: d147 bne.n 8003776 { *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); - 80033f2: 68fb ldr r3, [r7, #12] - 80033f4: 6b1a ldr r2, [r3, #48] @ 0x30 - 80033f6: 68fb ldr r3, [r7, #12] - 80033f8: 681b ldr r3, [r3, #0] - 80033fa: 330c adds r3, #12 - 80033fc: 7812 ldrb r2, [r2, #0] - 80033fe: 701a strb r2, [r3, #0] + 80036e6: 68fb ldr r3, [r7, #12] + 80036e8: 6b1a ldr r2, [r3, #48] @ 0x30 + 80036ea: 68fb ldr r3, [r7, #12] + 80036ec: 681b ldr r3, [r3, #0] + 80036ee: 330c adds r3, #12 + 80036f0: 7812 ldrb r2, [r2, #0] + 80036f2: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 8003400: 68fb ldr r3, [r7, #12] - 8003402: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003404: 1c5a adds r2, r3, #1 - 8003406: 68fb ldr r3, [r7, #12] - 8003408: 631a str r2, [r3, #48] @ 0x30 + 80036f4: 68fb ldr r3, [r7, #12] + 80036f6: 6b1b ldr r3, [r3, #48] @ 0x30 + 80036f8: 1c5a adds r2, r3, #1 + 80036fa: 68fb ldr r3, [r7, #12] + 80036fc: 631a str r2, [r3, #48] @ 0x30 hspi->TxXferCount--; - 800340a: 68fb ldr r3, [r7, #12] - 800340c: 8edb ldrh r3, [r3, #54] @ 0x36 - 800340e: b29b uxth r3, r3 - 8003410: 3b01 subs r3, #1 - 8003412: b29a uxth r2, r3 - 8003414: 68fb ldr r3, [r7, #12] - 8003416: 86da strh r2, [r3, #54] @ 0x36 + 80036fe: 68fb ldr r3, [r7, #12] + 8003700: 8edb ldrh r3, [r3, #54] @ 0x36 + 8003702: b29b uxth r3, r3 + 8003704: 3b01 subs r3, #1 + 8003706: b29a uxth r2, r3 + 8003708: 68fb ldr r3, [r7, #12] + 800370a: 86da strh r2, [r3, #54] @ 0x36 } while (hspi->TxXferCount > 0U) - 8003418: e033 b.n 8003482 + 800370c: e033 b.n 8003776 { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - 800341a: 68fb ldr r3, [r7, #12] - 800341c: 681b ldr r3, [r3, #0] - 800341e: 689b ldr r3, [r3, #8] - 8003420: f003 0302 and.w r3, r3, #2 - 8003424: 2b02 cmp r3, #2 - 8003426: d113 bne.n 8003450 + 800370e: 68fb ldr r3, [r7, #12] + 8003710: 681b ldr r3, [r3, #0] + 8003712: 689b ldr r3, [r3, #8] + 8003714: f003 0302 and.w r3, r3, #2 + 8003718: 2b02 cmp r3, #2 + 800371a: d113 bne.n 8003744 { *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr); - 8003428: 68fb ldr r3, [r7, #12] - 800342a: 6b1a ldr r2, [r3, #48] @ 0x30 - 800342c: 68fb ldr r3, [r7, #12] - 800342e: 681b ldr r3, [r3, #0] - 8003430: 330c adds r3, #12 - 8003432: 7812 ldrb r2, [r2, #0] - 8003434: 701a strb r2, [r3, #0] + 800371c: 68fb ldr r3, [r7, #12] + 800371e: 6b1a ldr r2, [r3, #48] @ 0x30 + 8003720: 68fb ldr r3, [r7, #12] + 8003722: 681b ldr r3, [r3, #0] + 8003724: 330c adds r3, #12 + 8003726: 7812 ldrb r2, [r2, #0] + 8003728: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 8003436: 68fb ldr r3, [r7, #12] - 8003438: 6b1b ldr r3, [r3, #48] @ 0x30 - 800343a: 1c5a adds r2, r3, #1 - 800343c: 68fb ldr r3, [r7, #12] - 800343e: 631a str r2, [r3, #48] @ 0x30 + 800372a: 68fb ldr r3, [r7, #12] + 800372c: 6b1b ldr r3, [r3, #48] @ 0x30 + 800372e: 1c5a adds r2, r3, #1 + 8003730: 68fb ldr r3, [r7, #12] + 8003732: 631a str r2, [r3, #48] @ 0x30 hspi->TxXferCount--; - 8003440: 68fb ldr r3, [r7, #12] - 8003442: 8edb ldrh r3, [r3, #54] @ 0x36 - 8003444: b29b uxth r3, r3 - 8003446: 3b01 subs r3, #1 - 8003448: b29a uxth r2, r3 - 800344a: 68fb ldr r3, [r7, #12] - 800344c: 86da strh r2, [r3, #54] @ 0x36 - 800344e: e018 b.n 8003482 + 8003734: 68fb ldr r3, [r7, #12] + 8003736: 8edb ldrh r3, [r3, #54] @ 0x36 + 8003738: b29b uxth r3, r3 + 800373a: 3b01 subs r3, #1 + 800373c: b29a uxth r2, r3 + 800373e: 68fb ldr r3, [r7, #12] + 8003740: 86da strh r2, [r3, #54] @ 0x36 + 8003742: e018 b.n 8003776 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 8003450: f7fe f886 bl 8001560 - 8003454: 4602 mov r2, r0 - 8003456: 69fb ldr r3, [r7, #28] - 8003458: 1ad3 subs r3, r2, r3 - 800345a: 683a ldr r2, [r7, #0] - 800345c: 429a cmp r2, r3 - 800345e: d803 bhi.n 8003468 - 8003460: 683b ldr r3, [r7, #0] - 8003462: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff - 8003466: d102 bne.n 800346e - 8003468: 683b ldr r3, [r7, #0] - 800346a: 2b00 cmp r3, #0 - 800346c: d109 bne.n 8003482 + 8003744: f7fe f9ca bl 8001adc + 8003748: 4602 mov r2, r0 + 800374a: 69fb ldr r3, [r7, #28] + 800374c: 1ad3 subs r3, r2, r3 + 800374e: 683a ldr r2, [r7, #0] + 8003750: 429a cmp r2, r3 + 8003752: d803 bhi.n 800375c + 8003754: 683b ldr r3, [r7, #0] + 8003756: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 800375a: d102 bne.n 8003762 + 800375c: 683b ldr r3, [r7, #0] + 800375e: 2b00 cmp r3, #0 + 8003760: d109 bne.n 8003776 { hspi->State = HAL_SPI_STATE_READY; - 800346e: 68fb ldr r3, [r7, #12] - 8003470: 2201 movs r2, #1 - 8003472: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 8003762: 68fb ldr r3, [r7, #12] + 8003764: 2201 movs r2, #1 + 8003766: f883 2051 strb.w r2, [r3, #81] @ 0x51 __HAL_UNLOCK(hspi); - 8003476: 68fb ldr r3, [r7, #12] - 8003478: 2200 movs r2, #0 - 800347a: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 800376a: 68fb ldr r3, [r7, #12] + 800376c: 2200 movs r2, #0 + 800376e: f883 2050 strb.w r2, [r3, #80] @ 0x50 return HAL_TIMEOUT; - 800347e: 2303 movs r3, #3 - 8003480: e02d b.n 80034de + 8003772: 2303 movs r3, #3 + 8003774: e02d b.n 80037d2 while (hspi->TxXferCount > 0U) - 8003482: 68fb ldr r3, [r7, #12] - 8003484: 8edb ldrh r3, [r3, #54] @ 0x36 - 8003486: b29b uxth r3, r3 - 8003488: 2b00 cmp r3, #0 - 800348a: d1c6 bne.n 800341a + 8003776: 68fb ldr r3, [r7, #12] + 8003778: 8edb ldrh r3, [r3, #54] @ 0x36 + 800377a: b29b uxth r3, r3 + 800377c: 2b00 cmp r3, #0 + 800377e: d1c6 bne.n 800370e SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 800348c: 69fa ldr r2, [r7, #28] - 800348e: 6839 ldr r1, [r7, #0] - 8003490: 68f8 ldr r0, [r7, #12] - 8003492: f000 f8b1 bl 80035f8 - 8003496: 4603 mov r3, r0 - 8003498: 2b00 cmp r3, #0 - 800349a: d002 beq.n 80034a2 + 8003780: 69fa ldr r2, [r7, #28] + 8003782: 6839 ldr r1, [r7, #0] + 8003784: 68f8 ldr r0, [r7, #12] + 8003786: f000 f8b1 bl 80038ec + 800378a: 4603 mov r3, r0 + 800378c: 2b00 cmp r3, #0 + 800378e: d002 beq.n 8003796 { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 800349c: 68fb ldr r3, [r7, #12] - 800349e: 2220 movs r2, #32 - 80034a0: 655a str r2, [r3, #84] @ 0x54 + 8003790: 68fb ldr r3, [r7, #12] + 8003792: 2220 movs r2, #32 + 8003794: 655a str r2, [r3, #84] @ 0x54 } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - 80034a2: 68fb ldr r3, [r7, #12] - 80034a4: 689b ldr r3, [r3, #8] - 80034a6: 2b00 cmp r3, #0 - 80034a8: d10a bne.n 80034c0 + 8003796: 68fb ldr r3, [r7, #12] + 8003798: 689b ldr r3, [r3, #8] + 800379a: 2b00 cmp r3, #0 + 800379c: d10a bne.n 80037b4 { __HAL_SPI_CLEAR_OVRFLAG(hspi); - 80034aa: 2300 movs r3, #0 - 80034ac: 617b str r3, [r7, #20] - 80034ae: 68fb ldr r3, [r7, #12] - 80034b0: 681b ldr r3, [r3, #0] - 80034b2: 68db ldr r3, [r3, #12] - 80034b4: 617b str r3, [r7, #20] - 80034b6: 68fb ldr r3, [r7, #12] - 80034b8: 681b ldr r3, [r3, #0] - 80034ba: 689b ldr r3, [r3, #8] - 80034bc: 617b str r3, [r7, #20] - 80034be: 697b ldr r3, [r7, #20] + 800379e: 2300 movs r3, #0 + 80037a0: 617b str r3, [r7, #20] + 80037a2: 68fb ldr r3, [r7, #12] + 80037a4: 681b ldr r3, [r3, #0] + 80037a6: 68db ldr r3, [r3, #12] + 80037a8: 617b str r3, [r7, #20] + 80037aa: 68fb ldr r3, [r7, #12] + 80037ac: 681b ldr r3, [r3, #0] + 80037ae: 689b ldr r3, [r3, #8] + 80037b0: 617b str r3, [r7, #20] + 80037b2: 697b ldr r3, [r7, #20] } hspi->State = HAL_SPI_STATE_READY; - 80034c0: 68fb ldr r3, [r7, #12] - 80034c2: 2201 movs r2, #1 - 80034c4: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 80037b4: 68fb ldr r3, [r7, #12] + 80037b6: 2201 movs r2, #1 + 80037b8: f883 2051 strb.w r2, [r3, #81] @ 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); - 80034c8: 68fb ldr r3, [r7, #12] - 80034ca: 2200 movs r2, #0 - 80034cc: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 80037bc: 68fb ldr r3, [r7, #12] + 80037be: 2200 movs r2, #0 + 80037c0: f883 2050 strb.w r2, [r3, #80] @ 0x50 if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - 80034d0: 68fb ldr r3, [r7, #12] - 80034d2: 6d5b ldr r3, [r3, #84] @ 0x54 - 80034d4: 2b00 cmp r3, #0 - 80034d6: d001 beq.n 80034dc + 80037c4: 68fb ldr r3, [r7, #12] + 80037c6: 6d5b ldr r3, [r3, #84] @ 0x54 + 80037c8: 2b00 cmp r3, #0 + 80037ca: d001 beq.n 80037d0 { return HAL_ERROR; - 80034d8: 2301 movs r3, #1 - 80034da: e000 b.n 80034de + 80037cc: 2301 movs r3, #1 + 80037ce: e000 b.n 80037d2 } else { return HAL_OK; - 80034dc: 2300 movs r3, #0 + 80037d0: 2300 movs r3, #0 } } - 80034de: 4618 mov r0, r3 - 80034e0: 3720 adds r7, #32 - 80034e2: 46bd mov sp, r7 - 80034e4: bd80 pop {r7, pc} + 80037d2: 4618 mov r0, r3 + 80037d4: 3720 adds r7, #32 + 80037d6: 46bd mov sp, r7 + 80037d8: bd80 pop {r7, pc} ... -080034e8 : +080037dc : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { - 80034e8: b580 push {r7, lr} - 80034ea: b088 sub sp, #32 - 80034ec: af00 add r7, sp, #0 - 80034ee: 60f8 str r0, [r7, #12] - 80034f0: 60b9 str r1, [r7, #8] - 80034f2: 603b str r3, [r7, #0] - 80034f4: 4613 mov r3, r2 - 80034f6: 71fb strb r3, [r7, #7] + 80037dc: b580 push {r7, lr} + 80037de: b088 sub sp, #32 + 80037e0: af00 add r7, sp, #0 + 80037e2: 60f8 str r0, [r7, #12] + 80037e4: 60b9 str r1, [r7, #8] + 80037e6: 603b str r3, [r7, #0] + 80037e8: 4613 mov r3, r2 + 80037ea: 71fb strb r3, [r7, #7] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); - 80034f8: f7fe f832 bl 8001560 - 80034fc: 4602 mov r2, r0 - 80034fe: 6abb ldr r3, [r7, #40] @ 0x28 - 8003500: 1a9b subs r3, r3, r2 - 8003502: 683a ldr r2, [r7, #0] - 8003504: 4413 add r3, r2 - 8003506: 61fb str r3, [r7, #28] + 80037ec: f7fe f976 bl 8001adc + 80037f0: 4602 mov r2, r0 + 80037f2: 6abb ldr r3, [r7, #40] @ 0x28 + 80037f4: 1a9b subs r3, r3, r2 + 80037f6: 683a ldr r2, [r7, #0] + 80037f8: 4413 add r3, r2 + 80037fa: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); - 8003508: f7fe f82a bl 8001560 - 800350c: 61b8 str r0, [r7, #24] + 80037fc: f7fe f96e bl 8001adc + 8003800: 61b8 str r0, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); - 800350e: 4b39 ldr r3, [pc, #228] @ (80035f4 ) - 8003510: 681b ldr r3, [r3, #0] - 8003512: 015b lsls r3, r3, #5 - 8003514: 0d1b lsrs r3, r3, #20 - 8003516: 69fa ldr r2, [r7, #28] - 8003518: fb02 f303 mul.w r3, r2, r3 - 800351c: 617b str r3, [r7, #20] + 8003802: 4b39 ldr r3, [pc, #228] @ (80038e8 ) + 8003804: 681b ldr r3, [r3, #0] + 8003806: 015b lsls r3, r3, #5 + 8003808: 0d1b lsrs r3, r3, #20 + 800380a: 69fa ldr r2, [r7, #28] + 800380c: fb02 f303 mul.w r3, r2, r3 + 8003810: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 800351e: e054 b.n 80035ca + 8003812: e054 b.n 80038be { if (Timeout != HAL_MAX_DELAY) - 8003520: 683b ldr r3, [r7, #0] - 8003522: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff - 8003526: d050 beq.n 80035ca + 8003814: 683b ldr r3, [r7, #0] + 8003816: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff + 800381a: d050 beq.n 80038be { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) - 8003528: f7fe f81a bl 8001560 - 800352c: 4602 mov r2, r0 - 800352e: 69bb ldr r3, [r7, #24] - 8003530: 1ad3 subs r3, r2, r3 - 8003532: 69fa ldr r2, [r7, #28] - 8003534: 429a cmp r2, r3 - 8003536: d902 bls.n 800353e - 8003538: 69fb ldr r3, [r7, #28] - 800353a: 2b00 cmp r3, #0 - 800353c: d13d bne.n 80035ba + 800381c: f7fe f95e bl 8001adc + 8003820: 4602 mov r2, r0 + 8003822: 69bb ldr r3, [r7, #24] + 8003824: 1ad3 subs r3, r2, r3 + 8003826: 69fa ldr r2, [r7, #28] + 8003828: 429a cmp r2, r3 + 800382a: d902 bls.n 8003832 + 800382c: 69fb ldr r3, [r7, #28] + 800382e: 2b00 cmp r3, #0 + 8003830: d13d bne.n 80038ae /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - 800353e: 68fb ldr r3, [r7, #12] - 8003540: 681b ldr r3, [r3, #0] - 8003542: 685a ldr r2, [r3, #4] - 8003544: 68fb ldr r3, [r7, #12] - 8003546: 681b ldr r3, [r3, #0] - 8003548: f022 02e0 bic.w r2, r2, #224 @ 0xe0 - 800354c: 605a str r2, [r3, #4] + 8003832: 68fb ldr r3, [r7, #12] + 8003834: 681b ldr r3, [r3, #0] + 8003836: 685a ldr r2, [r3, #4] + 8003838: 68fb ldr r3, [r7, #12] + 800383a: 681b ldr r3, [r3, #0] + 800383c: f022 02e0 bic.w r2, r2, #224 @ 0xe0 + 8003840: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 800354e: 68fb ldr r3, [r7, #12] - 8003550: 685b ldr r3, [r3, #4] - 8003552: f5b3 7f82 cmp.w r3, #260 @ 0x104 - 8003556: d111 bne.n 800357c - 8003558: 68fb ldr r3, [r7, #12] - 800355a: 689b ldr r3, [r3, #8] - 800355c: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 - 8003560: d004 beq.n 800356c + 8003842: 68fb ldr r3, [r7, #12] + 8003844: 685b ldr r3, [r3, #4] + 8003846: f5b3 7f82 cmp.w r3, #260 @ 0x104 + 800384a: d111 bne.n 8003870 + 800384c: 68fb ldr r3, [r7, #12] + 800384e: 689b ldr r3, [r3, #8] + 8003850: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 + 8003854: d004 beq.n 8003860 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 8003562: 68fb ldr r3, [r7, #12] - 8003564: 689b ldr r3, [r3, #8] - 8003566: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 800356a: d107 bne.n 800357c + 8003856: 68fb ldr r3, [r7, #12] + 8003858: 689b ldr r3, [r3, #8] + 800385a: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 800385e: d107 bne.n 8003870 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 800356c: 68fb ldr r3, [r7, #12] - 800356e: 681b ldr r3, [r3, #0] - 8003570: 681a ldr r2, [r3, #0] - 8003572: 68fb ldr r3, [r7, #12] - 8003574: 681b ldr r3, [r3, #0] - 8003576: f022 0240 bic.w r2, r2, #64 @ 0x40 - 800357a: 601a str r2, [r3, #0] + 8003860: 68fb ldr r3, [r7, #12] + 8003862: 681b ldr r3, [r3, #0] + 8003864: 681a ldr r2, [r3, #0] + 8003866: 68fb ldr r3, [r7, #12] + 8003868: 681b ldr r3, [r3, #0] + 800386a: f022 0240 bic.w r2, r2, #64 @ 0x40 + 800386e: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - 800357c: 68fb ldr r3, [r7, #12] - 800357e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003580: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 8003584: d10f bne.n 80035a6 + 8003870: 68fb ldr r3, [r7, #12] + 8003872: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003874: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8003878: d10f bne.n 800389a { SPI_RESET_CRC(hspi); - 8003586: 68fb ldr r3, [r7, #12] - 8003588: 681b ldr r3, [r3, #0] - 800358a: 681a ldr r2, [r3, #0] - 800358c: 68fb ldr r3, [r7, #12] - 800358e: 681b ldr r3, [r3, #0] - 8003590: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 8003594: 601a str r2, [r3, #0] - 8003596: 68fb ldr r3, [r7, #12] - 8003598: 681b ldr r3, [r3, #0] - 800359a: 681a ldr r2, [r3, #0] - 800359c: 68fb ldr r3, [r7, #12] - 800359e: 681b ldr r3, [r3, #0] - 80035a0: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 80035a4: 601a str r2, [r3, #0] + 800387a: 68fb ldr r3, [r7, #12] + 800387c: 681b ldr r3, [r3, #0] + 800387e: 681a ldr r2, [r3, #0] + 8003880: 68fb ldr r3, [r7, #12] + 8003882: 681b ldr r3, [r3, #0] + 8003884: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 8003888: 601a str r2, [r3, #0] + 800388a: 68fb ldr r3, [r7, #12] + 800388c: 681b ldr r3, [r3, #0] + 800388e: 681a ldr r2, [r3, #0] + 8003890: 68fb ldr r3, [r7, #12] + 8003892: 681b ldr r3, [r3, #0] + 8003894: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8003898: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; - 80035a6: 68fb ldr r3, [r7, #12] - 80035a8: 2201 movs r2, #1 - 80035aa: f883 2051 strb.w r2, [r3, #81] @ 0x51 + 800389a: 68fb ldr r3, [r7, #12] + 800389c: 2201 movs r2, #1 + 800389e: f883 2051 strb.w r2, [r3, #81] @ 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); - 80035ae: 68fb ldr r3, [r7, #12] - 80035b0: 2200 movs r2, #0 - 80035b2: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 80038a2: 68fb ldr r3, [r7, #12] + 80038a4: 2200 movs r2, #0 + 80038a6: f883 2050 strb.w r2, [r3, #80] @ 0x50 return HAL_TIMEOUT; - 80035b6: 2303 movs r3, #3 - 80035b8: e017 b.n 80035ea + 80038aa: 2303 movs r3, #3 + 80038ac: e017 b.n 80038de } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if (count == 0U) - 80035ba: 697b ldr r3, [r7, #20] - 80035bc: 2b00 cmp r3, #0 - 80035be: d101 bne.n 80035c4 + 80038ae: 697b ldr r3, [r7, #20] + 80038b0: 2b00 cmp r3, #0 + 80038b2: d101 bne.n 80038b8 { tmp_timeout = 0U; - 80035c0: 2300 movs r3, #0 - 80035c2: 61fb str r3, [r7, #28] + 80038b4: 2300 movs r3, #0 + 80038b6: 61fb str r3, [r7, #28] } count--; - 80035c4: 697b ldr r3, [r7, #20] - 80035c6: 3b01 subs r3, #1 - 80035c8: 617b str r3, [r7, #20] + 80038b8: 697b ldr r3, [r7, #20] + 80038ba: 3b01 subs r3, #1 + 80038bc: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 80035ca: 68fb ldr r3, [r7, #12] - 80035cc: 681b ldr r3, [r3, #0] - 80035ce: 689a ldr r2, [r3, #8] - 80035d0: 68bb ldr r3, [r7, #8] - 80035d2: 4013 ands r3, r2 - 80035d4: 68ba ldr r2, [r7, #8] - 80035d6: 429a cmp r2, r3 - 80035d8: bf0c ite eq - 80035da: 2301 moveq r3, #1 - 80035dc: 2300 movne r3, #0 - 80035de: b2db uxtb r3, r3 - 80035e0: 461a mov r2, r3 - 80035e2: 79fb ldrb r3, [r7, #7] - 80035e4: 429a cmp r2, r3 - 80035e6: d19b bne.n 8003520 + 80038be: 68fb ldr r3, [r7, #12] + 80038c0: 681b ldr r3, [r3, #0] + 80038c2: 689a ldr r2, [r3, #8] + 80038c4: 68bb ldr r3, [r7, #8] + 80038c6: 4013 ands r3, r2 + 80038c8: 68ba ldr r2, [r7, #8] + 80038ca: 429a cmp r2, r3 + 80038cc: bf0c ite eq + 80038ce: 2301 moveq r3, #1 + 80038d0: 2300 movne r3, #0 + 80038d2: b2db uxtb r3, r3 + 80038d4: 461a mov r2, r3 + 80038d6: 79fb ldrb r3, [r7, #7] + 80038d8: 429a cmp r2, r3 + 80038da: d19b bne.n 8003814 } } return HAL_OK; - 80035e8: 2300 movs r3, #0 + 80038dc: 2300 movs r3, #0 } - 80035ea: 4618 mov r0, r3 - 80035ec: 3720 adds r7, #32 - 80035ee: 46bd mov sp, r7 - 80035f0: bd80 pop {r7, pc} - 80035f2: bf00 nop - 80035f4: 20000000 .word 0x20000000 + 80038de: 4618 mov r0, r3 + 80038e0: 3720 adds r7, #32 + 80038e2: 46bd mov sp, r7 + 80038e4: bd80 pop {r7, pc} + 80038e6: bf00 nop + 80038e8: 20000000 .word 0x20000000 -080035f8 : +080038ec : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - 80035f8: b580 push {r7, lr} - 80035fa: b088 sub sp, #32 - 80035fc: af02 add r7, sp, #8 - 80035fe: 60f8 str r0, [r7, #12] - 8003600: 60b9 str r1, [r7, #8] - 8003602: 607a str r2, [r7, #4] + 80038ec: b580 push {r7, lr} + 80038ee: b088 sub sp, #32 + 80038f0: af02 add r7, sp, #8 + 80038f2: 60f8 str r0, [r7, #12] + 80038f4: 60b9 str r1, [r7, #8] + 80038f6: 607a str r2, [r7, #4] /* Wait until TXE flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK) - 8003604: 687b ldr r3, [r7, #4] - 8003606: 9300 str r3, [sp, #0] - 8003608: 68bb ldr r3, [r7, #8] - 800360a: 2201 movs r2, #1 - 800360c: 2102 movs r1, #2 - 800360e: 68f8 ldr r0, [r7, #12] - 8003610: f7ff ff6a bl 80034e8 - 8003614: 4603 mov r3, r0 - 8003616: 2b00 cmp r3, #0 - 8003618: d007 beq.n 800362a + 80038f8: 687b ldr r3, [r7, #4] + 80038fa: 9300 str r3, [sp, #0] + 80038fc: 68bb ldr r3, [r7, #8] + 80038fe: 2201 movs r2, #1 + 8003900: 2102 movs r1, #2 + 8003902: 68f8 ldr r0, [r7, #12] + 8003904: f7ff ff6a bl 80037dc + 8003908: 4603 mov r3, r0 + 800390a: 2b00 cmp r3, #0 + 800390c: d007 beq.n 800391e { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 800361a: 68fb ldr r3, [r7, #12] - 800361c: 6d5b ldr r3, [r3, #84] @ 0x54 - 800361e: f043 0220 orr.w r2, r3, #32 - 8003622: 68fb ldr r3, [r7, #12] - 8003624: 655a str r2, [r3, #84] @ 0x54 + 800390e: 68fb ldr r3, [r7, #12] + 8003910: 6d5b ldr r3, [r3, #84] @ 0x54 + 8003912: f043 0220 orr.w r2, r3, #32 + 8003916: 68fb ldr r3, [r7, #12] + 8003918: 655a str r2, [r3, #84] @ 0x54 return HAL_TIMEOUT; - 8003626: 2303 movs r3, #3 - 8003628: e032 b.n 8003690 + 800391a: 2303 movs r3, #3 + 800391c: e032 b.n 8003984 } /* Timeout in us */ __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); - 800362a: 4b1b ldr r3, [pc, #108] @ (8003698 ) - 800362c: 681b ldr r3, [r3, #0] - 800362e: 4a1b ldr r2, [pc, #108] @ (800369c ) - 8003630: fba2 2303 umull r2, r3, r2, r3 - 8003634: 0d5b lsrs r3, r3, #21 - 8003636: f44f 727a mov.w r2, #1000 @ 0x3e8 - 800363a: fb02 f303 mul.w r3, r2, r3 - 800363e: 617b str r3, [r7, #20] + 800391e: 4b1b ldr r3, [pc, #108] @ (800398c ) + 8003920: 681b ldr r3, [r3, #0] + 8003922: 4a1b ldr r2, [pc, #108] @ (8003990 ) + 8003924: fba2 2303 umull r2, r3, r2, r3 + 8003928: 0d5b lsrs r3, r3, #21 + 800392a: f44f 727a mov.w r2, #1000 @ 0x3e8 + 800392e: fb02 f303 mul.w r3, r2, r3 + 8003932: 617b str r3, [r7, #20] /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) - 8003640: 68fb ldr r3, [r7, #12] - 8003642: 685b ldr r3, [r3, #4] - 8003644: f5b3 7f82 cmp.w r3, #260 @ 0x104 - 8003648: d112 bne.n 8003670 + 8003934: 68fb ldr r3, [r7, #12] + 8003936: 685b ldr r3, [r3, #4] + 8003938: f5b3 7f82 cmp.w r3, #260 @ 0x104 + 800393c: d112 bne.n 8003964 { /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - 800364a: 687b ldr r3, [r7, #4] - 800364c: 9300 str r3, [sp, #0] - 800364e: 68bb ldr r3, [r7, #8] - 8003650: 2200 movs r2, #0 - 8003652: 2180 movs r1, #128 @ 0x80 - 8003654: 68f8 ldr r0, [r7, #12] - 8003656: f7ff ff47 bl 80034e8 - 800365a: 4603 mov r3, r0 - 800365c: 2b00 cmp r3, #0 - 800365e: d016 beq.n 800368e + 800393e: 687b ldr r3, [r7, #4] + 8003940: 9300 str r3, [sp, #0] + 8003942: 68bb ldr r3, [r7, #8] + 8003944: 2200 movs r2, #0 + 8003946: 2180 movs r1, #128 @ 0x80 + 8003948: 68f8 ldr r0, [r7, #12] + 800394a: f7ff ff47 bl 80037dc + 800394e: 4603 mov r3, r0 + 8003950: 2b00 cmp r3, #0 + 8003952: d016 beq.n 8003982 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8003660: 68fb ldr r3, [r7, #12] - 8003662: 6d5b ldr r3, [r3, #84] @ 0x54 - 8003664: f043 0220 orr.w r2, r3, #32 - 8003668: 68fb ldr r3, [r7, #12] - 800366a: 655a str r2, [r3, #84] @ 0x54 + 8003954: 68fb ldr r3, [r7, #12] + 8003956: 6d5b ldr r3, [r3, #84] @ 0x54 + 8003958: f043 0220 orr.w r2, r3, #32 + 800395c: 68fb ldr r3, [r7, #12] + 800395e: 655a str r2, [r3, #84] @ 0x54 return HAL_TIMEOUT; - 800366c: 2303 movs r3, #3 - 800366e: e00f b.n 8003690 + 8003960: 2303 movs r3, #3 + 8003962: e00f b.n 8003984 * User have to calculate the timeout value to fit with the time of 1 byte transfer. * This time is directly link with the SPI clock from Master device. */ do { if (count == 0U) - 8003670: 697b ldr r3, [r7, #20] - 8003672: 2b00 cmp r3, #0 - 8003674: d00a beq.n 800368c + 8003964: 697b ldr r3, [r7, #20] + 8003966: 2b00 cmp r3, #0 + 8003968: d00a beq.n 8003980 { break; } count--; - 8003676: 697b ldr r3, [r7, #20] - 8003678: 3b01 subs r3, #1 - 800367a: 617b str r3, [r7, #20] + 800396a: 697b ldr r3, [r7, #20] + 800396c: 3b01 subs r3, #1 + 800396e: 617b str r3, [r7, #20] } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET); - 800367c: 68fb ldr r3, [r7, #12] - 800367e: 681b ldr r3, [r3, #0] - 8003680: 689b ldr r3, [r3, #8] - 8003682: f003 0380 and.w r3, r3, #128 @ 0x80 - 8003686: 2b80 cmp r3, #128 @ 0x80 - 8003688: d0f2 beq.n 8003670 - 800368a: e000 b.n 800368e + 8003970: 68fb ldr r3, [r7, #12] + 8003972: 681b ldr r3, [r3, #0] + 8003974: 689b ldr r3, [r3, #8] + 8003976: f003 0380 and.w r3, r3, #128 @ 0x80 + 800397a: 2b80 cmp r3, #128 @ 0x80 + 800397c: d0f2 beq.n 8003964 + 800397e: e000 b.n 8003982 break; - 800368c: bf00 nop + 8003980: bf00 nop } return HAL_OK; - 800368e: 2300 movs r3, #0 + 8003982: 2300 movs r3, #0 } - 8003690: 4618 mov r0, r3 - 8003692: 3718 adds r7, #24 - 8003694: 46bd mov sp, r7 - 8003696: bd80 pop {r7, pc} - 8003698: 20000000 .word 0x20000000 - 800369c: 165e9f81 .word 0x165e9f81 + 8003984: 4618 mov r0, r3 + 8003986: 3718 adds r7, #24 + 8003988: 46bd mov sp, r7 + 800398a: bd80 pop {r7, pc} + 800398c: 20000000 .word 0x20000000 + 8003990: 165e9f81 .word 0x165e9f81 -080036a0 : +08003994 : * Input : command byte to write * Output : None * Return : None *******************************************************************************/ void writecommand(unsigned char cmdout) { - 80036a0: b580 push {r7, lr} - 80036a2: b082 sub sp, #8 - 80036a4: af00 add r7, sp, #0 - 80036a6: 4603 mov r3, r0 - 80036a8: 71fb strb r3, [r7, #7] + 8003994: b580 push {r7, lr} + 8003996: b082 sub sp, #8 + 8003998: af00 add r7, sp, #0 + 800399a: 4603 mov r3, r0 + 800399c: 71fb strb r3, [r7, #7] //HAL_SPI_Transmit(&hspi1, &cmdout, 1, 100); // HAL_ERROR //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 1); // nCS = 1 ST7735_D_nC_PORT->BSRR = (uint32_t)ST7735_D_nC_PIN << 16 ;// D/nC = 0 commande - 80036aa: 4b0a ldr r3, [pc, #40] @ (80036d4 ) - 80036ac: f44f 2280 mov.w r2, #262144 @ 0x40000 - 80036b0: 619a str r2, [r3, #24] + 800399e: 4b0a ldr r3, [pc, #40] @ (80039c8 ) + 80039a0: f44f 2280 mov.w r2, #262144 @ 0x40000 + 80039a4: 619a str r2, [r3, #24] ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN << 16 ;// nCS = 0 - 80036b2: 4b08 ldr r3, [pc, #32] @ (80036d4 ) - 80036b4: f44f 3200 mov.w r2, #131072 @ 0x20000 - 80036b8: 619a str r2, [r3, #24] + 80039a6: 4b08 ldr r3, [pc, #32] @ (80039c8 ) + 80039a8: f44f 3200 mov.w r2, #131072 @ 0x20000 + 80039ac: 619a str r2, [r3, #24] HAL_SPI_Transmit(&hspi1, &cmdout, 1, 100); // - 80036ba: 1df9 adds r1, r7, #7 - 80036bc: 2364 movs r3, #100 @ 0x64 - 80036be: 2201 movs r2, #1 - 80036c0: 4805 ldr r0, [pc, #20] @ (80036d8 ) - 80036c2: f7ff fdcc bl 800325e + 80039ae: 1df9 adds r1, r7, #7 + 80039b0: 2364 movs r3, #100 @ 0x64 + 80039b2: 2201 movs r2, #1 + 80039b4: 4805 ldr r0, [pc, #20] @ (80039cc ) + 80039b6: f7ff fdcc bl 8003552 ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN;// nCS = 1 - 80036c6: 4b03 ldr r3, [pc, #12] @ (80036d4 ) - 80036c8: 2202 movs r2, #2 - 80036ca: 619a str r2, [r3, #24] + 80039ba: 4b03 ldr r3, [pc, #12] @ (80039c8 ) + 80039bc: 2202 movs r2, #2 + 80039be: 619a str r2, [r3, #24] } - 80036cc: bf00 nop - 80036ce: 3708 adds r7, #8 - 80036d0: 46bd mov sp, r7 - 80036d2: bd80 pop {r7, pc} - 80036d4: 40020800 .word 0x40020800 - 80036d8: 2000007c .word 0x2000007c + 80039c0: bf00 nop + 80039c2: 3708 adds r7, #8 + 80039c4: 46bd mov sp, r7 + 80039c6: bd80 pop {r7, pc} + 80039c8: 40020800 .word 0x40020800 + 80039cc: 2000007c .word 0x2000007c -080036dc : +080039d0 : * Input : data byte to write * Output : None * Return : None *******************************************************************************/ void writedata(unsigned char dataout) { - 80036dc: b580 push {r7, lr} - 80036de: b082 sub sp, #8 - 80036e0: af00 add r7, sp, #0 - 80036e2: 4603 mov r3, r0 - 80036e4: 71fb strb r3, [r7, #7] + 80039d0: b580 push {r7, lr} + 80039d2: b082 sub sp, #8 + 80039d4: af00 add r7, sp, #0 + 80039d6: 4603 mov r3, r0 + 80039d8: 71fb strb r3, [r7, #7] //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 1); // nCS = 1 ST7735_D_nC_PORT->BSRR = (uint32_t)ST7735_D_nC_PIN ;// D/nC = 1 data - 80036e6: 4b0a ldr r3, [pc, #40] @ (8003710 ) - 80036e8: 2204 movs r2, #4 - 80036ea: 619a str r2, [r3, #24] + 80039da: 4b0a ldr r3, [pc, #40] @ (8003a04 ) + 80039dc: 2204 movs r2, #4 + 80039de: 619a str r2, [r3, #24] ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN << 16 ;// nCS = 0 - 80036ec: 4b08 ldr r3, [pc, #32] @ (8003710 ) - 80036ee: f44f 3200 mov.w r2, #131072 @ 0x20000 - 80036f2: 619a str r2, [r3, #24] + 80039e0: 4b08 ldr r3, [pc, #32] @ (8003a04 ) + 80039e2: f44f 3200 mov.w r2, #131072 @ 0x20000 + 80039e6: 619a str r2, [r3, #24] HAL_SPI_Transmit(&hspi1, &dataout, 1, 100); // - 80036f4: 1df9 adds r1, r7, #7 - 80036f6: 2364 movs r3, #100 @ 0x64 - 80036f8: 2201 movs r2, #1 - 80036fa: 4806 ldr r0, [pc, #24] @ (8003714 ) - 80036fc: f7ff fdaf bl 800325e + 80039e8: 1df9 adds r1, r7, #7 + 80039ea: 2364 movs r3, #100 @ 0x64 + 80039ec: 2201 movs r2, #1 + 80039ee: 4806 ldr r0, [pc, #24] @ (8003a08 ) + 80039f0: f7ff fdaf bl 8003552 ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN;// nCS = 1 - 8003700: 4b03 ldr r3, [pc, #12] @ (8003710 ) - 8003702: 2202 movs r2, #2 - 8003704: 619a str r2, [r3, #24] + 80039f4: 4b03 ldr r3, [pc, #12] @ (8003a04 ) + 80039f6: 2202 movs r2, #2 + 80039f8: 619a str r2, [r3, #24] } - 8003706: bf00 nop - 8003708: 3708 adds r7, #8 - 800370a: 46bd mov sp, r7 - 800370c: bd80 pop {r7, pc} - 800370e: bf00 nop - 8003710: 40020800 .word 0x40020800 - 8003714: 2000007c .word 0x2000007c + 80039fa: bf00 nop + 80039fc: 3708 adds r7, #8 + 80039fe: 46bd mov sp, r7 + 8003a00: bd80 pop {r7, pc} + 8003a02: bf00 nop + 8003a04: 40020800 .word 0x40020800 + 8003a08: 2000007c .word 0x2000007c -08003718 : +08003a0c : * Input : addr = pointer on command byte array * Output : None * Return : None *******************************************************************************/ void commandList(const uint8_t *addr) { - 8003718: b580 push {r7, lr} - 800371a: b084 sub sp, #16 - 800371c: af00 add r7, sp, #0 - 800371e: 6078 str r0, [r7, #4] + 8003a0c: b580 push {r7, lr} + 8003a0e: b084 sub sp, #16 + 8003a10: af00 add r7, sp, #0 + 8003a12: 6078 str r0, [r7, #4] uint8_t numCommands, numArgs; uint16_t ms; numCommands = pgm_read_byte(addr++); // Number of commands to follow - 8003720: 687b ldr r3, [r7, #4] - 8003722: 1c5a adds r2, r3, #1 - 8003724: 607a str r2, [r7, #4] - 8003726: 781b ldrb r3, [r3, #0] - 8003728: 73fb strb r3, [r7, #15] + 8003a14: 687b ldr r3, [r7, #4] + 8003a16: 1c5a adds r2, r3, #1 + 8003a18: 607a str r2, [r7, #4] + 8003a1a: 781b ldrb r3, [r3, #0] + 8003a1c: 73fb strb r3, [r7, #15] while(numCommands--) - 800372a: e033 b.n 8003794 + 8003a1e: e033 b.n 8003a88 { // For each command... writecommand(pgm_read_byte(addr++)); // Read, issue command - 800372c: 687b ldr r3, [r7, #4] - 800372e: 1c5a adds r2, r3, #1 - 8003730: 607a str r2, [r7, #4] - 8003732: 781b ldrb r3, [r3, #0] - 8003734: 4618 mov r0, r3 - 8003736: f7ff ffb3 bl 80036a0 + 8003a20: 687b ldr r3, [r7, #4] + 8003a22: 1c5a adds r2, r3, #1 + 8003a24: 607a str r2, [r7, #4] + 8003a26: 781b ldrb r3, [r3, #0] + 8003a28: 4618 mov r0, r3 + 8003a2a: f7ff ffb3 bl 8003994 numArgs = pgm_read_byte(addr++); // Number of args to follow - 800373a: 687b ldr r3, [r7, #4] - 800373c: 1c5a adds r2, r3, #1 - 800373e: 607a str r2, [r7, #4] - 8003740: 781b ldrb r3, [r3, #0] - 8003742: 73bb strb r3, [r7, #14] + 8003a2e: 687b ldr r3, [r7, #4] + 8003a30: 1c5a adds r2, r3, #1 + 8003a32: 607a str r2, [r7, #4] + 8003a34: 781b ldrb r3, [r3, #0] + 8003a36: 73bb strb r3, [r7, #14] ms = numArgs & DELAY; // If hibit set, delay follows args - 8003744: 7bbb ldrb r3, [r7, #14] - 8003746: b29b uxth r3, r3 - 8003748: f003 0380 and.w r3, r3, #128 @ 0x80 - 800374c: 81bb strh r3, [r7, #12] + 8003a38: 7bbb ldrb r3, [r7, #14] + 8003a3a: b29b uxth r3, r3 + 8003a3c: f003 0380 and.w r3, r3, #128 @ 0x80 + 8003a40: 81bb strh r3, [r7, #12] numArgs &= ~DELAY; // Mask out delay bit - 800374e: 7bbb ldrb r3, [r7, #14] - 8003750: f003 037f and.w r3, r3, #127 @ 0x7f - 8003754: 73bb strb r3, [r7, #14] + 8003a42: 7bbb ldrb r3, [r7, #14] + 8003a44: f003 037f and.w r3, r3, #127 @ 0x7f + 8003a48: 73bb strb r3, [r7, #14] while(numArgs--) { // For each argument... - 8003756: e006 b.n 8003766 + 8003a4a: e006 b.n 8003a5a writedata(pgm_read_byte(addr++)); // Read, issue argument - 8003758: 687b ldr r3, [r7, #4] - 800375a: 1c5a adds r2, r3, #1 - 800375c: 607a str r2, [r7, #4] - 800375e: 781b ldrb r3, [r3, #0] - 8003760: 4618 mov r0, r3 - 8003762: f7ff ffbb bl 80036dc + 8003a4c: 687b ldr r3, [r7, #4] + 8003a4e: 1c5a adds r2, r3, #1 + 8003a50: 607a str r2, [r7, #4] + 8003a52: 781b ldrb r3, [r3, #0] + 8003a54: 4618 mov r0, r3 + 8003a56: f7ff ffbb bl 80039d0 while(numArgs--) { // For each argument... - 8003766: 7bbb ldrb r3, [r7, #14] - 8003768: 1e5a subs r2, r3, #1 - 800376a: 73ba strb r2, [r7, #14] - 800376c: 2b00 cmp r3, #0 - 800376e: d1f3 bne.n 8003758 + 8003a5a: 7bbb ldrb r3, [r7, #14] + 8003a5c: 1e5a subs r2, r3, #1 + 8003a5e: 73ba strb r2, [r7, #14] + 8003a60: 2b00 cmp r3, #0 + 8003a62: d1f3 bne.n 8003a4c } if(ms) { - 8003770: 89bb ldrh r3, [r7, #12] - 8003772: 2b00 cmp r3, #0 - 8003774: d00e beq.n 8003794 + 8003a64: 89bb ldrh r3, [r7, #12] + 8003a66: 2b00 cmp r3, #0 + 8003a68: d00e beq.n 8003a88 ms = pgm_read_byte(addr++); // Read post-command delay time (ms) - 8003776: 687b ldr r3, [r7, #4] - 8003778: 1c5a adds r2, r3, #1 - 800377a: 607a str r2, [r7, #4] - 800377c: 781b ldrb r3, [r3, #0] - 800377e: 81bb strh r3, [r7, #12] + 8003a6a: 687b ldr r3, [r7, #4] + 8003a6c: 1c5a adds r2, r3, #1 + 8003a6e: 607a str r2, [r7, #4] + 8003a70: 781b ldrb r3, [r3, #0] + 8003a72: 81bb strh r3, [r7, #12] if(ms == 255) ms = 500; // If 255, delay for 500 ms - 8003780: 89bb ldrh r3, [r7, #12] - 8003782: 2bff cmp r3, #255 @ 0xff - 8003784: d102 bne.n 800378c - 8003786: f44f 73fa mov.w r3, #500 @ 0x1f4 - 800378a: 81bb strh r3, [r7, #12] + 8003a74: 89bb ldrh r3, [r7, #12] + 8003a76: 2bff cmp r3, #255 @ 0xff + 8003a78: d102 bne.n 8003a80 + 8003a7a: f44f 73fa mov.w r3, #500 @ 0x1f4 + 8003a7e: 81bb strh r3, [r7, #12] HAL_Delay(500); - 800378c: f44f 70fa mov.w r0, #500 @ 0x1f4 - 8003790: f7fd fef0 bl 8001574 + 8003a80: f44f 70fa mov.w r0, #500 @ 0x1f4 + 8003a84: f7fe f834 bl 8001af0 while(numCommands--) - 8003794: 7bfb ldrb r3, [r7, #15] - 8003796: 1e5a subs r2, r3, #1 - 8003798: 73fa strb r2, [r7, #15] - 800379a: 2b00 cmp r3, #0 - 800379c: d1c6 bne.n 800372c + 8003a88: 7bfb ldrb r3, [r7, #15] + 8003a8a: 1e5a subs r2, r3, #1 + 8003a8c: 73fa strb r2, [r7, #15] + 8003a8e: 2b00 cmp r3, #0 + 8003a90: d1c6 bne.n 8003a20 } } } - 800379e: bf00 nop - 80037a0: bf00 nop - 80037a2: 3710 adds r7, #16 - 80037a4: 46bd mov sp, r7 - 80037a6: bd80 pop {r7, pc} + 8003a92: bf00 nop + 8003a94: bf00 nop + 8003a96: 3710 adds r7, #16 + 8003a98: 46bd mov sp, r7 + 8003a9a: bd80 pop {r7, pc} -080037a8 : +08003a9c : * : y2 vertical position = y1 to ST7735_TFTHEIGHT-1-y1 * Output : None * Return : None *******************************************************************************/ void setAddrWindow(uint8_t x0, uint8_t y0, uint8_t x1, uint8_t y1) { - 80037a8: b590 push {r4, r7, lr} - 80037aa: b083 sub sp, #12 - 80037ac: af00 add r7, sp, #0 - 80037ae: 4604 mov r4, r0 - 80037b0: 4608 mov r0, r1 - 80037b2: 4611 mov r1, r2 - 80037b4: 461a mov r2, r3 - 80037b6: 4623 mov r3, r4 - 80037b8: 71fb strb r3, [r7, #7] - 80037ba: 4603 mov r3, r0 - 80037bc: 71bb strb r3, [r7, #6] - 80037be: 460b mov r3, r1 - 80037c0: 717b strb r3, [r7, #5] - 80037c2: 4613 mov r3, r2 - 80037c4: 713b strb r3, [r7, #4] + 8003a9c: b590 push {r4, r7, lr} + 8003a9e: b083 sub sp, #12 + 8003aa0: af00 add r7, sp, #0 + 8003aa2: 4604 mov r4, r0 + 8003aa4: 4608 mov r0, r1 + 8003aa6: 4611 mov r1, r2 + 8003aa8: 461a mov r2, r3 + 8003aaa: 4623 mov r3, r4 + 8003aac: 71fb strb r3, [r7, #7] + 8003aae: 4603 mov r3, r0 + 8003ab0: 71bb strb r3, [r7, #6] + 8003ab2: 460b mov r3, r1 + 8003ab4: 717b strb r3, [r7, #5] + 8003ab6: 4613 mov r3, r2 + 8003ab8: 713b strb r3, [r7, #4] writecommand(ST7735_CASET); // Column addr set - 80037c6: 202a movs r0, #42 @ 0x2a - 80037c8: f7ff ff6a bl 80036a0 + 8003aba: 202a movs r0, #42 @ 0x2a + 8003abc: f7ff ff6a bl 8003994 writedata(0x00); - 80037cc: 2000 movs r0, #0 - 80037ce: f7ff ff85 bl 80036dc + 8003ac0: 2000 movs r0, #0 + 8003ac2: f7ff ff85 bl 80039d0 writedata(x0); // XSTART - 80037d2: 79fb ldrb r3, [r7, #7] - 80037d4: 4618 mov r0, r3 - 80037d6: f7ff ff81 bl 80036dc + 8003ac6: 79fb ldrb r3, [r7, #7] + 8003ac8: 4618 mov r0, r3 + 8003aca: f7ff ff81 bl 80039d0 writedata(0x00); - 80037da: 2000 movs r0, #0 - 80037dc: f7ff ff7e bl 80036dc + 8003ace: 2000 movs r0, #0 + 8003ad0: f7ff ff7e bl 80039d0 writedata(x1); // XEND - 80037e0: 797b ldrb r3, [r7, #5] - 80037e2: 4618 mov r0, r3 - 80037e4: f7ff ff7a bl 80036dc + 8003ad4: 797b ldrb r3, [r7, #5] + 8003ad6: 4618 mov r0, r3 + 8003ad8: f7ff ff7a bl 80039d0 writecommand(ST7735_RASET); // Row addr set - 80037e8: 202b movs r0, #43 @ 0x2b - 80037ea: f7ff ff59 bl 80036a0 + 8003adc: 202b movs r0, #43 @ 0x2b + 8003ade: f7ff ff59 bl 8003994 writedata(0x00); - 80037ee: 2000 movs r0, #0 - 80037f0: f7ff ff74 bl 80036dc + 8003ae2: 2000 movs r0, #0 + 8003ae4: f7ff ff74 bl 80039d0 writedata(y0); // YSTART - 80037f4: 79bb ldrb r3, [r7, #6] - 80037f6: 4618 mov r0, r3 - 80037f8: f7ff ff70 bl 80036dc + 8003ae8: 79bb ldrb r3, [r7, #6] + 8003aea: 4618 mov r0, r3 + 8003aec: f7ff ff70 bl 80039d0 writedata(0x00); - 80037fc: 2000 movs r0, #0 - 80037fe: f7ff ff6d bl 80036dc + 8003af0: 2000 movs r0, #0 + 8003af2: f7ff ff6d bl 80039d0 writedata(y1); // YEND - 8003802: 793b ldrb r3, [r7, #4] - 8003804: 4618 mov r0, r3 - 8003806: f7ff ff69 bl 80036dc + 8003af6: 793b ldrb r3, [r7, #4] + 8003af8: 4618 mov r0, r3 + 8003afa: f7ff ff69 bl 80039d0 writecommand(ST7735_RAMWR); // write to RAM - 800380a: 202c movs r0, #44 @ 0x2c - 800380c: f7ff ff48 bl 80036a0 + 8003afe: 202c movs r0, #44 @ 0x2c + 8003b00: f7ff ff48 bl 8003994 } - 8003810: bf00 nop - 8003812: 370c adds r7, #12 - 8003814: 46bd mov sp, r7 - 8003816: bd90 pop {r4, r7, pc} + 8003b04: bf00 nop + 8003b06: 370c adds r7, #12 + 8003b08: 46bd mov sp, r7 + 8003b0a: bd90 pop {r4, r7, pc} -08003818 : +08003b0c : * Input : None * Output : None * Return : None *******************************************************************************/ void init_TFT( void) { - 8003818: b580 push {r7, lr} - 800381a: b082 sub sp, #8 - 800381c: af02 add r7, sp, #8 + 8003b0c: b580 push {r7, lr} + 8003b0e: b082 sub sp, #8 + 8003b10: af02 add r7, sp, #8 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, 1); // nRESET = 1 attend_500ms(); HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 1); // nCS = 1*/ //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, 1); // DC= 1 ST7735_D_nC_PORT->BSRR = (uint32_t)ST7735_D_nC_PIN ;// D/nC = 1 data - 800381e: 4b1e ldr r3, [pc, #120] @ (8003898 ) - 8003820: 2204 movs r2, #4 - 8003822: 619a str r2, [r3, #24] + 8003b12: 4b1e ldr r3, [pc, #120] @ (8003b8c ) + 8003b14: 2204 movs r2, #4 + 8003b16: 619a str r2, [r3, #24] ST7735_RST_PORT->BSRR = (uint32_t)ST7735_RST_PIN;// nRESET = 1 - 8003824: 4b1d ldr r3, [pc, #116] @ (800389c ) - 8003826: 2204 movs r2, #4 - 8003828: 619a str r2, [r3, #24] + 8003b18: 4b1d ldr r3, [pc, #116] @ (8003b90 ) + 8003b1a: 2204 movs r2, #4 + 8003b1c: 619a str r2, [r3, #24] ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN<<16;// nCS = 0 - 800382a: 4b1b ldr r3, [pc, #108] @ (8003898 ) - 800382c: f44f 3200 mov.w r2, #131072 @ 0x20000 - 8003830: 619a str r2, [r3, #24] + 8003b1e: 4b1b ldr r3, [pc, #108] @ (8003b8c ) + 8003b20: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8003b24: 619a str r2, [r3, #24] HAL_Delay(500); - 8003832: f44f 70fa mov.w r0, #500 @ 0x1f4 - 8003836: f7fd fe9d bl 8001574 + 8003b26: f44f 70fa mov.w r0, #500 @ 0x1f4 + 8003b2a: f7fd ffe1 bl 8001af0 ST7735_RST_PORT->BSRR = (uint32_t)ST7735_RST_PIN<<16;// nRESET = 0 - 800383a: 4b18 ldr r3, [pc, #96] @ (800389c ) - 800383c: f44f 2280 mov.w r2, #262144 @ 0x40000 - 8003840: 619a str r2, [r3, #24] + 8003b2e: 4b18 ldr r3, [pc, #96] @ (8003b90 ) + 8003b30: f44f 2280 mov.w r2, #262144 @ 0x40000 + 8003b34: 619a str r2, [r3, #24] HAL_Delay(500); - 8003842: f44f 70fa mov.w r0, #500 @ 0x1f4 - 8003846: f7fd fe95 bl 8001574 + 8003b36: f44f 70fa mov.w r0, #500 @ 0x1f4 + 8003b3a: f7fd ffd9 bl 8001af0 ST7735_RST_PORT->BSRR = (uint32_t)ST7735_RST_PIN;// nRESET = 1 - 800384a: 4b14 ldr r3, [pc, #80] @ (800389c ) - 800384c: 2204 movs r2, #4 - 800384e: 619a str r2, [r3, #24] + 8003b3e: 4b14 ldr r3, [pc, #80] @ (8003b90 ) + 8003b40: 2204 movs r2, #4 + 8003b42: 619a str r2, [r3, #24] HAL_Delay(500); - 8003850: f44f 70fa mov.w r0, #500 @ 0x1f4 - 8003854: f7fd fe8e bl 8001574 + 8003b44: f44f 70fa mov.w r0, #500 @ 0x1f4 + 8003b48: f7fd ffd2 bl 8001af0 ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN;// nCS = 1 - 8003858: 4b0f ldr r3, [pc, #60] @ (8003898 ) - 800385a: 2202 movs r2, #2 - 800385c: 619a str r2, [r3, #24] + 8003b4c: 4b0f ldr r3, [pc, #60] @ (8003b8c ) + 8003b4e: 2202 movs r2, #2 + 8003b50: 619a str r2, [r3, #24] // initialization instruction commandList(Rcmd1); - 800385e: 4810 ldr r0, [pc, #64] @ (80038a0 ) - 8003860: f7ff ff5a bl 8003718 + 8003b52: 4810 ldr r0, [pc, #64] @ (8003b94 ) + 8003b54: f7ff ff5a bl 8003a0c commandList(Rcmd2red); - 8003864: 480f ldr r0, [pc, #60] @ (80038a4 ) - 8003866: f7ff ff57 bl 8003718 + 8003b58: 480f ldr r0, [pc, #60] @ (8003b98 ) + 8003b5a: f7ff ff57 bl 8003a0c commandList(Rcmd3); - 800386a: 480f ldr r0, [pc, #60] @ (80038a8 ) - 800386c: f7ff ff54 bl 8003718 + 8003b5e: 480f ldr r0, [pc, #60] @ (8003b9c ) + 8003b60: f7ff ff54 bl 8003a0c writecommand(ST7735_MADCTL); - 8003870: 2036 movs r0, #54 @ 0x36 - 8003872: f7ff ff15 bl 80036a0 + 8003b64: 2036 movs r0, #54 @ 0x36 + 8003b66: f7ff ff15 bl 8003994 writedata(0xC0); - 8003876: 20c0 movs r0, #192 @ 0xc0 - 8003878: f7ff ff30 bl 80036dc + 8003b6a: 20c0 movs r0, #192 @ 0xc0 + 8003b6c: f7ff ff30 bl 80039d0 // all display background is black fillRect_TFT(0, 0, ST7735_TFTWIDTH, ST7735_TFTHEIGHT_18, ST7735_BLACK); - 800387c: 2300 movs r3, #0 - 800387e: 9300 str r3, [sp, #0] - 8003880: 23a0 movs r3, #160 @ 0xa0 - 8003882: 2280 movs r2, #128 @ 0x80 - 8003884: 2100 movs r1, #0 - 8003886: 2000 movs r0, #0 - 8003888: f000 f856 bl 8003938 + 8003b70: 2300 movs r3, #0 + 8003b72: 9300 str r3, [sp, #0] + 8003b74: 23a0 movs r3, #160 @ 0xa0 + 8003b76: 2280 movs r2, #128 @ 0x80 + 8003b78: 2100 movs r1, #0 + 8003b7a: 2000 movs r0, #0 + 8003b7c: f000 f856 bl 8003c2c // display LOGO displayLogo_TFT(); - 800388c: f000 f998 bl 8003bc0 + 8003b80: f000 f998 bl 8003eb4 } - 8003890: bf00 nop - 8003892: 46bd mov sp, r7 - 8003894: bd80 pop {r7, pc} - 8003896: bf00 nop - 8003898: 40020800 .word 0x40020800 - 800389c: 40020c00 .word 0x40020c00 - 80038a0: 08003db4 .word 0x08003db4 - 80038a4: 08003df0 .word 0x08003df0 - 80038a8: 08003e00 .word 0x08003e00 + 8003b84: bf00 nop + 8003b86: 46bd mov sp, r7 + 8003b88: bd80 pop {r7, pc} + 8003b8a: bf00 nop + 8003b8c: 40020800 .word 0x40020800 + 8003b90: 40020c00 .word 0x40020c00 + 8003b94: 080040a8 .word 0x080040a8 + 8003b98: 080040e4 .word 0x080040e4 + 8003b9c: 080040f4 .word 0x080040f4 -080038ac : +08003ba0 : * : color = 16bits RGB=(565) soit RRRRRGGGGGGGBBBBB * Output : None * Return : None *******************************************************************************/ void drawPixel_TFT(uint16_t x, uint16_t y, uint16_t color) { - 80038ac: b580 push {r7, lr} - 80038ae: b084 sub sp, #16 - 80038b0: af00 add r7, sp, #0 - 80038b2: 4603 mov r3, r0 - 80038b4: 80fb strh r3, [r7, #6] - 80038b6: 460b mov r3, r1 - 80038b8: 80bb strh r3, [r7, #4] - 80038ba: 4613 mov r3, r2 - 80038bc: 807b strh r3, [r7, #2] + 8003ba0: b580 push {r7, lr} + 8003ba2: b084 sub sp, #16 + 8003ba4: af00 add r7, sp, #0 + 8003ba6: 4603 mov r3, r0 + 8003ba8: 80fb strh r3, [r7, #6] + 8003baa: 460b mov r3, r1 + 8003bac: 80bb strh r3, [r7, #4] + 8003bae: 4613 mov r3, r2 + 8003bb0: 807b strh r3, [r7, #2] uint8_t hi, lo; // rudimentary clipping (drawChar w/big text requires this) if((x >= ST7735_TFTWIDTH) || (y >= ST7735_TFTHEIGHT_18)) return; - 80038be: 88fb ldrh r3, [r7, #6] - 80038c0: 2b7f cmp r3, #127 @ 0x7f - 80038c2: d831 bhi.n 8003928 - 80038c4: 88bb ldrh r3, [r7, #4] - 80038c6: 2b9f cmp r3, #159 @ 0x9f - 80038c8: d82e bhi.n 8003928 + 8003bb2: 88fb ldrh r3, [r7, #6] + 8003bb4: 2b7f cmp r3, #127 @ 0x7f + 8003bb6: d831 bhi.n 8003c1c + 8003bb8: 88bb ldrh r3, [r7, #4] + 8003bba: 2b9f cmp r3, #159 @ 0x9f + 8003bbc: d82e bhi.n 8003c1c setAddrWindow(x, y, x+1, y+1); - 80038ca: 88fb ldrh r3, [r7, #6] - 80038cc: b2d8 uxtb r0, r3 - 80038ce: 88bb ldrh r3, [r7, #4] - 80038d0: b2d9 uxtb r1, r3 - 80038d2: 88fb ldrh r3, [r7, #6] - 80038d4: b2db uxtb r3, r3 - 80038d6: 3301 adds r3, #1 - 80038d8: b2da uxtb r2, r3 - 80038da: 88bb ldrh r3, [r7, #4] - 80038dc: b2db uxtb r3, r3 - 80038de: 3301 adds r3, #1 - 80038e0: b2db uxtb r3, r3 - 80038e2: f7ff ff61 bl 80037a8 + 8003bbe: 88fb ldrh r3, [r7, #6] + 8003bc0: b2d8 uxtb r0, r3 + 8003bc2: 88bb ldrh r3, [r7, #4] + 8003bc4: b2d9 uxtb r1, r3 + 8003bc6: 88fb ldrh r3, [r7, #6] + 8003bc8: b2db uxtb r3, r3 + 8003bca: 3301 adds r3, #1 + 8003bcc: b2da uxtb r2, r3 + 8003bce: 88bb ldrh r3, [r7, #4] + 8003bd0: b2db uxtb r3, r3 + 8003bd2: 3301 adds r3, #1 + 8003bd4: b2db uxtb r3, r3 + 8003bd6: f7ff ff61 bl 8003a9c hi = color >> 8; - 80038e6: 887b ldrh r3, [r7, #2] - 80038e8: 0a1b lsrs r3, r3, #8 - 80038ea: b29b uxth r3, r3 - 80038ec: b2db uxtb r3, r3 - 80038ee: 73fb strb r3, [r7, #15] + 8003bda: 887b ldrh r3, [r7, #2] + 8003bdc: 0a1b lsrs r3, r3, #8 + 8003bde: b29b uxth r3, r3 + 8003be0: b2db uxtb r3, r3 + 8003be2: 73fb strb r3, [r7, #15] lo = color ; - 80038f0: 887b ldrh r3, [r7, #2] - 80038f2: b2db uxtb r3, r3 - 80038f4: 73bb strb r3, [r7, #14] + 8003be4: 887b ldrh r3, [r7, #2] + 8003be6: b2db uxtb r3, r3 + 8003be8: 73bb strb r3, [r7, #14] HAL_SPI_Transmit(&hspi1, &lo, 1, 100); // HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 1); // nCS = 1*/ ST7735_D_nC_PORT->BSRR = (uint32_t)ST7735_D_nC_PIN ;// D/nC = 1 data - 80038f6: 4b0e ldr r3, [pc, #56] @ (8003930 ) - 80038f8: 2204 movs r2, #4 - 80038fa: 619a str r2, [r3, #24] + 8003bea: 4b0e ldr r3, [pc, #56] @ (8003c24 ) + 8003bec: 2204 movs r2, #4 + 8003bee: 619a str r2, [r3, #24] ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN<<16;// nCS = 0 - 80038fc: 4b0c ldr r3, [pc, #48] @ (8003930 ) - 80038fe: f44f 3200 mov.w r2, #131072 @ 0x20000 - 8003902: 619a str r2, [r3, #24] + 8003bf0: 4b0c ldr r3, [pc, #48] @ (8003c24 ) + 8003bf2: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8003bf6: 619a str r2, [r3, #24] HAL_SPI_Transmit(&hspi1, &hi, 1, 100); // - 8003904: f107 010f add.w r1, r7, #15 - 8003908: 2364 movs r3, #100 @ 0x64 - 800390a: 2201 movs r2, #1 - 800390c: 4809 ldr r0, [pc, #36] @ (8003934 ) - 800390e: f7ff fca6 bl 800325e + 8003bf8: f107 010f add.w r1, r7, #15 + 8003bfc: 2364 movs r3, #100 @ 0x64 + 8003bfe: 2201 movs r2, #1 + 8003c00: 4809 ldr r0, [pc, #36] @ (8003c28 ) + 8003c02: f7ff fca6 bl 8003552 HAL_SPI_Transmit(&hspi1, &lo, 1, 100); // - 8003912: f107 010e add.w r1, r7, #14 - 8003916: 2364 movs r3, #100 @ 0x64 - 8003918: 2201 movs r2, #1 - 800391a: 4806 ldr r0, [pc, #24] @ (8003934 ) - 800391c: f7ff fc9f bl 800325e + 8003c06: f107 010e add.w r1, r7, #14 + 8003c0a: 2364 movs r3, #100 @ 0x64 + 8003c0c: 2201 movs r2, #1 + 8003c0e: 4806 ldr r0, [pc, #24] @ (8003c28 ) + 8003c10: f7ff fc9f bl 8003552 ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN;// nCS = 1 - 8003920: 4b03 ldr r3, [pc, #12] @ (8003930 ) - 8003922: 2202 movs r2, #2 - 8003924: 619a str r2, [r3, #24] - 8003926: e000 b.n 800392a + 8003c14: 4b03 ldr r3, [pc, #12] @ (8003c24 ) + 8003c16: 2202 movs r2, #2 + 8003c18: 619a str r2, [r3, #24] + 8003c1a: e000 b.n 8003c1e if((x >= ST7735_TFTWIDTH) || (y >= ST7735_TFTHEIGHT_18)) return; - 8003928: bf00 nop + 8003c1c: bf00 nop } - 800392a: 3710 adds r7, #16 - 800392c: 46bd mov sp, r7 - 800392e: bd80 pop {r7, pc} - 8003930: 40020800 .word 0x40020800 - 8003934: 2000007c .word 0x2000007c + 8003c1e: 3710 adds r7, #16 + 8003c20: 46bd mov sp, r7 + 8003c22: bd80 pop {r7, pc} + 8003c24: 40020800 .word 0x40020800 + 8003c28: 2000007c .word 0x2000007c -08003938 : +08003c2c : * : color = 16bits RGB(565) soit RRRRRGGGGGGGBBBBB * Output : None * Return : None *******************************************************************************/ void fillRect_TFT(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t color) { - 8003938: b590 push {r4, r7, lr} - 800393a: b085 sub sp, #20 - 800393c: af00 add r7, sp, #0 - 800393e: 4604 mov r4, r0 - 8003940: 4608 mov r0, r1 - 8003942: 4611 mov r1, r2 - 8003944: 461a mov r2, r3 - 8003946: 4623 mov r3, r4 - 8003948: 80fb strh r3, [r7, #6] - 800394a: 4603 mov r3, r0 - 800394c: 80bb strh r3, [r7, #4] - 800394e: 460b mov r3, r1 - 8003950: 807b strh r3, [r7, #2] - 8003952: 4613 mov r3, r2 - 8003954: 803b strh r3, [r7, #0] + 8003c2c: b590 push {r4, r7, lr} + 8003c2e: b085 sub sp, #20 + 8003c30: af00 add r7, sp, #0 + 8003c32: 4604 mov r4, r0 + 8003c34: 4608 mov r0, r1 + 8003c36: 4611 mov r1, r2 + 8003c38: 461a mov r2, r3 + 8003c3a: 4623 mov r3, r4 + 8003c3c: 80fb strh r3, [r7, #6] + 8003c3e: 4603 mov r3, r0 + 8003c40: 80bb strh r3, [r7, #4] + 8003c42: 460b mov r3, r1 + 8003c44: 807b strh r3, [r7, #2] + 8003c46: 4613 mov r3, r2 + 8003c48: 803b strh r3, [r7, #0] uint8_t hi, lo; // rudimentary clipping (drawChar w/big text requires this) if((x >= ST7735_TFTWIDTH) || (y >= ST7735_TFTHEIGHT_18)) return; - 8003956: 88fb ldrh r3, [r7, #6] - 8003958: 2b7f cmp r3, #127 @ 0x7f - 800395a: d85e bhi.n 8003a1a - 800395c: 88bb ldrh r3, [r7, #4] - 800395e: 2b9f cmp r3, #159 @ 0x9f - 8003960: d85b bhi.n 8003a1a + 8003c4a: 88fb ldrh r3, [r7, #6] + 8003c4c: 2b7f cmp r3, #127 @ 0x7f + 8003c4e: d85e bhi.n 8003d0e + 8003c50: 88bb ldrh r3, [r7, #4] + 8003c52: 2b9f cmp r3, #159 @ 0x9f + 8003c54: d85b bhi.n 8003d0e if((x + w - 1) >= ST7735_TFTWIDTH) w = ST7735_TFTWIDTH - x; - 8003962: 88fa ldrh r2, [r7, #6] - 8003964: 887b ldrh r3, [r7, #2] - 8003966: 4413 add r3, r2 - 8003968: 2b80 cmp r3, #128 @ 0x80 - 800396a: dd03 ble.n 8003974 - 800396c: 88fb ldrh r3, [r7, #6] - 800396e: f1c3 0380 rsb r3, r3, #128 @ 0x80 - 8003972: 807b strh r3, [r7, #2] + 8003c56: 88fa ldrh r2, [r7, #6] + 8003c58: 887b ldrh r3, [r7, #2] + 8003c5a: 4413 add r3, r2 + 8003c5c: 2b80 cmp r3, #128 @ 0x80 + 8003c5e: dd03 ble.n 8003c68 + 8003c60: 88fb ldrh r3, [r7, #6] + 8003c62: f1c3 0380 rsb r3, r3, #128 @ 0x80 + 8003c66: 807b strh r3, [r7, #2] if((y + h - 1) >= ST7735_TFTHEIGHT_18) h = ST7735_TFTHEIGHT_18 - y; - 8003974: 88ba ldrh r2, [r7, #4] - 8003976: 883b ldrh r3, [r7, #0] - 8003978: 4413 add r3, r2 - 800397a: 2ba0 cmp r3, #160 @ 0xa0 - 800397c: dd03 ble.n 8003986 - 800397e: 88bb ldrh r3, [r7, #4] - 8003980: f1c3 03a0 rsb r3, r3, #160 @ 0xa0 - 8003984: 803b strh r3, [r7, #0] + 8003c68: 88ba ldrh r2, [r7, #4] + 8003c6a: 883b ldrh r3, [r7, #0] + 8003c6c: 4413 add r3, r2 + 8003c6e: 2ba0 cmp r3, #160 @ 0xa0 + 8003c70: dd03 ble.n 8003c7a + 8003c72: 88bb ldrh r3, [r7, #4] + 8003c74: f1c3 03a0 rsb r3, r3, #160 @ 0xa0 + 8003c78: 803b strh r3, [r7, #0] // select window setAddrWindow(x, y, x+w-1, y+h-1); - 8003986: 88fb ldrh r3, [r7, #6] - 8003988: b2d8 uxtb r0, r3 - 800398a: 88bb ldrh r3, [r7, #4] - 800398c: b2d9 uxtb r1, r3 - 800398e: 88fb ldrh r3, [r7, #6] - 8003990: b2da uxtb r2, r3 - 8003992: 887b ldrh r3, [r7, #2] - 8003994: b2db uxtb r3, r3 - 8003996: 4413 add r3, r2 - 8003998: b2db uxtb r3, r3 - 800399a: 3b01 subs r3, #1 - 800399c: b2dc uxtb r4, r3 - 800399e: 88bb ldrh r3, [r7, #4] - 80039a0: b2da uxtb r2, r3 - 80039a2: 883b ldrh r3, [r7, #0] - 80039a4: b2db uxtb r3, r3 - 80039a6: 4413 add r3, r2 - 80039a8: b2db uxtb r3, r3 - 80039aa: 3b01 subs r3, #1 - 80039ac: b2db uxtb r3, r3 - 80039ae: 4622 mov r2, r4 - 80039b0: f7ff fefa bl 80037a8 + 8003c7a: 88fb ldrh r3, [r7, #6] + 8003c7c: b2d8 uxtb r0, r3 + 8003c7e: 88bb ldrh r3, [r7, #4] + 8003c80: b2d9 uxtb r1, r3 + 8003c82: 88fb ldrh r3, [r7, #6] + 8003c84: b2da uxtb r2, r3 + 8003c86: 887b ldrh r3, [r7, #2] + 8003c88: b2db uxtb r3, r3 + 8003c8a: 4413 add r3, r2 + 8003c8c: b2db uxtb r3, r3 + 8003c8e: 3b01 subs r3, #1 + 8003c90: b2dc uxtb r4, r3 + 8003c92: 88bb ldrh r3, [r7, #4] + 8003c94: b2da uxtb r2, r3 + 8003c96: 883b ldrh r3, [r7, #0] + 8003c98: b2db uxtb r3, r3 + 8003c9a: 4413 add r3, r2 + 8003c9c: b2db uxtb r3, r3 + 8003c9e: 3b01 subs r3, #1 + 8003ca0: b2db uxtb r3, r3 + 8003ca2: 4622 mov r2, r4 + 8003ca4: f7ff fefa bl 8003a9c hi = color >> 8; - 80039b4: 8c3b ldrh r3, [r7, #32] - 80039b6: 0a1b lsrs r3, r3, #8 - 80039b8: b29b uxth r3, r3 - 80039ba: b2db uxtb r3, r3 - 80039bc: 73fb strb r3, [r7, #15] + 8003ca8: 8c3b ldrh r3, [r7, #32] + 8003caa: 0a1b lsrs r3, r3, #8 + 8003cac: b29b uxth r3, r3 + 8003cae: b2db uxtb r3, r3 + 8003cb0: 73fb strb r3, [r7, #15] lo = color ; - 80039be: 8c3b ldrh r3, [r7, #32] - 80039c0: b2db uxtb r3, r3 - 80039c2: 73bb strb r3, [r7, #14] + 8003cb2: 8c3b ldrh r3, [r7, #32] + 8003cb4: b2db uxtb r3, r3 + 8003cb6: 73bb strb r3, [r7, #14] */ /*HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, 1); // D/nC = 1 data HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 0); // nCS = 0*/ ST7735_D_nC_PORT->BSRR = (uint32_t)ST7735_D_nC_PIN ;// D/nC = 1 data - 80039c4: 4b17 ldr r3, [pc, #92] @ (8003a24 ) - 80039c6: 2204 movs r2, #4 - 80039c8: 619a str r2, [r3, #24] + 8003cb8: 4b17 ldr r3, [pc, #92] @ (8003d18 ) + 8003cba: 2204 movs r2, #4 + 8003cbc: 619a str r2, [r3, #24] ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN<<16;// nCS = 0 - 80039ca: 4b16 ldr r3, [pc, #88] @ (8003a24 ) - 80039cc: f44f 3200 mov.w r2, #131072 @ 0x20000 - 80039d0: 619a str r2, [r3, #24] + 8003cbe: 4b16 ldr r3, [pc, #88] @ (8003d18 ) + 8003cc0: f44f 3200 mov.w r2, #131072 @ 0x20000 + 8003cc4: 619a str r2, [r3, #24] for(y=h; y>0; y--) - 80039d2: 883b ldrh r3, [r7, #0] - 80039d4: 80bb strh r3, [r7, #4] - 80039d6: e019 b.n 8003a0c + 8003cc6: 883b ldrh r3, [r7, #0] + 8003cc8: 80bb strh r3, [r7, #4] + 8003cca: e019 b.n 8003d00 { for(x=w; x>0; x--) - 80039d8: 887b ldrh r3, [r7, #2] - 80039da: 80fb strh r3, [r7, #6] - 80039dc: e010 b.n 8003a00 + 8003ccc: 887b ldrh r3, [r7, #2] + 8003cce: 80fb strh r3, [r7, #6] + 8003cd0: e010 b.n 8003cf4 { HAL_SPI_Transmit(&hspi1, &hi, 1, 100); // - 80039de: f107 010f add.w r1, r7, #15 - 80039e2: 2364 movs r3, #100 @ 0x64 - 80039e4: 2201 movs r2, #1 - 80039e6: 4810 ldr r0, [pc, #64] @ (8003a28 ) - 80039e8: f7ff fc39 bl 800325e + 8003cd2: f107 010f add.w r1, r7, #15 + 8003cd6: 2364 movs r3, #100 @ 0x64 + 8003cd8: 2201 movs r2, #1 + 8003cda: 4810 ldr r0, [pc, #64] @ (8003d1c ) + 8003cdc: f7ff fc39 bl 8003552 HAL_SPI_Transmit(&hspi1, &lo, 1, 100); // - 80039ec: f107 010e add.w r1, r7, #14 - 80039f0: 2364 movs r3, #100 @ 0x64 - 80039f2: 2201 movs r2, #1 - 80039f4: 480c ldr r0, [pc, #48] @ (8003a28 ) - 80039f6: f7ff fc32 bl 800325e + 8003ce0: f107 010e add.w r1, r7, #14 + 8003ce4: 2364 movs r3, #100 @ 0x64 + 8003ce6: 2201 movs r2, #1 + 8003ce8: 480c ldr r0, [pc, #48] @ (8003d1c ) + 8003cea: f7ff fc32 bl 8003552 for(x=w; x>0; x--) - 80039fa: 88fb ldrh r3, [r7, #6] - 80039fc: 3b01 subs r3, #1 - 80039fe: 80fb strh r3, [r7, #6] - 8003a00: 88fb ldrh r3, [r7, #6] - 8003a02: 2b00 cmp r3, #0 - 8003a04: d1eb bne.n 80039de + 8003cee: 88fb ldrh r3, [r7, #6] + 8003cf0: 3b01 subs r3, #1 + 8003cf2: 80fb strh r3, [r7, #6] + 8003cf4: 88fb ldrh r3, [r7, #6] + 8003cf6: 2b00 cmp r3, #0 + 8003cf8: d1eb bne.n 8003cd2 for(y=h; y>0; y--) - 8003a06: 88bb ldrh r3, [r7, #4] - 8003a08: 3b01 subs r3, #1 - 8003a0a: 80bb strh r3, [r7, #4] - 8003a0c: 88bb ldrh r3, [r7, #4] - 8003a0e: 2b00 cmp r3, #0 - 8003a10: d1e2 bne.n 80039d8 + 8003cfa: 88bb ldrh r3, [r7, #4] + 8003cfc: 3b01 subs r3, #1 + 8003cfe: 80bb strh r3, [r7, #4] + 8003d00: 88bb ldrh r3, [r7, #4] + 8003d02: 2b00 cmp r3, #0 + 8003d04: d1e2 bne.n 8003ccc } } //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, 1); // nCS = 1 ST7735_nCS_PORT->BSRR = (uint32_t)ST7735_nCS_PIN;// nCS = 1 - 8003a12: 4b04 ldr r3, [pc, #16] @ (8003a24 ) - 8003a14: 2202 movs r2, #2 - 8003a16: 619a str r2, [r3, #24] - 8003a18: e000 b.n 8003a1c + 8003d06: 4b04 ldr r3, [pc, #16] @ (8003d18 ) + 8003d08: 2202 movs r2, #2 + 8003d0a: 619a str r2, [r3, #24] + 8003d0c: e000 b.n 8003d10 if((x >= ST7735_TFTWIDTH) || (y >= ST7735_TFTHEIGHT_18)) return; - 8003a1a: bf00 nop + 8003d0e: bf00 nop } - 8003a1c: 3714 adds r7, #20 - 8003a1e: 46bd mov sp, r7 - 8003a20: bd90 pop {r4, r7, pc} - 8003a22: bf00 nop - 8003a24: 40020800 .word 0x40020800 - 8003a28: 2000007c .word 0x2000007c + 8003d10: 3714 adds r7, #20 + 8003d12: 46bd mov sp, r7 + 8003d14: bd90 pop {r4, r7, pc} + 8003d16: bf00 nop + 8003d18: 40020800 .word 0x40020800 + 8003d1c: 2000007c .word 0x2000007c -08003a2c : +08003d20 : * : size = 1 to 10 * Output : None * Return : None *******************************************************************************/ void displayChar_TFT(uint16_t x, uint16_t y, unsigned char c, uint16_t color, uint16_t bg, uint8_t size) { - 8003a2c: b590 push {r4, r7, lr} - 8003a2e: b087 sub sp, #28 - 8003a30: af02 add r7, sp, #8 - 8003a32: 4604 mov r4, r0 - 8003a34: 4608 mov r0, r1 - 8003a36: 4611 mov r1, r2 - 8003a38: 461a mov r2, r3 - 8003a3a: 4623 mov r3, r4 - 8003a3c: 80fb strh r3, [r7, #6] - 8003a3e: 4603 mov r3, r0 - 8003a40: 80bb strh r3, [r7, #4] - 8003a42: 460b mov r3, r1 - 8003a44: 70fb strb r3, [r7, #3] - 8003a46: 4613 mov r3, r2 - 8003a48: 803b strh r3, [r7, #0] + 8003d20: b590 push {r4, r7, lr} + 8003d22: b087 sub sp, #28 + 8003d24: af02 add r7, sp, #8 + 8003d26: 4604 mov r4, r0 + 8003d28: 4608 mov r0, r1 + 8003d2a: 4611 mov r1, r2 + 8003d2c: 461a mov r2, r3 + 8003d2e: 4623 mov r3, r4 + 8003d30: 80fb strh r3, [r7, #6] + 8003d32: 4603 mov r3, r0 + 8003d34: 80bb strh r3, [r7, #4] + 8003d36: 460b mov r3, r1 + 8003d38: 70fb strb r3, [r7, #3] + 8003d3a: 4613 mov r3, r2 + 8003d3c: 803b strh r3, [r7, #0] uint8_t i,j,line; if((x >= ST7735_TFTWIDTH) || // Clip right - 8003a4a: 88fb ldrh r3, [r7, #6] - 8003a4c: 2b7f cmp r3, #127 @ 0x7f - 8003a4e: f200 80b1 bhi.w 8003bb4 - 8003a52: 88bb ldrh r3, [r7, #4] - 8003a54: 2b9f cmp r3, #159 @ 0x9f - 8003a56: f200 80ad bhi.w 8003bb4 + 8003d3e: 88fb ldrh r3, [r7, #6] + 8003d40: 2b7f cmp r3, #127 @ 0x7f + 8003d42: f200 80b1 bhi.w 8003ea8 + 8003d46: 88bb ldrh r3, [r7, #4] + 8003d48: 2b9f cmp r3, #159 @ 0x9f + 8003d4a: f200 80ad bhi.w 8003ea8 (y >= ST7735_TFTHEIGHT_18) || // Clip bottom ((x + 6 * size - 1) < 0) || // Clip left - 8003a5a: 88f9 ldrh r1, [r7, #6] - 8003a5c: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 - 8003a60: 4613 mov r3, r2 - 8003a62: 005b lsls r3, r3, #1 - 8003a64: 4413 add r3, r2 - 8003a66: 005b lsls r3, r3, #1 - 8003a68: 440b add r3, r1 + 8003d4e: 88f9 ldrh r1, [r7, #6] + 8003d50: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 + 8003d54: 4613 mov r3, r2 + 8003d56: 005b lsls r3, r3, #1 + 8003d58: 4413 add r3, r2 + 8003d5a: 005b lsls r3, r3, #1 + 8003d5c: 440b add r3, r1 (y >= ST7735_TFTHEIGHT_18) || // Clip bottom - 8003a6a: 2b00 cmp r3, #0 - 8003a6c: f340 80a2 ble.w 8003bb4 + 8003d5e: 2b00 cmp r3, #0 + 8003d60: f340 80a2 ble.w 8003ea8 ((y + 8 * size - 1) < 0)) // Clip top - 8003a70: 88ba ldrh r2, [r7, #4] - 8003a72: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003a76: 00db lsls r3, r3, #3 - 8003a78: 4413 add r3, r2 + 8003d64: 88ba ldrh r2, [r7, #4] + 8003d66: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003d6a: 00db lsls r3, r3, #3 + 8003d6c: 4413 add r3, r2 ((x + 6 * size - 1) < 0) || // Clip left - 8003a7a: 2b00 cmp r3, #0 - 8003a7c: f340 809a ble.w 8003bb4 + 8003d6e: 2b00 cmp r3, #0 + 8003d70: f340 809a ble.w 8003ea8 return; for (i=0; i<6; i++ ) - 8003a80: 2300 movs r3, #0 - 8003a82: 73fb strb r3, [r7, #15] - 8003a84: e091 b.n 8003baa + 8003d74: 2300 movs r3, #0 + 8003d76: 73fb strb r3, [r7, #15] + 8003d78: e091 b.n 8003e9e { if (i == 5) - 8003a86: 7bfb ldrb r3, [r7, #15] - 8003a88: 2b05 cmp r3, #5 - 8003a8a: d102 bne.n 8003a92 + 8003d7a: 7bfb ldrb r3, [r7, #15] + 8003d7c: 2b05 cmp r3, #5 + 8003d7e: d102 bne.n 8003d86 line = 0x0; - 8003a8c: 2300 movs r3, #0 - 8003a8e: 737b strb r3, [r7, #13] - 8003a90: e00a b.n 8003aa8 + 8003d80: 2300 movs r3, #0 + 8003d82: 737b strb r3, [r7, #13] + 8003d84: e00a b.n 8003d9c else line = pgm_read_byte(tab_font + (c*5) + i); - 8003a92: 78fa ldrb r2, [r7, #3] - 8003a94: 4613 mov r3, r2 - 8003a96: 009b lsls r3, r3, #2 - 8003a98: 4413 add r3, r2 - 8003a9a: 461a mov r2, r3 - 8003a9c: 7bfb ldrb r3, [r7, #15] - 8003a9e: 4413 add r3, r2 - 8003aa0: 4a46 ldr r2, [pc, #280] @ (8003bbc ) - 8003aa2: 4413 add r3, r2 - 8003aa4: 781b ldrb r3, [r3, #0] - 8003aa6: 737b strb r3, [r7, #13] + 8003d86: 78fa ldrb r2, [r7, #3] + 8003d88: 4613 mov r3, r2 + 8003d8a: 009b lsls r3, r3, #2 + 8003d8c: 4413 add r3, r2 + 8003d8e: 461a mov r2, r3 + 8003d90: 7bfb ldrb r3, [r7, #15] + 8003d92: 4413 add r3, r2 + 8003d94: 4a46 ldr r2, [pc, #280] @ (8003eb0 ) + 8003d96: 4413 add r3, r2 + 8003d98: 781b ldrb r3, [r3, #0] + 8003d9a: 737b strb r3, [r7, #13] for ( j = 0; j<8; j++) - 8003aa8: 2300 movs r3, #0 - 8003aaa: 73bb strb r3, [r7, #14] - 8003aac: e077 b.n 8003b9e + 8003d9c: 2300 movs r3, #0 + 8003d9e: 73bb strb r3, [r7, #14] + 8003da0: e077 b.n 8003e92 { if (line & 0x1) - 8003aae: 7b7b ldrb r3, [r7, #13] - 8003ab0: f003 0301 and.w r3, r3, #1 - 8003ab4: 2b00 cmp r3, #0 - 8003ab6: d034 beq.n 8003b22 + 8003da2: 7b7b ldrb r3, [r7, #13] + 8003da4: f003 0301 and.w r3, r3, #1 + 8003da8: 2b00 cmp r3, #0 + 8003daa: d034 beq.n 8003e16 { if (size == 1) // default size - 8003ab8: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003abc: 2b01 cmp r3, #1 - 8003abe: d10e bne.n 8003ade + 8003dac: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003db0: 2b01 cmp r3, #1 + 8003db2: d10e bne.n 8003dd2 drawPixel_TFT(x+i, y+j, color); - 8003ac0: 7bfb ldrb r3, [r7, #15] - 8003ac2: b29a uxth r2, r3 - 8003ac4: 88fb ldrh r3, [r7, #6] - 8003ac6: 4413 add r3, r2 - 8003ac8: b298 uxth r0, r3 - 8003aca: 7bbb ldrb r3, [r7, #14] - 8003acc: b29a uxth r2, r3 - 8003ace: 88bb ldrh r3, [r7, #4] - 8003ad0: 4413 add r3, r2 - 8003ad2: b29b uxth r3, r3 - 8003ad4: 883a ldrh r2, [r7, #0] - 8003ad6: 4619 mov r1, r3 - 8003ad8: f7ff fee8 bl 80038ac - 8003adc: e059 b.n 8003b92 + 8003db4: 7bfb ldrb r3, [r7, #15] + 8003db6: b29a uxth r2, r3 + 8003db8: 88fb ldrh r3, [r7, #6] + 8003dba: 4413 add r3, r2 + 8003dbc: b298 uxth r0, r3 + 8003dbe: 7bbb ldrb r3, [r7, #14] + 8003dc0: b29a uxth r2, r3 + 8003dc2: 88bb ldrh r3, [r7, #4] + 8003dc4: 4413 add r3, r2 + 8003dc6: b29b uxth r3, r3 + 8003dc8: 883a ldrh r2, [r7, #0] + 8003dca: 4619 mov r1, r3 + 8003dcc: f7ff fee8 bl 8003ba0 + 8003dd0: e059 b.n 8003e86 else { // big size fillRect_TFT(x+(i*size), y+(j*size), size, size, color); - 8003ade: 7bfb ldrb r3, [r7, #15] - 8003ae0: b29b uxth r3, r3 - 8003ae2: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 - 8003ae6: b292 uxth r2, r2 - 8003ae8: fb02 f303 mul.w r3, r2, r3 - 8003aec: b29a uxth r2, r3 - 8003aee: 88fb ldrh r3, [r7, #6] - 8003af0: 4413 add r3, r2 - 8003af2: b298 uxth r0, r3 - 8003af4: 7bbb ldrb r3, [r7, #14] - 8003af6: b29b uxth r3, r3 - 8003af8: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 - 8003afc: b292 uxth r2, r2 - 8003afe: fb02 f303 mul.w r3, r2, r3 - 8003b02: b29a uxth r2, r3 - 8003b04: 88bb ldrh r3, [r7, #4] - 8003b06: 4413 add r3, r2 - 8003b08: b299 uxth r1, r3 - 8003b0a: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003b0e: b29a uxth r2, r3 - 8003b10: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003b14: b29c uxth r4, r3 - 8003b16: 883b ldrh r3, [r7, #0] - 8003b18: 9300 str r3, [sp, #0] - 8003b1a: 4623 mov r3, r4 - 8003b1c: f7ff ff0c bl 8003938 - 8003b20: e037 b.n 8003b92 + 8003dd2: 7bfb ldrb r3, [r7, #15] + 8003dd4: b29b uxth r3, r3 + 8003dd6: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 + 8003dda: b292 uxth r2, r2 + 8003ddc: fb02 f303 mul.w r3, r2, r3 + 8003de0: b29a uxth r2, r3 + 8003de2: 88fb ldrh r3, [r7, #6] + 8003de4: 4413 add r3, r2 + 8003de6: b298 uxth r0, r3 + 8003de8: 7bbb ldrb r3, [r7, #14] + 8003dea: b29b uxth r3, r3 + 8003dec: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 + 8003df0: b292 uxth r2, r2 + 8003df2: fb02 f303 mul.w r3, r2, r3 + 8003df6: b29a uxth r2, r3 + 8003df8: 88bb ldrh r3, [r7, #4] + 8003dfa: 4413 add r3, r2 + 8003dfc: b299 uxth r1, r3 + 8003dfe: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003e02: b29a uxth r2, r3 + 8003e04: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003e08: b29c uxth r4, r3 + 8003e0a: 883b ldrh r3, [r7, #0] + 8003e0c: 9300 str r3, [sp, #0] + 8003e0e: 4623 mov r3, r4 + 8003e10: f7ff ff0c bl 8003c2c + 8003e14: e037 b.n 8003e86 } } else if (bg != color) - 8003b22: 8c3a ldrh r2, [r7, #32] - 8003b24: 883b ldrh r3, [r7, #0] - 8003b26: 429a cmp r2, r3 - 8003b28: d033 beq.n 8003b92 + 8003e16: 8c3a ldrh r2, [r7, #32] + 8003e18: 883b ldrh r3, [r7, #0] + 8003e1a: 429a cmp r2, r3 + 8003e1c: d033 beq.n 8003e86 { if (size == 1) // default size - 8003b2a: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003b2e: 2b01 cmp r3, #1 - 8003b30: d10e bne.n 8003b50 + 8003e1e: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003e22: 2b01 cmp r3, #1 + 8003e24: d10e bne.n 8003e44 drawPixel_TFT(x+i, y+j, bg); - 8003b32: 7bfb ldrb r3, [r7, #15] - 8003b34: b29a uxth r2, r3 - 8003b36: 88fb ldrh r3, [r7, #6] - 8003b38: 4413 add r3, r2 - 8003b3a: b298 uxth r0, r3 - 8003b3c: 7bbb ldrb r3, [r7, #14] - 8003b3e: b29a uxth r2, r3 - 8003b40: 88bb ldrh r3, [r7, #4] - 8003b42: 4413 add r3, r2 - 8003b44: b29b uxth r3, r3 - 8003b46: 8c3a ldrh r2, [r7, #32] - 8003b48: 4619 mov r1, r3 - 8003b4a: f7ff feaf bl 80038ac - 8003b4e: e020 b.n 8003b92 + 8003e26: 7bfb ldrb r3, [r7, #15] + 8003e28: b29a uxth r2, r3 + 8003e2a: 88fb ldrh r3, [r7, #6] + 8003e2c: 4413 add r3, r2 + 8003e2e: b298 uxth r0, r3 + 8003e30: 7bbb ldrb r3, [r7, #14] + 8003e32: b29a uxth r2, r3 + 8003e34: 88bb ldrh r3, [r7, #4] + 8003e36: 4413 add r3, r2 + 8003e38: b29b uxth r3, r3 + 8003e3a: 8c3a ldrh r2, [r7, #32] + 8003e3c: 4619 mov r1, r3 + 8003e3e: f7ff feaf bl 8003ba0 + 8003e42: e020 b.n 8003e86 else { // big size fillRect_TFT(x+i*size, y+j*size, size, size, bg); - 8003b50: 7bfb ldrb r3, [r7, #15] - 8003b52: b29b uxth r3, r3 - 8003b54: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 - 8003b58: b292 uxth r2, r2 - 8003b5a: fb02 f303 mul.w r3, r2, r3 - 8003b5e: b29a uxth r2, r3 - 8003b60: 88fb ldrh r3, [r7, #6] - 8003b62: 4413 add r3, r2 - 8003b64: b298 uxth r0, r3 - 8003b66: 7bbb ldrb r3, [r7, #14] - 8003b68: b29b uxth r3, r3 - 8003b6a: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 - 8003b6e: b292 uxth r2, r2 - 8003b70: fb02 f303 mul.w r3, r2, r3 - 8003b74: b29a uxth r2, r3 - 8003b76: 88bb ldrh r3, [r7, #4] - 8003b78: 4413 add r3, r2 - 8003b7a: b299 uxth r1, r3 - 8003b7c: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003b80: b29a uxth r2, r3 - 8003b82: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 - 8003b86: b29c uxth r4, r3 - 8003b88: 8c3b ldrh r3, [r7, #32] - 8003b8a: 9300 str r3, [sp, #0] - 8003b8c: 4623 mov r3, r4 - 8003b8e: f7ff fed3 bl 8003938 + 8003e44: 7bfb ldrb r3, [r7, #15] + 8003e46: b29b uxth r3, r3 + 8003e48: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 + 8003e4c: b292 uxth r2, r2 + 8003e4e: fb02 f303 mul.w r3, r2, r3 + 8003e52: b29a uxth r2, r3 + 8003e54: 88fb ldrh r3, [r7, #6] + 8003e56: 4413 add r3, r2 + 8003e58: b298 uxth r0, r3 + 8003e5a: 7bbb ldrb r3, [r7, #14] + 8003e5c: b29b uxth r3, r3 + 8003e5e: f897 2024 ldrb.w r2, [r7, #36] @ 0x24 + 8003e62: b292 uxth r2, r2 + 8003e64: fb02 f303 mul.w r3, r2, r3 + 8003e68: b29a uxth r2, r3 + 8003e6a: 88bb ldrh r3, [r7, #4] + 8003e6c: 4413 add r3, r2 + 8003e6e: b299 uxth r1, r3 + 8003e70: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003e74: b29a uxth r2, r3 + 8003e76: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 + 8003e7a: b29c uxth r4, r3 + 8003e7c: 8c3b ldrh r3, [r7, #32] + 8003e7e: 9300 str r3, [sp, #0] + 8003e80: 4623 mov r3, r4 + 8003e82: f7ff fed3 bl 8003c2c } } line = line >> 1; - 8003b92: 7b7b ldrb r3, [r7, #13] - 8003b94: 085b lsrs r3, r3, #1 - 8003b96: 737b strb r3, [r7, #13] + 8003e86: 7b7b ldrb r3, [r7, #13] + 8003e88: 085b lsrs r3, r3, #1 + 8003e8a: 737b strb r3, [r7, #13] for ( j = 0; j<8; j++) - 8003b98: 7bbb ldrb r3, [r7, #14] - 8003b9a: 3301 adds r3, #1 - 8003b9c: 73bb strb r3, [r7, #14] - 8003b9e: 7bbb ldrb r3, [r7, #14] - 8003ba0: 2b07 cmp r3, #7 - 8003ba2: d984 bls.n 8003aae + 8003e8c: 7bbb ldrb r3, [r7, #14] + 8003e8e: 3301 adds r3, #1 + 8003e90: 73bb strb r3, [r7, #14] + 8003e92: 7bbb ldrb r3, [r7, #14] + 8003e94: 2b07 cmp r3, #7 + 8003e96: d984 bls.n 8003da2 for (i=0; i<6; i++ ) - 8003ba4: 7bfb ldrb r3, [r7, #15] - 8003ba6: 3301 adds r3, #1 - 8003ba8: 73fb strb r3, [r7, #15] - 8003baa: 7bfb ldrb r3, [r7, #15] - 8003bac: 2b05 cmp r3, #5 - 8003bae: f67f af6a bls.w 8003a86 - 8003bb2: e000 b.n 8003bb6 + 8003e98: 7bfb ldrb r3, [r7, #15] + 8003e9a: 3301 adds r3, #1 + 8003e9c: 73fb strb r3, [r7, #15] + 8003e9e: 7bfb ldrb r3, [r7, #15] + 8003ea0: 2b05 cmp r3, #5 + 8003ea2: f67f af6a bls.w 8003d7a + 8003ea6: e000 b.n 8003eaa return; - 8003bb4: bf00 nop + 8003ea8: bf00 nop } } } - 8003bb6: 3714 adds r7, #20 - 8003bb8: 46bd mov sp, r7 - 8003bba: bd90 pop {r4, r7, pc} - 8003bbc: 08003e2c .word 0x08003e2c + 8003eaa: 3714 adds r7, #20 + 8003eac: 46bd mov sp, r7 + 8003eae: bd90 pop {r4, r7, pc} + 8003eb0: 08004120 .word 0x08004120 -08003bc0 : +08003eb4 : * Input : * Output : None * Return : None *******************************************************************************/ void displayLogo_TFT( void) { - 8003bc0: b580 push {r7, lr} - 8003bc2: b082 sub sp, #8 - 8003bc4: af00 add r7, sp, #0 + 8003eb4: b580 push {r7, lr} + 8003eb6: b082 sub sp, #8 + 8003eb8: af00 add r7, sp, #0 uint8_t i,j,k,line; uint16_t color=ST7735_WHITE; - 8003bc6: f64f 73ff movw r3, #65535 @ 0xffff - 8003bca: 807b strh r3, [r7, #2] + 8003eba: f64f 73ff movw r3, #65535 @ 0xffff + 8003ebe: 807b strh r3, [r7, #2] for(i=0;i<=120;i++) - 8003bcc: 2300 movs r3, #0 - 8003bce: 71fb strb r3, [r7, #7] - 8003bd0: e09e b.n 8003d10 + 8003ec0: 2300 movs r3, #0 + 8003ec2: 71fb strb r3, [r7, #7] + 8003ec4: e09e b.n 8004004 { for(j=0;j<= 1;j++) - 8003bd2: 2300 movs r3, #0 - 8003bd4: 71bb strb r3, [r7, #6] - 8003bd6: e02b b.n 8003c30 + 8003ec6: 2300 movs r3, #0 + 8003ec8: 71bb strb r3, [r7, #6] + 8003eca: e02b b.n 8003f24 { line=(ALL_IS_mono_120[i+120*j]); - 8003bd8: 79f9 ldrb r1, [r7, #7] - 8003bda: 79ba ldrb r2, [r7, #6] - 8003bdc: 4613 mov r3, r2 - 8003bde: 011b lsls r3, r3, #4 - 8003be0: 1a9b subs r3, r3, r2 - 8003be2: 00db lsls r3, r3, #3 - 8003be4: 440b add r3, r1 - 8003be6: 4a4f ldr r2, [pc, #316] @ (8003d24 ) - 8003be8: 5cd3 ldrb r3, [r2, r3] - 8003bea: 713b strb r3, [r7, #4] + 8003ecc: 79f9 ldrb r1, [r7, #7] + 8003ece: 79ba ldrb r2, [r7, #6] + 8003ed0: 4613 mov r3, r2 + 8003ed2: 011b lsls r3, r3, #4 + 8003ed4: 1a9b subs r3, r3, r2 + 8003ed6: 00db lsls r3, r3, #3 + 8003ed8: 440b add r3, r1 + 8003eda: 4a4f ldr r2, [pc, #316] @ (8004018 ) + 8003edc: 5cd3 ldrb r3, [r2, r3] + 8003ede: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003bec: 2300 movs r3, #0 - 8003bee: 717b strb r3, [r7, #5] - 8003bf0: e018 b.n 8003c24 + 8003ee0: 2300 movs r3, #0 + 8003ee2: 717b strb r3, [r7, #5] + 8003ee4: e018 b.n 8003f18 { if (line & 0x1) - 8003bf2: 793b ldrb r3, [r7, #4] - 8003bf4: f003 0301 and.w r3, r3, #1 - 8003bf8: 2b00 cmp r3, #0 - 8003bfa: d00d beq.n 8003c18 + 8003ee6: 793b ldrb r3, [r7, #4] + 8003ee8: f003 0301 and.w r3, r3, #1 + 8003eec: 2b00 cmp r3, #0 + 8003eee: d00d beq.n 8003f0c { drawPixel_TFT(i, j*8+k, color); - 8003bfc: 79fb ldrb r3, [r7, #7] - 8003bfe: b298 uxth r0, r3 - 8003c00: 79bb ldrb r3, [r7, #6] - 8003c02: b29b uxth r3, r3 - 8003c04: 00db lsls r3, r3, #3 - 8003c06: b29a uxth r2, r3 - 8003c08: 797b ldrb r3, [r7, #5] - 8003c0a: b29b uxth r3, r3 - 8003c0c: 4413 add r3, r2 - 8003c0e: b29b uxth r3, r3 - 8003c10: 887a ldrh r2, [r7, #2] - 8003c12: 4619 mov r1, r3 - 8003c14: f7ff fe4a bl 80038ac + 8003ef0: 79fb ldrb r3, [r7, #7] + 8003ef2: b298 uxth r0, r3 + 8003ef4: 79bb ldrb r3, [r7, #6] + 8003ef6: b29b uxth r3, r3 + 8003ef8: 00db lsls r3, r3, #3 + 8003efa: b29a uxth r2, r3 + 8003efc: 797b ldrb r3, [r7, #5] + 8003efe: b29b uxth r3, r3 + 8003f00: 4413 add r3, r2 + 8003f02: b29b uxth r3, r3 + 8003f04: 887a ldrh r2, [r7, #2] + 8003f06: 4619 mov r1, r3 + 8003f08: f7ff fe4a bl 8003ba0 } line = line >> 1; - 8003c18: 793b ldrb r3, [r7, #4] - 8003c1a: 085b lsrs r3, r3, #1 - 8003c1c: 713b strb r3, [r7, #4] + 8003f0c: 793b ldrb r3, [r7, #4] + 8003f0e: 085b lsrs r3, r3, #1 + 8003f10: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003c1e: 797b ldrb r3, [r7, #5] - 8003c20: 3301 adds r3, #1 - 8003c22: 717b strb r3, [r7, #5] - 8003c24: 797b ldrb r3, [r7, #5] - 8003c26: 2b07 cmp r3, #7 - 8003c28: d9e3 bls.n 8003bf2 + 8003f12: 797b ldrb r3, [r7, #5] + 8003f14: 3301 adds r3, #1 + 8003f16: 717b strb r3, [r7, #5] + 8003f18: 797b ldrb r3, [r7, #5] + 8003f1a: 2b07 cmp r3, #7 + 8003f1c: d9e3 bls.n 8003ee6 for(j=0;j<= 1;j++) - 8003c2a: 79bb ldrb r3, [r7, #6] - 8003c2c: 3301 adds r3, #1 - 8003c2e: 71bb strb r3, [r7, #6] - 8003c30: 79bb ldrb r3, [r7, #6] - 8003c32: 2b01 cmp r3, #1 - 8003c34: d9d0 bls.n 8003bd8 + 8003f1e: 79bb ldrb r3, [r7, #6] + 8003f20: 3301 adds r3, #1 + 8003f22: 71bb strb r3, [r7, #6] + 8003f24: 79bb ldrb r3, [r7, #6] + 8003f26: 2b01 cmp r3, #1 + 8003f28: d9d0 bls.n 8003ecc } } color=ST7735_RED; - 8003c36: f44f 4378 mov.w r3, #63488 @ 0xf800 - 8003c3a: 807b strh r3, [r7, #2] + 8003f2a: f44f 4378 mov.w r3, #63488 @ 0xf800 + 8003f2e: 807b strh r3, [r7, #2] for(j=2;j<= 3;j++) - 8003c3c: 2302 movs r3, #2 - 8003c3e: 71bb strb r3, [r7, #6] - 8003c40: e02b b.n 8003c9a + 8003f30: 2302 movs r3, #2 + 8003f32: 71bb strb r3, [r7, #6] + 8003f34: e02b b.n 8003f8e { line=(ALL_IS_mono_120[i+120*j]); - 8003c42: 79f9 ldrb r1, [r7, #7] - 8003c44: 79ba ldrb r2, [r7, #6] - 8003c46: 4613 mov r3, r2 - 8003c48: 011b lsls r3, r3, #4 - 8003c4a: 1a9b subs r3, r3, r2 - 8003c4c: 00db lsls r3, r3, #3 - 8003c4e: 440b add r3, r1 - 8003c50: 4a34 ldr r2, [pc, #208] @ (8003d24 ) - 8003c52: 5cd3 ldrb r3, [r2, r3] - 8003c54: 713b strb r3, [r7, #4] + 8003f36: 79f9 ldrb r1, [r7, #7] + 8003f38: 79ba ldrb r2, [r7, #6] + 8003f3a: 4613 mov r3, r2 + 8003f3c: 011b lsls r3, r3, #4 + 8003f3e: 1a9b subs r3, r3, r2 + 8003f40: 00db lsls r3, r3, #3 + 8003f42: 440b add r3, r1 + 8003f44: 4a34 ldr r2, [pc, #208] @ (8004018 ) + 8003f46: 5cd3 ldrb r3, [r2, r3] + 8003f48: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003c56: 2300 movs r3, #0 - 8003c58: 717b strb r3, [r7, #5] - 8003c5a: e018 b.n 8003c8e + 8003f4a: 2300 movs r3, #0 + 8003f4c: 717b strb r3, [r7, #5] + 8003f4e: e018 b.n 8003f82 { if (line & 0x1) - 8003c5c: 793b ldrb r3, [r7, #4] - 8003c5e: f003 0301 and.w r3, r3, #1 - 8003c62: 2b00 cmp r3, #0 - 8003c64: d00d beq.n 8003c82 + 8003f50: 793b ldrb r3, [r7, #4] + 8003f52: f003 0301 and.w r3, r3, #1 + 8003f56: 2b00 cmp r3, #0 + 8003f58: d00d beq.n 8003f76 { drawPixel_TFT(i, j*8+k, color); - 8003c66: 79fb ldrb r3, [r7, #7] - 8003c68: b298 uxth r0, r3 - 8003c6a: 79bb ldrb r3, [r7, #6] - 8003c6c: b29b uxth r3, r3 - 8003c6e: 00db lsls r3, r3, #3 - 8003c70: b29a uxth r2, r3 - 8003c72: 797b ldrb r3, [r7, #5] - 8003c74: b29b uxth r3, r3 - 8003c76: 4413 add r3, r2 - 8003c78: b29b uxth r3, r3 - 8003c7a: 887a ldrh r2, [r7, #2] - 8003c7c: 4619 mov r1, r3 - 8003c7e: f7ff fe15 bl 80038ac + 8003f5a: 79fb ldrb r3, [r7, #7] + 8003f5c: b298 uxth r0, r3 + 8003f5e: 79bb ldrb r3, [r7, #6] + 8003f60: b29b uxth r3, r3 + 8003f62: 00db lsls r3, r3, #3 + 8003f64: b29a uxth r2, r3 + 8003f66: 797b ldrb r3, [r7, #5] + 8003f68: b29b uxth r3, r3 + 8003f6a: 4413 add r3, r2 + 8003f6c: b29b uxth r3, r3 + 8003f6e: 887a ldrh r2, [r7, #2] + 8003f70: 4619 mov r1, r3 + 8003f72: f7ff fe15 bl 8003ba0 } line = line >> 1; - 8003c82: 793b ldrb r3, [r7, #4] - 8003c84: 085b lsrs r3, r3, #1 - 8003c86: 713b strb r3, [r7, #4] + 8003f76: 793b ldrb r3, [r7, #4] + 8003f78: 085b lsrs r3, r3, #1 + 8003f7a: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003c88: 797b ldrb r3, [r7, #5] - 8003c8a: 3301 adds r3, #1 - 8003c8c: 717b strb r3, [r7, #5] - 8003c8e: 797b ldrb r3, [r7, #5] - 8003c90: 2b07 cmp r3, #7 - 8003c92: d9e3 bls.n 8003c5c + 8003f7c: 797b ldrb r3, [r7, #5] + 8003f7e: 3301 adds r3, #1 + 8003f80: 717b strb r3, [r7, #5] + 8003f82: 797b ldrb r3, [r7, #5] + 8003f84: 2b07 cmp r3, #7 + 8003f86: d9e3 bls.n 8003f50 for(j=2;j<= 3;j++) - 8003c94: 79bb ldrb r3, [r7, #6] - 8003c96: 3301 adds r3, #1 - 8003c98: 71bb strb r3, [r7, #6] - 8003c9a: 79bb ldrb r3, [r7, #6] - 8003c9c: 2b03 cmp r3, #3 - 8003c9e: d9d0 bls.n 8003c42 + 8003f88: 79bb ldrb r3, [r7, #6] + 8003f8a: 3301 adds r3, #1 + 8003f8c: 71bb strb r3, [r7, #6] + 8003f8e: 79bb ldrb r3, [r7, #6] + 8003f90: 2b03 cmp r3, #3 + 8003f92: d9d0 bls.n 8003f36 } } color=ST7735_WHITE; - 8003ca0: f64f 73ff movw r3, #65535 @ 0xffff - 8003ca4: 807b strh r3, [r7, #2] + 8003f94: f64f 73ff movw r3, #65535 @ 0xffff + 8003f98: 807b strh r3, [r7, #2] for(j=4;j<= 5;j++) - 8003ca6: 2304 movs r3, #4 - 8003ca8: 71bb strb r3, [r7, #6] - 8003caa: e02b b.n 8003d04 + 8003f9a: 2304 movs r3, #4 + 8003f9c: 71bb strb r3, [r7, #6] + 8003f9e: e02b b.n 8003ff8 { line=(ALL_IS_mono_120[i+120*j]); - 8003cac: 79f9 ldrb r1, [r7, #7] - 8003cae: 79ba ldrb r2, [r7, #6] - 8003cb0: 4613 mov r3, r2 - 8003cb2: 011b lsls r3, r3, #4 - 8003cb4: 1a9b subs r3, r3, r2 - 8003cb6: 00db lsls r3, r3, #3 - 8003cb8: 440b add r3, r1 - 8003cba: 4a1a ldr r2, [pc, #104] @ (8003d24 ) - 8003cbc: 5cd3 ldrb r3, [r2, r3] - 8003cbe: 713b strb r3, [r7, #4] + 8003fa0: 79f9 ldrb r1, [r7, #7] + 8003fa2: 79ba ldrb r2, [r7, #6] + 8003fa4: 4613 mov r3, r2 + 8003fa6: 011b lsls r3, r3, #4 + 8003fa8: 1a9b subs r3, r3, r2 + 8003faa: 00db lsls r3, r3, #3 + 8003fac: 440b add r3, r1 + 8003fae: 4a1a ldr r2, [pc, #104] @ (8004018 ) + 8003fb0: 5cd3 ldrb r3, [r2, r3] + 8003fb2: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003cc0: 2300 movs r3, #0 - 8003cc2: 717b strb r3, [r7, #5] - 8003cc4: e018 b.n 8003cf8 + 8003fb4: 2300 movs r3, #0 + 8003fb6: 717b strb r3, [r7, #5] + 8003fb8: e018 b.n 8003fec { if (line & 0x1) - 8003cc6: 793b ldrb r3, [r7, #4] - 8003cc8: f003 0301 and.w r3, r3, #1 - 8003ccc: 2b00 cmp r3, #0 - 8003cce: d00d beq.n 8003cec + 8003fba: 793b ldrb r3, [r7, #4] + 8003fbc: f003 0301 and.w r3, r3, #1 + 8003fc0: 2b00 cmp r3, #0 + 8003fc2: d00d beq.n 8003fe0 { drawPixel_TFT(i, j*8+k, color); - 8003cd0: 79fb ldrb r3, [r7, #7] - 8003cd2: b298 uxth r0, r3 - 8003cd4: 79bb ldrb r3, [r7, #6] - 8003cd6: b29b uxth r3, r3 - 8003cd8: 00db lsls r3, r3, #3 - 8003cda: b29a uxth r2, r3 - 8003cdc: 797b ldrb r3, [r7, #5] - 8003cde: b29b uxth r3, r3 - 8003ce0: 4413 add r3, r2 - 8003ce2: b29b uxth r3, r3 - 8003ce4: 887a ldrh r2, [r7, #2] - 8003ce6: 4619 mov r1, r3 - 8003ce8: f7ff fde0 bl 80038ac + 8003fc4: 79fb ldrb r3, [r7, #7] + 8003fc6: b298 uxth r0, r3 + 8003fc8: 79bb ldrb r3, [r7, #6] + 8003fca: b29b uxth r3, r3 + 8003fcc: 00db lsls r3, r3, #3 + 8003fce: b29a uxth r2, r3 + 8003fd0: 797b ldrb r3, [r7, #5] + 8003fd2: b29b uxth r3, r3 + 8003fd4: 4413 add r3, r2 + 8003fd6: b29b uxth r3, r3 + 8003fd8: 887a ldrh r2, [r7, #2] + 8003fda: 4619 mov r1, r3 + 8003fdc: f7ff fde0 bl 8003ba0 } line = line >> 1; - 8003cec: 793b ldrb r3, [r7, #4] - 8003cee: 085b lsrs r3, r3, #1 - 8003cf0: 713b strb r3, [r7, #4] + 8003fe0: 793b ldrb r3, [r7, #4] + 8003fe2: 085b lsrs r3, r3, #1 + 8003fe4: 713b strb r3, [r7, #4] for ( k = 0; k<8; k++) - 8003cf2: 797b ldrb r3, [r7, #5] - 8003cf4: 3301 adds r3, #1 - 8003cf6: 717b strb r3, [r7, #5] - 8003cf8: 797b ldrb r3, [r7, #5] - 8003cfa: 2b07 cmp r3, #7 - 8003cfc: d9e3 bls.n 8003cc6 + 8003fe6: 797b ldrb r3, [r7, #5] + 8003fe8: 3301 adds r3, #1 + 8003fea: 717b strb r3, [r7, #5] + 8003fec: 797b ldrb r3, [r7, #5] + 8003fee: 2b07 cmp r3, #7 + 8003ff0: d9e3 bls.n 8003fba for(j=4;j<= 5;j++) - 8003cfe: 79bb ldrb r3, [r7, #6] - 8003d00: 3301 adds r3, #1 - 8003d02: 71bb strb r3, [r7, #6] - 8003d04: 79bb ldrb r3, [r7, #6] - 8003d06: 2b05 cmp r3, #5 - 8003d08: d9d0 bls.n 8003cac + 8003ff2: 79bb ldrb r3, [r7, #6] + 8003ff4: 3301 adds r3, #1 + 8003ff6: 71bb strb r3, [r7, #6] + 8003ff8: 79bb ldrb r3, [r7, #6] + 8003ffa: 2b05 cmp r3, #5 + 8003ffc: d9d0 bls.n 8003fa0 for(i=0;i<=120;i++) - 8003d0a: 79fb ldrb r3, [r7, #7] - 8003d0c: 3301 adds r3, #1 - 8003d0e: 71fb strb r3, [r7, #7] - 8003d10: 79fb ldrb r3, [r7, #7] - 8003d12: 2b78 cmp r3, #120 @ 0x78 - 8003d14: f67f af5d bls.w 8003bd2 + 8003ffe: 79fb ldrb r3, [r7, #7] + 8004000: 3301 adds r3, #1 + 8004002: 71fb strb r3, [r7, #7] + 8004004: 79fb ldrb r3, [r7, #7] + 8004006: 2b78 cmp r3, #120 @ 0x78 + 8004008: f67f af5d bls.w 8003ec6 } } } } - 8003d18: bf00 nop - 8003d1a: bf00 nop - 8003d1c: 3708 adds r7, #8 - 8003d1e: 46bd mov sp, r7 - 8003d20: bd80 pop {r7, pc} - 8003d22: bf00 nop - 8003d24: 08004328 .word 0x08004328 + 800400c: bf00 nop + 800400e: bf00 nop + 8004010: 3708 adds r7, #8 + 8004012: 46bd mov sp, r7 + 8004014: bd80 pop {r7, pc} + 8004016: bf00 nop + 8004018: 0800461c .word 0x0800461c -08003d28 : - 8003d28: 4603 mov r3, r0 - 8003d2a: 4402 add r2, r0 - 8003d2c: 4293 cmp r3, r2 - 8003d2e: d100 bne.n 8003d32 - 8003d30: 4770 bx lr - 8003d32: f803 1b01 strb.w r1, [r3], #1 - 8003d36: e7f9 b.n 8003d2c +0800401c : + 800401c: 4603 mov r3, r0 + 800401e: 4402 add r2, r0 + 8004020: 4293 cmp r3, r2 + 8004022: d100 bne.n 8004026 + 8004024: 4770 bx lr + 8004026: f803 1b01 strb.w r1, [r3], #1 + 800402a: e7f9 b.n 8004020 -08003d38 <__libc_init_array>: - 8003d38: b570 push {r4, r5, r6, lr} - 8003d3a: 2600 movs r6, #0 - 8003d3c: 4d0c ldr r5, [pc, #48] @ (8003d70 <__libc_init_array+0x38>) - 8003d3e: 4c0d ldr r4, [pc, #52] @ (8003d74 <__libc_init_array+0x3c>) - 8003d40: 1b64 subs r4, r4, r5 - 8003d42: 10a4 asrs r4, r4, #2 - 8003d44: 42a6 cmp r6, r4 - 8003d46: d109 bne.n 8003d5c <__libc_init_array+0x24> - 8003d48: f000 f81a bl 8003d80 <_init> - 8003d4c: 2600 movs r6, #0 - 8003d4e: 4d0a ldr r5, [pc, #40] @ (8003d78 <__libc_init_array+0x40>) - 8003d50: 4c0a ldr r4, [pc, #40] @ (8003d7c <__libc_init_array+0x44>) - 8003d52: 1b64 subs r4, r4, r5 - 8003d54: 10a4 asrs r4, r4, #2 - 8003d56: 42a6 cmp r6, r4 - 8003d58: d105 bne.n 8003d66 <__libc_init_array+0x2e> - 8003d5a: bd70 pop {r4, r5, r6, pc} - 8003d5c: f855 3b04 ldr.w r3, [r5], #4 - 8003d60: 4798 blx r3 - 8003d62: 3601 adds r6, #1 - 8003d64: e7ee b.n 8003d44 <__libc_init_array+0xc> - 8003d66: f855 3b04 ldr.w r3, [r5], #4 - 8003d6a: 4798 blx r3 - 8003d6c: 3601 adds r6, #1 - 8003d6e: e7f2 b.n 8003d56 <__libc_init_array+0x1e> - 8003d70: 08004600 .word 0x08004600 - 8003d74: 08004600 .word 0x08004600 - 8003d78: 08004600 .word 0x08004600 - 8003d7c: 08004604 .word 0x08004604 +0800402c <__libc_init_array>: + 800402c: b570 push {r4, r5, r6, lr} + 800402e: 2600 movs r6, #0 + 8004030: 4d0c ldr r5, [pc, #48] @ (8004064 <__libc_init_array+0x38>) + 8004032: 4c0d ldr r4, [pc, #52] @ (8004068 <__libc_init_array+0x3c>) + 8004034: 1b64 subs r4, r4, r5 + 8004036: 10a4 asrs r4, r4, #2 + 8004038: 42a6 cmp r6, r4 + 800403a: d109 bne.n 8004050 <__libc_init_array+0x24> + 800403c: f000 f81a bl 8004074 <_init> + 8004040: 2600 movs r6, #0 + 8004042: 4d0a ldr r5, [pc, #40] @ (800406c <__libc_init_array+0x40>) + 8004044: 4c0a ldr r4, [pc, #40] @ (8004070 <__libc_init_array+0x44>) + 8004046: 1b64 subs r4, r4, r5 + 8004048: 10a4 asrs r4, r4, #2 + 800404a: 42a6 cmp r6, r4 + 800404c: d105 bne.n 800405a <__libc_init_array+0x2e> + 800404e: bd70 pop {r4, r5, r6, pc} + 8004050: f855 3b04 ldr.w r3, [r5], #4 + 8004054: 4798 blx r3 + 8004056: 3601 adds r6, #1 + 8004058: e7ee b.n 8004038 <__libc_init_array+0xc> + 800405a: f855 3b04 ldr.w r3, [r5], #4 + 800405e: 4798 blx r3 + 8004060: 3601 adds r6, #1 + 8004062: e7f2 b.n 800404a <__libc_init_array+0x1e> + 8004064: 080048f4 .word 0x080048f4 + 8004068: 080048f4 .word 0x080048f4 + 800406c: 080048f4 .word 0x080048f4 + 8004070: 080048f8 .word 0x080048f8 -08003d80 <_init>: - 8003d80: b5f8 push {r3, r4, r5, r6, r7, lr} - 8003d82: bf00 nop - 8003d84: bcf8 pop {r3, r4, r5, r6, r7} - 8003d86: bc08 pop {r3} - 8003d88: 469e mov lr, r3 - 8003d8a: 4770 bx lr +08004074 <_init>: + 8004074: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004076: bf00 nop + 8004078: bcf8 pop {r3, r4, r5, r6, r7} + 800407a: bc08 pop {r3} + 800407c: 469e mov lr, r3 + 800407e: 4770 bx lr -08003d8c <_fini>: - 8003d8c: b5f8 push {r3, r4, r5, r6, r7, lr} - 8003d8e: bf00 nop - 8003d90: bcf8 pop {r3, r4, r5, r6, r7} - 8003d92: bc08 pop {r3} - 8003d94: 469e mov lr, r3 - 8003d96: 4770 bx lr +08004080 <_fini>: + 8004080: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004082: bf00 nop + 8004084: bcf8 pop {r3, r4, r5, r6, r7} + 8004086: bc08 pop {r3} + 8004088: 469e mov lr, r3 + 800408a: 4770 bx lr diff --git a/TP5_TEMP/Debug/TP5_TEMP.map b/TP5_TEMP/Debug/TP5_TEMP.map index 2571b3b..b2b39cd 100644 --- a/TP5_TEMP/Debug/TP5_TEMP.map +++ b/TP5_TEMP/Debug/TP5_TEMP.map @@ -40,12 +40,20 @@ Archive member included to satisfy reference by file (symbol) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-fflush.o) (_free_r) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldf3.o) ./Core/Src/main.o (__aeabi_dmul) +/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) + ./Core/Src/main.o (__aeabi_fmul) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubdf3.o) ./Core/Src/main.o (__aeabi_ui2d) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) ./Core/Src/main.o (__aeabi_ddiv) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) ./Core/Src/main.o (__aeabi_d2uiz) +/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubsf3.o) + ./Core/Src/main.o (__aeabi_fsub) +/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivsf3.o) + ./Core/Src/main.o (__aeabi_fdiv) +/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunssfsi.o) + ./Core/Src/main.o (__aeabi_f2uiz) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o (__aeabi_uldivmod) /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) @@ -146,7 +154,7 @@ Discarded input sections .data 0x00000000 0x0 ./Core/Src/stm32l1xx_hal_msp.o .bss 0x00000000 0x0 ./Core/Src/stm32l1xx_hal_msp.o .text.HAL_ADC_MspDeInit - 0x00000000 0x40 ./Core/Src/stm32l1xx_hal_msp.o + 0x00000000 0x3c ./Core/Src/stm32l1xx_hal_msp.o .text.HAL_SPI_MspDeInit 0x00000000 0x3c ./Core/Src/stm32l1xx_hal_msp.o .debug_macro 0x00000000 0xacc ./Core/Src/stm32l1xx_hal_msp.o @@ -791,8 +799,16 @@ Discarded input sections 0x00000000 0x120 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .text.HAL_ADC_Stop_DMA 0x00000000 0xa2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .text.HAL_ADC_IRQHandler + 0x00000000 0x1ee ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .text.HAL_ADC_ConvCpltCallback + 0x00000000 0x12 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .text.HAL_ADC_ConvHalfCpltCallback 0x00000000 0x12 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .text.HAL_ADC_LevelOutOfWindowCallback + 0x00000000 0x12 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .text.HAL_ADC_ErrorCallback + 0x00000000 0x12 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .text.HAL_ADC_AnalogWDGConfig 0x00000000 0xb8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .text.HAL_ADC_GetState @@ -890,8 +906,17 @@ Discarded input sections 0x00000000 0x94 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .text.HAL_ADCEx_InjectedGetValue 0x00000000 0x5c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .text.HAL_ADCEx_InjectedConvCpltCallback + 0x00000000 0x12 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .text.HAL_ADCEx_InjectedConfigChannel 0x00000000 0x394 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_info 0x00000000 0x909 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_abbrev 0x00000000 0x26c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_aranges + 0x00000000 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_rnglists + 0x00000000 0x43 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x1e5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .debug_macro 0x00000000 0x10f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o @@ -927,6 +952,12 @@ Discarded input sections .debug_macro 0x00000000 0x225 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .debug_macro 0x00000000 0x170 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .debug_macro 0x00000000 0x492 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_line 0x00000000 0xa8b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_str 0x00000000 0x861b3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .comment 0x00000000 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .debug_frame 0x00000000 0x140 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + .ARM.attributes + 0x00000000 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o @@ -965,6 +996,8 @@ Discarded input sections .text 0x00000000 0x0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .data 0x00000000 0x0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .bss 0x00000000 0x0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .text.__NVIC_EnableIRQ + 0x00000000 0x38 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.__NVIC_DisableIRQ 0x00000000 0x48 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.__NVIC_GetPendingIRQ @@ -981,6 +1014,8 @@ Discarded input sections 0x00000000 0x6c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.__NVIC_SystemReset 0x00000000 0x2c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .text.HAL_NVIC_EnableIRQ + 0x00000000 0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.HAL_NVIC_DisableIRQ 0x00000000 0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .text.HAL_NVIC_SystemReset @@ -2589,12 +2624,24 @@ Discarded input sections .debug_frame 0x00000000 0x30 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldf3.o) .ARM.attributes 0x00000000 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldf3.o) + .text 0x00000000 0x168 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) + .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) + .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) + .debug_frame 0x00000000 0x24 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) + .ARM.attributes + 0x00000000 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_mulsf3.o) .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubdf3.o) .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubdf3.o) .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) + .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubsf3.o) + .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubsf3.o) + .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivsf3.o) + .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivsf3.o) + .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunssfsi.o) + .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunssfsi.o) .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) .bss 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) .data 0x00000000 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) @@ -2680,7 +2727,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x08000000 g_pfnVectors 0x0800013c . = ALIGN (0x4) -.text 0x08000140 0x3c58 +.text 0x08000140 0x3f4c 0x08000140 . = ALIGN (0x4) *(.text) .text 0x08000140 0x40 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o @@ -2708,387 +2755,389 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .text 0x0800091c 0x40 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) 0x0800091c __fixunsdfsi 0x0800091c __aeabi_d2uiz - .text 0x0800095c 0x30 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) - 0x0800095c __aeabi_uldivmod - .text 0x0800098c 0x300 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) - 0x0800098c __udivmoddi4 - .text 0x08000c8c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_dvmd_tls.o) - 0x08000c8c __aeabi_ldiv0 - 0x08000c8c __aeabi_idiv0 + .text 0x0800095c 0x21c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubsf3.o) + 0x0800095c __aeabi_frsub + 0x08000964 __aeabi_fsub + 0x08000964 __subsf3 + 0x08000968 __aeabi_fadd + 0x08000968 __addsf3 + 0x08000ac8 __aeabi_ui2f + 0x08000ac8 __floatunsisf + 0x08000ad0 __floatsisf + 0x08000ad0 __aeabi_i2f + 0x08000aec __aeabi_ul2f + 0x08000aec __floatundisf + 0x08000afc __aeabi_l2f + 0x08000afc __floatdisf + .text 0x08000b78 0x2a0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivsf3.o) + 0x08000b78 __mulsf3 + 0x08000b78 __aeabi_fmul + 0x08000ce0 __divsf3 + 0x08000ce0 __aeabi_fdiv + .text 0x08000e18 0x40 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunssfsi.o) + 0x08000e18 __aeabi_f2uiz + 0x08000e18 __fixunssfsi + .text 0x08000e58 0x30 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) + 0x08000e58 __aeabi_uldivmod + .text 0x08000e88 0x300 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) + 0x08000e88 __udivmoddi4 + .text 0x08001188 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_dvmd_tls.o) + 0x08001188 __aeabi_ldiv0 + 0x08001188 __aeabi_idiv0 *(.text*) .text.affiche_nombre - 0x08000c90 0x158 ./Core/Src/main.o - 0x08000c90 affiche_nombre - .text.main 0x08000de8 0xa4 ./Core/Src/main.o - 0x08000de8 main + 0x0800118c 0x158 ./Core/Src/main.o + 0x0800118c affiche_nombre + *fill* 0x080012e4 0x4 + .text.main 0x080012e8 0x144 ./Core/Src/main.o + 0x080012e8 main .text.SystemClock_Config - 0x08000e8c 0x8c ./Core/Src/main.o - 0x08000e8c SystemClock_Config + 0x0800142c 0x8c ./Core/Src/main.o + 0x0800142c SystemClock_Config .text.MX_ADC_Init - 0x08000f18 0xb0 ./Core/Src/main.o + 0x080014b8 0xb0 ./Core/Src/main.o .text.MX_SPI1_Init - 0x08000fc8 0x6c ./Core/Src/main.o + 0x08001568 0x6c ./Core/Src/main.o .text.MX_GPIO_Init - 0x08001034 0x128 ./Core/Src/main.o + 0x080015d4 0x128 ./Core/Src/main.o .text.Error_Handler - 0x0800115c 0xc ./Core/Src/main.o - 0x0800115c Error_Handler + 0x080016fc 0xc ./Core/Src/main.o + 0x080016fc Error_Handler .text.HAL_MspInit - 0x08001168 0x5c ./Core/Src/stm32l1xx_hal_msp.o - 0x08001168 HAL_MspInit + 0x08001708 0x5c ./Core/Src/stm32l1xx_hal_msp.o + 0x08001708 HAL_MspInit .text.HAL_ADC_MspInit - 0x080011c4 0x90 ./Core/Src/stm32l1xx_hal_msp.o - 0x080011c4 HAL_ADC_MspInit + 0x08001764 0x80 ./Core/Src/stm32l1xx_hal_msp.o + 0x08001764 HAL_ADC_MspInit .text.HAL_SPI_MspInit - 0x08001254 0x88 ./Core/Src/stm32l1xx_hal_msp.o - 0x08001254 HAL_SPI_MspInit + 0x080017e4 0x88 ./Core/Src/stm32l1xx_hal_msp.o + 0x080017e4 HAL_SPI_MspInit .text.NMI_Handler - 0x080012dc 0x8 ./Core/Src/stm32l1xx_it.o - 0x080012dc NMI_Handler + 0x0800186c 0x8 ./Core/Src/stm32l1xx_it.o + 0x0800186c NMI_Handler .text.HardFault_Handler - 0x080012e4 0x8 ./Core/Src/stm32l1xx_it.o - 0x080012e4 HardFault_Handler + 0x08001874 0x8 ./Core/Src/stm32l1xx_it.o + 0x08001874 HardFault_Handler .text.MemManage_Handler - 0x080012ec 0x8 ./Core/Src/stm32l1xx_it.o - 0x080012ec MemManage_Handler + 0x0800187c 0x8 ./Core/Src/stm32l1xx_it.o + 0x0800187c MemManage_Handler .text.BusFault_Handler - 0x080012f4 0x8 ./Core/Src/stm32l1xx_it.o - 0x080012f4 BusFault_Handler + 0x08001884 0x8 ./Core/Src/stm32l1xx_it.o + 0x08001884 BusFault_Handler .text.UsageFault_Handler - 0x080012fc 0x8 ./Core/Src/stm32l1xx_it.o - 0x080012fc UsageFault_Handler + 0x0800188c 0x8 ./Core/Src/stm32l1xx_it.o + 0x0800188c UsageFault_Handler .text.SVC_Handler - 0x08001304 0xc ./Core/Src/stm32l1xx_it.o - 0x08001304 SVC_Handler + 0x08001894 0xc ./Core/Src/stm32l1xx_it.o + 0x08001894 SVC_Handler .text.DebugMon_Handler - 0x08001310 0xc ./Core/Src/stm32l1xx_it.o - 0x08001310 DebugMon_Handler + 0x080018a0 0xc ./Core/Src/stm32l1xx_it.o + 0x080018a0 DebugMon_Handler .text.PendSV_Handler - 0x0800131c 0xc ./Core/Src/stm32l1xx_it.o - 0x0800131c PendSV_Handler + 0x080018ac 0xc ./Core/Src/stm32l1xx_it.o + 0x080018ac PendSV_Handler .text.SysTick_Handler - 0x08001328 0xc ./Core/Src/stm32l1xx_it.o - 0x08001328 SysTick_Handler - .text.ADC1_IRQHandler - 0x08001334 0x14 ./Core/Src/stm32l1xx_it.o - 0x08001334 ADC1_IRQHandler + 0x080018b8 0xc ./Core/Src/stm32l1xx_it.o + 0x080018b8 SysTick_Handler .text.SystemInit - 0x08001348 0xc ./Core/Src/system_stm32l1xx.o - 0x08001348 SystemInit + 0x080018c4 0xc ./Core/Src/system_stm32l1xx.o + 0x080018c4 SystemInit .text.Reset_Handler - 0x08001354 0x48 ./Core/Startup/startup_stm32l152retx.o - 0x08001354 Reset_Handler + 0x080018d0 0x48 ./Core/Startup/startup_stm32l152retx.o + 0x080018d0 Reset_Handler .text.Default_Handler - 0x0800139c 0x2 ./Core/Startup/startup_stm32l152retx.o - 0x0800139c DMA2_Channel3_IRQHandler - 0x0800139c EXTI2_IRQHandler - 0x0800139c COMP_ACQ_IRQHandler - 0x0800139c TIM10_IRQHandler - 0x0800139c USB_HP_IRQHandler - 0x0800139c TIM6_IRQHandler - 0x0800139c PVD_IRQHandler - 0x0800139c EXTI3_IRQHandler - 0x0800139c EXTI0_IRQHandler - 0x0800139c I2C2_EV_IRQHandler - 0x0800139c SPI1_IRQHandler - 0x0800139c USB_FS_WKUP_IRQHandler - 0x0800139c DMA2_Channel2_IRQHandler - 0x0800139c DMA1_Channel4_IRQHandler - 0x0800139c USART3_IRQHandler - 0x0800139c DMA1_Channel7_IRQHandler - 0x0800139c LCD_IRQHandler - 0x0800139c UART5_IRQHandler - 0x0800139c TIM4_IRQHandler - 0x0800139c DMA2_Channel1_IRQHandler - 0x0800139c I2C1_EV_IRQHandler - 0x0800139c DMA1_Channel6_IRQHandler - 0x0800139c UART4_IRQHandler - 0x0800139c DMA2_Channel4_IRQHandler - 0x0800139c TIM3_IRQHandler - 0x0800139c RCC_IRQHandler - 0x0800139c DMA1_Channel1_IRQHandler - 0x0800139c Default_Handler - 0x0800139c EXTI15_10_IRQHandler - 0x0800139c TIM7_IRQHandler - 0x0800139c TIM5_IRQHandler - 0x0800139c EXTI9_5_IRQHandler - 0x0800139c TIM9_IRQHandler - 0x0800139c TAMPER_STAMP_IRQHandler - 0x0800139c RTC_WKUP_IRQHandler - 0x0800139c SPI2_IRQHandler - 0x0800139c DMA2_Channel5_IRQHandler - 0x0800139c DMA1_Channel5_IRQHandler - 0x0800139c USB_LP_IRQHandler - 0x0800139c EXTI4_IRQHandler - 0x0800139c DMA1_Channel3_IRQHandler - 0x0800139c COMP_IRQHandler - 0x0800139c WWDG_IRQHandler - 0x0800139c TIM2_IRQHandler - 0x0800139c DAC_IRQHandler - 0x0800139c EXTI1_IRQHandler - 0x0800139c TIM11_IRQHandler - 0x0800139c USART2_IRQHandler - 0x0800139c I2C2_ER_IRQHandler - 0x0800139c DMA1_Channel2_IRQHandler - 0x0800139c FLASH_IRQHandler - 0x0800139c USART1_IRQHandler - 0x0800139c SPI3_IRQHandler - 0x0800139c I2C1_ER_IRQHandler - 0x0800139c RTC_Alarm_IRQHandler + 0x08001918 0x2 ./Core/Startup/startup_stm32l152retx.o + 0x08001918 DMA2_Channel3_IRQHandler + 0x08001918 EXTI2_IRQHandler + 0x08001918 COMP_ACQ_IRQHandler + 0x08001918 TIM10_IRQHandler + 0x08001918 USB_HP_IRQHandler + 0x08001918 TIM6_IRQHandler + 0x08001918 PVD_IRQHandler + 0x08001918 EXTI3_IRQHandler + 0x08001918 EXTI0_IRQHandler + 0x08001918 I2C2_EV_IRQHandler + 0x08001918 SPI1_IRQHandler + 0x08001918 USB_FS_WKUP_IRQHandler + 0x08001918 DMA2_Channel2_IRQHandler + 0x08001918 DMA1_Channel4_IRQHandler + 0x08001918 ADC1_IRQHandler + 0x08001918 USART3_IRQHandler + 0x08001918 DMA1_Channel7_IRQHandler + 0x08001918 LCD_IRQHandler + 0x08001918 UART5_IRQHandler + 0x08001918 TIM4_IRQHandler + 0x08001918 DMA2_Channel1_IRQHandler + 0x08001918 I2C1_EV_IRQHandler + 0x08001918 DMA1_Channel6_IRQHandler + 0x08001918 UART4_IRQHandler + 0x08001918 DMA2_Channel4_IRQHandler + 0x08001918 TIM3_IRQHandler + 0x08001918 RCC_IRQHandler + 0x08001918 DMA1_Channel1_IRQHandler + 0x08001918 Default_Handler + 0x08001918 EXTI15_10_IRQHandler + 0x08001918 TIM7_IRQHandler + 0x08001918 TIM5_IRQHandler + 0x08001918 EXTI9_5_IRQHandler + 0x08001918 TIM9_IRQHandler + 0x08001918 TAMPER_STAMP_IRQHandler + 0x08001918 RTC_WKUP_IRQHandler + 0x08001918 SPI2_IRQHandler + 0x08001918 DMA2_Channel5_IRQHandler + 0x08001918 DMA1_Channel5_IRQHandler + 0x08001918 USB_LP_IRQHandler + 0x08001918 EXTI4_IRQHandler + 0x08001918 DMA1_Channel3_IRQHandler + 0x08001918 COMP_IRQHandler + 0x08001918 WWDG_IRQHandler + 0x08001918 TIM2_IRQHandler + 0x08001918 DAC_IRQHandler + 0x08001918 EXTI1_IRQHandler + 0x08001918 TIM11_IRQHandler + 0x08001918 USART2_IRQHandler + 0x08001918 I2C2_ER_IRQHandler + 0x08001918 DMA1_Channel2_IRQHandler + 0x08001918 FLASH_IRQHandler + 0x08001918 USART1_IRQHandler + 0x08001918 SPI3_IRQHandler + 0x08001918 I2C1_ER_IRQHandler + 0x08001918 RTC_Alarm_IRQHandler .text.MAX7219_Init - 0x0800139e 0x2a ./Drivers/7Seg_MAX7219/max7219.o - 0x0800139e MAX7219_Init + 0x0800191a 0x2a ./Drivers/7Seg_MAX7219/max7219.o + 0x0800191a MAX7219_Init .text.MAX7219_ShutdownStop - 0x080013c8 0x10 ./Drivers/7Seg_MAX7219/max7219.o - 0x080013c8 MAX7219_ShutdownStop + 0x08001944 0x10 ./Drivers/7Seg_MAX7219/max7219.o + 0x08001944 MAX7219_ShutdownStop .text.MAX7219_DisplayTestStop - 0x080013d8 0x10 ./Drivers/7Seg_MAX7219/max7219.o - 0x080013d8 MAX7219_DisplayTestStop + 0x08001954 0x10 ./Drivers/7Seg_MAX7219/max7219.o + 0x08001954 MAX7219_DisplayTestStop .text.MAX7219_SetBrightness - 0x080013e8 0x24 ./Drivers/7Seg_MAX7219/max7219.o - 0x080013e8 MAX7219_SetBrightness + 0x08001964 0x24 ./Drivers/7Seg_MAX7219/max7219.o + 0x08001964 MAX7219_SetBrightness .text.MAX7219_Clear - 0x0800140c 0x2c ./Drivers/7Seg_MAX7219/max7219.o - 0x0800140c MAX7219_Clear + 0x08001988 0x2c ./Drivers/7Seg_MAX7219/max7219.o + 0x08001988 MAX7219_Clear .text.MAX7219_Write - 0x08001438 0x3c ./Drivers/7Seg_MAX7219/max7219.o - 0x08001438 MAX7219_Write + 0x080019b4 0x3c ./Drivers/7Seg_MAX7219/max7219.o + 0x080019b4 MAX7219_Write .text.MAX7219_SendByte - 0x08001474 0x24 ./Drivers/7Seg_MAX7219/max7219.o + 0x080019f0 0x24 ./Drivers/7Seg_MAX7219/max7219.o .text.HAL_Init - 0x08001498 0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - 0x08001498 HAL_Init + 0x08001a14 0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x08001a14 HAL_Init .text.HAL_InitTick - 0x080014c8 0x74 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - 0x080014c8 HAL_InitTick + 0x08001a44 0x74 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x08001a44 HAL_InitTick .text.HAL_IncTick - 0x0800153c 0x24 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - 0x0800153c HAL_IncTick + 0x08001ab8 0x24 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x08001ab8 HAL_IncTick .text.HAL_GetTick - 0x08001560 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - 0x08001560 HAL_GetTick + 0x08001adc 0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x08001adc HAL_GetTick .text.HAL_Delay - 0x08001574 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - 0x08001574 HAL_Delay + 0x08001af0 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x08001af0 HAL_Delay .text.HAL_ADC_Init - 0x080015b8 0x28c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - 0x080015b8 HAL_ADC_Init + 0x08001b34 0x28c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + 0x08001b34 HAL_ADC_Init .text.HAL_ADC_Start - 0x08001844 0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - 0x08001844 HAL_ADC_Start + 0x08001dc0 0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + 0x08001dc0 HAL_ADC_Start .text.HAL_ADC_Stop - 0x08001904 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - 0x08001904 HAL_ADC_Stop + 0x08001e80 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + 0x08001e80 HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x0800195c 0x120 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.rodata.AHBPrescTable - 0x08003da4 0x10 ./Core/Src/system_stm32l1xx.o - 0x08003da4 AHBPrescTable - .rodata.Rcmd1 0x08003db4 0x3b ./Drivers/TFT_ST7735/fonc_tft.o - *fill* 0x08003def 0x1 + 0x08004098 0x10 ./Core/Src/system_stm32l1xx.o + 0x08004098 AHBPrescTable + .rodata.Rcmd1 0x080040a8 0x3b ./Drivers/TFT_ST7735/fonc_tft.o + *fill* 0x080040e3 0x1 .rodata.Rcmd2red - 0x08003df0 0xd ./Drivers/TFT_ST7735/fonc_tft.o - *fill* 0x08003dfd 0x3 - .rodata.Rcmd3 0x08003e00 0x2b ./Drivers/TFT_ST7735/fonc_tft.o - *fill* 0x08003e2b 0x1 + 0x080040e4 0xd ./Drivers/TFT_ST7735/fonc_tft.o + *fill* 0x080040f1 0x3 + .rodata.Rcmd3 0x080040f4 0x2b ./Drivers/TFT_ST7735/fonc_tft.o + *fill* 0x0800411f 0x1 .rodata.tab_font - 0x08003e2c 0x4fb ./Drivers/TFT_ST7735/fonc_tft.o - *fill* 0x08004327 0x1 + 0x08004120 0x4fb ./Drivers/TFT_ST7735/fonc_tft.o + *fill* 0x0800461b 0x1 .rodata.ALL_IS_mono_120 - 0x08004328 0x2d0 ./Drivers/TFT_ST7735/fonc_tft.o - 0x08004328 ALL_IS_mono_120 - 0x080045f8 . = ALIGN (0x4) + 0x0800461c 0x2d0 ./Drivers/TFT_ST7735/fonc_tft.o + 0x0800461c ALL_IS_mono_120 + 0x080048ec . = ALIGN (0x4) -.ARM.extab 0x080045f8 0x0 - 0x080045f8 . = ALIGN (0x4) +.ARM.extab 0x080048ec 0x0 + 0x080048ec . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x080045f8 . = ALIGN (0x4) + 0x080048ec . = ALIGN (0x4) -.ARM 0x080045f8 0x8 - 0x080045f8 . = ALIGN (0x4) - 0x080045f8 __exidx_start = . +.ARM 0x080048ec 0x8 + 0x080048ec . = ALIGN (0x4) + 0x080048ec __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x080045f8 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) - 0x08004600 __exidx_end = . - 0x08004600 . = ALIGN (0x4) + .ARM.exidx 0x080048ec 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) + 0x080048f4 __exidx_end = . + 0x080048f4 . = ALIGN (0x4) -.preinit_array 0x08004600 0x0 - 0x08004600 . = ALIGN (0x4) - 0x08004600 PROVIDE (__preinit_array_start = .) +.preinit_array 0x080048f4 0x0 + 0x080048f4 . = ALIGN (0x4) + 0x080048f4 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08004600 PROVIDE (__preinit_array_end = .) - 0x08004600 . = ALIGN (0x4) + 0x080048f4 PROVIDE (__preinit_array_end = .) + 0x080048f4 . = ALIGN (0x4) -.init_array 0x08004600 0x4 - 0x08004600 . = ALIGN (0x4) - 0x08004600 PROVIDE (__init_array_start = .) +.init_array 0x080048f4 0x4 + 0x080048f4 . = ALIGN (0x4) + 0x080048f4 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08004600 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o - 0x08004604 PROVIDE (__init_array_end = .) - 0x08004604 . = ALIGN (0x4) + .init_array 0x080048f4 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o + 0x080048f8 PROVIDE (__init_array_end = .) + 0x080048f8 . = ALIGN (0x4) -.fini_array 0x08004604 0x4 - 0x08004604 . = ALIGN (0x4) +.fini_array 0x080048f8 0x4 + 0x080048f8 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08004604 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o + .fini_array 0x080048f8 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08004608 . = ALIGN (0x4) - 0x08004608 _sidata = LOADADDR (.data) + 0x080048fc . = ALIGN (0x4) + 0x080048fc _sidata = LOADADDR (.data) -.rel.dyn 0x08004608 0x0 - .rel.iplt 0x08004608 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x080048fc 0x0 + .rel.iplt 0x080048fc 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0xc load address 0x08004608 +.data 0x20000000 0xc load address 0x080048fc 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3107,11 +3156,11 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x2000000c . = ALIGN (0x4) 0x2000000c _edata = . -.igot.plt 0x2000000c 0x0 load address 0x08004614 +.igot.plt 0x2000000c 0x0 load address 0x08004908 .igot.plt 0x2000000c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o 0x2000000c . = ALIGN (0x4) -.bss 0x2000000c 0xcc load address 0x08004614 +.bss 0x2000000c 0xcc load address 0x08004908 0x2000000c _sbss = . 0x2000000c __bss_start__ = _sbss *(.bss) @@ -3129,7 +3178,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x200000d8 __bss_end__ = _ebss ._user_heap_stack - 0x200000d8 0x600 load address 0x08004614 + 0x200000d8 0x600 load address 0x08004908 0x200000d8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x200000d8 PROVIDE (_end = .) @@ -3168,135 +3217,133 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .ARM.attributes 0x00000179 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .ARM.attributes - 0x000001a6 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + 0x000001a6 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .ARM.attributes - 0x000001d3 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x000001d3 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o .ARM.attributes - 0x00000200 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + 0x00000200 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .ARM.attributes - 0x0000022d 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x0000022d 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o .ARM.attributes - 0x0000025a 0x2d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + 0x0000025a 0x2d ./Drivers/TFT_ST7735/fonc_tft.o .ARM.attributes - 0x00000287 0x2d ./Drivers/TFT_ST7735/fonc_tft.o + 0x00000287 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o) .ARM.attributes - 0x000002b4 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o) + 0x000002b4 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o) .ARM.attributes - 0x000002e1 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o) + 0x000002e1 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubdf3.o) .ARM.attributes - 0x0000030e 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubdf3.o) + 0x000002fe 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) .ARM.attributes - 0x0000032b 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) + 0x0000031b 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) .ARM.attributes - 0x00000348 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) + 0x00000338 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_addsubsf3.o) .ARM.attributes - 0x00000365 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) + 0x00000355 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivsf3.o) .ARM.attributes - 0x00000382 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) + 0x00000372 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunssfsi.o) .ARM.attributes - 0x000003af 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_dvmd_tls.o) + 0x0000038f 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) .ARM.attributes - 0x000003cc 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o + 0x000003ac 0x2d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) + .ARM.attributes + 0x000003d9 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_dvmd_tls.o) + .ARM.attributes + 0x000003f6 0x1d /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o OUTPUT(TP5_TEMP.elf elf32-littlearm) LOAD linker stubs LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libm.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a -.debug_info 0x00000000 0x8821 - .debug_info 0x00000000 0xfbe ./Core/Src/main.o - .debug_info 0x00000fbe 0xd5b ./Core/Src/stm32l1xx_hal_msp.o - .debug_info 0x00001d19 0x62a ./Core/Src/stm32l1xx_it.o - .debug_info 0x00002343 0x27c ./Core/Src/system_stm32l1xx.o - .debug_info 0x000025bf 0x30 ./Core/Startup/startup_stm32l152retx.o - .debug_info 0x000025ef 0x80e ./Drivers/7Seg_MAX7219/max7219.o - .debug_info 0x00002dfd 0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_info 0x000034ec 0xe77 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_info 0x00004363 0x909 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_info 0x00004c6c 0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_info 0x00005951 0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_info 0x00005f03 0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_info 0x0000689e 0x14d9 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_info 0x00007d77 0xaaa ./Drivers/TFT_ST7735/fonc_tft.o +.debug_info 0x00000000 0x7879 + .debug_info 0x00000000 0x101a ./Core/Src/main.o + .debug_info 0x0000101a 0xb77 ./Core/Src/stm32l1xx_hal_msp.o + .debug_info 0x00001b91 0x113 ./Core/Src/stm32l1xx_it.o + .debug_info 0x00001ca4 0x27c ./Core/Src/system_stm32l1xx.o + .debug_info 0x00001f20 0x30 ./Core/Startup/startup_stm32l152retx.o + .debug_info 0x00001f50 0x80e ./Drivers/7Seg_MAX7219/max7219.o + .debug_info 0x0000275e 0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_info 0x00002e4d 0xe77 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .debug_info 0x00003cc4 0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_info 0x000049a9 0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_info 0x00004f5b 0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_info 0x000058f6 0x14d9 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + .debug_info 0x00006dcf 0xaaa ./Drivers/TFT_ST7735/fonc_tft.o -.debug_abbrev 0x00000000 0x1cef +.debug_abbrev 0x00000000 0x1970 .debug_abbrev 0x00000000 0x2d0 ./Core/Src/main.o - .debug_abbrev 0x000002d0 0x1b2 ./Core/Src/stm32l1xx_hal_msp.o - .debug_abbrev 0x00000482 0x180 ./Core/Src/stm32l1xx_it.o - .debug_abbrev 0x00000602 0x11c ./Core/Src/system_stm32l1xx.o - .debug_abbrev 0x0000071e 0x24 ./Core/Startup/startup_stm32l152retx.o - .debug_abbrev 0x00000742 0x1e9 ./Drivers/7Seg_MAX7219/max7219.o - .debug_abbrev 0x0000092b 0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_abbrev 0x00000ba0 0x296 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_abbrev 0x00000e36 0x26c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_abbrev 0x000010a2 0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_abbrev 0x000013be 0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_abbrev 0x00001592 0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_abbrev 0x0000184a 0x27a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_abbrev 0x00001ac4 0x22b ./Drivers/TFT_ST7735/fonc_tft.o + .debug_abbrev 0x000002d0 0x1ac ./Core/Src/stm32l1xx_hal_msp.o + .debug_abbrev 0x0000047c 0x73 ./Core/Src/stm32l1xx_it.o + .debug_abbrev 0x000004ef 0x11c ./Core/Src/system_stm32l1xx.o + .debug_abbrev 0x0000060b 0x24 ./Core/Startup/startup_stm32l152retx.o + .debug_abbrev 0x0000062f 0x1e9 ./Drivers/7Seg_MAX7219/max7219.o + .debug_abbrev 0x00000818 0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_abbrev 0x00000a8d 0x296 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .debug_abbrev 0x00000d23 0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_abbrev 0x0000103f 0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_abbrev 0x00001213 0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_abbrev 0x000014cb 0x27a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + .debug_abbrev 0x00001745 0x22b ./Drivers/TFT_ST7735/fonc_tft.o -.debug_aranges 0x00000000 0x840 +.debug_aranges 0x00000000 0x7e0 .debug_aranges 0x00000000 0x50 ./Core/Src/main.o .debug_aranges 0x00000050 0x40 ./Core/Src/stm32l1xx_hal_msp.o .debug_aranges - 0x00000090 0x68 ./Core/Src/stm32l1xx_it.o + 0x00000090 0x60 ./Core/Src/stm32l1xx_it.o .debug_aranges - 0x000000f8 0x28 ./Core/Src/system_stm32l1xx.o + 0x000000f0 0x28 ./Core/Src/system_stm32l1xx.o .debug_aranges - 0x00000120 0x28 ./Core/Startup/startup_stm32l152retx.o + 0x00000118 0x28 ./Core/Startup/startup_stm32l152retx.o .debug_aranges - 0x00000148 0x78 ./Drivers/7Seg_MAX7219/max7219.o + 0x00000140 0x78 ./Drivers/7Seg_MAX7219/max7219.o .debug_aranges - 0x000001c0 0xe0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x000001b8 0xe0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .debug_aranges - 0x000002a0 0xf0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + 0x00000298 0xf0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .debug_aranges - 0x00000390 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + 0x00000388 0x128 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .debug_aranges - 0x000003e8 0x128 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x000004b0 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o .debug_aranges - 0x00000510 0x58 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + 0x00000508 0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .debug_aranges - 0x00000568 0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x00000598 0x1d0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o .debug_aranges - 0x000005f8 0x1d0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_aranges - 0x000007c8 0x78 ./Drivers/TFT_ST7735/fonc_tft.o + 0x00000768 0x78 ./Drivers/TFT_ST7735/fonc_tft.o .debug_rnglists - 0x00000000 0x62d + 0x00000000 0x5e4 .debug_rnglists 0x00000000 0x3c ./Core/Src/main.o .debug_rnglists 0x0000003c 0x2d ./Core/Src/stm32l1xx_hal_msp.o .debug_rnglists - 0x00000069 0x49 ./Core/Src/stm32l1xx_it.o + 0x00000069 0x43 ./Core/Src/stm32l1xx_it.o .debug_rnglists - 0x000000b2 0x1a ./Core/Src/system_stm32l1xx.o + 0x000000ac 0x1a ./Core/Src/system_stm32l1xx.o .debug_rnglists - 0x000000cc 0x19 ./Core/Startup/startup_stm32l152retx.o + 0x000000c6 0x19 ./Core/Startup/startup_stm32l152retx.o .debug_rnglists - 0x000000e5 0x55 ./Drivers/7Seg_MAX7219/max7219.o + 0x000000df 0x55 ./Drivers/7Seg_MAX7219/max7219.o .debug_rnglists - 0x0000013a 0xa3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + 0x00000134 0xa3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .debug_rnglists - 0x000001dd 0xbd ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + 0x000001d7 0xbd ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o .debug_rnglists - 0x0000029a 0x43 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o + 0x00000294 0xd9 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .debug_rnglists - 0x000002dd 0xd9 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + 0x0000036d 0x3f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o .debug_rnglists - 0x000003b6 0x3f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + 0x000003ac 0x6d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .debug_rnglists - 0x000003f5 0x6d ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + 0x00000419 0x16f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o .debug_rnglists - 0x00000462 0x16f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_rnglists - 0x000005d1 0x5c ./Drivers/TFT_ST7735/fonc_tft.o + 0x00000588 0x5c ./Drivers/TFT_ST7735/fonc_tft.o -.debug_macro 0x00000000 0x15968 +.debug_macro 0x00000000 0x15783 .debug_macro 0x00000000 0x1cb ./Core/Src/main.o .debug_macro 0x000001cb 0xacc ./Core/Src/main.o .debug_macro 0x00000c97 0x10f ./Core/Src/main.o @@ -3341,45 +3388,42 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_macro 0x0001482c 0x1ec ./Drivers/7Seg_MAX7219/max7219.o .debug_macro 0x00014a18 0x1d3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .debug_macro 0x00014beb 0x1cc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_macro 0x00014db7 0x1e5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_macro 0x00014f9c 0x1af ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_macro 0x0001514b 0x1b6 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_macro 0x00015301 0x1c1 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_macro 0x000154c2 0x1be ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_macro 0x00015680 0x2e8 ./Drivers/TFT_ST7735/fonc_tft.o + .debug_macro 0x00014db7 0x1af ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_macro 0x00014f66 0x1b6 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_macro 0x0001511c 0x1c1 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_macro 0x000152dd 0x1be ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + .debug_macro 0x0001549b 0x2e8 ./Drivers/TFT_ST7735/fonc_tft.o -.debug_line 0x00000000 0x97d4 - .debug_line 0x00000000 0x8ec ./Core/Src/main.o - .debug_line 0x000008ec 0x758 ./Core/Src/stm32l1xx_hal_msp.o - .debug_line 0x00001044 0x787 ./Core/Src/stm32l1xx_it.o - .debug_line 0x000017cb 0x761 ./Core/Src/system_stm32l1xx.o - .debug_line 0x00001f2c 0x79 ./Core/Startup/startup_stm32l152retx.o - .debug_line 0x00001fa5 0x80f ./Drivers/7Seg_MAX7219/max7219.o - .debug_line 0x000027b4 0x98c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_line 0x00003140 0xf61 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_line 0x000040a1 0xa8b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_line 0x00004b2c 0xc5b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_line 0x00005787 0x9d0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_line 0x00006157 0xf4f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_line 0x000070a6 0x1c4b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_line 0x00008cf1 0xae3 ./Drivers/TFT_ST7735/fonc_tft.o +.debug_line 0x00000000 0x8d64 + .debug_line 0x00000000 0x922 ./Core/Src/main.o + .debug_line 0x00000922 0x755 ./Core/Src/stm32l1xx_hal_msp.o + .debug_line 0x00001077 0x76f ./Core/Src/stm32l1xx_it.o + .debug_line 0x000017e6 0x761 ./Core/Src/system_stm32l1xx.o + .debug_line 0x00001f47 0x79 ./Core/Startup/startup_stm32l152retx.o + .debug_line 0x00001fc0 0x80f ./Drivers/7Seg_MAX7219/max7219.o + .debug_line 0x000027cf 0x98c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_line 0x0000315b 0xf61 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .debug_line 0x000040bc 0xc5b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_line 0x00004d17 0x9d0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_line 0x000056e7 0xf4f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_line 0x00006636 0x1c4b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + .debug_line 0x00008281 0xae3 ./Drivers/TFT_ST7735/fonc_tft.o -.debug_str 0x00000000 0x884c8 - .debug_str 0x00000000 0x884c8 ./Core/Src/main.o - 0x864c7 (size before relaxing) - .debug_str 0x000884c8 0x863d2 ./Core/Src/stm32l1xx_hal_msp.o - .debug_str 0x000884c8 0x85daf ./Core/Src/stm32l1xx_it.o - .debug_str 0x000884c8 0x85a11 ./Core/Src/system_stm32l1xx.o - .debug_str 0x000884c8 0x84 ./Core/Startup/startup_stm32l152retx.o - .debug_str 0x000884c8 0x85f6d ./Drivers/7Seg_MAX7219/max7219.o - .debug_str 0x000884c8 0x86139 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_str 0x000884c8 0x861a0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_str 0x000884c8 0x861b3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_str 0x000884c8 0x86245 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_str 0x000884c8 0x85ba4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_str 0x000884c8 0x85ecd ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_str 0x000884c8 0x86333 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_str 0x000884c8 0x863e5 ./Drivers/TFT_ST7735/fonc_tft.o +.debug_str 0x00000000 0x88159 + .debug_str 0x00000000 0x88159 ./Core/Src/main.o + 0x86510 (size before relaxing) + .debug_str 0x00088159 0x8602c ./Core/Src/stm32l1xx_hal_msp.o + .debug_str 0x00088159 0x859c0 ./Core/Src/stm32l1xx_it.o + .debug_str 0x00088159 0x85a11 ./Core/Src/system_stm32l1xx.o + .debug_str 0x00088159 0x84 ./Core/Startup/startup_stm32l152retx.o + .debug_str 0x00088159 0x85f6d ./Drivers/7Seg_MAX7219/max7219.o + .debug_str 0x00088159 0x86139 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o + .debug_str 0x00088159 0x861a0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o + .debug_str 0x00088159 0x86245 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o + .debug_str 0x00088159 0x85ba4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o + .debug_str 0x00088159 0x85ecd ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o + .debug_str 0x00088159 0x86333 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o + .debug_str 0x00088159 0x863e5 ./Drivers/TFT_ST7735/fonc_tft.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/main.o @@ -3390,34 +3434,35 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .comment 0x00000043 0x44 ./Drivers/7Seg_MAX7219/max7219.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o .comment 0x00000043 0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o .comment 0x00000043 0x44 ./Drivers/TFT_ST7735/fonc_tft.o -.debug_frame 0x00000000 0x2174 +.debug_frame 0x00000000 0x20c0 .debug_frame 0x00000000 0xf8 ./Core/Src/main.o .debug_frame 0x000000f8 0xc8 ./Core/Src/stm32l1xx_hal_msp.o - .debug_frame 0x000001c0 0x120 ./Core/Src/stm32l1xx_it.o - .debug_frame 0x000002e0 0x58 ./Core/Src/system_stm32l1xx.o - .debug_frame 0x00000338 0x198 ./Drivers/7Seg_MAX7219/max7219.o - .debug_frame 0x000004d0 0x33c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o - .debug_frame 0x0000080c 0x40c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.o - .debug_frame 0x00000c18 0x140 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc_ex.o - .debug_frame 0x00000d58 0x4e8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o - .debug_frame 0x00001240 0x14c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o - .debug_frame 0x0000138c 0x224 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o - .debug_frame 0x000015b0 0x828 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o - .debug_frame 0x00001dd8 0x1d0 ./Drivers/TFT_ST7735/fonc_tft.o - .debug_frame 0x00001fa8 0x20 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/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_muldivdf3.o) - .debug_frame 0x000020f0 0x24 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_arm_fixunsdfsi.o) - .debug_frame 0x00002114 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_aeabi_uldivmod.o) - .debug_frame 0x00002140 0x34 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/Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o) .debug_line_str 0x00000000 0x68 diff --git a/TP5_TEMP/TP5_TEMP Debug.launch b/TP5_TEMP/TP5_TEMP Debug.launch index c6f2e51..ae9cecc 100644 --- a/TP5_TEMP/TP5_TEMP Debug.launch +++ b/TP5_TEMP/TP5_TEMP Debug.launch @@ -80,5 +80,6 @@ + diff --git a/TP5_TEMP/TP5_TEMP.ioc b/TP5_TEMP/TP5_TEMP.ioc index bcbbff9..7cf4cae 100644 --- a/TP5_TEMP/TP5_TEMP.ioc +++ b/TP5_TEMP/TP5_TEMP.ioc @@ -1,9 +1,9 @@ #MicroXplorer Configuration settings - do not modify -ADC.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_VREFINT -ADC.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag +ADC.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR +ADC.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversionFlag ADC.NbrOfConversionFlag=1 -ADC.Rank-0\#ChannelRegularConversion=1 -ADC.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_4CYCLES +ADC.Rank-1\#ChannelRegularConversion=1 +ADC.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_4CYCLES CAD.formats= CAD.pinconfig= CAD.provider= @@ -23,7 +23,7 @@ Mcu.Package=LQFP64 Mcu.Pin0=PC0 Mcu.Pin1=PC1 Mcu.Pin10=PB7 -Mcu.Pin11=VP_ADC_Vref_Input +Mcu.Pin11=VP_ADC_TempSens_Input Mcu.Pin12=VP_SYS_VS_Systick Mcu.Pin2=PC2 Mcu.Pin3=PC3 @@ -39,7 +39,6 @@ Mcu.UserConstants= Mcu.UserName=STM32L152RETx MxCube.Version=6.14.1 MxDb.Version=DB.6.0.141 -NVIC.ADC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.ForceEnableDMAVector=true @@ -150,8 +149,8 @@ SPI1.Direction=SPI_DIRECTION_2LINES SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate SPI1.Mode=SPI_MODE_MASTER SPI1.VirtualType=VM_MASTER -VP_ADC_Vref_Input.Mode=IN-Vrefint -VP_ADC_Vref_Input.Signal=ADC_Vref_Input +VP_ADC_TempSens_Input.Mode=IN-TempSens +VP_ADC_TempSens_Input.Signal=ADC_TempSens_Input VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick board=custom