From 875d99e14d10e5a5912a1bc7dc47270a5ee8794f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?F=C3=A9lix=20MARQUET?=
 <72651575+BreizhHardware@users.noreply.github.com>
Date: Tue, 1 Jul 2025 11:44:16 +0200
Subject: [PATCH] TP6 Exo 1 P2

---
 TP6_ACCELEROMETRE/Core/Src/main.c             |   20 +-
 TP6_ACCELEROMETRE/Debug/Core/Src/main.cyclo   |   10 +-
 TP6_ACCELEROMETRE/Debug/Core/Src/main.o       |  Bin 738352 -> 739004 bytes
 TP6_ACCELEROMETRE/Debug/Core/Src/main.su      |   10 +-
 TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.elf |  Bin 728928 -> 729164 bytes
 .../Debug/TP6_ACCELEROMETRE.list              | 8593 +++++++++--------
 TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.map |  534 +-
 .../TP6_ACCELEROMETRE Debug.launch            |   14 +-
 8 files changed, 4637 insertions(+), 4544 deletions(-)

diff --git a/TP6_ACCELEROMETRE/Core/Src/main.c b/TP6_ACCELEROMETRE/Core/Src/main.c
index 66e5288..4ed7098 100644
--- a/TP6_ACCELEROMETRE/Core/Src/main.c
+++ b/TP6_ACCELEROMETRE/Core/Src/main.c
@@ -57,6 +57,9 @@ static void MX_I2C1_Init(void);
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
+uint8_t Z_VALUE = 0;
+uint8_t Y_VALUE = 0;
+uint8_t X_VALUE = 0;
 
 /* USER CODE END 0 */
 
@@ -106,7 +109,7 @@ int main(void)
 
   HAL_I2C_Master_Transmit(&hi2c1, 0xD6, data, 2, 100);
   HAL_Delay(100);
-  adresse[0] = 0x2D;
+
 
 
   /* USER CODE END 2 */
@@ -122,6 +125,7 @@ int main(void)
 	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adress, 1, 100);
 	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
 */
+	  adresse[0] = 0x2D;
 	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
 	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
 
@@ -131,6 +135,20 @@ int main(void)
 		  GPIOA -> ODR &= ~(1<<5);
 	  }
 
+	  Z_VALUE = rData[0];
+
+	  adresse[0] = 0x29;
+	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
+	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
+
+	  X_VALUE = rData[0];
+
+	  adresse[0] = 0x2B;
+	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
+	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
+
+	  Y_VALUE = rData[0];
+
 	  HAL_Delay(100);
   }
   /* USER CODE END 3 */
diff --git a/TP6_ACCELEROMETRE/Debug/Core/Src/main.cyclo b/TP6_ACCELEROMETRE/Debug/Core/Src/main.cyclo
index aacf163..11e4e61 100644
--- a/TP6_ACCELEROMETRE/Debug/Core/Src/main.cyclo
+++ b/TP6_ACCELEROMETRE/Debug/Core/Src/main.cyclo
@@ -1,5 +1,5 @@
-../Core/Src/main.c:67:5:main	3
-../Core/Src/main.c:143:6:SystemClock_Config	3
-../Core/Src/main.c:184:13:MX_I2C1_Init	2
-../Core/Src/main.c:218:13:MX_GPIO_Init	1
-../Core/Src/main.c:252:6:Error_Handler	1
+../Core/Src/main.c:70:5:main	3
+../Core/Src/main.c:161:6:SystemClock_Config	3
+../Core/Src/main.c:202:13:MX_I2C1_Init	2
+../Core/Src/main.c:236:13:MX_GPIO_Init	1
+../Core/Src/main.c:270:6:Error_Handler	1
diff --git a/TP6_ACCELEROMETRE/Debug/Core/Src/main.o b/TP6_ACCELEROMETRE/Debug/Core/Src/main.o
index 400da3bb2e3a19b095bcd91b59d1286e5523018c..226aa652954a38858a9632b54b49f33758ce0ad2 100644
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diff --git a/TP6_ACCELEROMETRE/Debug/Core/Src/main.su b/TP6_ACCELEROMETRE/Debug/Core/Src/main.su
index eb659d4..6b85de5 100644
--- a/TP6_ACCELEROMETRE/Debug/Core/Src/main.su
+++ b/TP6_ACCELEROMETRE/Debug/Core/Src/main.su
@@ -1,5 +1,5 @@
-../Core/Src/main.c:67:5:main	32	static
-../Core/Src/main.c:143:6:SystemClock_Config	80	static
-../Core/Src/main.c:184:13:MX_I2C1_Init	8	static
-../Core/Src/main.c:218:13:MX_GPIO_Init	40	static
-../Core/Src/main.c:252:6:Error_Handler	4	static,ignoring_inline_asm
+../Core/Src/main.c:70:5:main	32	static
+../Core/Src/main.c:161:6:SystemClock_Config	80	static
+../Core/Src/main.c:202:13:MX_I2C1_Init	8	static
+../Core/Src/main.c:236:13:MX_GPIO_Init	40	static
+../Core/Src/main.c:270:6:Error_Handler	4	static,ignoring_inline_asm
diff --git a/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.elf b/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.elf
index d3a2f63a3b182af6d5fe23625b0da616cbb97e46..cdb5b7093a6c8e5d86338b25688287d43793b506 100755
GIT binary patch
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diff --git a/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.list b/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.list
index b0e6d65..2a5c555 100644
--- a/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.list
+++ b/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.list
@@ -5,47 +5,47 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   0000013c  08000000  08000000  00001000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         000028f4  0800013c  0800013c  0000113c  2**2
+  1 .text         00002960  0800013c  0800013c  0000113c  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000024  08002a30  08002a30  00003a30  2**2
+  2 .rodata       00000024  08002a9c  08002a9c  00003a9c  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  08002a54  08002a54  0000400c  2**0
+  3 .ARM.extab    00000000  08002ac0  08002ac0  0000400c  2**0
                   CONTENTS, READONLY
-  4 .ARM          00000008  08002a54  08002a54  00003a54  2**2
+  4 .ARM          00000008  08002ac0  08002ac0  00003ac0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  5 .preinit_array 00000000  08002a5c  08002a5c  0000400c  2**0
+  5 .preinit_array 00000000  08002ac8  08002ac8  0000400c  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  08002a5c  08002a5c  00003a5c  2**2
+  6 .init_array   00000004  08002ac8  08002ac8  00003ac8  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  7 .fini_array   00000004  08002a60  08002a60  00003a60  2**2
+  7 .fini_array   00000004  08002acc  08002acc  00003acc  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  8 .data         0000000c  20000000  08002a64  00004000  2**2
+  8 .data         0000000c  20000000  08002ad0  00004000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00000074  2000000c  08002a70  0000400c  2**2
+  9 .bss          00000078  2000000c  08002adc  0000400c  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  20000080  08002a70  00004080  2**0
+ 10 ._user_heap_stack 00000604  20000084  08002adc  00004084  2**0
                   ALLOC
  11 .ARM.attributes 00000029  00000000  00000000  0000400c  2**0
                   CONTENTS, READONLY
- 12 .debug_info   00005e7d  00000000  00000000  00004035  2**0
+ 12 .debug_info   00005eb0  00000000  00000000  00004035  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 0000124c  00000000  00000000  00009eb2  2**0
+ 13 .debug_abbrev 0000124d  00000000  00000000  00009ee5  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 000006b8  00000000  00000000  0000b100  2**3
+ 14 .debug_aranges 000006b8  00000000  00000000  0000b138  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 00000527  00000000  00000000  0000b7b8  2**0
+ 15 .debug_rnglists 00000527  00000000  00000000  0000b7f0  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro  00015119  00000000  00000000  0000bcdf  2**0
+ 16 .debug_macro  00015119  00000000  00000000  0000bd17  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line   000086cf  00000000  00000000  00020df8  2**0
+ 17 .debug_line   000086f1  00000000  00000000  00020e30  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str    00084ad6  00000000  00000000  000294c7  2**0
+ 18 .debug_str    00084aee  00000000  00000000  00029521  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment      00000043  00000000  00000000  000adf9d  2**0
+ 19 .comment      00000043  00000000  00000000  000ae00f  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  00001b4c  00000000  00000000  000adfe0  2**2
+ 20 .debug_frame  00001b4c  00000000  00000000  000ae054  2**2
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 00000071  00000000  00000000  000afb2c  2**0
+ 21 .debug_line_str 00000071  00000000  00000000  000afba0  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
@@ -64,7 +64,7 @@ Disassembly of section .text:
  8000152:	bd10      	pop	{r4, pc}
  8000154:	2000000c 	.word	0x2000000c
  8000158:	00000000 	.word	0x00000000
- 800015c:	08002a18 	.word	0x08002a18
+ 800015c:	08002a84 	.word	0x08002a84
 
 08000160 <frame_dummy>:
  8000160:	b508      	push	{r3, lr}
@@ -76,7 +76,7 @@ Disassembly of section .text:
  800016e:	bd08      	pop	{r3, pc}
  8000170:	00000000 	.word	0x00000000
  8000174:	20000010 	.word	0x20000010
- 8000178:	08002a18 	.word	0x08002a18
+ 8000178:	08002a84 	.word	0x08002a84
 
 0800017c <__aeabi_uldivmod>:
  800017c:	b953      	cbnz	r3, 8000194 <__aeabi_uldivmod+0x18>
@@ -386,23 +386,23 @@ int main(void)
 
   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
   HAL_Init();
- 80004b6:	f000 f9cc 	bl	8000852 <HAL_Init>
+ 80004b6:	f000 fa02 	bl	80008be <HAL_Init>
   /* USER CODE BEGIN Init */
 
   /* USER CODE END Init */
 
   /* Configure the system clock */
   SystemClock_Config();
- 80004ba:	f000 f849 	bl	8000550 <SystemClock_Config>
+ 80004ba:	f000 f87f 	bl	80005bc <SystemClock_Config>
   /* USER CODE BEGIN SysInit */
 
   /* USER CODE END SysInit */
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
- 80004be:	f000 f8bb 	bl	8000638 <MX_GPIO_Init>
+ 80004be:	f000 f8f1 	bl	80006a4 <MX_GPIO_Init>
   MX_I2C1_Init();
- 80004c2:	f000 f88b 	bl	80005dc <MX_I2C1_Init>
+ 80004c2:	f000 f8c1 	bl	8000648 <MX_I2C1_Init>
 
 /* WHO_AM_I
   uint8_t adress[1] = {0x0F};
@@ -432,44 +432,44 @@ int main(void)
  80004de:	9300      	str	r3, [sp, #0]
  80004e0:	2302      	movs	r3, #2
  80004e2:	21d6      	movs	r1, #214	@ 0xd6
- 80004e4:	4818      	ldr	r0, [pc, #96]	@ (8000548 <main+0x98>)
- 80004e6:	f000 fe15 	bl	8001114 <HAL_I2C_Master_Transmit>
+ 80004e4:	4830      	ldr	r0, [pc, #192]	@ (80005a8 <main+0xf8>)
+ 80004e6:	f000 fe4b 	bl	8001180 <HAL_I2C_Master_Transmit>
   HAL_Delay(100);
  80004ea:	2064      	movs	r0, #100	@ 0x64
- 80004ec:	f000 fa20 	bl	8000930 <HAL_Delay>
-  adresse[0] = 0x2D;
- 80004f0:	232d      	movs	r3, #45	@ 0x2d
- 80004f2:	733b      	strb	r3, [r7, #12]
+ 80004ec:	f000 fa56 	bl	800099c <HAL_Delay>
     /* USER CODE BEGIN 3 */
 /* WHO_AM_I
 	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adress, 1, 100);
 	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
 */
+	  adresse[0] = 0x2D;
+ 80004f0:	232d      	movs	r3, #45	@ 0x2d
+ 80004f2:	733b      	strb	r3, [r7, #12]
 	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
  80004f4:	f107 020c 	add.w	r2, r7, #12
  80004f8:	2364      	movs	r3, #100	@ 0x64
  80004fa:	9300      	str	r3, [sp, #0]
  80004fc:	2301      	movs	r3, #1
  80004fe:	21d6      	movs	r1, #214	@ 0xd6
- 8000500:	4811      	ldr	r0, [pc, #68]	@ (8000548 <main+0x98>)
- 8000502:	f000 fe07 	bl	8001114 <HAL_I2C_Master_Transmit>
+ 8000500:	4829      	ldr	r0, [pc, #164]	@ (80005a8 <main+0xf8>)
+ 8000502:	f000 fe3d 	bl	8001180 <HAL_I2C_Master_Transmit>
 	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
  8000506:	f107 0208 	add.w	r2, r7, #8
  800050a:	2364      	movs	r3, #100	@ 0x64
  800050c:	9300      	str	r3, [sp, #0]
  800050e:	2301      	movs	r3, #1
  8000510:	21d6      	movs	r1, #214	@ 0xd6
- 8000512:	480d      	ldr	r0, [pc, #52]	@ (8000548 <main+0x98>)
- 8000514:	f000 fefc 	bl	8001310 <HAL_I2C_Master_Receive>
+ 8000512:	4825      	ldr	r0, [pc, #148]	@ (80005a8 <main+0xf8>)
+ 8000514:	f000 ff32 	bl	800137c <HAL_I2C_Master_Receive>
 
 	  if((rData[0]>=0) && (rData[0]<=128)){
  8000518:	7a3b      	ldrb	r3, [r7, #8]
  800051a:	2b80      	cmp	r3, #128	@ 0x80
  800051c:	d806      	bhi.n	800052c <main+0x7c>
 		  GPIOA -> ODR |= (1<<5);
- 800051e:	4b0b      	ldr	r3, [pc, #44]	@ (800054c <main+0x9c>)
+ 800051e:	4b23      	ldr	r3, [pc, #140]	@ (80005ac <main+0xfc>)
  8000520:	695b      	ldr	r3, [r3, #20]
- 8000522:	4a0a      	ldr	r2, [pc, #40]	@ (800054c <main+0x9c>)
+ 8000522:	4a22      	ldr	r2, [pc, #136]	@ (80005ac <main+0xfc>)
  8000524:	f043 0320 	orr.w	r3, r3, #32
  8000528:	6153      	str	r3, [r2, #20]
  800052a:	e008      	b.n	800053e <main+0x8e>
@@ -478,6515 +478,6572 @@ int main(void)
  800052e:	2b80      	cmp	r3, #128	@ 0x80
  8000530:	d905      	bls.n	800053e <main+0x8e>
 		  GPIOA -> ODR &= ~(1<<5);
- 8000532:	4b06      	ldr	r3, [pc, #24]	@ (800054c <main+0x9c>)
+ 8000532:	4b1e      	ldr	r3, [pc, #120]	@ (80005ac <main+0xfc>)
  8000534:	695b      	ldr	r3, [r3, #20]
- 8000536:	4a05      	ldr	r2, [pc, #20]	@ (800054c <main+0x9c>)
+ 8000536:	4a1d      	ldr	r2, [pc, #116]	@ (80005ac <main+0xfc>)
  8000538:	f023 0320 	bic.w	r3, r3, #32
  800053c:	6153      	str	r3, [r2, #20]
 	  }
 
-	  HAL_Delay(100);
- 800053e:	2064      	movs	r0, #100	@ 0x64
- 8000540:	f000 f9f6 	bl	8000930 <HAL_Delay>
-	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
- 8000544:	e7d6      	b.n	80004f4 <main+0x44>
- 8000546:	bf00      	nop
- 8000548:	20000028 	.word	0x20000028
- 800054c:	40020000 	.word	0x40020000
+	  Z_VALUE = rData[0];
+ 800053e:	7a3a      	ldrb	r2, [r7, #8]
+ 8000540:	4b1b      	ldr	r3, [pc, #108]	@ (80005b0 <main+0x100>)
+ 8000542:	701a      	strb	r2, [r3, #0]
 
-08000550 <SystemClock_Config>:
+	  adresse[0] = 0x29;
+ 8000544:	2329      	movs	r3, #41	@ 0x29
+ 8000546:	733b      	strb	r3, [r7, #12]
+	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
+ 8000548:	f107 020c 	add.w	r2, r7, #12
+ 800054c:	2364      	movs	r3, #100	@ 0x64
+ 800054e:	9300      	str	r3, [sp, #0]
+ 8000550:	2301      	movs	r3, #1
+ 8000552:	21d6      	movs	r1, #214	@ 0xd6
+ 8000554:	4814      	ldr	r0, [pc, #80]	@ (80005a8 <main+0xf8>)
+ 8000556:	f000 fe13 	bl	8001180 <HAL_I2C_Master_Transmit>
+	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
+ 800055a:	f107 0208 	add.w	r2, r7, #8
+ 800055e:	2364      	movs	r3, #100	@ 0x64
+ 8000560:	9300      	str	r3, [sp, #0]
+ 8000562:	2301      	movs	r3, #1
+ 8000564:	21d6      	movs	r1, #214	@ 0xd6
+ 8000566:	4810      	ldr	r0, [pc, #64]	@ (80005a8 <main+0xf8>)
+ 8000568:	f000 ff08 	bl	800137c <HAL_I2C_Master_Receive>
+
+	  X_VALUE = rData[0];
+ 800056c:	7a3a      	ldrb	r2, [r7, #8]
+ 800056e:	4b11      	ldr	r3, [pc, #68]	@ (80005b4 <main+0x104>)
+ 8000570:	701a      	strb	r2, [r3, #0]
+
+	  adresse[0] = 0x2B;
+ 8000572:	232b      	movs	r3, #43	@ 0x2b
+ 8000574:	733b      	strb	r3, [r7, #12]
+	  HAL_I2C_Master_Transmit(&hi2c1, 0xD6, adresse, 1, 100);
+ 8000576:	f107 020c 	add.w	r2, r7, #12
+ 800057a:	2364      	movs	r3, #100	@ 0x64
+ 800057c:	9300      	str	r3, [sp, #0]
+ 800057e:	2301      	movs	r3, #1
+ 8000580:	21d6      	movs	r1, #214	@ 0xd6
+ 8000582:	4809      	ldr	r0, [pc, #36]	@ (80005a8 <main+0xf8>)
+ 8000584:	f000 fdfc 	bl	8001180 <HAL_I2C_Master_Transmit>
+	  HAL_I2C_Master_Receive(&hi2c1, 0xD6, rData, 1, 100);
+ 8000588:	f107 0208 	add.w	r2, r7, #8
+ 800058c:	2364      	movs	r3, #100	@ 0x64
+ 800058e:	9300      	str	r3, [sp, #0]
+ 8000590:	2301      	movs	r3, #1
+ 8000592:	21d6      	movs	r1, #214	@ 0xd6
+ 8000594:	4804      	ldr	r0, [pc, #16]	@ (80005a8 <main+0xf8>)
+ 8000596:	f000 fef1 	bl	800137c <HAL_I2C_Master_Receive>
+
+	  Y_VALUE = rData[0];
+ 800059a:	7a3a      	ldrb	r2, [r7, #8]
+ 800059c:	4b06      	ldr	r3, [pc, #24]	@ (80005b8 <main+0x108>)
+ 800059e:	701a      	strb	r2, [r3, #0]
+
+	  HAL_Delay(100);
+ 80005a0:	2064      	movs	r0, #100	@ 0x64
+ 80005a2:	f000 f9fb 	bl	800099c <HAL_Delay>
+	  adresse[0] = 0x2D;
+ 80005a6:	e7a3      	b.n	80004f0 <main+0x40>
+ 80005a8:	20000028 	.word	0x20000028
+ 80005ac:	40020000 	.word	0x40020000
+ 80005b0:	2000007c 	.word	0x2000007c
+ 80005b4:	2000007e 	.word	0x2000007e
+ 80005b8:	2000007d 	.word	0x2000007d
+
+080005bc <SystemClock_Config>:
 /**
   * @brief System Clock Configuration
   * @retval None
   */
 void SystemClock_Config(void)
 {
- 8000550:	b580      	push	{r7, lr}
- 8000552:	b092      	sub	sp, #72	@ 0x48
- 8000554:	af00      	add	r7, sp, #0
+ 80005bc:	b580      	push	{r7, lr}
+ 80005be:	b092      	sub	sp, #72	@ 0x48
+ 80005c0:	af00      	add	r7, sp, #0
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 8000556:	f107 0314 	add.w	r3, r7, #20
- 800055a:	2234      	movs	r2, #52	@ 0x34
- 800055c:	2100      	movs	r1, #0
- 800055e:	4618      	mov	r0, r3
- 8000560:	f002 fa2e 	bl	80029c0 <memset>
+ 80005c2:	f107 0314 	add.w	r3, r7, #20
+ 80005c6:	2234      	movs	r2, #52	@ 0x34
+ 80005c8:	2100      	movs	r1, #0
+ 80005ca:	4618      	mov	r0, r3
+ 80005cc:	f002 fa2e 	bl	8002a2c <memset>
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 8000564:	463b      	mov	r3, r7
- 8000566:	2200      	movs	r2, #0
- 8000568:	601a      	str	r2, [r3, #0]
- 800056a:	605a      	str	r2, [r3, #4]
- 800056c:	609a      	str	r2, [r3, #8]
- 800056e:	60da      	str	r2, [r3, #12]
- 8000570:	611a      	str	r2, [r3, #16]
+ 80005d0:	463b      	mov	r3, r7
+ 80005d2:	2200      	movs	r2, #0
+ 80005d4:	601a      	str	r2, [r3, #0]
+ 80005d6:	605a      	str	r2, [r3, #4]
+ 80005d8:	609a      	str	r2, [r3, #8]
+ 80005da:	60da      	str	r2, [r3, #12]
+ 80005dc:	611a      	str	r2, [r3, #16]
 
   /** Configure the main internal regulator output voltage
   */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 8000572:	4b19      	ldr	r3, [pc, #100]	@ (80005d8 <SystemClock_Config+0x88>)
- 8000574:	681b      	ldr	r3, [r3, #0]
- 8000576:	f423 53c0 	bic.w	r3, r3, #6144	@ 0x1800
- 800057a:	4a17      	ldr	r2, [pc, #92]	@ (80005d8 <SystemClock_Config+0x88>)
- 800057c:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
- 8000580:	6013      	str	r3, [r2, #0]
+ 80005de:	4b19      	ldr	r3, [pc, #100]	@ (8000644 <SystemClock_Config+0x88>)
+ 80005e0:	681b      	ldr	r3, [r3, #0]
+ 80005e2:	f423 53c0 	bic.w	r3, r3, #6144	@ 0x1800
+ 80005e6:	4a17      	ldr	r2, [pc, #92]	@ (8000644 <SystemClock_Config+0x88>)
+ 80005e8:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
+ 80005ec:	6013      	str	r3, [r2, #0]
 
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 8000582:	2302      	movs	r3, #2
- 8000584:	617b      	str	r3, [r7, #20]
+ 80005ee:	2302      	movs	r3, #2
+ 80005f0:	617b      	str	r3, [r7, #20]
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000586:	2301      	movs	r3, #1
- 8000588:	623b      	str	r3, [r7, #32]
+ 80005f2:	2301      	movs	r3, #1
+ 80005f4:	623b      	str	r3, [r7, #32]
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 800058a:	2310      	movs	r3, #16
- 800058c:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80005f6:	2310      	movs	r3, #16
+ 80005f8:	627b      	str	r3, [r7, #36]	@ 0x24
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 800058e:	2300      	movs	r3, #0
- 8000590:	63bb      	str	r3, [r7, #56]	@ 0x38
+ 80005fa:	2300      	movs	r3, #0
+ 80005fc:	63bb      	str	r3, [r7, #56]	@ 0x38
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 8000592:	f107 0314 	add.w	r3, r7, #20
- 8000596:	4618      	mov	r0, r3
- 8000598:	f001 fc72 	bl	8001e80 <HAL_RCC_OscConfig>
- 800059c:	4603      	mov	r3, r0
- 800059e:	2b00      	cmp	r3, #0
- 80005a0:	d001      	beq.n	80005a6 <SystemClock_Config+0x56>
+ 80005fe:	f107 0314 	add.w	r3, r7, #20
+ 8000602:	4618      	mov	r0, r3
+ 8000604:	f001 fc72 	bl	8001eec <HAL_RCC_OscConfig>
+ 8000608:	4603      	mov	r3, r0
+ 800060a:	2b00      	cmp	r3, #0
+ 800060c:	d001      	beq.n	8000612 <SystemClock_Config+0x56>
   {
     Error_Handler();
- 80005a2:	f000 f887 	bl	80006b4 <Error_Handler>
+ 800060e:	f000 f887 	bl	8000720 <Error_Handler>
   }
 
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 80005a6:	230f      	movs	r3, #15
- 80005a8:	603b      	str	r3, [r7, #0]
+ 8000612:	230f      	movs	r3, #15
+ 8000614:	603b      	str	r3, [r7, #0]
                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
- 80005aa:	2301      	movs	r3, #1
- 80005ac:	607b      	str	r3, [r7, #4]
+ 8000616:	2301      	movs	r3, #1
+ 8000618:	607b      	str	r3, [r7, #4]
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 80005ae:	2300      	movs	r3, #0
- 80005b0:	60bb      	str	r3, [r7, #8]
+ 800061a:	2300      	movs	r3, #0
+ 800061c:	60bb      	str	r3, [r7, #8]
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 80005b2:	2300      	movs	r3, #0
- 80005b4:	60fb      	str	r3, [r7, #12]
+ 800061e:	2300      	movs	r3, #0
+ 8000620:	60fb      	str	r3, [r7, #12]
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 80005b6:	2300      	movs	r3, #0
- 80005b8:	613b      	str	r3, [r7, #16]
+ 8000622:	2300      	movs	r3, #0
+ 8000624:	613b      	str	r3, [r7, #16]
 
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 80005ba:	463b      	mov	r3, r7
- 80005bc:	2100      	movs	r1, #0
- 80005be:	4618      	mov	r0, r3
- 80005c0:	f001 ff8e 	bl	80024e0 <HAL_RCC_ClockConfig>
- 80005c4:	4603      	mov	r3, r0
- 80005c6:	2b00      	cmp	r3, #0
- 80005c8:	d001      	beq.n	80005ce <SystemClock_Config+0x7e>
+ 8000626:	463b      	mov	r3, r7
+ 8000628:	2100      	movs	r1, #0
+ 800062a:	4618      	mov	r0, r3
+ 800062c:	f001 ff8e 	bl	800254c <HAL_RCC_ClockConfig>
+ 8000630:	4603      	mov	r3, r0
+ 8000632:	2b00      	cmp	r3, #0
+ 8000634:	d001      	beq.n	800063a <SystemClock_Config+0x7e>
   {
     Error_Handler();
- 80005ca:	f000 f873 	bl	80006b4 <Error_Handler>
+ 8000636:	f000 f873 	bl	8000720 <Error_Handler>
   }
 }
- 80005ce:	bf00      	nop
- 80005d0:	3748      	adds	r7, #72	@ 0x48
- 80005d2:	46bd      	mov	sp, r7
- 80005d4:	bd80      	pop	{r7, pc}
- 80005d6:	bf00      	nop
- 80005d8:	40007000 	.word	0x40007000
+ 800063a:	bf00      	nop
+ 800063c:	3748      	adds	r7, #72	@ 0x48
+ 800063e:	46bd      	mov	sp, r7
+ 8000640:	bd80      	pop	{r7, pc}
+ 8000642:	bf00      	nop
+ 8000644:	40007000 	.word	0x40007000
 
-080005dc <MX_I2C1_Init>:
+08000648 <MX_I2C1_Init>:
   * @brief I2C1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_I2C1_Init(void)
 {
- 80005dc:	b580      	push	{r7, lr}
- 80005de:	af00      	add	r7, sp, #0
+ 8000648:	b580      	push	{r7, lr}
+ 800064a:	af00      	add	r7, sp, #0
   /* USER CODE END I2C1_Init 0 */
 
   /* USER CODE BEGIN I2C1_Init 1 */
 
   /* USER CODE END I2C1_Init 1 */
   hi2c1.Instance = I2C1;
- 80005e0:	4b12      	ldr	r3, [pc, #72]	@ (800062c <MX_I2C1_Init+0x50>)
- 80005e2:	4a13      	ldr	r2, [pc, #76]	@ (8000630 <MX_I2C1_Init+0x54>)
- 80005e4:	601a      	str	r2, [r3, #0]
+ 800064c:	4b12      	ldr	r3, [pc, #72]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 800064e:	4a13      	ldr	r2, [pc, #76]	@ (800069c <MX_I2C1_Init+0x54>)
+ 8000650:	601a      	str	r2, [r3, #0]
   hi2c1.Init.ClockSpeed = 100000;
- 80005e6:	4b11      	ldr	r3, [pc, #68]	@ (800062c <MX_I2C1_Init+0x50>)
- 80005e8:	4a12      	ldr	r2, [pc, #72]	@ (8000634 <MX_I2C1_Init+0x58>)
- 80005ea:	605a      	str	r2, [r3, #4]
+ 8000652:	4b11      	ldr	r3, [pc, #68]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000654:	4a12      	ldr	r2, [pc, #72]	@ (80006a0 <MX_I2C1_Init+0x58>)
+ 8000656:	605a      	str	r2, [r3, #4]
   hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
- 80005ec:	4b0f      	ldr	r3, [pc, #60]	@ (800062c <MX_I2C1_Init+0x50>)
- 80005ee:	2200      	movs	r2, #0
- 80005f0:	609a      	str	r2, [r3, #8]
+ 8000658:	4b0f      	ldr	r3, [pc, #60]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 800065a:	2200      	movs	r2, #0
+ 800065c:	609a      	str	r2, [r3, #8]
   hi2c1.Init.OwnAddress1 = 0;
- 80005f2:	4b0e      	ldr	r3, [pc, #56]	@ (800062c <MX_I2C1_Init+0x50>)
- 80005f4:	2200      	movs	r2, #0
- 80005f6:	60da      	str	r2, [r3, #12]
+ 800065e:	4b0e      	ldr	r3, [pc, #56]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000660:	2200      	movs	r2, #0
+ 8000662:	60da      	str	r2, [r3, #12]
   hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- 80005f8:	4b0c      	ldr	r3, [pc, #48]	@ (800062c <MX_I2C1_Init+0x50>)
- 80005fa:	f44f 4280 	mov.w	r2, #16384	@ 0x4000
- 80005fe:	611a      	str	r2, [r3, #16]
+ 8000664:	4b0c      	ldr	r3, [pc, #48]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000666:	f44f 4280 	mov.w	r2, #16384	@ 0x4000
+ 800066a:	611a      	str	r2, [r3, #16]
   hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- 8000600:	4b0a      	ldr	r3, [pc, #40]	@ (800062c <MX_I2C1_Init+0x50>)
- 8000602:	2200      	movs	r2, #0
- 8000604:	615a      	str	r2, [r3, #20]
+ 800066c:	4b0a      	ldr	r3, [pc, #40]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 800066e:	2200      	movs	r2, #0
+ 8000670:	615a      	str	r2, [r3, #20]
   hi2c1.Init.OwnAddress2 = 0;
- 8000606:	4b09      	ldr	r3, [pc, #36]	@ (800062c <MX_I2C1_Init+0x50>)
- 8000608:	2200      	movs	r2, #0
- 800060a:	619a      	str	r2, [r3, #24]
+ 8000672:	4b09      	ldr	r3, [pc, #36]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000674:	2200      	movs	r2, #0
+ 8000676:	619a      	str	r2, [r3, #24]
   hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- 800060c:	4b07      	ldr	r3, [pc, #28]	@ (800062c <MX_I2C1_Init+0x50>)
- 800060e:	2200      	movs	r2, #0
- 8000610:	61da      	str	r2, [r3, #28]
+ 8000678:	4b07      	ldr	r3, [pc, #28]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 800067a:	2200      	movs	r2, #0
+ 800067c:	61da      	str	r2, [r3, #28]
   hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- 8000612:	4b06      	ldr	r3, [pc, #24]	@ (800062c <MX_I2C1_Init+0x50>)
- 8000614:	2200      	movs	r2, #0
- 8000616:	621a      	str	r2, [r3, #32]
+ 800067e:	4b06      	ldr	r3, [pc, #24]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000680:	2200      	movs	r2, #0
+ 8000682:	621a      	str	r2, [r3, #32]
   if (HAL_I2C_Init(&hi2c1) != HAL_OK)
- 8000618:	4804      	ldr	r0, [pc, #16]	@ (800062c <MX_I2C1_Init+0x50>)
- 800061a:	f000 fc37 	bl	8000e8c <HAL_I2C_Init>
- 800061e:	4603      	mov	r3, r0
- 8000620:	2b00      	cmp	r3, #0
- 8000622:	d001      	beq.n	8000628 <MX_I2C1_Init+0x4c>
+ 8000684:	4804      	ldr	r0, [pc, #16]	@ (8000698 <MX_I2C1_Init+0x50>)
+ 8000686:	f000 fc37 	bl	8000ef8 <HAL_I2C_Init>
+ 800068a:	4603      	mov	r3, r0
+ 800068c:	2b00      	cmp	r3, #0
+ 800068e:	d001      	beq.n	8000694 <MX_I2C1_Init+0x4c>
   {
     Error_Handler();
- 8000624:	f000 f846 	bl	80006b4 <Error_Handler>
+ 8000690:	f000 f846 	bl	8000720 <Error_Handler>
   }
   /* USER CODE BEGIN I2C1_Init 2 */
 
   /* USER CODE END I2C1_Init 2 */
 
 }
- 8000628:	bf00      	nop
- 800062a:	bd80      	pop	{r7, pc}
- 800062c:	20000028 	.word	0x20000028
- 8000630:	40005400 	.word	0x40005400
- 8000634:	000186a0 	.word	0x000186a0
+ 8000694:	bf00      	nop
+ 8000696:	bd80      	pop	{r7, pc}
+ 8000698:	20000028 	.word	0x20000028
+ 800069c:	40005400 	.word	0x40005400
+ 80006a0:	000186a0 	.word	0x000186a0
 
-08000638 <MX_GPIO_Init>:
+080006a4 <MX_GPIO_Init>:
   * @brief GPIO Initialization Function
   * @param None
   * @retval None
   */
 static void MX_GPIO_Init(void)
 {
- 8000638:	b580      	push	{r7, lr}
- 800063a:	b088      	sub	sp, #32
- 800063c:	af00      	add	r7, sp, #0
+ 80006a4:	b580      	push	{r7, lr}
+ 80006a6:	b088      	sub	sp, #32
+ 80006a8:	af00      	add	r7, sp, #0
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 800063e:	f107 030c 	add.w	r3, r7, #12
- 8000642:	2200      	movs	r2, #0
- 8000644:	601a      	str	r2, [r3, #0]
- 8000646:	605a      	str	r2, [r3, #4]
- 8000648:	609a      	str	r2, [r3, #8]
- 800064a:	60da      	str	r2, [r3, #12]
- 800064c:	611a      	str	r2, [r3, #16]
+ 80006aa:	f107 030c 	add.w	r3, r7, #12
+ 80006ae:	2200      	movs	r2, #0
+ 80006b0:	601a      	str	r2, [r3, #0]
+ 80006b2:	605a      	str	r2, [r3, #4]
+ 80006b4:	609a      	str	r2, [r3, #8]
+ 80006b6:	60da      	str	r2, [r3, #12]
+ 80006b8:	611a      	str	r2, [r3, #16]
   /* USER CODE BEGIN MX_GPIO_Init_1 */
 
   /* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOA_CLK_ENABLE();
- 800064e:	4b17      	ldr	r3, [pc, #92]	@ (80006ac <MX_GPIO_Init+0x74>)
- 8000650:	69db      	ldr	r3, [r3, #28]
- 8000652:	4a16      	ldr	r2, [pc, #88]	@ (80006ac <MX_GPIO_Init+0x74>)
- 8000654:	f043 0301 	orr.w	r3, r3, #1
- 8000658:	61d3      	str	r3, [r2, #28]
- 800065a:	4b14      	ldr	r3, [pc, #80]	@ (80006ac <MX_GPIO_Init+0x74>)
- 800065c:	69db      	ldr	r3, [r3, #28]
- 800065e:	f003 0301 	and.w	r3, r3, #1
- 8000662:	60bb      	str	r3, [r7, #8]
- 8000664:	68bb      	ldr	r3, [r7, #8]
+ 80006ba:	4b17      	ldr	r3, [pc, #92]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006bc:	69db      	ldr	r3, [r3, #28]
+ 80006be:	4a16      	ldr	r2, [pc, #88]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006c0:	f043 0301 	orr.w	r3, r3, #1
+ 80006c4:	61d3      	str	r3, [r2, #28]
+ 80006c6:	4b14      	ldr	r3, [pc, #80]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006c8:	69db      	ldr	r3, [r3, #28]
+ 80006ca:	f003 0301 	and.w	r3, r3, #1
+ 80006ce:	60bb      	str	r3, [r7, #8]
+ 80006d0:	68bb      	ldr	r3, [r7, #8]
   __HAL_RCC_GPIOB_CLK_ENABLE();
- 8000666:	4b11      	ldr	r3, [pc, #68]	@ (80006ac <MX_GPIO_Init+0x74>)
- 8000668:	69db      	ldr	r3, [r3, #28]
- 800066a:	4a10      	ldr	r2, [pc, #64]	@ (80006ac <MX_GPIO_Init+0x74>)
- 800066c:	f043 0302 	orr.w	r3, r3, #2
- 8000670:	61d3      	str	r3, [r2, #28]
- 8000672:	4b0e      	ldr	r3, [pc, #56]	@ (80006ac <MX_GPIO_Init+0x74>)
- 8000674:	69db      	ldr	r3, [r3, #28]
- 8000676:	f003 0302 	and.w	r3, r3, #2
- 800067a:	607b      	str	r3, [r7, #4]
- 800067c:	687b      	ldr	r3, [r7, #4]
+ 80006d2:	4b11      	ldr	r3, [pc, #68]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006d4:	69db      	ldr	r3, [r3, #28]
+ 80006d6:	4a10      	ldr	r2, [pc, #64]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006d8:	f043 0302 	orr.w	r3, r3, #2
+ 80006dc:	61d3      	str	r3, [r2, #28]
+ 80006de:	4b0e      	ldr	r3, [pc, #56]	@ (8000718 <MX_GPIO_Init+0x74>)
+ 80006e0:	69db      	ldr	r3, [r3, #28]
+ 80006e2:	f003 0302 	and.w	r3, r3, #2
+ 80006e6:	607b      	str	r3, [r7, #4]
+ 80006e8:	687b      	ldr	r3, [r7, #4]
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET);
- 800067e:	2200      	movs	r2, #0
- 8000680:	2120      	movs	r1, #32
- 8000682:	480b      	ldr	r0, [pc, #44]	@ (80006b0 <MX_GPIO_Init+0x78>)
- 8000684:	f000 fbea 	bl	8000e5c <HAL_GPIO_WritePin>
+ 80006ea:	2200      	movs	r2, #0
+ 80006ec:	2120      	movs	r1, #32
+ 80006ee:	480b      	ldr	r0, [pc, #44]	@ (800071c <MX_GPIO_Init+0x78>)
+ 80006f0:	f000 fbea 	bl	8000ec8 <HAL_GPIO_WritePin>
 
   /*Configure GPIO pin : PA5 */
   GPIO_InitStruct.Pin = GPIO_PIN_5;
- 8000688:	2320      	movs	r3, #32
- 800068a:	60fb      	str	r3, [r7, #12]
+ 80006f4:	2320      	movs	r3, #32
+ 80006f6:	60fb      	str	r3, [r7, #12]
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 800068c:	2301      	movs	r3, #1
- 800068e:	613b      	str	r3, [r7, #16]
+ 80006f8:	2301      	movs	r3, #1
+ 80006fa:	613b      	str	r3, [r7, #16]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000690:	2300      	movs	r3, #0
- 8000692:	617b      	str	r3, [r7, #20]
+ 80006fc:	2300      	movs	r3, #0
+ 80006fe:	617b      	str	r3, [r7, #20]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000694:	2300      	movs	r3, #0
- 8000696:	61bb      	str	r3, [r7, #24]
+ 8000700:	2300      	movs	r3, #0
+ 8000702:	61bb      	str	r3, [r7, #24]
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000698:	f107 030c 	add.w	r3, r7, #12
- 800069c:	4619      	mov	r1, r3
- 800069e:	4804      	ldr	r0, [pc, #16]	@ (80006b0 <MX_GPIO_Init+0x78>)
- 80006a0:	f000 fa4c 	bl	8000b3c <HAL_GPIO_Init>
+ 8000704:	f107 030c 	add.w	r3, r7, #12
+ 8000708:	4619      	mov	r1, r3
+ 800070a:	4804      	ldr	r0, [pc, #16]	@ (800071c <MX_GPIO_Init+0x78>)
+ 800070c:	f000 fa4c 	bl	8000ba8 <HAL_GPIO_Init>
 
   /* USER CODE BEGIN MX_GPIO_Init_2 */
 
   /* USER CODE END MX_GPIO_Init_2 */
 }
- 80006a4:	bf00      	nop
- 80006a6:	3720      	adds	r7, #32
- 80006a8:	46bd      	mov	sp, r7
- 80006aa:	bd80      	pop	{r7, pc}
- 80006ac:	40023800 	.word	0x40023800
- 80006b0:	40020000 	.word	0x40020000
+ 8000710:	bf00      	nop
+ 8000712:	3720      	adds	r7, #32
+ 8000714:	46bd      	mov	sp, r7
+ 8000716:	bd80      	pop	{r7, pc}
+ 8000718:	40023800 	.word	0x40023800
+ 800071c:	40020000 	.word	0x40020000
 
-080006b4 <Error_Handler>:
+08000720 <Error_Handler>:
 /**
   * @brief  This function is executed in case of error occurrence.
   * @retval None
   */
 void Error_Handler(void)
 {
- 80006b4:	b480      	push	{r7}
- 80006b6:	af00      	add	r7, sp, #0
+ 8000720:	b480      	push	{r7}
+ 8000722:	af00      	add	r7, sp, #0
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
 __STATIC_FORCEINLINE void __disable_irq(void)
 {
   __ASM volatile ("cpsid i" : : : "memory");
- 80006b8:	b672      	cpsid	i
+ 8000724:	b672      	cpsid	i
 }
- 80006ba:	bf00      	nop
+ 8000726:	bf00      	nop
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
   __disable_irq();
   while (1)
- 80006bc:	bf00      	nop
- 80006be:	e7fd      	b.n	80006bc <Error_Handler+0x8>
+ 8000728:	bf00      	nop
+ 800072a:	e7fd      	b.n	8000728 <Error_Handler+0x8>
 
-080006c0 <HAL_MspInit>:
+0800072c <HAL_MspInit>:
 /* USER CODE END 0 */
 /**
   * Initializes the Global MSP.
   */
 void HAL_MspInit(void)
 {
- 80006c0:	b480      	push	{r7}
- 80006c2:	b085      	sub	sp, #20
- 80006c4:	af00      	add	r7, sp, #0
+ 800072c:	b480      	push	{r7}
+ 800072e:	b085      	sub	sp, #20
+ 8000730:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN MspInit 0 */
 
   /* USER CODE END MspInit 0 */
 
   __HAL_RCC_COMP_CLK_ENABLE();
- 80006c6:	4b14      	ldr	r3, [pc, #80]	@ (8000718 <HAL_MspInit+0x58>)
- 80006c8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80006ca:	4a13      	ldr	r2, [pc, #76]	@ (8000718 <HAL_MspInit+0x58>)
- 80006cc:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
- 80006d0:	6253      	str	r3, [r2, #36]	@ 0x24
- 80006d2:	4b11      	ldr	r3, [pc, #68]	@ (8000718 <HAL_MspInit+0x58>)
- 80006d4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80006d6:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
- 80006da:	60fb      	str	r3, [r7, #12]
- 80006dc:	68fb      	ldr	r3, [r7, #12]
+ 8000732:	4b14      	ldr	r3, [pc, #80]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000734:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8000736:	4a13      	ldr	r2, [pc, #76]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000738:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 800073c:	6253      	str	r3, [r2, #36]	@ 0x24
+ 800073e:	4b11      	ldr	r3, [pc, #68]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000740:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8000742:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
+ 8000746:	60fb      	str	r3, [r7, #12]
+ 8000748:	68fb      	ldr	r3, [r7, #12]
   __HAL_RCC_SYSCFG_CLK_ENABLE();
- 80006de:	4b0e      	ldr	r3, [pc, #56]	@ (8000718 <HAL_MspInit+0x58>)
- 80006e0:	6a1b      	ldr	r3, [r3, #32]
- 80006e2:	4a0d      	ldr	r2, [pc, #52]	@ (8000718 <HAL_MspInit+0x58>)
- 80006e4:	f043 0301 	orr.w	r3, r3, #1
- 80006e8:	6213      	str	r3, [r2, #32]
- 80006ea:	4b0b      	ldr	r3, [pc, #44]	@ (8000718 <HAL_MspInit+0x58>)
- 80006ec:	6a1b      	ldr	r3, [r3, #32]
- 80006ee:	f003 0301 	and.w	r3, r3, #1
- 80006f2:	60bb      	str	r3, [r7, #8]
- 80006f4:	68bb      	ldr	r3, [r7, #8]
+ 800074a:	4b0e      	ldr	r3, [pc, #56]	@ (8000784 <HAL_MspInit+0x58>)
+ 800074c:	6a1b      	ldr	r3, [r3, #32]
+ 800074e:	4a0d      	ldr	r2, [pc, #52]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000750:	f043 0301 	orr.w	r3, r3, #1
+ 8000754:	6213      	str	r3, [r2, #32]
+ 8000756:	4b0b      	ldr	r3, [pc, #44]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000758:	6a1b      	ldr	r3, [r3, #32]
+ 800075a:	f003 0301 	and.w	r3, r3, #1
+ 800075e:	60bb      	str	r3, [r7, #8]
+ 8000760:	68bb      	ldr	r3, [r7, #8]
   __HAL_RCC_PWR_CLK_ENABLE();
- 80006f6:	4b08      	ldr	r3, [pc, #32]	@ (8000718 <HAL_MspInit+0x58>)
- 80006f8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80006fa:	4a07      	ldr	r2, [pc, #28]	@ (8000718 <HAL_MspInit+0x58>)
- 80006fc:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
- 8000700:	6253      	str	r3, [r2, #36]	@ 0x24
- 8000702:	4b05      	ldr	r3, [pc, #20]	@ (8000718 <HAL_MspInit+0x58>)
- 8000704:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8000706:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 800070a:	607b      	str	r3, [r7, #4]
- 800070c:	687b      	ldr	r3, [r7, #4]
+ 8000762:	4b08      	ldr	r3, [pc, #32]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000764:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8000766:	4a07      	ldr	r2, [pc, #28]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000768:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 800076c:	6253      	str	r3, [r2, #36]	@ 0x24
+ 800076e:	4b05      	ldr	r3, [pc, #20]	@ (8000784 <HAL_MspInit+0x58>)
+ 8000770:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8000772:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 8000776:	607b      	str	r3, [r7, #4]
+ 8000778:	687b      	ldr	r3, [r7, #4]
   /* System interrupt init*/
 
   /* USER CODE BEGIN MspInit 1 */
 
   /* USER CODE END MspInit 1 */
 }
- 800070e:	bf00      	nop
- 8000710:	3714      	adds	r7, #20
- 8000712:	46bd      	mov	sp, r7
- 8000714:	bc80      	pop	{r7}
- 8000716:	4770      	bx	lr
- 8000718:	40023800 	.word	0x40023800
+ 800077a:	bf00      	nop
+ 800077c:	3714      	adds	r7, #20
+ 800077e:	46bd      	mov	sp, r7
+ 8000780:	bc80      	pop	{r7}
+ 8000782:	4770      	bx	lr
+ 8000784:	40023800 	.word	0x40023800
 
-0800071c <HAL_I2C_MspInit>:
+08000788 <HAL_I2C_MspInit>:
   * This function configures the hardware resources used in this example
   * @param hi2c: I2C handle pointer
   * @retval None
   */
 void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
 {
- 800071c:	b580      	push	{r7, lr}
- 800071e:	b08a      	sub	sp, #40	@ 0x28
- 8000720:	af00      	add	r7, sp, #0
- 8000722:	6078      	str	r0, [r7, #4]
+ 8000788:	b580      	push	{r7, lr}
+ 800078a:	b08a      	sub	sp, #40	@ 0x28
+ 800078c:	af00      	add	r7, sp, #0
+ 800078e:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000724:	f107 0314 	add.w	r3, r7, #20
- 8000728:	2200      	movs	r2, #0
- 800072a:	601a      	str	r2, [r3, #0]
- 800072c:	605a      	str	r2, [r3, #4]
- 800072e:	609a      	str	r2, [r3, #8]
- 8000730:	60da      	str	r2, [r3, #12]
- 8000732:	611a      	str	r2, [r3, #16]
+ 8000790:	f107 0314 	add.w	r3, r7, #20
+ 8000794:	2200      	movs	r2, #0
+ 8000796:	601a      	str	r2, [r3, #0]
+ 8000798:	605a      	str	r2, [r3, #4]
+ 800079a:	609a      	str	r2, [r3, #8]
+ 800079c:	60da      	str	r2, [r3, #12]
+ 800079e:	611a      	str	r2, [r3, #16]
   if(hi2c->Instance==I2C1)
- 8000734:	687b      	ldr	r3, [r7, #4]
- 8000736:	681b      	ldr	r3, [r3, #0]
- 8000738:	4a17      	ldr	r2, [pc, #92]	@ (8000798 <HAL_I2C_MspInit+0x7c>)
- 800073a:	4293      	cmp	r3, r2
- 800073c:	d128      	bne.n	8000790 <HAL_I2C_MspInit+0x74>
+ 80007a0:	687b      	ldr	r3, [r7, #4]
+ 80007a2:	681b      	ldr	r3, [r3, #0]
+ 80007a4:	4a17      	ldr	r2, [pc, #92]	@ (8000804 <HAL_I2C_MspInit+0x7c>)
+ 80007a6:	4293      	cmp	r3, r2
+ 80007a8:	d128      	bne.n	80007fc <HAL_I2C_MspInit+0x74>
   {
     /* USER CODE BEGIN I2C1_MspInit 0 */
 
     /* USER CODE END I2C1_MspInit 0 */
 
     __HAL_RCC_GPIOB_CLK_ENABLE();
- 800073e:	4b17      	ldr	r3, [pc, #92]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 8000740:	69db      	ldr	r3, [r3, #28]
- 8000742:	4a16      	ldr	r2, [pc, #88]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 8000744:	f043 0302 	orr.w	r3, r3, #2
- 8000748:	61d3      	str	r3, [r2, #28]
- 800074a:	4b14      	ldr	r3, [pc, #80]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 800074c:	69db      	ldr	r3, [r3, #28]
- 800074e:	f003 0302 	and.w	r3, r3, #2
- 8000752:	613b      	str	r3, [r7, #16]
- 8000754:	693b      	ldr	r3, [r7, #16]
+ 80007aa:	4b17      	ldr	r3, [pc, #92]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007ac:	69db      	ldr	r3, [r3, #28]
+ 80007ae:	4a16      	ldr	r2, [pc, #88]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007b0:	f043 0302 	orr.w	r3, r3, #2
+ 80007b4:	61d3      	str	r3, [r2, #28]
+ 80007b6:	4b14      	ldr	r3, [pc, #80]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007b8:	69db      	ldr	r3, [r3, #28]
+ 80007ba:	f003 0302 	and.w	r3, r3, #2
+ 80007be:	613b      	str	r3, [r7, #16]
+ 80007c0:	693b      	ldr	r3, [r7, #16]
     /**I2C1 GPIO Configuration
     PB8     ------> I2C1_SCL
     PB9     ------> I2C1_SDA
     */
     GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
- 8000756:	f44f 7340 	mov.w	r3, #768	@ 0x300
- 800075a:	617b      	str	r3, [r7, #20]
+ 80007c2:	f44f 7340 	mov.w	r3, #768	@ 0x300
+ 80007c6:	617b      	str	r3, [r7, #20]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
- 800075c:	2312      	movs	r3, #18
- 800075e:	61bb      	str	r3, [r7, #24]
+ 80007c8:	2312      	movs	r3, #18
+ 80007ca:	61bb      	str	r3, [r7, #24]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000760:	2300      	movs	r3, #0
- 8000762:	61fb      	str	r3, [r7, #28]
+ 80007cc:	2300      	movs	r3, #0
+ 80007ce:	61fb      	str	r3, [r7, #28]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8000764:	2303      	movs	r3, #3
- 8000766:	623b      	str	r3, [r7, #32]
+ 80007d0:	2303      	movs	r3, #3
+ 80007d2:	623b      	str	r3, [r7, #32]
     GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
- 8000768:	2304      	movs	r3, #4
- 800076a:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80007d4:	2304      	movs	r3, #4
+ 80007d6:	627b      	str	r3, [r7, #36]	@ 0x24
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 800076c:	f107 0314 	add.w	r3, r7, #20
- 8000770:	4619      	mov	r1, r3
- 8000772:	480b      	ldr	r0, [pc, #44]	@ (80007a0 <HAL_I2C_MspInit+0x84>)
- 8000774:	f000 f9e2 	bl	8000b3c <HAL_GPIO_Init>
+ 80007d8:	f107 0314 	add.w	r3, r7, #20
+ 80007dc:	4619      	mov	r1, r3
+ 80007de:	480b      	ldr	r0, [pc, #44]	@ (800080c <HAL_I2C_MspInit+0x84>)
+ 80007e0:	f000 f9e2 	bl	8000ba8 <HAL_GPIO_Init>
 
     /* Peripheral clock enable */
     __HAL_RCC_I2C1_CLK_ENABLE();
- 8000778:	4b08      	ldr	r3, [pc, #32]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 800077a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800077c:	4a07      	ldr	r2, [pc, #28]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 800077e:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
- 8000782:	6253      	str	r3, [r2, #36]	@ 0x24
- 8000784:	4b05      	ldr	r3, [pc, #20]	@ (800079c <HAL_I2C_MspInit+0x80>)
- 8000786:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8000788:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
- 800078c:	60fb      	str	r3, [r7, #12]
- 800078e:	68fb      	ldr	r3, [r7, #12]
+ 80007e4:	4b08      	ldr	r3, [pc, #32]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007e6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80007e8:	4a07      	ldr	r2, [pc, #28]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007ea:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
+ 80007ee:	6253      	str	r3, [r2, #36]	@ 0x24
+ 80007f0:	4b05      	ldr	r3, [pc, #20]	@ (8000808 <HAL_I2C_MspInit+0x80>)
+ 80007f2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80007f4:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
+ 80007f8:	60fb      	str	r3, [r7, #12]
+ 80007fa:	68fb      	ldr	r3, [r7, #12]
 
     /* USER CODE END I2C1_MspInit 1 */
 
   }
 
 }
- 8000790:	bf00      	nop
- 8000792:	3728      	adds	r7, #40	@ 0x28
- 8000794:	46bd      	mov	sp, r7
- 8000796:	bd80      	pop	{r7, pc}
- 8000798:	40005400 	.word	0x40005400
- 800079c:	40023800 	.word	0x40023800
- 80007a0:	40020400 	.word	0x40020400
+ 80007fc:	bf00      	nop
+ 80007fe:	3728      	adds	r7, #40	@ 0x28
+ 8000800:	46bd      	mov	sp, r7
+ 8000802:	bd80      	pop	{r7, pc}
+ 8000804:	40005400 	.word	0x40005400
+ 8000808:	40023800 	.word	0x40023800
+ 800080c:	40020400 	.word	0x40020400
 
-080007a4 <NMI_Handler>:
+08000810 <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable interrupt.
   */
 void NMI_Handler(void)
 {
- 80007a4:	b480      	push	{r7}
- 80007a6:	af00      	add	r7, sp, #0
+ 8000810:	b480      	push	{r7}
+ 8000812:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
    while (1)
- 80007a8:	bf00      	nop
- 80007aa:	e7fd      	b.n	80007a8 <NMI_Handler+0x4>
+ 8000814:	bf00      	nop
+ 8000816:	e7fd      	b.n	8000814 <NMI_Handler+0x4>
 
-080007ac <HardFault_Handler>:
+08000818 <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 80007ac:	b480      	push	{r7}
- 80007ae:	af00      	add	r7, sp, #0
+ 8000818:	b480      	push	{r7}
+ 800081a:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 80007b0:	bf00      	nop
- 80007b2:	e7fd      	b.n	80007b0 <HardFault_Handler+0x4>
+ 800081c:	bf00      	nop
+ 800081e:	e7fd      	b.n	800081c <HardFault_Handler+0x4>
 
-080007b4 <MemManage_Handler>:
+08000820 <MemManage_Handler>:
 
 /**
   * @brief This function handles Memory management fault.
   */
 void MemManage_Handler(void)
 {
- 80007b4:	b480      	push	{r7}
- 80007b6:	af00      	add	r7, sp, #0
+ 8000820:	b480      	push	{r7}
+ 8000822:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
- 80007b8:	bf00      	nop
- 80007ba:	e7fd      	b.n	80007b8 <MemManage_Handler+0x4>
+ 8000824:	bf00      	nop
+ 8000826:	e7fd      	b.n	8000824 <MemManage_Handler+0x4>
 
-080007bc <BusFault_Handler>:
+08000828 <BusFault_Handler>:
 
 /**
   * @brief This function handles Pre-fetch fault, memory access fault.
   */
 void BusFault_Handler(void)
 {
- 80007bc:	b480      	push	{r7}
- 80007be:	af00      	add	r7, sp, #0
+ 8000828:	b480      	push	{r7}
+ 800082a:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
   while (1)
- 80007c0:	bf00      	nop
- 80007c2:	e7fd      	b.n	80007c0 <BusFault_Handler+0x4>
+ 800082c:	bf00      	nop
+ 800082e:	e7fd      	b.n	800082c <BusFault_Handler+0x4>
 
-080007c4 <UsageFault_Handler>:
+08000830 <UsageFault_Handler>:
 
 /**
   * @brief This function handles Undefined instruction or illegal state.
   */
 void UsageFault_Handler(void)
 {
- 80007c4:	b480      	push	{r7}
- 80007c6:	af00      	add	r7, sp, #0
+ 8000830:	b480      	push	{r7}
+ 8000832:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
   while (1)
- 80007c8:	bf00      	nop
- 80007ca:	e7fd      	b.n	80007c8 <UsageFault_Handler+0x4>
+ 8000834:	bf00      	nop
+ 8000836:	e7fd      	b.n	8000834 <UsageFault_Handler+0x4>
 
-080007cc <SVC_Handler>:
+08000838 <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 80007cc:	b480      	push	{r7}
- 80007ce:	af00      	add	r7, sp, #0
+ 8000838:	b480      	push	{r7}
+ 800083a:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVC_IRQn 0 */
   /* USER CODE BEGIN SVC_IRQn 1 */
 
   /* USER CODE END SVC_IRQn 1 */
 }
- 80007d0:	bf00      	nop
- 80007d2:	46bd      	mov	sp, r7
- 80007d4:	bc80      	pop	{r7}
- 80007d6:	4770      	bx	lr
+ 800083c:	bf00      	nop
+ 800083e:	46bd      	mov	sp, r7
+ 8000840:	bc80      	pop	{r7}
+ 8000842:	4770      	bx	lr
 
-080007d8 <DebugMon_Handler>:
+08000844 <DebugMon_Handler>:
 
 /**
   * @brief This function handles Debug monitor.
   */
 void DebugMon_Handler(void)
 {
- 80007d8:	b480      	push	{r7}
- 80007da:	af00      	add	r7, sp, #0
+ 8000844:	b480      	push	{r7}
+ 8000846:	af00      	add	r7, sp, #0
 
   /* USER CODE END DebugMonitor_IRQn 0 */
   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 
   /* USER CODE END DebugMonitor_IRQn 1 */
 }
- 80007dc:	bf00      	nop
- 80007de:	46bd      	mov	sp, r7
- 80007e0:	bc80      	pop	{r7}
- 80007e2:	4770      	bx	lr
+ 8000848:	bf00      	nop
+ 800084a:	46bd      	mov	sp, r7
+ 800084c:	bc80      	pop	{r7}
+ 800084e:	4770      	bx	lr
 
-080007e4 <PendSV_Handler>:
+08000850 <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 80007e4:	b480      	push	{r7}
- 80007e6:	af00      	add	r7, sp, #0
+ 8000850:	b480      	push	{r7}
+ 8000852:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 80007e8:	bf00      	nop
- 80007ea:	46bd      	mov	sp, r7
- 80007ec:	bc80      	pop	{r7}
- 80007ee:	4770      	bx	lr
+ 8000854:	bf00      	nop
+ 8000856:	46bd      	mov	sp, r7
+ 8000858:	bc80      	pop	{r7}
+ 800085a:	4770      	bx	lr
 
-080007f0 <SysTick_Handler>:
+0800085c <SysTick_Handler>:
 
 /**
   * @brief This function handles System tick timer.
   */
 void SysTick_Handler(void)
 {
- 80007f0:	b580      	push	{r7, lr}
- 80007f2:	af00      	add	r7, sp, #0
+ 800085c:	b580      	push	{r7, lr}
+ 800085e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN SysTick_IRQn 0 */
 
   /* USER CODE END SysTick_IRQn 0 */
   HAL_IncTick();
- 80007f4:	f000 f880 	bl	80008f8 <HAL_IncTick>
+ 8000860:	f000 f880 	bl	8000964 <HAL_IncTick>
   /* USER CODE BEGIN SysTick_IRQn 1 */
 
   /* USER CODE END SysTick_IRQn 1 */
 }
- 80007f8:	bf00      	nop
- 80007fa:	bd80      	pop	{r7, pc}
+ 8000864:	bf00      	nop
+ 8000866:	bd80      	pop	{r7, pc}
 
-080007fc <SystemInit>:
+08000868 <SystemInit>:
   *         SystemCoreClock variable.
   * @param  None
   * @retval None
   */
 void SystemInit (void)
 {
- 80007fc:	b480      	push	{r7}
- 80007fe:	af00      	add	r7, sp, #0
+ 8000868:	b480      	push	{r7}
+ 800086a:	af00      	add	r7, sp, #0
     
   /* Configure the Vector Table location -------------------------------------*/
 #if defined(USER_VECT_TAB_ADDRESS)
   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
 #endif /* USER_VECT_TAB_ADDRESS */
 }
- 8000800:	bf00      	nop
- 8000802:	46bd      	mov	sp, r7
- 8000804:	bc80      	pop	{r7}
- 8000806:	4770      	bx	lr
+ 800086c:	bf00      	nop
+ 800086e:	46bd      	mov	sp, r7
+ 8000870:	bc80      	pop	{r7}
+ 8000872:	4770      	bx	lr
 
-08000808 <Reset_Handler>:
+08000874 <Reset_Handler>:
   .type Reset_Handler, %function
 Reset_Handler:
 
 
 /* Call the clock system initialization function.*/
     bl  SystemInit
- 8000808:	f7ff fff8 	bl	80007fc <SystemInit>
+ 8000874:	f7ff fff8 	bl	8000868 <SystemInit>
 
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
- 800080c:	480b      	ldr	r0, [pc, #44]	@ (800083c <LoopFillZerobss+0xe>)
+ 8000878:	480b      	ldr	r0, [pc, #44]	@ (80008a8 <LoopFillZerobss+0xe>)
   ldr r1, =_edata
- 800080e:	490c      	ldr	r1, [pc, #48]	@ (8000840 <LoopFillZerobss+0x12>)
+ 800087a:	490c      	ldr	r1, [pc, #48]	@ (80008ac <LoopFillZerobss+0x12>)
   ldr r2, =_sidata
- 8000810:	4a0c      	ldr	r2, [pc, #48]	@ (8000844 <LoopFillZerobss+0x16>)
+ 800087c:	4a0c      	ldr	r2, [pc, #48]	@ (80008b0 <LoopFillZerobss+0x16>)
   movs r3, #0
- 8000812:	2300      	movs	r3, #0
+ 800087e:	2300      	movs	r3, #0
   b LoopCopyDataInit
- 8000814:	e002      	b.n	800081c <LoopCopyDataInit>
+ 8000880:	e002      	b.n	8000888 <LoopCopyDataInit>
 
-08000816 <CopyDataInit>:
+08000882 <CopyDataInit>:
 
 CopyDataInit:
   ldr r4, [r2, r3]
- 8000816:	58d4      	ldr	r4, [r2, r3]
+ 8000882:	58d4      	ldr	r4, [r2, r3]
   str r4, [r0, r3]
- 8000818:	50c4      	str	r4, [r0, r3]
+ 8000884:	50c4      	str	r4, [r0, r3]
   adds r3, r3, #4
- 800081a:	3304      	adds	r3, #4
+ 8000886:	3304      	adds	r3, #4
 
-0800081c <LoopCopyDataInit>:
+08000888 <LoopCopyDataInit>:
 
 LoopCopyDataInit:
   adds r4, r0, r3
- 800081c:	18c4      	adds	r4, r0, r3
+ 8000888:	18c4      	adds	r4, r0, r3
   cmp r4, r1
- 800081e:	428c      	cmp	r4, r1
+ 800088a:	428c      	cmp	r4, r1
   bcc CopyDataInit
- 8000820:	d3f9      	bcc.n	8000816 <CopyDataInit>
+ 800088c:	d3f9      	bcc.n	8000882 <CopyDataInit>
   
 /* Zero fill the bss segment. */
   ldr r2, =_sbss
- 8000822:	4a09      	ldr	r2, [pc, #36]	@ (8000848 <LoopFillZerobss+0x1a>)
+ 800088e:	4a09      	ldr	r2, [pc, #36]	@ (80008b4 <LoopFillZerobss+0x1a>)
   ldr r4, =_ebss
- 8000824:	4c09      	ldr	r4, [pc, #36]	@ (800084c <LoopFillZerobss+0x1e>)
+ 8000890:	4c09      	ldr	r4, [pc, #36]	@ (80008b8 <LoopFillZerobss+0x1e>)
   movs r3, #0
- 8000826:	2300      	movs	r3, #0
+ 8000892:	2300      	movs	r3, #0
   b LoopFillZerobss
- 8000828:	e001      	b.n	800082e <LoopFillZerobss>
+ 8000894:	e001      	b.n	800089a <LoopFillZerobss>
 
-0800082a <FillZerobss>:
+08000896 <FillZerobss>:
 
 FillZerobss:
   str  r3, [r2]
- 800082a:	6013      	str	r3, [r2, #0]
+ 8000896:	6013      	str	r3, [r2, #0]
   adds r2, r2, #4
- 800082c:	3204      	adds	r2, #4
+ 8000898:	3204      	adds	r2, #4
 
-0800082e <LoopFillZerobss>:
+0800089a <LoopFillZerobss>:
 
 LoopFillZerobss:
   cmp r2, r4
- 800082e:	42a2      	cmp	r2, r4
+ 800089a:	42a2      	cmp	r2, r4
   bcc FillZerobss
- 8000830:	d3fb      	bcc.n	800082a <FillZerobss>
+ 800089c:	d3fb      	bcc.n	8000896 <FillZerobss>
 
 /* Call static constructors */
     bl __libc_init_array
- 8000832:	f002 f8cd 	bl	80029d0 <__libc_init_array>
+ 800089e:	f002 f8cd 	bl	8002a3c <__libc_init_array>
 /* Call the application's entry point.*/
   bl main
- 8000836:	f7ff fe3b 	bl	80004b0 <main>
+ 80008a2:	f7ff fe05 	bl	80004b0 <main>
   bx lr
- 800083a:	4770      	bx	lr
+ 80008a6:	4770      	bx	lr
   ldr r0, =_sdata
- 800083c:	20000000 	.word	0x20000000
+ 80008a8:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 8000840:	2000000c 	.word	0x2000000c
+ 80008ac:	2000000c 	.word	0x2000000c
   ldr r2, =_sidata
- 8000844:	08002a64 	.word	0x08002a64
+ 80008b0:	08002ad0 	.word	0x08002ad0
   ldr r2, =_sbss
- 8000848:	2000000c 	.word	0x2000000c
+ 80008b4:	2000000c 	.word	0x2000000c
   ldr r4, =_ebss
- 800084c:	20000080 	.word	0x20000080
+ 80008b8:	20000084 	.word	0x20000084
 
-08000850 <ADC1_IRQHandler>:
+080008bc <ADC1_IRQHandler>:
  * @retval : None
 */
     .section .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
   b Infinite_Loop
- 8000850:	e7fe      	b.n	8000850 <ADC1_IRQHandler>
+ 80008bc:	e7fe      	b.n	80008bc <ADC1_IRQHandler>
 
-08000852 <HAL_Init>:
+080008be <HAL_Init>:
   *        In the default implementation,Systick is used as source of time base.
   *        the tick variable is incremented each 1ms in its ISR.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_Init(void)
 {
- 8000852:	b580      	push	{r7, lr}
- 8000854:	b082      	sub	sp, #8
- 8000856:	af00      	add	r7, sp, #0
+ 80008be:	b580      	push	{r7, lr}
+ 80008c0:	b082      	sub	sp, #8
+ 80008c2:	af00      	add	r7, sp, #0
   HAL_StatusTypeDef  status = HAL_OK;
- 8000858:	2300      	movs	r3, #0
- 800085a:	71fb      	strb	r3, [r7, #7]
+ 80008c4:	2300      	movs	r3, #0
+ 80008c6:	71fb      	strb	r3, [r7, #7]
 #if (PREFETCH_ENABLE != 0)
   __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 #endif /* PREFETCH_ENABLE */
 
   /* Set Interrupt Group Priority */
   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 800085c:	2003      	movs	r0, #3
- 800085e:	f000 f939 	bl	8000ad4 <HAL_NVIC_SetPriorityGrouping>
+ 80008c8:	2003      	movs	r0, #3
+ 80008ca:	f000 f939 	bl	8000b40 <HAL_NVIC_SetPriorityGrouping>
 
   /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
   if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
- 8000862:	200f      	movs	r0, #15
- 8000864:	f000 f80e 	bl	8000884 <HAL_InitTick>
- 8000868:	4603      	mov	r3, r0
- 800086a:	2b00      	cmp	r3, #0
- 800086c:	d002      	beq.n	8000874 <HAL_Init+0x22>
+ 80008ce:	200f      	movs	r0, #15
+ 80008d0:	f000 f80e 	bl	80008f0 <HAL_InitTick>
+ 80008d4:	4603      	mov	r3, r0
+ 80008d6:	2b00      	cmp	r3, #0
+ 80008d8:	d002      	beq.n	80008e0 <HAL_Init+0x22>
   {
     status = HAL_ERROR;
- 800086e:	2301      	movs	r3, #1
- 8000870:	71fb      	strb	r3, [r7, #7]
- 8000872:	e001      	b.n	8000878 <HAL_Init+0x26>
+ 80008da:	2301      	movs	r3, #1
+ 80008dc:	71fb      	strb	r3, [r7, #7]
+ 80008de:	e001      	b.n	80008e4 <HAL_Init+0x26>
   }
   else
   {
     /* Init the low level hardware */
     HAL_MspInit();
- 8000874:	f7ff ff24 	bl	80006c0 <HAL_MspInit>
+ 80008e0:	f7ff ff24 	bl	800072c <HAL_MspInit>
   }
 
   /* Return function status */
   return status;
- 8000878:	79fb      	ldrb	r3, [r7, #7]
+ 80008e4:	79fb      	ldrb	r3, [r7, #7]
 }
- 800087a:	4618      	mov	r0, r3
- 800087c:	3708      	adds	r7, #8
- 800087e:	46bd      	mov	sp, r7
- 8000880:	bd80      	pop	{r7, pc}
+ 80008e6:	4618      	mov	r0, r3
+ 80008e8:	3708      	adds	r7, #8
+ 80008ea:	46bd      	mov	sp, r7
+ 80008ec:	bd80      	pop	{r7, pc}
 	...
 
-08000884 <HAL_InitTick>:
+080008f0 <HAL_InitTick>:
   *       implementation  in user file.
   * @param TickPriority Tick interrupt priority.
   * @retval HAL status
   */
 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 {
- 8000884:	b580      	push	{r7, lr}
- 8000886:	b084      	sub	sp, #16
- 8000888:	af00      	add	r7, sp, #0
- 800088a:	6078      	str	r0, [r7, #4]
+ 80008f0:	b580      	push	{r7, lr}
+ 80008f2:	b084      	sub	sp, #16
+ 80008f4:	af00      	add	r7, sp, #0
+ 80008f6:	6078      	str	r0, [r7, #4]
   HAL_StatusTypeDef  status = HAL_OK;
- 800088c:	2300      	movs	r3, #0
- 800088e:	73fb      	strb	r3, [r7, #15]
+ 80008f8:	2300      	movs	r3, #0
+ 80008fa:	73fb      	strb	r3, [r7, #15]
 
   if (uwTickFreq != 0U)
- 8000890:	4b16      	ldr	r3, [pc, #88]	@ (80008ec <HAL_InitTick+0x68>)
- 8000892:	681b      	ldr	r3, [r3, #0]
- 8000894:	2b00      	cmp	r3, #0
- 8000896:	d022      	beq.n	80008de <HAL_InitTick+0x5a>
+ 80008fc:	4b16      	ldr	r3, [pc, #88]	@ (8000958 <HAL_InitTick+0x68>)
+ 80008fe:	681b      	ldr	r3, [r3, #0]
+ 8000900:	2b00      	cmp	r3, #0
+ 8000902:	d022      	beq.n	800094a <HAL_InitTick+0x5a>
   {
     /*Configure the SysTick to have interrupt in 1ms time basis*/
     if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
- 8000898:	4b15      	ldr	r3, [pc, #84]	@ (80008f0 <HAL_InitTick+0x6c>)
- 800089a:	681a      	ldr	r2, [r3, #0]
- 800089c:	4b13      	ldr	r3, [pc, #76]	@ (80008ec <HAL_InitTick+0x68>)
- 800089e:	681b      	ldr	r3, [r3, #0]
- 80008a0:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
- 80008a4:	fbb1 f3f3 	udiv	r3, r1, r3
- 80008a8:	fbb2 f3f3 	udiv	r3, r2, r3
- 80008ac:	4618      	mov	r0, r3
- 80008ae:	f000 f938 	bl	8000b22 <HAL_SYSTICK_Config>
- 80008b2:	4603      	mov	r3, r0
- 80008b4:	2b00      	cmp	r3, #0
- 80008b6:	d10f      	bne.n	80008d8 <HAL_InitTick+0x54>
+ 8000904:	4b15      	ldr	r3, [pc, #84]	@ (800095c <HAL_InitTick+0x6c>)
+ 8000906:	681a      	ldr	r2, [r3, #0]
+ 8000908:	4b13      	ldr	r3, [pc, #76]	@ (8000958 <HAL_InitTick+0x68>)
+ 800090a:	681b      	ldr	r3, [r3, #0]
+ 800090c:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
+ 8000910:	fbb1 f3f3 	udiv	r3, r1, r3
+ 8000914:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8000918:	4618      	mov	r0, r3
+ 800091a:	f000 f938 	bl	8000b8e <HAL_SYSTICK_Config>
+ 800091e:	4603      	mov	r3, r0
+ 8000920:	2b00      	cmp	r3, #0
+ 8000922:	d10f      	bne.n	8000944 <HAL_InitTick+0x54>
     {
       /* Configure the SysTick IRQ priority */
       if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 80008b8:	687b      	ldr	r3, [r7, #4]
- 80008ba:	2b0f      	cmp	r3, #15
- 80008bc:	d809      	bhi.n	80008d2 <HAL_InitTick+0x4e>
+ 8000924:	687b      	ldr	r3, [r7, #4]
+ 8000926:	2b0f      	cmp	r3, #15
+ 8000928:	d809      	bhi.n	800093e <HAL_InitTick+0x4e>
       {
         HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 80008be:	2200      	movs	r2, #0
- 80008c0:	6879      	ldr	r1, [r7, #4]
- 80008c2:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
- 80008c6:	f000 f910 	bl	8000aea <HAL_NVIC_SetPriority>
+ 800092a:	2200      	movs	r2, #0
+ 800092c:	6879      	ldr	r1, [r7, #4]
+ 800092e:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
+ 8000932:	f000 f910 	bl	8000b56 <HAL_NVIC_SetPriority>
         uwTickPrio = TickPriority;
- 80008ca:	4a0a      	ldr	r2, [pc, #40]	@ (80008f4 <HAL_InitTick+0x70>)
- 80008cc:	687b      	ldr	r3, [r7, #4]
- 80008ce:	6013      	str	r3, [r2, #0]
- 80008d0:	e007      	b.n	80008e2 <HAL_InitTick+0x5e>
+ 8000936:	4a0a      	ldr	r2, [pc, #40]	@ (8000960 <HAL_InitTick+0x70>)
+ 8000938:	687b      	ldr	r3, [r7, #4]
+ 800093a:	6013      	str	r3, [r2, #0]
+ 800093c:	e007      	b.n	800094e <HAL_InitTick+0x5e>
       }
       else
       {
         status = HAL_ERROR;
- 80008d2:	2301      	movs	r3, #1
- 80008d4:	73fb      	strb	r3, [r7, #15]
- 80008d6:	e004      	b.n	80008e2 <HAL_InitTick+0x5e>
+ 800093e:	2301      	movs	r3, #1
+ 8000940:	73fb      	strb	r3, [r7, #15]
+ 8000942:	e004      	b.n	800094e <HAL_InitTick+0x5e>
       }
     }
     else
     {
       status = HAL_ERROR;
- 80008d8:	2301      	movs	r3, #1
- 80008da:	73fb      	strb	r3, [r7, #15]
- 80008dc:	e001      	b.n	80008e2 <HAL_InitTick+0x5e>
+ 8000944:	2301      	movs	r3, #1
+ 8000946:	73fb      	strb	r3, [r7, #15]
+ 8000948:	e001      	b.n	800094e <HAL_InitTick+0x5e>
     }
   }
   else
   {
     status = HAL_ERROR;
- 80008de:	2301      	movs	r3, #1
- 80008e0:	73fb      	strb	r3, [r7, #15]
+ 800094a:	2301      	movs	r3, #1
+ 800094c:	73fb      	strb	r3, [r7, #15]
   }
 
   /* Return function status */
   return status;
- 80008e2:	7bfb      	ldrb	r3, [r7, #15]
+ 800094e:	7bfb      	ldrb	r3, [r7, #15]
 }
- 80008e4:	4618      	mov	r0, r3
- 80008e6:	3710      	adds	r7, #16
- 80008e8:	46bd      	mov	sp, r7
- 80008ea:	bd80      	pop	{r7, pc}
- 80008ec:	20000008 	.word	0x20000008
- 80008f0:	20000000 	.word	0x20000000
- 80008f4:	20000004 	.word	0x20000004
+ 8000950:	4618      	mov	r0, r3
+ 8000952:	3710      	adds	r7, #16
+ 8000954:	46bd      	mov	sp, r7
+ 8000956:	bd80      	pop	{r7, pc}
+ 8000958:	20000008 	.word	0x20000008
+ 800095c:	20000000 	.word	0x20000000
+ 8000960:	20000004 	.word	0x20000004
 
-080008f8 <HAL_IncTick>:
+08000964 <HAL_IncTick>:
  * @note This function is declared as __weak to be overwritten in case of other
   *      implementations in user file.
   * @retval None
   */
 __weak void HAL_IncTick(void)
 {
- 80008f8:	b480      	push	{r7}
- 80008fa:	af00      	add	r7, sp, #0
+ 8000964:	b480      	push	{r7}
+ 8000966:	af00      	add	r7, sp, #0
   uwTick += uwTickFreq;
- 80008fc:	4b05      	ldr	r3, [pc, #20]	@ (8000914 <HAL_IncTick+0x1c>)
- 80008fe:	681a      	ldr	r2, [r3, #0]
- 8000900:	4b05      	ldr	r3, [pc, #20]	@ (8000918 <HAL_IncTick+0x20>)
- 8000902:	681b      	ldr	r3, [r3, #0]
- 8000904:	4413      	add	r3, r2
- 8000906:	4a03      	ldr	r2, [pc, #12]	@ (8000914 <HAL_IncTick+0x1c>)
- 8000908:	6013      	str	r3, [r2, #0]
+ 8000968:	4b05      	ldr	r3, [pc, #20]	@ (8000980 <HAL_IncTick+0x1c>)
+ 800096a:	681a      	ldr	r2, [r3, #0]
+ 800096c:	4b05      	ldr	r3, [pc, #20]	@ (8000984 <HAL_IncTick+0x20>)
+ 800096e:	681b      	ldr	r3, [r3, #0]
+ 8000970:	4413      	add	r3, r2
+ 8000972:	4a03      	ldr	r2, [pc, #12]	@ (8000980 <HAL_IncTick+0x1c>)
+ 8000974:	6013      	str	r3, [r2, #0]
 }
- 800090a:	bf00      	nop
- 800090c:	46bd      	mov	sp, r7
- 800090e:	bc80      	pop	{r7}
- 8000910:	4770      	bx	lr
- 8000912:	bf00      	nop
- 8000914:	2000007c 	.word	0x2000007c
- 8000918:	20000008 	.word	0x20000008
+ 8000976:	bf00      	nop
+ 8000978:	46bd      	mov	sp, r7
+ 800097a:	bc80      	pop	{r7}
+ 800097c:	4770      	bx	lr
+ 800097e:	bf00      	nop
+ 8000980:	20000080 	.word	0x20000080
+ 8000984:	20000008 	.word	0x20000008
 
-0800091c <HAL_GetTick>:
+08000988 <HAL_GetTick>:
   * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
   * @retval tick value
   */
 __weak uint32_t HAL_GetTick(void)
 {
- 800091c:	b480      	push	{r7}
- 800091e:	af00      	add	r7, sp, #0
+ 8000988:	b480      	push	{r7}
+ 800098a:	af00      	add	r7, sp, #0
   return uwTick;
- 8000920:	4b02      	ldr	r3, [pc, #8]	@ (800092c <HAL_GetTick+0x10>)
- 8000922:	681b      	ldr	r3, [r3, #0]
+ 800098c:	4b02      	ldr	r3, [pc, #8]	@ (8000998 <HAL_GetTick+0x10>)
+ 800098e:	681b      	ldr	r3, [r3, #0]
 }
- 8000924:	4618      	mov	r0, r3
- 8000926:	46bd      	mov	sp, r7
- 8000928:	bc80      	pop	{r7}
- 800092a:	4770      	bx	lr
- 800092c:	2000007c 	.word	0x2000007c
+ 8000990:	4618      	mov	r0, r3
+ 8000992:	46bd      	mov	sp, r7
+ 8000994:	bc80      	pop	{r7}
+ 8000996:	4770      	bx	lr
+ 8000998:	20000080 	.word	0x20000080
 
-08000930 <HAL_Delay>:
+0800099c <HAL_Delay>:
   *       implementations in user file.
   * @param Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
 __weak void HAL_Delay(uint32_t Delay)
 {
- 8000930:	b580      	push	{r7, lr}
- 8000932:	b084      	sub	sp, #16
- 8000934:	af00      	add	r7, sp, #0
- 8000936:	6078      	str	r0, [r7, #4]
+ 800099c:	b580      	push	{r7, lr}
+ 800099e:	b084      	sub	sp, #16
+ 80009a0:	af00      	add	r7, sp, #0
+ 80009a2:	6078      	str	r0, [r7, #4]
   uint32_t tickstart = HAL_GetTick();
- 8000938:	f7ff fff0 	bl	800091c <HAL_GetTick>
- 800093c:	60b8      	str	r0, [r7, #8]
+ 80009a4:	f7ff fff0 	bl	8000988 <HAL_GetTick>
+ 80009a8:	60b8      	str	r0, [r7, #8]
   uint32_t wait = Delay;
- 800093e:	687b      	ldr	r3, [r7, #4]
- 8000940:	60fb      	str	r3, [r7, #12]
+ 80009aa:	687b      	ldr	r3, [r7, #4]
+ 80009ac:	60fb      	str	r3, [r7, #12]
 
   /* Add a period to guaranty minimum wait */
   if (wait < HAL_MAX_DELAY)
- 8000942:	68fb      	ldr	r3, [r7, #12]
- 8000944:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8000948:	d004      	beq.n	8000954 <HAL_Delay+0x24>
+ 80009ae:	68fb      	ldr	r3, [r7, #12]
+ 80009b0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 80009b4:	d004      	beq.n	80009c0 <HAL_Delay+0x24>
   {
     wait += (uint32_t)(uwTickFreq);
- 800094a:	4b09      	ldr	r3, [pc, #36]	@ (8000970 <HAL_Delay+0x40>)
- 800094c:	681b      	ldr	r3, [r3, #0]
- 800094e:	68fa      	ldr	r2, [r7, #12]
- 8000950:	4413      	add	r3, r2
- 8000952:	60fb      	str	r3, [r7, #12]
+ 80009b6:	4b09      	ldr	r3, [pc, #36]	@ (80009dc <HAL_Delay+0x40>)
+ 80009b8:	681b      	ldr	r3, [r3, #0]
+ 80009ba:	68fa      	ldr	r2, [r7, #12]
+ 80009bc:	4413      	add	r3, r2
+ 80009be:	60fb      	str	r3, [r7, #12]
   }
 
   while((HAL_GetTick() - tickstart) < wait)
- 8000954:	bf00      	nop
- 8000956:	f7ff ffe1 	bl	800091c <HAL_GetTick>
- 800095a:	4602      	mov	r2, r0
- 800095c:	68bb      	ldr	r3, [r7, #8]
- 800095e:	1ad3      	subs	r3, r2, r3
- 8000960:	68fa      	ldr	r2, [r7, #12]
- 8000962:	429a      	cmp	r2, r3
- 8000964:	d8f7      	bhi.n	8000956 <HAL_Delay+0x26>
+ 80009c0:	bf00      	nop
+ 80009c2:	f7ff ffe1 	bl	8000988 <HAL_GetTick>
+ 80009c6:	4602      	mov	r2, r0
+ 80009c8:	68bb      	ldr	r3, [r7, #8]
+ 80009ca:	1ad3      	subs	r3, r2, r3
+ 80009cc:	68fa      	ldr	r2, [r7, #12]
+ 80009ce:	429a      	cmp	r2, r3
+ 80009d0:	d8f7      	bhi.n	80009c2 <HAL_Delay+0x26>
   {
   }
 }
- 8000966:	bf00      	nop
- 8000968:	bf00      	nop
- 800096a:	3710      	adds	r7, #16
- 800096c:	46bd      	mov	sp, r7
- 800096e:	bd80      	pop	{r7, pc}
- 8000970:	20000008 	.word	0x20000008
+ 80009d2:	bf00      	nop
+ 80009d4:	bf00      	nop
+ 80009d6:	3710      	adds	r7, #16
+ 80009d8:	46bd      	mov	sp, r7
+ 80009da:	bd80      	pop	{r7, pc}
+ 80009dc:	20000008 	.word	0x20000008
 
-08000974 <__NVIC_SetPriorityGrouping>:
+080009e0 <__NVIC_SetPriorityGrouping>:
            In case of a conflict between priority grouping and available
            priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
   \param [in]      PriorityGroup  Priority grouping field.
  */
 __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
- 8000974:	b480      	push	{r7}
- 8000976:	b085      	sub	sp, #20
- 8000978:	af00      	add	r7, sp, #0
- 800097a:	6078      	str	r0, [r7, #4]
+ 80009e0:	b480      	push	{r7}
+ 80009e2:	b085      	sub	sp, #20
+ 80009e4:	af00      	add	r7, sp, #0
+ 80009e6:	6078      	str	r0, [r7, #4]
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
- 800097c:	687b      	ldr	r3, [r7, #4]
- 800097e:	f003 0307 	and.w	r3, r3, #7
- 8000982:	60fb      	str	r3, [r7, #12]
+ 80009e8:	687b      	ldr	r3, [r7, #4]
+ 80009ea:	f003 0307 	and.w	r3, r3, #7
+ 80009ee:	60fb      	str	r3, [r7, #12]
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
- 8000984:	4b0c      	ldr	r3, [pc, #48]	@ (80009b8 <__NVIC_SetPriorityGrouping+0x44>)
- 8000986:	68db      	ldr	r3, [r3, #12]
- 8000988:	60bb      	str	r3, [r7, #8]
+ 80009f0:	4b0c      	ldr	r3, [pc, #48]	@ (8000a24 <__NVIC_SetPriorityGrouping+0x44>)
+ 80009f2:	68db      	ldr	r3, [r3, #12]
+ 80009f4:	60bb      	str	r3, [r7, #8]
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
- 800098a:	68ba      	ldr	r2, [r7, #8]
- 800098c:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
- 8000990:	4013      	ands	r3, r2
- 8000992:	60bb      	str	r3, [r7, #8]
+ 80009f6:	68ba      	ldr	r2, [r7, #8]
+ 80009f8:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
+ 80009fc:	4013      	ands	r3, r2
+ 80009fe:	60bb      	str	r3, [r7, #8]
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                 (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */
- 8000994:	68fb      	ldr	r3, [r7, #12]
- 8000996:	021a      	lsls	r2, r3, #8
+ 8000a00:	68fb      	ldr	r3, [r7, #12]
+ 8000a02:	021a      	lsls	r2, r3, #8
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8000998:	68bb      	ldr	r3, [r7, #8]
- 800099a:	4313      	orrs	r3, r2
+ 8000a04:	68bb      	ldr	r3, [r7, #8]
+ 8000a06:	4313      	orrs	r3, r2
   reg_value  =  (reg_value                                   |
- 800099c:	f043 63bf 	orr.w	r3, r3, #100139008	@ 0x5f80000
- 80009a0:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
- 80009a4:	60bb      	str	r3, [r7, #8]
+ 8000a08:	f043 63bf 	orr.w	r3, r3, #100139008	@ 0x5f80000
+ 8000a0c:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
+ 8000a10:	60bb      	str	r3, [r7, #8]
   SCB->AIRCR =  reg_value;
- 80009a6:	4a04      	ldr	r2, [pc, #16]	@ (80009b8 <__NVIC_SetPriorityGrouping+0x44>)
- 80009a8:	68bb      	ldr	r3, [r7, #8]
- 80009aa:	60d3      	str	r3, [r2, #12]
+ 8000a12:	4a04      	ldr	r2, [pc, #16]	@ (8000a24 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000a14:	68bb      	ldr	r3, [r7, #8]
+ 8000a16:	60d3      	str	r3, [r2, #12]
 }
- 80009ac:	bf00      	nop
- 80009ae:	3714      	adds	r7, #20
- 80009b0:	46bd      	mov	sp, r7
- 80009b2:	bc80      	pop	{r7}
- 80009b4:	4770      	bx	lr
- 80009b6:	bf00      	nop
- 80009b8:	e000ed00 	.word	0xe000ed00
+ 8000a18:	bf00      	nop
+ 8000a1a:	3714      	adds	r7, #20
+ 8000a1c:	46bd      	mov	sp, r7
+ 8000a1e:	bc80      	pop	{r7}
+ 8000a20:	4770      	bx	lr
+ 8000a22:	bf00      	nop
+ 8000a24:	e000ed00 	.word	0xe000ed00
 
-080009bc <__NVIC_GetPriorityGrouping>:
+08000a28 <__NVIC_GetPriorityGrouping>:
   \brief   Get Priority Grouping
   \details Reads the priority grouping field from the NVIC Interrupt Controller.
   \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
 __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
- 80009bc:	b480      	push	{r7}
- 80009be:	af00      	add	r7, sp, #0
+ 8000a28:	b480      	push	{r7}
+ 8000a2a:	af00      	add	r7, sp, #0
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 80009c0:	4b04      	ldr	r3, [pc, #16]	@ (80009d4 <__NVIC_GetPriorityGrouping+0x18>)
- 80009c2:	68db      	ldr	r3, [r3, #12]
- 80009c4:	0a1b      	lsrs	r3, r3, #8
- 80009c6:	f003 0307 	and.w	r3, r3, #7
+ 8000a2c:	4b04      	ldr	r3, [pc, #16]	@ (8000a40 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000a2e:	68db      	ldr	r3, [r3, #12]
+ 8000a30:	0a1b      	lsrs	r3, r3, #8
+ 8000a32:	f003 0307 	and.w	r3, r3, #7
 }
- 80009ca:	4618      	mov	r0, r3
- 80009cc:	46bd      	mov	sp, r7
- 80009ce:	bc80      	pop	{r7}
- 80009d0:	4770      	bx	lr
- 80009d2:	bf00      	nop
- 80009d4:	e000ed00 	.word	0xe000ed00
+ 8000a36:	4618      	mov	r0, r3
+ 8000a38:	46bd      	mov	sp, r7
+ 8000a3a:	bc80      	pop	{r7}
+ 8000a3c:	4770      	bx	lr
+ 8000a3e:	bf00      	nop
+ 8000a40:	e000ed00 	.word	0xe000ed00
 
-080009d8 <__NVIC_SetPriority>:
+08000a44 <__NVIC_SetPriority>:
   \param [in]      IRQn  Interrupt number.
   \param [in]  priority  Priority to set.
   \note    The priority cannot be set for every processor exception.
  */
 __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 {
- 80009d8:	b480      	push	{r7}
- 80009da:	b083      	sub	sp, #12
- 80009dc:	af00      	add	r7, sp, #0
- 80009de:	4603      	mov	r3, r0
- 80009e0:	6039      	str	r1, [r7, #0]
- 80009e2:	71fb      	strb	r3, [r7, #7]
+ 8000a44:	b480      	push	{r7}
+ 8000a46:	b083      	sub	sp, #12
+ 8000a48:	af00      	add	r7, sp, #0
+ 8000a4a:	4603      	mov	r3, r0
+ 8000a4c:	6039      	str	r1, [r7, #0]
+ 8000a4e:	71fb      	strb	r3, [r7, #7]
   if ((int32_t)(IRQn) >= 0)
- 80009e4:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 80009e8:	2b00      	cmp	r3, #0
- 80009ea:	db0a      	blt.n	8000a02 <__NVIC_SetPriority+0x2a>
+ 8000a50:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000a54:	2b00      	cmp	r3, #0
+ 8000a56:	db0a      	blt.n	8000a6e <__NVIC_SetPriority+0x2a>
   {
     NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 80009ec:	683b      	ldr	r3, [r7, #0]
- 80009ee:	b2da      	uxtb	r2, r3
- 80009f0:	490c      	ldr	r1, [pc, #48]	@ (8000a24 <__NVIC_SetPriority+0x4c>)
- 80009f2:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 80009f6:	0112      	lsls	r2, r2, #4
- 80009f8:	b2d2      	uxtb	r2, r2
- 80009fa:	440b      	add	r3, r1
- 80009fc:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
+ 8000a58:	683b      	ldr	r3, [r7, #0]
+ 8000a5a:	b2da      	uxtb	r2, r3
+ 8000a5c:	490c      	ldr	r1, [pc, #48]	@ (8000a90 <__NVIC_SetPriority+0x4c>)
+ 8000a5e:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000a62:	0112      	lsls	r2, r2, #4
+ 8000a64:	b2d2      	uxtb	r2, r2
+ 8000a66:	440b      	add	r3, r1
+ 8000a68:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
   }
   else
   {
     SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
   }
 }
- 8000a00:	e00a      	b.n	8000a18 <__NVIC_SetPriority+0x40>
+ 8000a6c:	e00a      	b.n	8000a84 <__NVIC_SetPriority+0x40>
     SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8000a02:	683b      	ldr	r3, [r7, #0]
- 8000a04:	b2da      	uxtb	r2, r3
- 8000a06:	4908      	ldr	r1, [pc, #32]	@ (8000a28 <__NVIC_SetPriority+0x50>)
- 8000a08:	79fb      	ldrb	r3, [r7, #7]
- 8000a0a:	f003 030f 	and.w	r3, r3, #15
- 8000a0e:	3b04      	subs	r3, #4
- 8000a10:	0112      	lsls	r2, r2, #4
- 8000a12:	b2d2      	uxtb	r2, r2
- 8000a14:	440b      	add	r3, r1
- 8000a16:	761a      	strb	r2, [r3, #24]
+ 8000a6e:	683b      	ldr	r3, [r7, #0]
+ 8000a70:	b2da      	uxtb	r2, r3
+ 8000a72:	4908      	ldr	r1, [pc, #32]	@ (8000a94 <__NVIC_SetPriority+0x50>)
+ 8000a74:	79fb      	ldrb	r3, [r7, #7]
+ 8000a76:	f003 030f 	and.w	r3, r3, #15
+ 8000a7a:	3b04      	subs	r3, #4
+ 8000a7c:	0112      	lsls	r2, r2, #4
+ 8000a7e:	b2d2      	uxtb	r2, r2
+ 8000a80:	440b      	add	r3, r1
+ 8000a82:	761a      	strb	r2, [r3, #24]
 }
- 8000a18:	bf00      	nop
- 8000a1a:	370c      	adds	r7, #12
- 8000a1c:	46bd      	mov	sp, r7
- 8000a1e:	bc80      	pop	{r7}
- 8000a20:	4770      	bx	lr
- 8000a22:	bf00      	nop
- 8000a24:	e000e100 	.word	0xe000e100
- 8000a28:	e000ed00 	.word	0xe000ed00
+ 8000a84:	bf00      	nop
+ 8000a86:	370c      	adds	r7, #12
+ 8000a88:	46bd      	mov	sp, r7
+ 8000a8a:	bc80      	pop	{r7}
+ 8000a8c:	4770      	bx	lr
+ 8000a8e:	bf00      	nop
+ 8000a90:	e000e100 	.word	0xe000e100
+ 8000a94:	e000ed00 	.word	0xe000ed00
 
-08000a2c <NVIC_EncodePriority>:
+08000a98 <NVIC_EncodePriority>:
   \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
   \param [in]       SubPriority  Subpriority value (starting from 0).
   \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
- 8000a2c:	b480      	push	{r7}
- 8000a2e:	b089      	sub	sp, #36	@ 0x24
- 8000a30:	af00      	add	r7, sp, #0
- 8000a32:	60f8      	str	r0, [r7, #12]
- 8000a34:	60b9      	str	r1, [r7, #8]
- 8000a36:	607a      	str	r2, [r7, #4]
+ 8000a98:	b480      	push	{r7}
+ 8000a9a:	b089      	sub	sp, #36	@ 0x24
+ 8000a9c:	af00      	add	r7, sp, #0
+ 8000a9e:	60f8      	str	r0, [r7, #12]
+ 8000aa0:	60b9      	str	r1, [r7, #8]
+ 8000aa2:	607a      	str	r2, [r7, #4]
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
- 8000a38:	68fb      	ldr	r3, [r7, #12]
- 8000a3a:	f003 0307 	and.w	r3, r3, #7
- 8000a3e:	61fb      	str	r3, [r7, #28]
+ 8000aa4:	68fb      	ldr	r3, [r7, #12]
+ 8000aa6:	f003 0307 	and.w	r3, r3, #7
+ 8000aaa:	61fb      	str	r3, [r7, #28]
   uint32_t PreemptPriorityBits;
   uint32_t SubPriorityBits;
 
   PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 8000a40:	69fb      	ldr	r3, [r7, #28]
- 8000a42:	f1c3 0307 	rsb	r3, r3, #7
- 8000a46:	2b04      	cmp	r3, #4
- 8000a48:	bf28      	it	cs
- 8000a4a:	2304      	movcs	r3, #4
- 8000a4c:	61bb      	str	r3, [r7, #24]
+ 8000aac:	69fb      	ldr	r3, [r7, #28]
+ 8000aae:	f1c3 0307 	rsb	r3, r3, #7
+ 8000ab2:	2b04      	cmp	r3, #4
+ 8000ab4:	bf28      	it	cs
+ 8000ab6:	2304      	movcs	r3, #4
+ 8000ab8:	61bb      	str	r3, [r7, #24]
   SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 8000a4e:	69fb      	ldr	r3, [r7, #28]
- 8000a50:	3304      	adds	r3, #4
- 8000a52:	2b06      	cmp	r3, #6
- 8000a54:	d902      	bls.n	8000a5c <NVIC_EncodePriority+0x30>
- 8000a56:	69fb      	ldr	r3, [r7, #28]
- 8000a58:	3b03      	subs	r3, #3
- 8000a5a:	e000      	b.n	8000a5e <NVIC_EncodePriority+0x32>
- 8000a5c:	2300      	movs	r3, #0
- 8000a5e:	617b      	str	r3, [r7, #20]
+ 8000aba:	69fb      	ldr	r3, [r7, #28]
+ 8000abc:	3304      	adds	r3, #4
+ 8000abe:	2b06      	cmp	r3, #6
+ 8000ac0:	d902      	bls.n	8000ac8 <NVIC_EncodePriority+0x30>
+ 8000ac2:	69fb      	ldr	r3, [r7, #28]
+ 8000ac4:	3b03      	subs	r3, #3
+ 8000ac6:	e000      	b.n	8000aca <NVIC_EncodePriority+0x32>
+ 8000ac8:	2300      	movs	r3, #0
+ 8000aca:	617b      	str	r3, [r7, #20]
 
   return (
            ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8000a60:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
- 8000a64:	69bb      	ldr	r3, [r7, #24]
- 8000a66:	fa02 f303 	lsl.w	r3, r2, r3
- 8000a6a:	43da      	mvns	r2, r3
- 8000a6c:	68bb      	ldr	r3, [r7, #8]
- 8000a6e:	401a      	ands	r2, r3
- 8000a70:	697b      	ldr	r3, [r7, #20]
- 8000a72:	409a      	lsls	r2, r3
+ 8000acc:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 8000ad0:	69bb      	ldr	r3, [r7, #24]
+ 8000ad2:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ad6:	43da      	mvns	r2, r3
+ 8000ad8:	68bb      	ldr	r3, [r7, #8]
+ 8000ada:	401a      	ands	r2, r3
+ 8000adc:	697b      	ldr	r3, [r7, #20]
+ 8000ade:	409a      	lsls	r2, r3
            ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
- 8000a74:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
- 8000a78:	697b      	ldr	r3, [r7, #20]
- 8000a7a:	fa01 f303 	lsl.w	r3, r1, r3
- 8000a7e:	43d9      	mvns	r1, r3
- 8000a80:	687b      	ldr	r3, [r7, #4]
- 8000a82:	400b      	ands	r3, r1
+ 8000ae0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
+ 8000ae4:	697b      	ldr	r3, [r7, #20]
+ 8000ae6:	fa01 f303 	lsl.w	r3, r1, r3
+ 8000aea:	43d9      	mvns	r1, r3
+ 8000aec:	687b      	ldr	r3, [r7, #4]
+ 8000aee:	400b      	ands	r3, r1
            ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8000a84:	4313      	orrs	r3, r2
+ 8000af0:	4313      	orrs	r3, r2
          );
 }
- 8000a86:	4618      	mov	r0, r3
- 8000a88:	3724      	adds	r7, #36	@ 0x24
- 8000a8a:	46bd      	mov	sp, r7
- 8000a8c:	bc80      	pop	{r7}
- 8000a8e:	4770      	bx	lr
+ 8000af2:	4618      	mov	r0, r3
+ 8000af4:	3724      	adds	r7, #36	@ 0x24
+ 8000af6:	46bd      	mov	sp, r7
+ 8000af8:	bc80      	pop	{r7}
+ 8000afa:	4770      	bx	lr
 
-08000a90 <SysTick_Config>:
+08000afc <SysTick_Config>:
   \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
            function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
            must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
- 8000a90:	b580      	push	{r7, lr}
- 8000a92:	b082      	sub	sp, #8
- 8000a94:	af00      	add	r7, sp, #0
- 8000a96:	6078      	str	r0, [r7, #4]
+ 8000afc:	b580      	push	{r7, lr}
+ 8000afe:	b082      	sub	sp, #8
+ 8000b00:	af00      	add	r7, sp, #0
+ 8000b02:	6078      	str	r0, [r7, #4]
   if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8000a98:	687b      	ldr	r3, [r7, #4]
- 8000a9a:	3b01      	subs	r3, #1
- 8000a9c:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
- 8000aa0:	d301      	bcc.n	8000aa6 <SysTick_Config+0x16>
+ 8000b04:	687b      	ldr	r3, [r7, #4]
+ 8000b06:	3b01      	subs	r3, #1
+ 8000b08:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
+ 8000b0c:	d301      	bcc.n	8000b12 <SysTick_Config+0x16>
   {
     return (1UL);                                                   /* Reload value impossible */
- 8000aa2:	2301      	movs	r3, #1
- 8000aa4:	e00f      	b.n	8000ac6 <SysTick_Config+0x36>
+ 8000b0e:	2301      	movs	r3, #1
+ 8000b10:	e00f      	b.n	8000b32 <SysTick_Config+0x36>
   }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
- 8000aa6:	4a0a      	ldr	r2, [pc, #40]	@ (8000ad0 <SysTick_Config+0x40>)
- 8000aa8:	687b      	ldr	r3, [r7, #4]
- 8000aaa:	3b01      	subs	r3, #1
- 8000aac:	6053      	str	r3, [r2, #4]
+ 8000b12:	4a0a      	ldr	r2, [pc, #40]	@ (8000b3c <SysTick_Config+0x40>)
+ 8000b14:	687b      	ldr	r3, [r7, #4]
+ 8000b16:	3b01      	subs	r3, #1
+ 8000b18:	6053      	str	r3, [r2, #4]
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 8000aae:	210f      	movs	r1, #15
- 8000ab0:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
- 8000ab4:	f7ff ff90 	bl	80009d8 <__NVIC_SetPriority>
+ 8000b1a:	210f      	movs	r1, #15
+ 8000b1c:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
+ 8000b20:	f7ff ff90 	bl	8000a44 <__NVIC_SetPriority>
   SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
- 8000ab8:	4b05      	ldr	r3, [pc, #20]	@ (8000ad0 <SysTick_Config+0x40>)
- 8000aba:	2200      	movs	r2, #0
- 8000abc:	609a      	str	r2, [r3, #8]
+ 8000b24:	4b05      	ldr	r3, [pc, #20]	@ (8000b3c <SysTick_Config+0x40>)
+ 8000b26:	2200      	movs	r2, #0
+ 8000b28:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 8000abe:	4b04      	ldr	r3, [pc, #16]	@ (8000ad0 <SysTick_Config+0x40>)
- 8000ac0:	2207      	movs	r2, #7
- 8000ac2:	601a      	str	r2, [r3, #0]
+ 8000b2a:	4b04      	ldr	r3, [pc, #16]	@ (8000b3c <SysTick_Config+0x40>)
+ 8000b2c:	2207      	movs	r2, #7
+ 8000b2e:	601a      	str	r2, [r3, #0]
                    SysTick_CTRL_TICKINT_Msk   |
                    SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
   return (0UL);                                                     /* Function successful */
- 8000ac4:	2300      	movs	r3, #0
+ 8000b30:	2300      	movs	r3, #0
 }
- 8000ac6:	4618      	mov	r0, r3
- 8000ac8:	3708      	adds	r7, #8
- 8000aca:	46bd      	mov	sp, r7
- 8000acc:	bd80      	pop	{r7, pc}
- 8000ace:	bf00      	nop
- 8000ad0:	e000e010 	.word	0xe000e010
+ 8000b32:	4618      	mov	r0, r3
+ 8000b34:	3708      	adds	r7, #8
+ 8000b36:	46bd      	mov	sp, r7
+ 8000b38:	bd80      	pop	{r7, pc}
+ 8000b3a:	bf00      	nop
+ 8000b3c:	e000e010 	.word	0xe000e010
 
-08000ad4 <HAL_NVIC_SetPriorityGrouping>:
+08000b40 <HAL_NVIC_SetPriorityGrouping>:
   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. 
   *         The pending IRQ priority will be managed only by the subpriority. 
   * @retval None
   */
 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
- 8000ad4:	b580      	push	{r7, lr}
- 8000ad6:	b082      	sub	sp, #8
- 8000ad8:	af00      	add	r7, sp, #0
- 8000ada:	6078      	str	r0, [r7, #4]
+ 8000b40:	b580      	push	{r7, lr}
+ 8000b42:	b082      	sub	sp, #8
+ 8000b44:	af00      	add	r7, sp, #0
+ 8000b46:	6078      	str	r0, [r7, #4]
   /* Check the parameters */
   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
   
   /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
   NVIC_SetPriorityGrouping(PriorityGroup);
- 8000adc:	6878      	ldr	r0, [r7, #4]
- 8000ade:	f7ff ff49 	bl	8000974 <__NVIC_SetPriorityGrouping>
+ 8000b48:	6878      	ldr	r0, [r7, #4]
+ 8000b4a:	f7ff ff49 	bl	80009e0 <__NVIC_SetPriorityGrouping>
 }
- 8000ae2:	bf00      	nop
- 8000ae4:	3708      	adds	r7, #8
- 8000ae6:	46bd      	mov	sp, r7
- 8000ae8:	bd80      	pop	{r7, pc}
+ 8000b4e:	bf00      	nop
+ 8000b50:	3708      	adds	r7, #8
+ 8000b52:	46bd      	mov	sp, r7
+ 8000b54:	bd80      	pop	{r7, pc}
 
-08000aea <HAL_NVIC_SetPriority>:
+08000b56 <HAL_NVIC_SetPriority>:
   *         This parameter can be a value between 0 and 15
   *         A lower priority value indicates a higher priority.          
   * @retval None
   */
 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 {
- 8000aea:	b580      	push	{r7, lr}
- 8000aec:	b086      	sub	sp, #24
- 8000aee:	af00      	add	r7, sp, #0
- 8000af0:	4603      	mov	r3, r0
- 8000af2:	60b9      	str	r1, [r7, #8]
- 8000af4:	607a      	str	r2, [r7, #4]
- 8000af6:	73fb      	strb	r3, [r7, #15]
+ 8000b56:	b580      	push	{r7, lr}
+ 8000b58:	b086      	sub	sp, #24
+ 8000b5a:	af00      	add	r7, sp, #0
+ 8000b5c:	4603      	mov	r3, r0
+ 8000b5e:	60b9      	str	r1, [r7, #8]
+ 8000b60:	607a      	str	r2, [r7, #4]
+ 8000b62:	73fb      	strb	r3, [r7, #15]
   uint32_t prioritygroup = 0x00;
- 8000af8:	2300      	movs	r3, #0
- 8000afa:	617b      	str	r3, [r7, #20]
+ 8000b64:	2300      	movs	r3, #0
+ 8000b66:	617b      	str	r3, [r7, #20]
   
   /* Check the parameters */
   assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
   
   prioritygroup = NVIC_GetPriorityGrouping();
- 8000afc:	f7ff ff5e 	bl	80009bc <__NVIC_GetPriorityGrouping>
- 8000b00:	6178      	str	r0, [r7, #20]
+ 8000b68:	f7ff ff5e 	bl	8000a28 <__NVIC_GetPriorityGrouping>
+ 8000b6c:	6178      	str	r0, [r7, #20]
   
   NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 8000b02:	687a      	ldr	r2, [r7, #4]
- 8000b04:	68b9      	ldr	r1, [r7, #8]
- 8000b06:	6978      	ldr	r0, [r7, #20]
- 8000b08:	f7ff ff90 	bl	8000a2c <NVIC_EncodePriority>
- 8000b0c:	4602      	mov	r2, r0
- 8000b0e:	f997 300f 	ldrsb.w	r3, [r7, #15]
- 8000b12:	4611      	mov	r1, r2
- 8000b14:	4618      	mov	r0, r3
- 8000b16:	f7ff ff5f 	bl	80009d8 <__NVIC_SetPriority>
+ 8000b6e:	687a      	ldr	r2, [r7, #4]
+ 8000b70:	68b9      	ldr	r1, [r7, #8]
+ 8000b72:	6978      	ldr	r0, [r7, #20]
+ 8000b74:	f7ff ff90 	bl	8000a98 <NVIC_EncodePriority>
+ 8000b78:	4602      	mov	r2, r0
+ 8000b7a:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8000b7e:	4611      	mov	r1, r2
+ 8000b80:	4618      	mov	r0, r3
+ 8000b82:	f7ff ff5f 	bl	8000a44 <__NVIC_SetPriority>
 }
- 8000b1a:	bf00      	nop
- 8000b1c:	3718      	adds	r7, #24
- 8000b1e:	46bd      	mov	sp, r7
- 8000b20:	bd80      	pop	{r7, pc}
+ 8000b86:	bf00      	nop
+ 8000b88:	3718      	adds	r7, #24
+ 8000b8a:	46bd      	mov	sp, r7
+ 8000b8c:	bd80      	pop	{r7, pc}
 
-08000b22 <HAL_SYSTICK_Config>:
+08000b8e <HAL_SYSTICK_Config>:
   * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
   * @retval status:  - 0  Function succeeded.
   *                  - 1  Function failed.
   */
 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 {
- 8000b22:	b580      	push	{r7, lr}
- 8000b24:	b082      	sub	sp, #8
- 8000b26:	af00      	add	r7, sp, #0
- 8000b28:	6078      	str	r0, [r7, #4]
+ 8000b8e:	b580      	push	{r7, lr}
+ 8000b90:	b082      	sub	sp, #8
+ 8000b92:	af00      	add	r7, sp, #0
+ 8000b94:	6078      	str	r0, [r7, #4]
    return SysTick_Config(TicksNumb);
- 8000b2a:	6878      	ldr	r0, [r7, #4]
- 8000b2c:	f7ff ffb0 	bl	8000a90 <SysTick_Config>
- 8000b30:	4603      	mov	r3, r0
+ 8000b96:	6878      	ldr	r0, [r7, #4]
+ 8000b98:	f7ff ffb0 	bl	8000afc <SysTick_Config>
+ 8000b9c:	4603      	mov	r3, r0
 }
- 8000b32:	4618      	mov	r0, r3
- 8000b34:	3708      	adds	r7, #8
- 8000b36:	46bd      	mov	sp, r7
- 8000b38:	bd80      	pop	{r7, pc}
+ 8000b9e:	4618      	mov	r0, r3
+ 8000ba0:	3708      	adds	r7, #8
+ 8000ba2:	46bd      	mov	sp, r7
+ 8000ba4:	bd80      	pop	{r7, pc}
 	...
 
-08000b3c <HAL_GPIO_Init>:
+08000ba8 <HAL_GPIO_Init>:
   * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
   *         the configuration information for the specified GPIO peripheral.
   * @retval None
   */
 void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
 {
- 8000b3c:	b480      	push	{r7}
- 8000b3e:	b087      	sub	sp, #28
- 8000b40:	af00      	add	r7, sp, #0
- 8000b42:	6078      	str	r0, [r7, #4]
- 8000b44:	6039      	str	r1, [r7, #0]
+ 8000ba8:	b480      	push	{r7}
+ 8000baa:	b087      	sub	sp, #28
+ 8000bac:	af00      	add	r7, sp, #0
+ 8000bae:	6078      	str	r0, [r7, #4]
+ 8000bb0:	6039      	str	r1, [r7, #0]
   uint32_t position = 0x00;
- 8000b46:	2300      	movs	r3, #0
- 8000b48:	617b      	str	r3, [r7, #20]
+ 8000bb2:	2300      	movs	r3, #0
+ 8000bb4:	617b      	str	r3, [r7, #20]
   uint32_t iocurrent = 0x00;
- 8000b4a:	2300      	movs	r3, #0
- 8000b4c:	60fb      	str	r3, [r7, #12]
+ 8000bb6:	2300      	movs	r3, #0
+ 8000bb8:	60fb      	str	r3, [r7, #12]
   uint32_t temp = 0x00;
- 8000b4e:	2300      	movs	r3, #0
- 8000b50:	613b      	str	r3, [r7, #16]
+ 8000bba:	2300      	movs	r3, #0
+ 8000bbc:	613b      	str	r3, [r7, #16]
   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
   assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
   assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
 
   /* Configure the port pins */
   while (((GPIO_Init->Pin) >> position) != 0)
- 8000b52:	e160      	b.n	8000e16 <HAL_GPIO_Init+0x2da>
+ 8000bbe:	e160      	b.n	8000e82 <HAL_GPIO_Init+0x2da>
   {
     /* Get current io position */
     iocurrent = (GPIO_Init->Pin) & (1U << position);
- 8000b54:	683b      	ldr	r3, [r7, #0]
- 8000b56:	681a      	ldr	r2, [r3, #0]
- 8000b58:	2101      	movs	r1, #1
- 8000b5a:	697b      	ldr	r3, [r7, #20]
- 8000b5c:	fa01 f303 	lsl.w	r3, r1, r3
- 8000b60:	4013      	ands	r3, r2
- 8000b62:	60fb      	str	r3, [r7, #12]
+ 8000bc0:	683b      	ldr	r3, [r7, #0]
+ 8000bc2:	681a      	ldr	r2, [r3, #0]
+ 8000bc4:	2101      	movs	r1, #1
+ 8000bc6:	697b      	ldr	r3, [r7, #20]
+ 8000bc8:	fa01 f303 	lsl.w	r3, r1, r3
+ 8000bcc:	4013      	ands	r3, r2
+ 8000bce:	60fb      	str	r3, [r7, #12]
 
     if (iocurrent)
- 8000b64:	68fb      	ldr	r3, [r7, #12]
- 8000b66:	2b00      	cmp	r3, #0
- 8000b68:	f000 8152 	beq.w	8000e10 <HAL_GPIO_Init+0x2d4>
+ 8000bd0:	68fb      	ldr	r3, [r7, #12]
+ 8000bd2:	2b00      	cmp	r3, #0
+ 8000bd4:	f000 8152 	beq.w	8000e7c <HAL_GPIO_Init+0x2d4>
     {
       /*--------------------- GPIO Mode Configuration ------------------------*/
       /* In case of Output or Alternate function mode selection */
       if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
- 8000b6c:	683b      	ldr	r3, [r7, #0]
- 8000b6e:	685b      	ldr	r3, [r3, #4]
- 8000b70:	f003 0303 	and.w	r3, r3, #3
- 8000b74:	2b01      	cmp	r3, #1
- 8000b76:	d005      	beq.n	8000b84 <HAL_GPIO_Init+0x48>
+ 8000bd8:	683b      	ldr	r3, [r7, #0]
+ 8000bda:	685b      	ldr	r3, [r3, #4]
+ 8000bdc:	f003 0303 	and.w	r3, r3, #3
+ 8000be0:	2b01      	cmp	r3, #1
+ 8000be2:	d005      	beq.n	8000bf0 <HAL_GPIO_Init+0x48>
           ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
- 8000b78:	683b      	ldr	r3, [r7, #0]
- 8000b7a:	685b      	ldr	r3, [r3, #4]
- 8000b7c:	f003 0303 	and.w	r3, r3, #3
+ 8000be4:	683b      	ldr	r3, [r7, #0]
+ 8000be6:	685b      	ldr	r3, [r3, #4]
+ 8000be8:	f003 0303 	and.w	r3, r3, #3
       if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
- 8000b80:	2b02      	cmp	r3, #2
- 8000b82:	d130      	bne.n	8000be6 <HAL_GPIO_Init+0xaa>
+ 8000bec:	2b02      	cmp	r3, #2
+ 8000bee:	d130      	bne.n	8000c52 <HAL_GPIO_Init+0xaa>
       {
         /* Check the Speed parameter */
         assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
         /* Configure the IO Speed */
         temp = GPIOx->OSPEEDR;
- 8000b84:	687b      	ldr	r3, [r7, #4]
- 8000b86:	689b      	ldr	r3, [r3, #8]
- 8000b88:	613b      	str	r3, [r7, #16]
+ 8000bf0:	687b      	ldr	r3, [r7, #4]
+ 8000bf2:	689b      	ldr	r3, [r3, #8]
+ 8000bf4:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 8000b8a:	697b      	ldr	r3, [r7, #20]
- 8000b8c:	005b      	lsls	r3, r3, #1
- 8000b8e:	2203      	movs	r2, #3
- 8000b90:	fa02 f303 	lsl.w	r3, r2, r3
- 8000b94:	43db      	mvns	r3, r3
- 8000b96:	693a      	ldr	r2, [r7, #16]
- 8000b98:	4013      	ands	r3, r2
- 8000b9a:	613b      	str	r3, [r7, #16]
+ 8000bf6:	697b      	ldr	r3, [r7, #20]
+ 8000bf8:	005b      	lsls	r3, r3, #1
+ 8000bfa:	2203      	movs	r2, #3
+ 8000bfc:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c00:	43db      	mvns	r3, r3
+ 8000c02:	693a      	ldr	r2, [r7, #16]
+ 8000c04:	4013      	ands	r3, r2
+ 8000c06:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, GPIO_Init->Speed << (position * 2));
- 8000b9c:	683b      	ldr	r3, [r7, #0]
- 8000b9e:	68da      	ldr	r2, [r3, #12]
- 8000ba0:	697b      	ldr	r3, [r7, #20]
- 8000ba2:	005b      	lsls	r3, r3, #1
- 8000ba4:	fa02 f303 	lsl.w	r3, r2, r3
- 8000ba8:	693a      	ldr	r2, [r7, #16]
- 8000baa:	4313      	orrs	r3, r2
- 8000bac:	613b      	str	r3, [r7, #16]
+ 8000c08:	683b      	ldr	r3, [r7, #0]
+ 8000c0a:	68da      	ldr	r2, [r3, #12]
+ 8000c0c:	697b      	ldr	r3, [r7, #20]
+ 8000c0e:	005b      	lsls	r3, r3, #1
+ 8000c10:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c14:	693a      	ldr	r2, [r7, #16]
+ 8000c16:	4313      	orrs	r3, r2
+ 8000c18:	613b      	str	r3, [r7, #16]
         GPIOx->OSPEEDR = temp;
- 8000bae:	687b      	ldr	r3, [r7, #4]
- 8000bb0:	693a      	ldr	r2, [r7, #16]
- 8000bb2:	609a      	str	r2, [r3, #8]
+ 8000c1a:	687b      	ldr	r3, [r7, #4]
+ 8000c1c:	693a      	ldr	r2, [r7, #16]
+ 8000c1e:	609a      	str	r2, [r3, #8]
 
         /* Configure the IO Output Type */
         temp = GPIOx->OTYPER;
- 8000bb4:	687b      	ldr	r3, [r7, #4]
- 8000bb6:	685b      	ldr	r3, [r3, #4]
- 8000bb8:	613b      	str	r3, [r7, #16]
+ 8000c20:	687b      	ldr	r3, [r7, #4]
+ 8000c22:	685b      	ldr	r3, [r3, #4]
+ 8000c24:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
- 8000bba:	2201      	movs	r2, #1
- 8000bbc:	697b      	ldr	r3, [r7, #20]
- 8000bbe:	fa02 f303 	lsl.w	r3, r2, r3
- 8000bc2:	43db      	mvns	r3, r3
- 8000bc4:	693a      	ldr	r2, [r7, #16]
- 8000bc6:	4013      	ands	r3, r2
- 8000bc8:	613b      	str	r3, [r7, #16]
+ 8000c26:	2201      	movs	r2, #1
+ 8000c28:	697b      	ldr	r3, [r7, #20]
+ 8000c2a:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c2e:	43db      	mvns	r3, r3
+ 8000c30:	693a      	ldr	r2, [r7, #16]
+ 8000c32:	4013      	ands	r3, r2
+ 8000c34:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
- 8000bca:	683b      	ldr	r3, [r7, #0]
- 8000bcc:	685b      	ldr	r3, [r3, #4]
- 8000bce:	091b      	lsrs	r3, r3, #4
- 8000bd0:	f003 0201 	and.w	r2, r3, #1
- 8000bd4:	697b      	ldr	r3, [r7, #20]
- 8000bd6:	fa02 f303 	lsl.w	r3, r2, r3
- 8000bda:	693a      	ldr	r2, [r7, #16]
- 8000bdc:	4313      	orrs	r3, r2
- 8000bde:	613b      	str	r3, [r7, #16]
+ 8000c36:	683b      	ldr	r3, [r7, #0]
+ 8000c38:	685b      	ldr	r3, [r3, #4]
+ 8000c3a:	091b      	lsrs	r3, r3, #4
+ 8000c3c:	f003 0201 	and.w	r2, r3, #1
+ 8000c40:	697b      	ldr	r3, [r7, #20]
+ 8000c42:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c46:	693a      	ldr	r2, [r7, #16]
+ 8000c48:	4313      	orrs	r3, r2
+ 8000c4a:	613b      	str	r3, [r7, #16]
         GPIOx->OTYPER = temp;
- 8000be0:	687b      	ldr	r3, [r7, #4]
- 8000be2:	693a      	ldr	r2, [r7, #16]
- 8000be4:	605a      	str	r2, [r3, #4]
+ 8000c4c:	687b      	ldr	r3, [r7, #4]
+ 8000c4e:	693a      	ldr	r2, [r7, #16]
+ 8000c50:	605a      	str	r2, [r3, #4]
       }
 
       if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
- 8000be6:	683b      	ldr	r3, [r7, #0]
- 8000be8:	685b      	ldr	r3, [r3, #4]
- 8000bea:	f003 0303 	and.w	r3, r3, #3
- 8000bee:	2b03      	cmp	r3, #3
- 8000bf0:	d017      	beq.n	8000c22 <HAL_GPIO_Init+0xe6>
+ 8000c52:	683b      	ldr	r3, [r7, #0]
+ 8000c54:	685b      	ldr	r3, [r3, #4]
+ 8000c56:	f003 0303 	and.w	r3, r3, #3
+ 8000c5a:	2b03      	cmp	r3, #3
+ 8000c5c:	d017      	beq.n	8000c8e <HAL_GPIO_Init+0xe6>
       {
         /* Check the Pull parameter */
         assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
 
         /* Activate the Pull-up or Pull down resistor for the current IO */
         temp = GPIOx->PUPDR;
- 8000bf2:	687b      	ldr	r3, [r7, #4]
- 8000bf4:	68db      	ldr	r3, [r3, #12]
- 8000bf6:	613b      	str	r3, [r7, #16]
+ 8000c5e:	687b      	ldr	r3, [r7, #4]
+ 8000c60:	68db      	ldr	r3, [r3, #12]
+ 8000c62:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
- 8000bf8:	697b      	ldr	r3, [r7, #20]
- 8000bfa:	005b      	lsls	r3, r3, #1
- 8000bfc:	2203      	movs	r2, #3
- 8000bfe:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c02:	43db      	mvns	r3, r3
- 8000c04:	693a      	ldr	r2, [r7, #16]
- 8000c06:	4013      	ands	r3, r2
- 8000c08:	613b      	str	r3, [r7, #16]
+ 8000c64:	697b      	ldr	r3, [r7, #20]
+ 8000c66:	005b      	lsls	r3, r3, #1
+ 8000c68:	2203      	movs	r2, #3
+ 8000c6a:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c6e:	43db      	mvns	r3, r3
+ 8000c70:	693a      	ldr	r2, [r7, #16]
+ 8000c72:	4013      	ands	r3, r2
+ 8000c74:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
- 8000c0a:	683b      	ldr	r3, [r7, #0]
- 8000c0c:	689a      	ldr	r2, [r3, #8]
- 8000c0e:	697b      	ldr	r3, [r7, #20]
- 8000c10:	005b      	lsls	r3, r3, #1
- 8000c12:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c16:	693a      	ldr	r2, [r7, #16]
- 8000c18:	4313      	orrs	r3, r2
- 8000c1a:	613b      	str	r3, [r7, #16]
+ 8000c76:	683b      	ldr	r3, [r7, #0]
+ 8000c78:	689a      	ldr	r2, [r3, #8]
+ 8000c7a:	697b      	ldr	r3, [r7, #20]
+ 8000c7c:	005b      	lsls	r3, r3, #1
+ 8000c7e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000c82:	693a      	ldr	r2, [r7, #16]
+ 8000c84:	4313      	orrs	r3, r2
+ 8000c86:	613b      	str	r3, [r7, #16]
         GPIOx->PUPDR = temp;
- 8000c1c:	687b      	ldr	r3, [r7, #4]
- 8000c1e:	693a      	ldr	r2, [r7, #16]
- 8000c20:	60da      	str	r2, [r3, #12]
+ 8000c88:	687b      	ldr	r3, [r7, #4]
+ 8000c8a:	693a      	ldr	r2, [r7, #16]
+ 8000c8c:	60da      	str	r2, [r3, #12]
       }
 
       /* In case of Alternate function mode selection */
       if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- 8000c22:	683b      	ldr	r3, [r7, #0]
- 8000c24:	685b      	ldr	r3, [r3, #4]
- 8000c26:	f003 0303 	and.w	r3, r3, #3
- 8000c2a:	2b02      	cmp	r3, #2
- 8000c2c:	d123      	bne.n	8000c76 <HAL_GPIO_Init+0x13a>
+ 8000c8e:	683b      	ldr	r3, [r7, #0]
+ 8000c90:	685b      	ldr	r3, [r3, #4]
+ 8000c92:	f003 0303 	and.w	r3, r3, #3
+ 8000c96:	2b02      	cmp	r3, #2
+ 8000c98:	d123      	bne.n	8000ce2 <HAL_GPIO_Init+0x13a>
         assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
         assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
 
         /* Configure Alternate function mapped with the current IO */
         /* Identify AFRL or AFRH register based on IO position*/
         temp = GPIOx->AFR[position >> 3];
- 8000c2e:	697b      	ldr	r3, [r7, #20]
- 8000c30:	08da      	lsrs	r2, r3, #3
- 8000c32:	687b      	ldr	r3, [r7, #4]
- 8000c34:	3208      	adds	r2, #8
- 8000c36:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
- 8000c3a:	613b      	str	r3, [r7, #16]
+ 8000c9a:	697b      	ldr	r3, [r7, #20]
+ 8000c9c:	08da      	lsrs	r2, r3, #3
+ 8000c9e:	687b      	ldr	r3, [r7, #4]
+ 8000ca0:	3208      	adds	r2, #8
+ 8000ca2:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
+ 8000ca6:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
- 8000c3c:	697b      	ldr	r3, [r7, #20]
- 8000c3e:	f003 0307 	and.w	r3, r3, #7
- 8000c42:	009b      	lsls	r3, r3, #2
- 8000c44:	220f      	movs	r2, #15
- 8000c46:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c4a:	43db      	mvns	r3, r3
- 8000c4c:	693a      	ldr	r2, [r7, #16]
- 8000c4e:	4013      	ands	r3, r2
- 8000c50:	613b      	str	r3, [r7, #16]
+ 8000ca8:	697b      	ldr	r3, [r7, #20]
+ 8000caa:	f003 0307 	and.w	r3, r3, #7
+ 8000cae:	009b      	lsls	r3, r3, #2
+ 8000cb0:	220f      	movs	r2, #15
+ 8000cb2:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000cb6:	43db      	mvns	r3, r3
+ 8000cb8:	693a      	ldr	r2, [r7, #16]
+ 8000cba:	4013      	ands	r3, r2
+ 8000cbc:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
- 8000c52:	683b      	ldr	r3, [r7, #0]
- 8000c54:	691a      	ldr	r2, [r3, #16]
- 8000c56:	697b      	ldr	r3, [r7, #20]
- 8000c58:	f003 0307 	and.w	r3, r3, #7
- 8000c5c:	009b      	lsls	r3, r3, #2
- 8000c5e:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c62:	693a      	ldr	r2, [r7, #16]
- 8000c64:	4313      	orrs	r3, r2
- 8000c66:	613b      	str	r3, [r7, #16]
+ 8000cbe:	683b      	ldr	r3, [r7, #0]
+ 8000cc0:	691a      	ldr	r2, [r3, #16]
+ 8000cc2:	697b      	ldr	r3, [r7, #20]
+ 8000cc4:	f003 0307 	and.w	r3, r3, #7
+ 8000cc8:	009b      	lsls	r3, r3, #2
+ 8000cca:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000cce:	693a      	ldr	r2, [r7, #16]
+ 8000cd0:	4313      	orrs	r3, r2
+ 8000cd2:	613b      	str	r3, [r7, #16]
         GPIOx->AFR[position >> 3] = temp;
- 8000c68:	697b      	ldr	r3, [r7, #20]
- 8000c6a:	08da      	lsrs	r2, r3, #3
- 8000c6c:	687b      	ldr	r3, [r7, #4]
- 8000c6e:	3208      	adds	r2, #8
- 8000c70:	6939      	ldr	r1, [r7, #16]
- 8000c72:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+ 8000cd4:	697b      	ldr	r3, [r7, #20]
+ 8000cd6:	08da      	lsrs	r2, r3, #3
+ 8000cd8:	687b      	ldr	r3, [r7, #4]
+ 8000cda:	3208      	adds	r2, #8
+ 8000cdc:	6939      	ldr	r1, [r7, #16]
+ 8000cde:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
       }
 
       /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
       temp = GPIOx->MODER;
- 8000c76:	687b      	ldr	r3, [r7, #4]
- 8000c78:	681b      	ldr	r3, [r3, #0]
- 8000c7a:	613b      	str	r3, [r7, #16]
+ 8000ce2:	687b      	ldr	r3, [r7, #4]
+ 8000ce4:	681b      	ldr	r3, [r3, #0]
+ 8000ce6:	613b      	str	r3, [r7, #16]
       CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
- 8000c7c:	697b      	ldr	r3, [r7, #20]
- 8000c7e:	005b      	lsls	r3, r3, #1
- 8000c80:	2203      	movs	r2, #3
- 8000c82:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c86:	43db      	mvns	r3, r3
- 8000c88:	693a      	ldr	r2, [r7, #16]
- 8000c8a:	4013      	ands	r3, r2
- 8000c8c:	613b      	str	r3, [r7, #16]
+ 8000ce8:	697b      	ldr	r3, [r7, #20]
+ 8000cea:	005b      	lsls	r3, r3, #1
+ 8000cec:	2203      	movs	r2, #3
+ 8000cee:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000cf2:	43db      	mvns	r3, r3
+ 8000cf4:	693a      	ldr	r2, [r7, #16]
+ 8000cf6:	4013      	ands	r3, r2
+ 8000cf8:	613b      	str	r3, [r7, #16]
       SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
- 8000c8e:	683b      	ldr	r3, [r7, #0]
- 8000c90:	685b      	ldr	r3, [r3, #4]
- 8000c92:	f003 0203 	and.w	r2, r3, #3
- 8000c96:	697b      	ldr	r3, [r7, #20]
- 8000c98:	005b      	lsls	r3, r3, #1
- 8000c9a:	fa02 f303 	lsl.w	r3, r2, r3
- 8000c9e:	693a      	ldr	r2, [r7, #16]
- 8000ca0:	4313      	orrs	r3, r2
- 8000ca2:	613b      	str	r3, [r7, #16]
+ 8000cfa:	683b      	ldr	r3, [r7, #0]
+ 8000cfc:	685b      	ldr	r3, [r3, #4]
+ 8000cfe:	f003 0203 	and.w	r2, r3, #3
+ 8000d02:	697b      	ldr	r3, [r7, #20]
+ 8000d04:	005b      	lsls	r3, r3, #1
+ 8000d06:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000d0a:	693a      	ldr	r2, [r7, #16]
+ 8000d0c:	4313      	orrs	r3, r2
+ 8000d0e:	613b      	str	r3, [r7, #16]
       GPIOx->MODER = temp;
- 8000ca4:	687b      	ldr	r3, [r7, #4]
- 8000ca6:	693a      	ldr	r2, [r7, #16]
- 8000ca8:	601a      	str	r2, [r3, #0]
+ 8000d10:	687b      	ldr	r3, [r7, #4]
+ 8000d12:	693a      	ldr	r2, [r7, #16]
+ 8000d14:	601a      	str	r2, [r3, #0]
 
       /*--------------------- EXTI Mode Configuration ------------------------*/
       /* Configure the External Interrupt or event for the current IO */
       if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
- 8000caa:	683b      	ldr	r3, [r7, #0]
- 8000cac:	685b      	ldr	r3, [r3, #4]
- 8000cae:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
- 8000cb2:	2b00      	cmp	r3, #0
- 8000cb4:	f000 80ac 	beq.w	8000e10 <HAL_GPIO_Init+0x2d4>
+ 8000d16:	683b      	ldr	r3, [r7, #0]
+ 8000d18:	685b      	ldr	r3, [r3, #4]
+ 8000d1a:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
+ 8000d1e:	2b00      	cmp	r3, #0
+ 8000d20:	f000 80ac 	beq.w	8000e7c <HAL_GPIO_Init+0x2d4>
       {
         /* Enable SYSCFG Clock */
         __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8000cb8:	4b5e      	ldr	r3, [pc, #376]	@ (8000e34 <HAL_GPIO_Init+0x2f8>)
- 8000cba:	6a1b      	ldr	r3, [r3, #32]
- 8000cbc:	4a5d      	ldr	r2, [pc, #372]	@ (8000e34 <HAL_GPIO_Init+0x2f8>)
- 8000cbe:	f043 0301 	orr.w	r3, r3, #1
- 8000cc2:	6213      	str	r3, [r2, #32]
- 8000cc4:	4b5b      	ldr	r3, [pc, #364]	@ (8000e34 <HAL_GPIO_Init+0x2f8>)
- 8000cc6:	6a1b      	ldr	r3, [r3, #32]
- 8000cc8:	f003 0301 	and.w	r3, r3, #1
- 8000ccc:	60bb      	str	r3, [r7, #8]
- 8000cce:	68bb      	ldr	r3, [r7, #8]
+ 8000d24:	4b5e      	ldr	r3, [pc, #376]	@ (8000ea0 <HAL_GPIO_Init+0x2f8>)
+ 8000d26:	6a1b      	ldr	r3, [r3, #32]
+ 8000d28:	4a5d      	ldr	r2, [pc, #372]	@ (8000ea0 <HAL_GPIO_Init+0x2f8>)
+ 8000d2a:	f043 0301 	orr.w	r3, r3, #1
+ 8000d2e:	6213      	str	r3, [r2, #32]
+ 8000d30:	4b5b      	ldr	r3, [pc, #364]	@ (8000ea0 <HAL_GPIO_Init+0x2f8>)
+ 8000d32:	6a1b      	ldr	r3, [r3, #32]
+ 8000d34:	f003 0301 	and.w	r3, r3, #1
+ 8000d38:	60bb      	str	r3, [r7, #8]
+ 8000d3a:	68bb      	ldr	r3, [r7, #8]
 
         temp = SYSCFG->EXTICR[position >> 2];
- 8000cd0:	4a59      	ldr	r2, [pc, #356]	@ (8000e38 <HAL_GPIO_Init+0x2fc>)
- 8000cd2:	697b      	ldr	r3, [r7, #20]
- 8000cd4:	089b      	lsrs	r3, r3, #2
- 8000cd6:	3302      	adds	r3, #2
- 8000cd8:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8000cdc:	613b      	str	r3, [r7, #16]
+ 8000d3c:	4a59      	ldr	r2, [pc, #356]	@ (8000ea4 <HAL_GPIO_Init+0x2fc>)
+ 8000d3e:	697b      	ldr	r3, [r7, #20]
+ 8000d40:	089b      	lsrs	r3, r3, #2
+ 8000d42:	3302      	adds	r3, #2
+ 8000d44:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8000d48:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
- 8000cde:	697b      	ldr	r3, [r7, #20]
- 8000ce0:	f003 0303 	and.w	r3, r3, #3
- 8000ce4:	009b      	lsls	r3, r3, #2
- 8000ce6:	220f      	movs	r2, #15
- 8000ce8:	fa02 f303 	lsl.w	r3, r2, r3
- 8000cec:	43db      	mvns	r3, r3
- 8000cee:	693a      	ldr	r2, [r7, #16]
- 8000cf0:	4013      	ands	r3, r2
- 8000cf2:	613b      	str	r3, [r7, #16]
+ 8000d4a:	697b      	ldr	r3, [r7, #20]
+ 8000d4c:	f003 0303 	and.w	r3, r3, #3
+ 8000d50:	009b      	lsls	r3, r3, #2
+ 8000d52:	220f      	movs	r2, #15
+ 8000d54:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000d58:	43db      	mvns	r3, r3
+ 8000d5a:	693a      	ldr	r2, [r7, #16]
+ 8000d5c:	4013      	ands	r3, r2
+ 8000d5e:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
- 8000cf4:	687b      	ldr	r3, [r7, #4]
- 8000cf6:	4a51      	ldr	r2, [pc, #324]	@ (8000e3c <HAL_GPIO_Init+0x300>)
- 8000cf8:	4293      	cmp	r3, r2
- 8000cfa:	d025      	beq.n	8000d48 <HAL_GPIO_Init+0x20c>
- 8000cfc:	687b      	ldr	r3, [r7, #4]
- 8000cfe:	4a50      	ldr	r2, [pc, #320]	@ (8000e40 <HAL_GPIO_Init+0x304>)
- 8000d00:	4293      	cmp	r3, r2
- 8000d02:	d01f      	beq.n	8000d44 <HAL_GPIO_Init+0x208>
- 8000d04:	687b      	ldr	r3, [r7, #4]
- 8000d06:	4a4f      	ldr	r2, [pc, #316]	@ (8000e44 <HAL_GPIO_Init+0x308>)
- 8000d08:	4293      	cmp	r3, r2
- 8000d0a:	d019      	beq.n	8000d40 <HAL_GPIO_Init+0x204>
- 8000d0c:	687b      	ldr	r3, [r7, #4]
- 8000d0e:	4a4e      	ldr	r2, [pc, #312]	@ (8000e48 <HAL_GPIO_Init+0x30c>)
- 8000d10:	4293      	cmp	r3, r2
- 8000d12:	d013      	beq.n	8000d3c <HAL_GPIO_Init+0x200>
- 8000d14:	687b      	ldr	r3, [r7, #4]
- 8000d16:	4a4d      	ldr	r2, [pc, #308]	@ (8000e4c <HAL_GPIO_Init+0x310>)
- 8000d18:	4293      	cmp	r3, r2
- 8000d1a:	d00d      	beq.n	8000d38 <HAL_GPIO_Init+0x1fc>
- 8000d1c:	687b      	ldr	r3, [r7, #4]
- 8000d1e:	4a4c      	ldr	r2, [pc, #304]	@ (8000e50 <HAL_GPIO_Init+0x314>)
- 8000d20:	4293      	cmp	r3, r2
- 8000d22:	d007      	beq.n	8000d34 <HAL_GPIO_Init+0x1f8>
- 8000d24:	687b      	ldr	r3, [r7, #4]
- 8000d26:	4a4b      	ldr	r2, [pc, #300]	@ (8000e54 <HAL_GPIO_Init+0x318>)
- 8000d28:	4293      	cmp	r3, r2
- 8000d2a:	d101      	bne.n	8000d30 <HAL_GPIO_Init+0x1f4>
- 8000d2c:	2306      	movs	r3, #6
- 8000d2e:	e00c      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d30:	2307      	movs	r3, #7
- 8000d32:	e00a      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d34:	2305      	movs	r3, #5
- 8000d36:	e008      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d38:	2304      	movs	r3, #4
- 8000d3a:	e006      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d3c:	2303      	movs	r3, #3
- 8000d3e:	e004      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d40:	2302      	movs	r3, #2
- 8000d42:	e002      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d44:	2301      	movs	r3, #1
- 8000d46:	e000      	b.n	8000d4a <HAL_GPIO_Init+0x20e>
- 8000d48:	2300      	movs	r3, #0
- 8000d4a:	697a      	ldr	r2, [r7, #20]
- 8000d4c:	f002 0203 	and.w	r2, r2, #3
- 8000d50:	0092      	lsls	r2, r2, #2
- 8000d52:	4093      	lsls	r3, r2
- 8000d54:	693a      	ldr	r2, [r7, #16]
- 8000d56:	4313      	orrs	r3, r2
- 8000d58:	613b      	str	r3, [r7, #16]
+ 8000d60:	687b      	ldr	r3, [r7, #4]
+ 8000d62:	4a51      	ldr	r2, [pc, #324]	@ (8000ea8 <HAL_GPIO_Init+0x300>)
+ 8000d64:	4293      	cmp	r3, r2
+ 8000d66:	d025      	beq.n	8000db4 <HAL_GPIO_Init+0x20c>
+ 8000d68:	687b      	ldr	r3, [r7, #4]
+ 8000d6a:	4a50      	ldr	r2, [pc, #320]	@ (8000eac <HAL_GPIO_Init+0x304>)
+ 8000d6c:	4293      	cmp	r3, r2
+ 8000d6e:	d01f      	beq.n	8000db0 <HAL_GPIO_Init+0x208>
+ 8000d70:	687b      	ldr	r3, [r7, #4]
+ 8000d72:	4a4f      	ldr	r2, [pc, #316]	@ (8000eb0 <HAL_GPIO_Init+0x308>)
+ 8000d74:	4293      	cmp	r3, r2
+ 8000d76:	d019      	beq.n	8000dac <HAL_GPIO_Init+0x204>
+ 8000d78:	687b      	ldr	r3, [r7, #4]
+ 8000d7a:	4a4e      	ldr	r2, [pc, #312]	@ (8000eb4 <HAL_GPIO_Init+0x30c>)
+ 8000d7c:	4293      	cmp	r3, r2
+ 8000d7e:	d013      	beq.n	8000da8 <HAL_GPIO_Init+0x200>
+ 8000d80:	687b      	ldr	r3, [r7, #4]
+ 8000d82:	4a4d      	ldr	r2, [pc, #308]	@ (8000eb8 <HAL_GPIO_Init+0x310>)
+ 8000d84:	4293      	cmp	r3, r2
+ 8000d86:	d00d      	beq.n	8000da4 <HAL_GPIO_Init+0x1fc>
+ 8000d88:	687b      	ldr	r3, [r7, #4]
+ 8000d8a:	4a4c      	ldr	r2, [pc, #304]	@ (8000ebc <HAL_GPIO_Init+0x314>)
+ 8000d8c:	4293      	cmp	r3, r2
+ 8000d8e:	d007      	beq.n	8000da0 <HAL_GPIO_Init+0x1f8>
+ 8000d90:	687b      	ldr	r3, [r7, #4]
+ 8000d92:	4a4b      	ldr	r2, [pc, #300]	@ (8000ec0 <HAL_GPIO_Init+0x318>)
+ 8000d94:	4293      	cmp	r3, r2
+ 8000d96:	d101      	bne.n	8000d9c <HAL_GPIO_Init+0x1f4>
+ 8000d98:	2306      	movs	r3, #6
+ 8000d9a:	e00c      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000d9c:	2307      	movs	r3, #7
+ 8000d9e:	e00a      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000da0:	2305      	movs	r3, #5
+ 8000da2:	e008      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000da4:	2304      	movs	r3, #4
+ 8000da6:	e006      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000da8:	2303      	movs	r3, #3
+ 8000daa:	e004      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000dac:	2302      	movs	r3, #2
+ 8000dae:	e002      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000db0:	2301      	movs	r3, #1
+ 8000db2:	e000      	b.n	8000db6 <HAL_GPIO_Init+0x20e>
+ 8000db4:	2300      	movs	r3, #0
+ 8000db6:	697a      	ldr	r2, [r7, #20]
+ 8000db8:	f002 0203 	and.w	r2, r2, #3
+ 8000dbc:	0092      	lsls	r2, r2, #2
+ 8000dbe:	4093      	lsls	r3, r2
+ 8000dc0:	693a      	ldr	r2, [r7, #16]
+ 8000dc2:	4313      	orrs	r3, r2
+ 8000dc4:	613b      	str	r3, [r7, #16]
         SYSCFG->EXTICR[position >> 2] = temp;
- 8000d5a:	4937      	ldr	r1, [pc, #220]	@ (8000e38 <HAL_GPIO_Init+0x2fc>)
- 8000d5c:	697b      	ldr	r3, [r7, #20]
- 8000d5e:	089b      	lsrs	r3, r3, #2
- 8000d60:	3302      	adds	r3, #2
- 8000d62:	693a      	ldr	r2, [r7, #16]
- 8000d64:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+ 8000dc6:	4937      	ldr	r1, [pc, #220]	@ (8000ea4 <HAL_GPIO_Init+0x2fc>)
+ 8000dc8:	697b      	ldr	r3, [r7, #20]
+ 8000dca:	089b      	lsrs	r3, r3, #2
+ 8000dcc:	3302      	adds	r3, #2
+ 8000dce:	693a      	ldr	r2, [r7, #16]
+ 8000dd0:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
 
         /* Clear Rising Falling edge configuration */
         temp = EXTI->RTSR;
- 8000d68:	4b3b      	ldr	r3, [pc, #236]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000d6a:	689b      	ldr	r3, [r3, #8]
- 8000d6c:	613b      	str	r3, [r7, #16]
+ 8000dd4:	4b3b      	ldr	r3, [pc, #236]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000dd6:	689b      	ldr	r3, [r3, #8]
+ 8000dd8:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (uint32_t)iocurrent);
- 8000d6e:	68fb      	ldr	r3, [r7, #12]
- 8000d70:	43db      	mvns	r3, r3
- 8000d72:	693a      	ldr	r2, [r7, #16]
- 8000d74:	4013      	ands	r3, r2
- 8000d76:	613b      	str	r3, [r7, #16]
+ 8000dda:	68fb      	ldr	r3, [r7, #12]
+ 8000ddc:	43db      	mvns	r3, r3
+ 8000dde:	693a      	ldr	r2, [r7, #16]
+ 8000de0:	4013      	ands	r3, r2
+ 8000de2:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
- 8000d78:	683b      	ldr	r3, [r7, #0]
- 8000d7a:	685b      	ldr	r3, [r3, #4]
- 8000d7c:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
- 8000d80:	2b00      	cmp	r3, #0
- 8000d82:	d003      	beq.n	8000d8c <HAL_GPIO_Init+0x250>
+ 8000de4:	683b      	ldr	r3, [r7, #0]
+ 8000de6:	685b      	ldr	r3, [r3, #4]
+ 8000de8:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
+ 8000dec:	2b00      	cmp	r3, #0
+ 8000dee:	d003      	beq.n	8000df8 <HAL_GPIO_Init+0x250>
         {
           SET_BIT(temp, iocurrent);
- 8000d84:	693a      	ldr	r2, [r7, #16]
- 8000d86:	68fb      	ldr	r3, [r7, #12]
- 8000d88:	4313      	orrs	r3, r2
- 8000d8a:	613b      	str	r3, [r7, #16]
+ 8000df0:	693a      	ldr	r2, [r7, #16]
+ 8000df2:	68fb      	ldr	r3, [r7, #12]
+ 8000df4:	4313      	orrs	r3, r2
+ 8000df6:	613b      	str	r3, [r7, #16]
         }
         EXTI->RTSR = temp;
- 8000d8c:	4a32      	ldr	r2, [pc, #200]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000d8e:	693b      	ldr	r3, [r7, #16]
- 8000d90:	6093      	str	r3, [r2, #8]
+ 8000df8:	4a32      	ldr	r2, [pc, #200]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000dfa:	693b      	ldr	r3, [r7, #16]
+ 8000dfc:	6093      	str	r3, [r2, #8]
 
         temp = EXTI->FTSR;
- 8000d92:	4b31      	ldr	r3, [pc, #196]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000d94:	68db      	ldr	r3, [r3, #12]
- 8000d96:	613b      	str	r3, [r7, #16]
+ 8000dfe:	4b31      	ldr	r3, [pc, #196]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e00:	68db      	ldr	r3, [r3, #12]
+ 8000e02:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (uint32_t)iocurrent);
- 8000d98:	68fb      	ldr	r3, [r7, #12]
- 8000d9a:	43db      	mvns	r3, r3
- 8000d9c:	693a      	ldr	r2, [r7, #16]
- 8000d9e:	4013      	ands	r3, r2
- 8000da0:	613b      	str	r3, [r7, #16]
+ 8000e04:	68fb      	ldr	r3, [r7, #12]
+ 8000e06:	43db      	mvns	r3, r3
+ 8000e08:	693a      	ldr	r2, [r7, #16]
+ 8000e0a:	4013      	ands	r3, r2
+ 8000e0c:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
- 8000da2:	683b      	ldr	r3, [r7, #0]
- 8000da4:	685b      	ldr	r3, [r3, #4]
- 8000da6:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
- 8000daa:	2b00      	cmp	r3, #0
- 8000dac:	d003      	beq.n	8000db6 <HAL_GPIO_Init+0x27a>
+ 8000e0e:	683b      	ldr	r3, [r7, #0]
+ 8000e10:	685b      	ldr	r3, [r3, #4]
+ 8000e12:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
+ 8000e16:	2b00      	cmp	r3, #0
+ 8000e18:	d003      	beq.n	8000e22 <HAL_GPIO_Init+0x27a>
         {
           SET_BIT(temp, iocurrent);
- 8000dae:	693a      	ldr	r2, [r7, #16]
- 8000db0:	68fb      	ldr	r3, [r7, #12]
- 8000db2:	4313      	orrs	r3, r2
- 8000db4:	613b      	str	r3, [r7, #16]
+ 8000e1a:	693a      	ldr	r2, [r7, #16]
+ 8000e1c:	68fb      	ldr	r3, [r7, #12]
+ 8000e1e:	4313      	orrs	r3, r2
+ 8000e20:	613b      	str	r3, [r7, #16]
         }
         EXTI->FTSR = temp;
- 8000db6:	4a28      	ldr	r2, [pc, #160]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000db8:	693b      	ldr	r3, [r7, #16]
- 8000dba:	60d3      	str	r3, [r2, #12]
+ 8000e22:	4a28      	ldr	r2, [pc, #160]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e24:	693b      	ldr	r3, [r7, #16]
+ 8000e26:	60d3      	str	r3, [r2, #12]
 
         temp = EXTI->EMR;
- 8000dbc:	4b26      	ldr	r3, [pc, #152]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000dbe:	685b      	ldr	r3, [r3, #4]
- 8000dc0:	613b      	str	r3, [r7, #16]
+ 8000e28:	4b26      	ldr	r3, [pc, #152]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e2a:	685b      	ldr	r3, [r3, #4]
+ 8000e2c:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (uint32_t)iocurrent);
- 8000dc2:	68fb      	ldr	r3, [r7, #12]
- 8000dc4:	43db      	mvns	r3, r3
- 8000dc6:	693a      	ldr	r2, [r7, #16]
- 8000dc8:	4013      	ands	r3, r2
- 8000dca:	613b      	str	r3, [r7, #16]
+ 8000e2e:	68fb      	ldr	r3, [r7, #12]
+ 8000e30:	43db      	mvns	r3, r3
+ 8000e32:	693a      	ldr	r2, [r7, #16]
+ 8000e34:	4013      	ands	r3, r2
+ 8000e36:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
- 8000dcc:	683b      	ldr	r3, [r7, #0]
- 8000dce:	685b      	ldr	r3, [r3, #4]
- 8000dd0:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8000dd4:	2b00      	cmp	r3, #0
- 8000dd6:	d003      	beq.n	8000de0 <HAL_GPIO_Init+0x2a4>
+ 8000e38:	683b      	ldr	r3, [r7, #0]
+ 8000e3a:	685b      	ldr	r3, [r3, #4]
+ 8000e3c:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8000e40:	2b00      	cmp	r3, #0
+ 8000e42:	d003      	beq.n	8000e4c <HAL_GPIO_Init+0x2a4>
         {
           SET_BIT(temp, iocurrent);
- 8000dd8:	693a      	ldr	r2, [r7, #16]
- 8000dda:	68fb      	ldr	r3, [r7, #12]
- 8000ddc:	4313      	orrs	r3, r2
- 8000dde:	613b      	str	r3, [r7, #16]
+ 8000e44:	693a      	ldr	r2, [r7, #16]
+ 8000e46:	68fb      	ldr	r3, [r7, #12]
+ 8000e48:	4313      	orrs	r3, r2
+ 8000e4a:	613b      	str	r3, [r7, #16]
         }
         EXTI->EMR = temp;
- 8000de0:	4a1d      	ldr	r2, [pc, #116]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000de2:	693b      	ldr	r3, [r7, #16]
- 8000de4:	6053      	str	r3, [r2, #4]
+ 8000e4c:	4a1d      	ldr	r2, [pc, #116]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e4e:	693b      	ldr	r3, [r7, #16]
+ 8000e50:	6053      	str	r3, [r2, #4]
 
         /* Clear EXTI line configuration */
         temp = EXTI->IMR;
- 8000de6:	4b1c      	ldr	r3, [pc, #112]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000de8:	681b      	ldr	r3, [r3, #0]
- 8000dea:	613b      	str	r3, [r7, #16]
+ 8000e52:	4b1c      	ldr	r3, [pc, #112]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e54:	681b      	ldr	r3, [r3, #0]
+ 8000e56:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (uint32_t)iocurrent);
- 8000dec:	68fb      	ldr	r3, [r7, #12]
- 8000dee:	43db      	mvns	r3, r3
- 8000df0:	693a      	ldr	r2, [r7, #16]
- 8000df2:	4013      	ands	r3, r2
- 8000df4:	613b      	str	r3, [r7, #16]
+ 8000e58:	68fb      	ldr	r3, [r7, #12]
+ 8000e5a:	43db      	mvns	r3, r3
+ 8000e5c:	693a      	ldr	r2, [r7, #16]
+ 8000e5e:	4013      	ands	r3, r2
+ 8000e60:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
- 8000df6:	683b      	ldr	r3, [r7, #0]
- 8000df8:	685b      	ldr	r3, [r3, #4]
- 8000dfa:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8000dfe:	2b00      	cmp	r3, #0
- 8000e00:	d003      	beq.n	8000e0a <HAL_GPIO_Init+0x2ce>
+ 8000e62:	683b      	ldr	r3, [r7, #0]
+ 8000e64:	685b      	ldr	r3, [r3, #4]
+ 8000e66:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
+ 8000e6a:	2b00      	cmp	r3, #0
+ 8000e6c:	d003      	beq.n	8000e76 <HAL_GPIO_Init+0x2ce>
         {
           SET_BIT(temp, iocurrent);
- 8000e02:	693a      	ldr	r2, [r7, #16]
- 8000e04:	68fb      	ldr	r3, [r7, #12]
- 8000e06:	4313      	orrs	r3, r2
- 8000e08:	613b      	str	r3, [r7, #16]
+ 8000e6e:	693a      	ldr	r2, [r7, #16]
+ 8000e70:	68fb      	ldr	r3, [r7, #12]
+ 8000e72:	4313      	orrs	r3, r2
+ 8000e74:	613b      	str	r3, [r7, #16]
         }
         EXTI->IMR = temp;
- 8000e0a:	4a13      	ldr	r2, [pc, #76]	@ (8000e58 <HAL_GPIO_Init+0x31c>)
- 8000e0c:	693b      	ldr	r3, [r7, #16]
- 8000e0e:	6013      	str	r3, [r2, #0]
+ 8000e76:	4a13      	ldr	r2, [pc, #76]	@ (8000ec4 <HAL_GPIO_Init+0x31c>)
+ 8000e78:	693b      	ldr	r3, [r7, #16]
+ 8000e7a:	6013      	str	r3, [r2, #0]
       }
     }
 
     position++;
- 8000e10:	697b      	ldr	r3, [r7, #20]
- 8000e12:	3301      	adds	r3, #1
- 8000e14:	617b      	str	r3, [r7, #20]
+ 8000e7c:	697b      	ldr	r3, [r7, #20]
+ 8000e7e:	3301      	adds	r3, #1
+ 8000e80:	617b      	str	r3, [r7, #20]
   while (((GPIO_Init->Pin) >> position) != 0)
- 8000e16:	683b      	ldr	r3, [r7, #0]
- 8000e18:	681a      	ldr	r2, [r3, #0]
- 8000e1a:	697b      	ldr	r3, [r7, #20]
- 8000e1c:	fa22 f303 	lsr.w	r3, r2, r3
- 8000e20:	2b00      	cmp	r3, #0
- 8000e22:	f47f ae97 	bne.w	8000b54 <HAL_GPIO_Init+0x18>
+ 8000e82:	683b      	ldr	r3, [r7, #0]
+ 8000e84:	681a      	ldr	r2, [r3, #0]
+ 8000e86:	697b      	ldr	r3, [r7, #20]
+ 8000e88:	fa22 f303 	lsr.w	r3, r2, r3
+ 8000e8c:	2b00      	cmp	r3, #0
+ 8000e8e:	f47f ae97 	bne.w	8000bc0 <HAL_GPIO_Init+0x18>
   }
 }
- 8000e26:	bf00      	nop
- 8000e28:	bf00      	nop
- 8000e2a:	371c      	adds	r7, #28
- 8000e2c:	46bd      	mov	sp, r7
- 8000e2e:	bc80      	pop	{r7}
- 8000e30:	4770      	bx	lr
- 8000e32:	bf00      	nop
- 8000e34:	40023800 	.word	0x40023800
- 8000e38:	40010000 	.word	0x40010000
- 8000e3c:	40020000 	.word	0x40020000
- 8000e40:	40020400 	.word	0x40020400
- 8000e44:	40020800 	.word	0x40020800
- 8000e48:	40020c00 	.word	0x40020c00
- 8000e4c:	40021000 	.word	0x40021000
- 8000e50:	40021400 	.word	0x40021400
- 8000e54:	40021800 	.word	0x40021800
- 8000e58:	40010400 	.word	0x40010400
+ 8000e92:	bf00      	nop
+ 8000e94:	bf00      	nop
+ 8000e96:	371c      	adds	r7, #28
+ 8000e98:	46bd      	mov	sp, r7
+ 8000e9a:	bc80      	pop	{r7}
+ 8000e9c:	4770      	bx	lr
+ 8000e9e:	bf00      	nop
+ 8000ea0:	40023800 	.word	0x40023800
+ 8000ea4:	40010000 	.word	0x40010000
+ 8000ea8:	40020000 	.word	0x40020000
+ 8000eac:	40020400 	.word	0x40020400
+ 8000eb0:	40020800 	.word	0x40020800
+ 8000eb4:	40020c00 	.word	0x40020c00
+ 8000eb8:	40021000 	.word	0x40021000
+ 8000ebc:	40021400 	.word	0x40021400
+ 8000ec0:	40021800 	.word	0x40021800
+ 8000ec4:	40010400 	.word	0x40010400
 
-08000e5c <HAL_GPIO_WritePin>:
+08000ec8 <HAL_GPIO_WritePin>:
   *            @arg GPIO_PIN_RESET: to clear the port pin
   *            @arg GPIO_PIN_SET: to set the port pin
   * @retval None
   */
 void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
 {
- 8000e5c:	b480      	push	{r7}
- 8000e5e:	b083      	sub	sp, #12
- 8000e60:	af00      	add	r7, sp, #0
- 8000e62:	6078      	str	r0, [r7, #4]
- 8000e64:	460b      	mov	r3, r1
- 8000e66:	807b      	strh	r3, [r7, #2]
- 8000e68:	4613      	mov	r3, r2
- 8000e6a:	707b      	strb	r3, [r7, #1]
+ 8000ec8:	b480      	push	{r7}
+ 8000eca:	b083      	sub	sp, #12
+ 8000ecc:	af00      	add	r7, sp, #0
+ 8000ece:	6078      	str	r0, [r7, #4]
+ 8000ed0:	460b      	mov	r3, r1
+ 8000ed2:	807b      	strh	r3, [r7, #2]
+ 8000ed4:	4613      	mov	r3, r2
+ 8000ed6:	707b      	strb	r3, [r7, #1]
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   assert_param(IS_GPIO_PIN_ACTION(PinState));
 
   if (PinState != GPIO_PIN_RESET)
- 8000e6c:	787b      	ldrb	r3, [r7, #1]
- 8000e6e:	2b00      	cmp	r3, #0
- 8000e70:	d003      	beq.n	8000e7a <HAL_GPIO_WritePin+0x1e>
+ 8000ed8:	787b      	ldrb	r3, [r7, #1]
+ 8000eda:	2b00      	cmp	r3, #0
+ 8000edc:	d003      	beq.n	8000ee6 <HAL_GPIO_WritePin+0x1e>
   {
     GPIOx->BSRR = (uint32_t)GPIO_Pin;
- 8000e72:	887a      	ldrh	r2, [r7, #2]
- 8000e74:	687b      	ldr	r3, [r7, #4]
- 8000e76:	619a      	str	r2, [r3, #24]
+ 8000ede:	887a      	ldrh	r2, [r7, #2]
+ 8000ee0:	687b      	ldr	r3, [r7, #4]
+ 8000ee2:	619a      	str	r2, [r3, #24]
   }
   else
   {
     GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
   }
 }
- 8000e78:	e003      	b.n	8000e82 <HAL_GPIO_WritePin+0x26>
+ 8000ee4:	e003      	b.n	8000eee <HAL_GPIO_WritePin+0x26>
     GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
- 8000e7a:	887b      	ldrh	r3, [r7, #2]
- 8000e7c:	041a      	lsls	r2, r3, #16
- 8000e7e:	687b      	ldr	r3, [r7, #4]
- 8000e80:	619a      	str	r2, [r3, #24]
+ 8000ee6:	887b      	ldrh	r3, [r7, #2]
+ 8000ee8:	041a      	lsls	r2, r3, #16
+ 8000eea:	687b      	ldr	r3, [r7, #4]
+ 8000eec:	619a      	str	r2, [r3, #24]
 }
- 8000e82:	bf00      	nop
- 8000e84:	370c      	adds	r7, #12
- 8000e86:	46bd      	mov	sp, r7
- 8000e88:	bc80      	pop	{r7}
- 8000e8a:	4770      	bx	lr
+ 8000eee:	bf00      	nop
+ 8000ef0:	370c      	adds	r7, #12
+ 8000ef2:	46bd      	mov	sp, r7
+ 8000ef4:	bc80      	pop	{r7}
+ 8000ef6:	4770      	bx	lr
 
-08000e8c <HAL_I2C_Init>:
+08000ef8 <HAL_I2C_Init>:
   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
   *                the configuration information for the specified I2C.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
 {
- 8000e8c:	b580      	push	{r7, lr}
- 8000e8e:	b084      	sub	sp, #16
- 8000e90:	af00      	add	r7, sp, #0
- 8000e92:	6078      	str	r0, [r7, #4]
+ 8000ef8:	b580      	push	{r7, lr}
+ 8000efa:	b084      	sub	sp, #16
+ 8000efc:	af00      	add	r7, sp, #0
+ 8000efe:	6078      	str	r0, [r7, #4]
   uint32_t freqrange;
   uint32_t pclk1;
 
   /* Check the I2C handle allocation */
   if (hi2c == NULL)
- 8000e94:	687b      	ldr	r3, [r7, #4]
- 8000e96:	2b00      	cmp	r3, #0
- 8000e98:	d101      	bne.n	8000e9e <HAL_I2C_Init+0x12>
+ 8000f00:	687b      	ldr	r3, [r7, #4]
+ 8000f02:	2b00      	cmp	r3, #0
+ 8000f04:	d101      	bne.n	8000f0a <HAL_I2C_Init+0x12>
   {
     return HAL_ERROR;
- 8000e9a:	2301      	movs	r3, #1
- 8000e9c:	e12b      	b.n	80010f6 <HAL_I2C_Init+0x26a>
+ 8000f06:	2301      	movs	r3, #1
+ 8000f08:	e12b      	b.n	8001162 <HAL_I2C_Init+0x26a>
   assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
   assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
   assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
   assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
 
   if (hi2c->State == HAL_I2C_STATE_RESET)
- 8000e9e:	687b      	ldr	r3, [r7, #4]
- 8000ea0:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
- 8000ea4:	b2db      	uxtb	r3, r3
- 8000ea6:	2b00      	cmp	r3, #0
- 8000ea8:	d106      	bne.n	8000eb8 <HAL_I2C_Init+0x2c>
+ 8000f0a:	687b      	ldr	r3, [r7, #4]
+ 8000f0c:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8000f10:	b2db      	uxtb	r3, r3
+ 8000f12:	2b00      	cmp	r3, #0
+ 8000f14:	d106      	bne.n	8000f24 <HAL_I2C_Init+0x2c>
   {
     /* Allocate lock resource and initialize it */
     hi2c->Lock = HAL_UNLOCKED;
- 8000eaa:	687b      	ldr	r3, [r7, #4]
- 8000eac:	2200      	movs	r2, #0
- 8000eae:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8000f16:	687b      	ldr	r3, [r7, #4]
+ 8000f18:	2200      	movs	r2, #0
+ 8000f1a:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     /* Init the low level hardware : GPIO, CLOCK, NVIC */
     hi2c->MspInitCallback(hi2c);
 #else
     /* Init the low level hardware : GPIO, CLOCK, NVIC */
     HAL_I2C_MspInit(hi2c);
- 8000eb2:	6878      	ldr	r0, [r7, #4]
- 8000eb4:	f7ff fc32 	bl	800071c <HAL_I2C_MspInit>
+ 8000f1e:	6878      	ldr	r0, [r7, #4]
+ 8000f20:	f7ff fc32 	bl	8000788 <HAL_I2C_MspInit>
 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
   }
 
   hi2c->State = HAL_I2C_STATE_BUSY;
- 8000eb8:	687b      	ldr	r3, [r7, #4]
- 8000eba:	2224      	movs	r2, #36	@ 0x24
- 8000ebc:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8000f24:	687b      	ldr	r3, [r7, #4]
+ 8000f26:	2224      	movs	r2, #36	@ 0x24
+ 8000f28:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
 
   /* Disable the selected I2C peripheral */
   __HAL_I2C_DISABLE(hi2c);
- 8000ec0:	687b      	ldr	r3, [r7, #4]
- 8000ec2:	681b      	ldr	r3, [r3, #0]
- 8000ec4:	681a      	ldr	r2, [r3, #0]
- 8000ec6:	687b      	ldr	r3, [r7, #4]
- 8000ec8:	681b      	ldr	r3, [r3, #0]
- 8000eca:	f022 0201 	bic.w	r2, r2, #1
- 8000ece:	601a      	str	r2, [r3, #0]
+ 8000f2c:	687b      	ldr	r3, [r7, #4]
+ 8000f2e:	681b      	ldr	r3, [r3, #0]
+ 8000f30:	681a      	ldr	r2, [r3, #0]
+ 8000f32:	687b      	ldr	r3, [r7, #4]
+ 8000f34:	681b      	ldr	r3, [r3, #0]
+ 8000f36:	f022 0201 	bic.w	r2, r2, #1
+ 8000f3a:	601a      	str	r2, [r3, #0]
 
   /*Reset I2C*/
   hi2c->Instance->CR1 |= I2C_CR1_SWRST;
- 8000ed0:	687b      	ldr	r3, [r7, #4]
- 8000ed2:	681b      	ldr	r3, [r3, #0]
- 8000ed4:	681a      	ldr	r2, [r3, #0]
- 8000ed6:	687b      	ldr	r3, [r7, #4]
- 8000ed8:	681b      	ldr	r3, [r3, #0]
- 8000eda:	f442 4200 	orr.w	r2, r2, #32768	@ 0x8000
- 8000ede:	601a      	str	r2, [r3, #0]
+ 8000f3c:	687b      	ldr	r3, [r7, #4]
+ 8000f3e:	681b      	ldr	r3, [r3, #0]
+ 8000f40:	681a      	ldr	r2, [r3, #0]
+ 8000f42:	687b      	ldr	r3, [r7, #4]
+ 8000f44:	681b      	ldr	r3, [r3, #0]
+ 8000f46:	f442 4200 	orr.w	r2, r2, #32768	@ 0x8000
+ 8000f4a:	601a      	str	r2, [r3, #0]
   hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
- 8000ee0:	687b      	ldr	r3, [r7, #4]
- 8000ee2:	681b      	ldr	r3, [r3, #0]
- 8000ee4:	681a      	ldr	r2, [r3, #0]
- 8000ee6:	687b      	ldr	r3, [r7, #4]
- 8000ee8:	681b      	ldr	r3, [r3, #0]
- 8000eea:	f422 4200 	bic.w	r2, r2, #32768	@ 0x8000
- 8000eee:	601a      	str	r2, [r3, #0]
+ 8000f4c:	687b      	ldr	r3, [r7, #4]
+ 8000f4e:	681b      	ldr	r3, [r3, #0]
+ 8000f50:	681a      	ldr	r2, [r3, #0]
+ 8000f52:	687b      	ldr	r3, [r7, #4]
+ 8000f54:	681b      	ldr	r3, [r3, #0]
+ 8000f56:	f422 4200 	bic.w	r2, r2, #32768	@ 0x8000
+ 8000f5a:	601a      	str	r2, [r3, #0]
 
   /* Get PCLK1 frequency */
   pclk1 = HAL_RCC_GetPCLK1Freq();
- 8000ef0:	f001 fcf2 	bl	80028d8 <HAL_RCC_GetPCLK1Freq>
- 8000ef4:	60f8      	str	r0, [r7, #12]
+ 8000f5c:	f001 fcf2 	bl	8002944 <HAL_RCC_GetPCLK1Freq>
+ 8000f60:	60f8      	str	r0, [r7, #12]
 
   /* Check the minimum allowed PCLK1 frequency */
   if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
- 8000ef6:	687b      	ldr	r3, [r7, #4]
- 8000ef8:	685b      	ldr	r3, [r3, #4]
- 8000efa:	4a81      	ldr	r2, [pc, #516]	@ (8001100 <HAL_I2C_Init+0x274>)
- 8000efc:	4293      	cmp	r3, r2
- 8000efe:	d807      	bhi.n	8000f10 <HAL_I2C_Init+0x84>
- 8000f00:	68fb      	ldr	r3, [r7, #12]
- 8000f02:	4a80      	ldr	r2, [pc, #512]	@ (8001104 <HAL_I2C_Init+0x278>)
- 8000f04:	4293      	cmp	r3, r2
- 8000f06:	bf94      	ite	ls
- 8000f08:	2301      	movls	r3, #1
- 8000f0a:	2300      	movhi	r3, #0
- 8000f0c:	b2db      	uxtb	r3, r3
- 8000f0e:	e006      	b.n	8000f1e <HAL_I2C_Init+0x92>
- 8000f10:	68fb      	ldr	r3, [r7, #12]
- 8000f12:	4a7d      	ldr	r2, [pc, #500]	@ (8001108 <HAL_I2C_Init+0x27c>)
- 8000f14:	4293      	cmp	r3, r2
- 8000f16:	bf94      	ite	ls
- 8000f18:	2301      	movls	r3, #1
- 8000f1a:	2300      	movhi	r3, #0
- 8000f1c:	b2db      	uxtb	r3, r3
- 8000f1e:	2b00      	cmp	r3, #0
- 8000f20:	d001      	beq.n	8000f26 <HAL_I2C_Init+0x9a>
+ 8000f62:	687b      	ldr	r3, [r7, #4]
+ 8000f64:	685b      	ldr	r3, [r3, #4]
+ 8000f66:	4a81      	ldr	r2, [pc, #516]	@ (800116c <HAL_I2C_Init+0x274>)
+ 8000f68:	4293      	cmp	r3, r2
+ 8000f6a:	d807      	bhi.n	8000f7c <HAL_I2C_Init+0x84>
+ 8000f6c:	68fb      	ldr	r3, [r7, #12]
+ 8000f6e:	4a80      	ldr	r2, [pc, #512]	@ (8001170 <HAL_I2C_Init+0x278>)
+ 8000f70:	4293      	cmp	r3, r2
+ 8000f72:	bf94      	ite	ls
+ 8000f74:	2301      	movls	r3, #1
+ 8000f76:	2300      	movhi	r3, #0
+ 8000f78:	b2db      	uxtb	r3, r3
+ 8000f7a:	e006      	b.n	8000f8a <HAL_I2C_Init+0x92>
+ 8000f7c:	68fb      	ldr	r3, [r7, #12]
+ 8000f7e:	4a7d      	ldr	r2, [pc, #500]	@ (8001174 <HAL_I2C_Init+0x27c>)
+ 8000f80:	4293      	cmp	r3, r2
+ 8000f82:	bf94      	ite	ls
+ 8000f84:	2301      	movls	r3, #1
+ 8000f86:	2300      	movhi	r3, #0
+ 8000f88:	b2db      	uxtb	r3, r3
+ 8000f8a:	2b00      	cmp	r3, #0
+ 8000f8c:	d001      	beq.n	8000f92 <HAL_I2C_Init+0x9a>
   {
     return HAL_ERROR;
- 8000f22:	2301      	movs	r3, #1
- 8000f24:	e0e7      	b.n	80010f6 <HAL_I2C_Init+0x26a>
+ 8000f8e:	2301      	movs	r3, #1
+ 8000f90:	e0e7      	b.n	8001162 <HAL_I2C_Init+0x26a>
   }
 
   /* Calculate frequency range */
   freqrange = I2C_FREQRANGE(pclk1);
- 8000f26:	68fb      	ldr	r3, [r7, #12]
- 8000f28:	4a78      	ldr	r2, [pc, #480]	@ (800110c <HAL_I2C_Init+0x280>)
- 8000f2a:	fba2 2303 	umull	r2, r3, r2, r3
- 8000f2e:	0c9b      	lsrs	r3, r3, #18
- 8000f30:	60bb      	str	r3, [r7, #8]
+ 8000f92:	68fb      	ldr	r3, [r7, #12]
+ 8000f94:	4a78      	ldr	r2, [pc, #480]	@ (8001178 <HAL_I2C_Init+0x280>)
+ 8000f96:	fba2 2303 	umull	r2, r3, r2, r3
+ 8000f9a:	0c9b      	lsrs	r3, r3, #18
+ 8000f9c:	60bb      	str	r3, [r7, #8]
 
   /*---------------------------- I2Cx CR2 Configuration ----------------------*/
   /* Configure I2Cx: Frequency range */
   MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
- 8000f32:	687b      	ldr	r3, [r7, #4]
- 8000f34:	681b      	ldr	r3, [r3, #0]
- 8000f36:	685b      	ldr	r3, [r3, #4]
- 8000f38:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
- 8000f3c:	687b      	ldr	r3, [r7, #4]
- 8000f3e:	681b      	ldr	r3, [r3, #0]
- 8000f40:	68ba      	ldr	r2, [r7, #8]
- 8000f42:	430a      	orrs	r2, r1
- 8000f44:	605a      	str	r2, [r3, #4]
+ 8000f9e:	687b      	ldr	r3, [r7, #4]
+ 8000fa0:	681b      	ldr	r3, [r3, #0]
+ 8000fa2:	685b      	ldr	r3, [r3, #4]
+ 8000fa4:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
+ 8000fa8:	687b      	ldr	r3, [r7, #4]
+ 8000faa:	681b      	ldr	r3, [r3, #0]
+ 8000fac:	68ba      	ldr	r2, [r7, #8]
+ 8000fae:	430a      	orrs	r2, r1
+ 8000fb0:	605a      	str	r2, [r3, #4]
 
   /*---------------------------- I2Cx TRISE Configuration --------------------*/
   /* Configure I2Cx: Rise Time */
   MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
- 8000f46:	687b      	ldr	r3, [r7, #4]
- 8000f48:	681b      	ldr	r3, [r3, #0]
- 8000f4a:	6a1b      	ldr	r3, [r3, #32]
- 8000f4c:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
- 8000f50:	687b      	ldr	r3, [r7, #4]
- 8000f52:	685b      	ldr	r3, [r3, #4]
- 8000f54:	4a6a      	ldr	r2, [pc, #424]	@ (8001100 <HAL_I2C_Init+0x274>)
- 8000f56:	4293      	cmp	r3, r2
- 8000f58:	d802      	bhi.n	8000f60 <HAL_I2C_Init+0xd4>
- 8000f5a:	68bb      	ldr	r3, [r7, #8]
- 8000f5c:	3301      	adds	r3, #1
- 8000f5e:	e009      	b.n	8000f74 <HAL_I2C_Init+0xe8>
- 8000f60:	68bb      	ldr	r3, [r7, #8]
- 8000f62:	f44f 7296 	mov.w	r2, #300	@ 0x12c
- 8000f66:	fb02 f303 	mul.w	r3, r2, r3
- 8000f6a:	4a69      	ldr	r2, [pc, #420]	@ (8001110 <HAL_I2C_Init+0x284>)
- 8000f6c:	fba2 2303 	umull	r2, r3, r2, r3
- 8000f70:	099b      	lsrs	r3, r3, #6
- 8000f72:	3301      	adds	r3, #1
- 8000f74:	687a      	ldr	r2, [r7, #4]
- 8000f76:	6812      	ldr	r2, [r2, #0]
- 8000f78:	430b      	orrs	r3, r1
- 8000f7a:	6213      	str	r3, [r2, #32]
+ 8000fb2:	687b      	ldr	r3, [r7, #4]
+ 8000fb4:	681b      	ldr	r3, [r3, #0]
+ 8000fb6:	6a1b      	ldr	r3, [r3, #32]
+ 8000fb8:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
+ 8000fbc:	687b      	ldr	r3, [r7, #4]
+ 8000fbe:	685b      	ldr	r3, [r3, #4]
+ 8000fc0:	4a6a      	ldr	r2, [pc, #424]	@ (800116c <HAL_I2C_Init+0x274>)
+ 8000fc2:	4293      	cmp	r3, r2
+ 8000fc4:	d802      	bhi.n	8000fcc <HAL_I2C_Init+0xd4>
+ 8000fc6:	68bb      	ldr	r3, [r7, #8]
+ 8000fc8:	3301      	adds	r3, #1
+ 8000fca:	e009      	b.n	8000fe0 <HAL_I2C_Init+0xe8>
+ 8000fcc:	68bb      	ldr	r3, [r7, #8]
+ 8000fce:	f44f 7296 	mov.w	r2, #300	@ 0x12c
+ 8000fd2:	fb02 f303 	mul.w	r3, r2, r3
+ 8000fd6:	4a69      	ldr	r2, [pc, #420]	@ (800117c <HAL_I2C_Init+0x284>)
+ 8000fd8:	fba2 2303 	umull	r2, r3, r2, r3
+ 8000fdc:	099b      	lsrs	r3, r3, #6
+ 8000fde:	3301      	adds	r3, #1
+ 8000fe0:	687a      	ldr	r2, [r7, #4]
+ 8000fe2:	6812      	ldr	r2, [r2, #0]
+ 8000fe4:	430b      	orrs	r3, r1
+ 8000fe6:	6213      	str	r3, [r2, #32]
 
   /*---------------------------- I2Cx CCR Configuration ----------------------*/
   /* Configure I2Cx: Speed */
   MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
- 8000f7c:	687b      	ldr	r3, [r7, #4]
- 8000f7e:	681b      	ldr	r3, [r3, #0]
- 8000f80:	69db      	ldr	r3, [r3, #28]
- 8000f82:	f423 424f 	bic.w	r2, r3, #52992	@ 0xcf00
- 8000f86:	f022 02ff 	bic.w	r2, r2, #255	@ 0xff
- 8000f8a:	687b      	ldr	r3, [r7, #4]
- 8000f8c:	685b      	ldr	r3, [r3, #4]
- 8000f8e:	495c      	ldr	r1, [pc, #368]	@ (8001100 <HAL_I2C_Init+0x274>)
- 8000f90:	428b      	cmp	r3, r1
- 8000f92:	d819      	bhi.n	8000fc8 <HAL_I2C_Init+0x13c>
- 8000f94:	68fb      	ldr	r3, [r7, #12]
- 8000f96:	1e59      	subs	r1, r3, #1
- 8000f98:	687b      	ldr	r3, [r7, #4]
- 8000f9a:	685b      	ldr	r3, [r3, #4]
- 8000f9c:	005b      	lsls	r3, r3, #1
- 8000f9e:	fbb1 f3f3 	udiv	r3, r1, r3
- 8000fa2:	1c59      	adds	r1, r3, #1
- 8000fa4:	f640 73fc 	movw	r3, #4092	@ 0xffc
- 8000fa8:	400b      	ands	r3, r1
- 8000faa:	2b00      	cmp	r3, #0
- 8000fac:	d00a      	beq.n	8000fc4 <HAL_I2C_Init+0x138>
- 8000fae:	68fb      	ldr	r3, [r7, #12]
- 8000fb0:	1e59      	subs	r1, r3, #1
- 8000fb2:	687b      	ldr	r3, [r7, #4]
- 8000fb4:	685b      	ldr	r3, [r3, #4]
- 8000fb6:	005b      	lsls	r3, r3, #1
- 8000fb8:	fbb1 f3f3 	udiv	r3, r1, r3
- 8000fbc:	3301      	adds	r3, #1
- 8000fbe:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8000fc2:	e051      	b.n	8001068 <HAL_I2C_Init+0x1dc>
- 8000fc4:	2304      	movs	r3, #4
- 8000fc6:	e04f      	b.n	8001068 <HAL_I2C_Init+0x1dc>
- 8000fc8:	687b      	ldr	r3, [r7, #4]
- 8000fca:	689b      	ldr	r3, [r3, #8]
- 8000fcc:	2b00      	cmp	r3, #0
- 8000fce:	d111      	bne.n	8000ff4 <HAL_I2C_Init+0x168>
- 8000fd0:	68fb      	ldr	r3, [r7, #12]
- 8000fd2:	1e58      	subs	r0, r3, #1
- 8000fd4:	687b      	ldr	r3, [r7, #4]
- 8000fd6:	6859      	ldr	r1, [r3, #4]
- 8000fd8:	460b      	mov	r3, r1
- 8000fda:	005b      	lsls	r3, r3, #1
- 8000fdc:	440b      	add	r3, r1
- 8000fde:	fbb0 f3f3 	udiv	r3, r0, r3
- 8000fe2:	3301      	adds	r3, #1
- 8000fe4:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8000fe8:	2b00      	cmp	r3, #0
- 8000fea:	bf0c      	ite	eq
- 8000fec:	2301      	moveq	r3, #1
- 8000fee:	2300      	movne	r3, #0
- 8000ff0:	b2db      	uxtb	r3, r3
- 8000ff2:	e012      	b.n	800101a <HAL_I2C_Init+0x18e>
- 8000ff4:	68fb      	ldr	r3, [r7, #12]
- 8000ff6:	1e58      	subs	r0, r3, #1
- 8000ff8:	687b      	ldr	r3, [r7, #4]
- 8000ffa:	6859      	ldr	r1, [r3, #4]
- 8000ffc:	460b      	mov	r3, r1
- 8000ffe:	009b      	lsls	r3, r3, #2
- 8001000:	440b      	add	r3, r1
- 8001002:	0099      	lsls	r1, r3, #2
- 8001004:	440b      	add	r3, r1
- 8001006:	fbb0 f3f3 	udiv	r3, r0, r3
- 800100a:	3301      	adds	r3, #1
- 800100c:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8001010:	2b00      	cmp	r3, #0
- 8001012:	bf0c      	ite	eq
- 8001014:	2301      	moveq	r3, #1
- 8001016:	2300      	movne	r3, #0
- 8001018:	b2db      	uxtb	r3, r3
- 800101a:	2b00      	cmp	r3, #0
- 800101c:	d001      	beq.n	8001022 <HAL_I2C_Init+0x196>
- 800101e:	2301      	movs	r3, #1
- 8001020:	e022      	b.n	8001068 <HAL_I2C_Init+0x1dc>
- 8001022:	687b      	ldr	r3, [r7, #4]
- 8001024:	689b      	ldr	r3, [r3, #8]
- 8001026:	2b00      	cmp	r3, #0
- 8001028:	d10e      	bne.n	8001048 <HAL_I2C_Init+0x1bc>
- 800102a:	68fb      	ldr	r3, [r7, #12]
- 800102c:	1e58      	subs	r0, r3, #1
- 800102e:	687b      	ldr	r3, [r7, #4]
- 8001030:	6859      	ldr	r1, [r3, #4]
- 8001032:	460b      	mov	r3, r1
- 8001034:	005b      	lsls	r3, r3, #1
- 8001036:	440b      	add	r3, r1
- 8001038:	fbb0 f3f3 	udiv	r3, r0, r3
- 800103c:	3301      	adds	r3, #1
- 800103e:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8001042:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
- 8001046:	e00f      	b.n	8001068 <HAL_I2C_Init+0x1dc>
- 8001048:	68fb      	ldr	r3, [r7, #12]
- 800104a:	1e58      	subs	r0, r3, #1
- 800104c:	687b      	ldr	r3, [r7, #4]
- 800104e:	6859      	ldr	r1, [r3, #4]
- 8001050:	460b      	mov	r3, r1
- 8001052:	009b      	lsls	r3, r3, #2
- 8001054:	440b      	add	r3, r1
- 8001056:	0099      	lsls	r1, r3, #2
- 8001058:	440b      	add	r3, r1
- 800105a:	fbb0 f3f3 	udiv	r3, r0, r3
- 800105e:	3301      	adds	r3, #1
- 8001060:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8001064:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
- 8001068:	6879      	ldr	r1, [r7, #4]
- 800106a:	6809      	ldr	r1, [r1, #0]
- 800106c:	4313      	orrs	r3, r2
- 800106e:	61cb      	str	r3, [r1, #28]
+ 8000fe8:	687b      	ldr	r3, [r7, #4]
+ 8000fea:	681b      	ldr	r3, [r3, #0]
+ 8000fec:	69db      	ldr	r3, [r3, #28]
+ 8000fee:	f423 424f 	bic.w	r2, r3, #52992	@ 0xcf00
+ 8000ff2:	f022 02ff 	bic.w	r2, r2, #255	@ 0xff
+ 8000ff6:	687b      	ldr	r3, [r7, #4]
+ 8000ff8:	685b      	ldr	r3, [r3, #4]
+ 8000ffa:	495c      	ldr	r1, [pc, #368]	@ (800116c <HAL_I2C_Init+0x274>)
+ 8000ffc:	428b      	cmp	r3, r1
+ 8000ffe:	d819      	bhi.n	8001034 <HAL_I2C_Init+0x13c>
+ 8001000:	68fb      	ldr	r3, [r7, #12]
+ 8001002:	1e59      	subs	r1, r3, #1
+ 8001004:	687b      	ldr	r3, [r7, #4]
+ 8001006:	685b      	ldr	r3, [r3, #4]
+ 8001008:	005b      	lsls	r3, r3, #1
+ 800100a:	fbb1 f3f3 	udiv	r3, r1, r3
+ 800100e:	1c59      	adds	r1, r3, #1
+ 8001010:	f640 73fc 	movw	r3, #4092	@ 0xffc
+ 8001014:	400b      	ands	r3, r1
+ 8001016:	2b00      	cmp	r3, #0
+ 8001018:	d00a      	beq.n	8001030 <HAL_I2C_Init+0x138>
+ 800101a:	68fb      	ldr	r3, [r7, #12]
+ 800101c:	1e59      	subs	r1, r3, #1
+ 800101e:	687b      	ldr	r3, [r7, #4]
+ 8001020:	685b      	ldr	r3, [r3, #4]
+ 8001022:	005b      	lsls	r3, r3, #1
+ 8001024:	fbb1 f3f3 	udiv	r3, r1, r3
+ 8001028:	3301      	adds	r3, #1
+ 800102a:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 800102e:	e051      	b.n	80010d4 <HAL_I2C_Init+0x1dc>
+ 8001030:	2304      	movs	r3, #4
+ 8001032:	e04f      	b.n	80010d4 <HAL_I2C_Init+0x1dc>
+ 8001034:	687b      	ldr	r3, [r7, #4]
+ 8001036:	689b      	ldr	r3, [r3, #8]
+ 8001038:	2b00      	cmp	r3, #0
+ 800103a:	d111      	bne.n	8001060 <HAL_I2C_Init+0x168>
+ 800103c:	68fb      	ldr	r3, [r7, #12]
+ 800103e:	1e58      	subs	r0, r3, #1
+ 8001040:	687b      	ldr	r3, [r7, #4]
+ 8001042:	6859      	ldr	r1, [r3, #4]
+ 8001044:	460b      	mov	r3, r1
+ 8001046:	005b      	lsls	r3, r3, #1
+ 8001048:	440b      	add	r3, r1
+ 800104a:	fbb0 f3f3 	udiv	r3, r0, r3
+ 800104e:	3301      	adds	r3, #1
+ 8001050:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8001054:	2b00      	cmp	r3, #0
+ 8001056:	bf0c      	ite	eq
+ 8001058:	2301      	moveq	r3, #1
+ 800105a:	2300      	movne	r3, #0
+ 800105c:	b2db      	uxtb	r3, r3
+ 800105e:	e012      	b.n	8001086 <HAL_I2C_Init+0x18e>
+ 8001060:	68fb      	ldr	r3, [r7, #12]
+ 8001062:	1e58      	subs	r0, r3, #1
+ 8001064:	687b      	ldr	r3, [r7, #4]
+ 8001066:	6859      	ldr	r1, [r3, #4]
+ 8001068:	460b      	mov	r3, r1
+ 800106a:	009b      	lsls	r3, r3, #2
+ 800106c:	440b      	add	r3, r1
+ 800106e:	0099      	lsls	r1, r3, #2
+ 8001070:	440b      	add	r3, r1
+ 8001072:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8001076:	3301      	adds	r3, #1
+ 8001078:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 800107c:	2b00      	cmp	r3, #0
+ 800107e:	bf0c      	ite	eq
+ 8001080:	2301      	moveq	r3, #1
+ 8001082:	2300      	movne	r3, #0
+ 8001084:	b2db      	uxtb	r3, r3
+ 8001086:	2b00      	cmp	r3, #0
+ 8001088:	d001      	beq.n	800108e <HAL_I2C_Init+0x196>
+ 800108a:	2301      	movs	r3, #1
+ 800108c:	e022      	b.n	80010d4 <HAL_I2C_Init+0x1dc>
+ 800108e:	687b      	ldr	r3, [r7, #4]
+ 8001090:	689b      	ldr	r3, [r3, #8]
+ 8001092:	2b00      	cmp	r3, #0
+ 8001094:	d10e      	bne.n	80010b4 <HAL_I2C_Init+0x1bc>
+ 8001096:	68fb      	ldr	r3, [r7, #12]
+ 8001098:	1e58      	subs	r0, r3, #1
+ 800109a:	687b      	ldr	r3, [r7, #4]
+ 800109c:	6859      	ldr	r1, [r3, #4]
+ 800109e:	460b      	mov	r3, r1
+ 80010a0:	005b      	lsls	r3, r3, #1
+ 80010a2:	440b      	add	r3, r1
+ 80010a4:	fbb0 f3f3 	udiv	r3, r0, r3
+ 80010a8:	3301      	adds	r3, #1
+ 80010aa:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 80010ae:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
+ 80010b2:	e00f      	b.n	80010d4 <HAL_I2C_Init+0x1dc>
+ 80010b4:	68fb      	ldr	r3, [r7, #12]
+ 80010b6:	1e58      	subs	r0, r3, #1
+ 80010b8:	687b      	ldr	r3, [r7, #4]
+ 80010ba:	6859      	ldr	r1, [r3, #4]
+ 80010bc:	460b      	mov	r3, r1
+ 80010be:	009b      	lsls	r3, r3, #2
+ 80010c0:	440b      	add	r3, r1
+ 80010c2:	0099      	lsls	r1, r3, #2
+ 80010c4:	440b      	add	r3, r1
+ 80010c6:	fbb0 f3f3 	udiv	r3, r0, r3
+ 80010ca:	3301      	adds	r3, #1
+ 80010cc:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 80010d0:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
+ 80010d4:	6879      	ldr	r1, [r7, #4]
+ 80010d6:	6809      	ldr	r1, [r1, #0]
+ 80010d8:	4313      	orrs	r3, r2
+ 80010da:	61cb      	str	r3, [r1, #28]
 
   /*---------------------------- I2Cx CR1 Configuration ----------------------*/
   /* Configure I2Cx: Generalcall and NoStretch mode */
   MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
- 8001070:	687b      	ldr	r3, [r7, #4]
- 8001072:	681b      	ldr	r3, [r3, #0]
- 8001074:	681b      	ldr	r3, [r3, #0]
- 8001076:	f023 01c0 	bic.w	r1, r3, #192	@ 0xc0
- 800107a:	687b      	ldr	r3, [r7, #4]
- 800107c:	69da      	ldr	r2, [r3, #28]
- 800107e:	687b      	ldr	r3, [r7, #4]
- 8001080:	6a1b      	ldr	r3, [r3, #32]
- 8001082:	431a      	orrs	r2, r3
- 8001084:	687b      	ldr	r3, [r7, #4]
- 8001086:	681b      	ldr	r3, [r3, #0]
- 8001088:	430a      	orrs	r2, r1
- 800108a:	601a      	str	r2, [r3, #0]
+ 80010dc:	687b      	ldr	r3, [r7, #4]
+ 80010de:	681b      	ldr	r3, [r3, #0]
+ 80010e0:	681b      	ldr	r3, [r3, #0]
+ 80010e2:	f023 01c0 	bic.w	r1, r3, #192	@ 0xc0
+ 80010e6:	687b      	ldr	r3, [r7, #4]
+ 80010e8:	69da      	ldr	r2, [r3, #28]
+ 80010ea:	687b      	ldr	r3, [r7, #4]
+ 80010ec:	6a1b      	ldr	r3, [r3, #32]
+ 80010ee:	431a      	orrs	r2, r3
+ 80010f0:	687b      	ldr	r3, [r7, #4]
+ 80010f2:	681b      	ldr	r3, [r3, #0]
+ 80010f4:	430a      	orrs	r2, r1
+ 80010f6:	601a      	str	r2, [r3, #0]
 
   /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
   /* Configure I2Cx: Own Address1 and addressing mode */
   MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
- 800108c:	687b      	ldr	r3, [r7, #4]
- 800108e:	681b      	ldr	r3, [r3, #0]
- 8001090:	689b      	ldr	r3, [r3, #8]
- 8001092:	f423 4303 	bic.w	r3, r3, #33536	@ 0x8300
- 8001096:	f023 03ff 	bic.w	r3, r3, #255	@ 0xff
- 800109a:	687a      	ldr	r2, [r7, #4]
- 800109c:	6911      	ldr	r1, [r2, #16]
- 800109e:	687a      	ldr	r2, [r7, #4]
- 80010a0:	68d2      	ldr	r2, [r2, #12]
- 80010a2:	4311      	orrs	r1, r2
- 80010a4:	687a      	ldr	r2, [r7, #4]
- 80010a6:	6812      	ldr	r2, [r2, #0]
- 80010a8:	430b      	orrs	r3, r1
- 80010aa:	6093      	str	r3, [r2, #8]
+ 80010f8:	687b      	ldr	r3, [r7, #4]
+ 80010fa:	681b      	ldr	r3, [r3, #0]
+ 80010fc:	689b      	ldr	r3, [r3, #8]
+ 80010fe:	f423 4303 	bic.w	r3, r3, #33536	@ 0x8300
+ 8001102:	f023 03ff 	bic.w	r3, r3, #255	@ 0xff
+ 8001106:	687a      	ldr	r2, [r7, #4]
+ 8001108:	6911      	ldr	r1, [r2, #16]
+ 800110a:	687a      	ldr	r2, [r7, #4]
+ 800110c:	68d2      	ldr	r2, [r2, #12]
+ 800110e:	4311      	orrs	r1, r2
+ 8001110:	687a      	ldr	r2, [r7, #4]
+ 8001112:	6812      	ldr	r2, [r2, #0]
+ 8001114:	430b      	orrs	r3, r1
+ 8001116:	6093      	str	r3, [r2, #8]
 
   /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
   /* Configure I2Cx: Dual mode and Own Address2 */
   MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
- 80010ac:	687b      	ldr	r3, [r7, #4]
- 80010ae:	681b      	ldr	r3, [r3, #0]
- 80010b0:	68db      	ldr	r3, [r3, #12]
- 80010b2:	f023 01ff 	bic.w	r1, r3, #255	@ 0xff
- 80010b6:	687b      	ldr	r3, [r7, #4]
- 80010b8:	695a      	ldr	r2, [r3, #20]
- 80010ba:	687b      	ldr	r3, [r7, #4]
- 80010bc:	699b      	ldr	r3, [r3, #24]
- 80010be:	431a      	orrs	r2, r3
- 80010c0:	687b      	ldr	r3, [r7, #4]
- 80010c2:	681b      	ldr	r3, [r3, #0]
- 80010c4:	430a      	orrs	r2, r1
- 80010c6:	60da      	str	r2, [r3, #12]
+ 8001118:	687b      	ldr	r3, [r7, #4]
+ 800111a:	681b      	ldr	r3, [r3, #0]
+ 800111c:	68db      	ldr	r3, [r3, #12]
+ 800111e:	f023 01ff 	bic.w	r1, r3, #255	@ 0xff
+ 8001122:	687b      	ldr	r3, [r7, #4]
+ 8001124:	695a      	ldr	r2, [r3, #20]
+ 8001126:	687b      	ldr	r3, [r7, #4]
+ 8001128:	699b      	ldr	r3, [r3, #24]
+ 800112a:	431a      	orrs	r2, r3
+ 800112c:	687b      	ldr	r3, [r7, #4]
+ 800112e:	681b      	ldr	r3, [r3, #0]
+ 8001130:	430a      	orrs	r2, r1
+ 8001132:	60da      	str	r2, [r3, #12]
 
   /* Enable the selected I2C peripheral */
   __HAL_I2C_ENABLE(hi2c);
- 80010c8:	687b      	ldr	r3, [r7, #4]
- 80010ca:	681b      	ldr	r3, [r3, #0]
- 80010cc:	681a      	ldr	r2, [r3, #0]
- 80010ce:	687b      	ldr	r3, [r7, #4]
- 80010d0:	681b      	ldr	r3, [r3, #0]
- 80010d2:	f042 0201 	orr.w	r2, r2, #1
- 80010d6:	601a      	str	r2, [r3, #0]
+ 8001134:	687b      	ldr	r3, [r7, #4]
+ 8001136:	681b      	ldr	r3, [r3, #0]
+ 8001138:	681a      	ldr	r2, [r3, #0]
+ 800113a:	687b      	ldr	r3, [r7, #4]
+ 800113c:	681b      	ldr	r3, [r3, #0]
+ 800113e:	f042 0201 	orr.w	r2, r2, #1
+ 8001142:	601a      	str	r2, [r3, #0]
 
   hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- 80010d8:	687b      	ldr	r3, [r7, #4]
- 80010da:	2200      	movs	r2, #0
- 80010dc:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001144:	687b      	ldr	r3, [r7, #4]
+ 8001146:	2200      	movs	r2, #0
+ 8001148:	641a      	str	r2, [r3, #64]	@ 0x40
   hi2c->State = HAL_I2C_STATE_READY;
- 80010de:	687b      	ldr	r3, [r7, #4]
- 80010e0:	2220      	movs	r2, #32
- 80010e2:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 800114a:	687b      	ldr	r3, [r7, #4]
+ 800114c:	2220      	movs	r2, #32
+ 800114e:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
   hi2c->PreviousState = I2C_STATE_NONE;
- 80010e6:	687b      	ldr	r3, [r7, #4]
- 80010e8:	2200      	movs	r2, #0
- 80010ea:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001152:	687b      	ldr	r3, [r7, #4]
+ 8001154:	2200      	movs	r2, #0
+ 8001156:	631a      	str	r2, [r3, #48]	@ 0x30
   hi2c->Mode = HAL_I2C_MODE_NONE;
- 80010ec:	687b      	ldr	r3, [r7, #4]
- 80010ee:	2200      	movs	r2, #0
- 80010f0:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001158:	687b      	ldr	r3, [r7, #4]
+ 800115a:	2200      	movs	r2, #0
+ 800115c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 
   return HAL_OK;
- 80010f4:	2300      	movs	r3, #0
+ 8001160:	2300      	movs	r3, #0
 }
- 80010f6:	4618      	mov	r0, r3
- 80010f8:	3710      	adds	r7, #16
- 80010fa:	46bd      	mov	sp, r7
- 80010fc:	bd80      	pop	{r7, pc}
- 80010fe:	bf00      	nop
- 8001100:	000186a0 	.word	0x000186a0
- 8001104:	001e847f 	.word	0x001e847f
- 8001108:	003d08ff 	.word	0x003d08ff
- 800110c:	431bde83 	.word	0x431bde83
- 8001110:	10624dd3 	.word	0x10624dd3
+ 8001162:	4618      	mov	r0, r3
+ 8001164:	3710      	adds	r7, #16
+ 8001166:	46bd      	mov	sp, r7
+ 8001168:	bd80      	pop	{r7, pc}
+ 800116a:	bf00      	nop
+ 800116c:	000186a0 	.word	0x000186a0
+ 8001170:	001e847f 	.word	0x001e847f
+ 8001174:	003d08ff 	.word	0x003d08ff
+ 8001178:	431bde83 	.word	0x431bde83
+ 800117c:	10624dd3 	.word	0x10624dd3
 
-08001114 <HAL_I2C_Master_Transmit>:
+08001180 <HAL_I2C_Master_Transmit>:
   * @param  Size Amount of data to be sent
   * @param  Timeout Timeout duration
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
- 8001114:	b580      	push	{r7, lr}
- 8001116:	b088      	sub	sp, #32
- 8001118:	af02      	add	r7, sp, #8
- 800111a:	60f8      	str	r0, [r7, #12]
- 800111c:	607a      	str	r2, [r7, #4]
- 800111e:	461a      	mov	r2, r3
- 8001120:	460b      	mov	r3, r1
- 8001122:	817b      	strh	r3, [r7, #10]
- 8001124:	4613      	mov	r3, r2
- 8001126:	813b      	strh	r3, [r7, #8]
+ 8001180:	b580      	push	{r7, lr}
+ 8001182:	b088      	sub	sp, #32
+ 8001184:	af02      	add	r7, sp, #8
+ 8001186:	60f8      	str	r0, [r7, #12]
+ 8001188:	607a      	str	r2, [r7, #4]
+ 800118a:	461a      	mov	r2, r3
+ 800118c:	460b      	mov	r3, r1
+ 800118e:	817b      	strh	r3, [r7, #10]
+ 8001190:	4613      	mov	r3, r2
+ 8001192:	813b      	strh	r3, [r7, #8]
   /* Init tickstart for timeout management*/
   uint32_t tickstart = HAL_GetTick();
- 8001128:	f7ff fbf8 	bl	800091c <HAL_GetTick>
- 800112c:	6178      	str	r0, [r7, #20]
+ 8001194:	f7ff fbf8 	bl	8000988 <HAL_GetTick>
+ 8001198:	6178      	str	r0, [r7, #20]
 
   if (hi2c->State == HAL_I2C_STATE_READY)
- 800112e:	68fb      	ldr	r3, [r7, #12]
- 8001130:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
- 8001134:	b2db      	uxtb	r3, r3
- 8001136:	2b20      	cmp	r3, #32
- 8001138:	f040 80e0 	bne.w	80012fc <HAL_I2C_Master_Transmit+0x1e8>
+ 800119a:	68fb      	ldr	r3, [r7, #12]
+ 800119c:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 80011a0:	b2db      	uxtb	r3, r3
+ 80011a2:	2b20      	cmp	r3, #32
+ 80011a4:	f040 80e0 	bne.w	8001368 <HAL_I2C_Master_Transmit+0x1e8>
   {
     /* Wait until BUSY flag is reset */
     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- 800113c:	697b      	ldr	r3, [r7, #20]
- 800113e:	9300      	str	r3, [sp, #0]
- 8001140:	2319      	movs	r3, #25
- 8001142:	2201      	movs	r2, #1
- 8001144:	4970      	ldr	r1, [pc, #448]	@ (8001308 <HAL_I2C_Master_Transmit+0x1f4>)
- 8001146:	68f8      	ldr	r0, [r7, #12]
- 8001148:	f000 fc64 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 800114c:	4603      	mov	r3, r0
- 800114e:	2b00      	cmp	r3, #0
- 8001150:	d001      	beq.n	8001156 <HAL_I2C_Master_Transmit+0x42>
+ 80011a8:	697b      	ldr	r3, [r7, #20]
+ 80011aa:	9300      	str	r3, [sp, #0]
+ 80011ac:	2319      	movs	r3, #25
+ 80011ae:	2201      	movs	r2, #1
+ 80011b0:	4970      	ldr	r1, [pc, #448]	@ (8001374 <HAL_I2C_Master_Transmit+0x1f4>)
+ 80011b2:	68f8      	ldr	r0, [r7, #12]
+ 80011b4:	f000 fc64 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 80011b8:	4603      	mov	r3, r0
+ 80011ba:	2b00      	cmp	r3, #0
+ 80011bc:	d001      	beq.n	80011c2 <HAL_I2C_Master_Transmit+0x42>
     {
       return HAL_BUSY;
- 8001152:	2302      	movs	r3, #2
- 8001154:	e0d3      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
+ 80011be:	2302      	movs	r3, #2
+ 80011c0:	e0d3      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
- 8001156:	68fb      	ldr	r3, [r7, #12]
- 8001158:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
- 800115c:	2b01      	cmp	r3, #1
- 800115e:	d101      	bne.n	8001164 <HAL_I2C_Master_Transmit+0x50>
- 8001160:	2302      	movs	r3, #2
- 8001162:	e0cc      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
- 8001164:	68fb      	ldr	r3, [r7, #12]
- 8001166:	2201      	movs	r2, #1
- 8001168:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 80011c2:	68fb      	ldr	r3, [r7, #12]
+ 80011c4:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
+ 80011c8:	2b01      	cmp	r3, #1
+ 80011ca:	d101      	bne.n	80011d0 <HAL_I2C_Master_Transmit+0x50>
+ 80011cc:	2302      	movs	r3, #2
+ 80011ce:	e0cc      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
+ 80011d0:	68fb      	ldr	r3, [r7, #12]
+ 80011d2:	2201      	movs	r2, #1
+ 80011d4:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     /* Check if the I2C is already enabled */
     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- 800116c:	68fb      	ldr	r3, [r7, #12]
- 800116e:	681b      	ldr	r3, [r3, #0]
- 8001170:	681b      	ldr	r3, [r3, #0]
- 8001172:	f003 0301 	and.w	r3, r3, #1
- 8001176:	2b01      	cmp	r3, #1
- 8001178:	d007      	beq.n	800118a <HAL_I2C_Master_Transmit+0x76>
+ 80011d8:	68fb      	ldr	r3, [r7, #12]
+ 80011da:	681b      	ldr	r3, [r3, #0]
+ 80011dc:	681b      	ldr	r3, [r3, #0]
+ 80011de:	f003 0301 	and.w	r3, r3, #1
+ 80011e2:	2b01      	cmp	r3, #1
+ 80011e4:	d007      	beq.n	80011f6 <HAL_I2C_Master_Transmit+0x76>
     {
       /* Enable I2C peripheral */
       __HAL_I2C_ENABLE(hi2c);
- 800117a:	68fb      	ldr	r3, [r7, #12]
- 800117c:	681b      	ldr	r3, [r3, #0]
- 800117e:	681a      	ldr	r2, [r3, #0]
- 8001180:	68fb      	ldr	r3, [r7, #12]
- 8001182:	681b      	ldr	r3, [r3, #0]
- 8001184:	f042 0201 	orr.w	r2, r2, #1
- 8001188:	601a      	str	r2, [r3, #0]
+ 80011e6:	68fb      	ldr	r3, [r7, #12]
+ 80011e8:	681b      	ldr	r3, [r3, #0]
+ 80011ea:	681a      	ldr	r2, [r3, #0]
+ 80011ec:	68fb      	ldr	r3, [r7, #12]
+ 80011ee:	681b      	ldr	r3, [r3, #0]
+ 80011f0:	f042 0201 	orr.w	r2, r2, #1
+ 80011f4:	601a      	str	r2, [r3, #0]
     }
 
     /* Disable Pos */
     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- 800118a:	68fb      	ldr	r3, [r7, #12]
- 800118c:	681b      	ldr	r3, [r3, #0]
- 800118e:	681a      	ldr	r2, [r3, #0]
- 8001190:	68fb      	ldr	r3, [r7, #12]
- 8001192:	681b      	ldr	r3, [r3, #0]
- 8001194:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
- 8001198:	601a      	str	r2, [r3, #0]
+ 80011f6:	68fb      	ldr	r3, [r7, #12]
+ 80011f8:	681b      	ldr	r3, [r3, #0]
+ 80011fa:	681a      	ldr	r2, [r3, #0]
+ 80011fc:	68fb      	ldr	r3, [r7, #12]
+ 80011fe:	681b      	ldr	r3, [r3, #0]
+ 8001200:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
+ 8001204:	601a      	str	r2, [r3, #0]
 
     hi2c->State       = HAL_I2C_STATE_BUSY_TX;
- 800119a:	68fb      	ldr	r3, [r7, #12]
- 800119c:	2221      	movs	r2, #33	@ 0x21
- 800119e:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001206:	68fb      	ldr	r3, [r7, #12]
+ 8001208:	2221      	movs	r2, #33	@ 0x21
+ 800120a:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
     hi2c->Mode        = HAL_I2C_MODE_MASTER;
- 80011a2:	68fb      	ldr	r3, [r7, #12]
- 80011a4:	2210      	movs	r2, #16
- 80011a6:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 800120e:	68fb      	ldr	r3, [r7, #12]
+ 8001210:	2210      	movs	r2, #16
+ 8001212:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
- 80011aa:	68fb      	ldr	r3, [r7, #12]
- 80011ac:	2200      	movs	r2, #0
- 80011ae:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001216:	68fb      	ldr	r3, [r7, #12]
+ 8001218:	2200      	movs	r2, #0
+ 800121a:	641a      	str	r2, [r3, #64]	@ 0x40
 
     /* Prepare transfer parameters */
     hi2c->pBuffPtr    = pData;
- 80011b0:	68fb      	ldr	r3, [r7, #12]
- 80011b2:	687a      	ldr	r2, [r7, #4]
- 80011b4:	625a      	str	r2, [r3, #36]	@ 0x24
+ 800121c:	68fb      	ldr	r3, [r7, #12]
+ 800121e:	687a      	ldr	r2, [r7, #4]
+ 8001220:	625a      	str	r2, [r3, #36]	@ 0x24
     hi2c->XferCount   = Size;
- 80011b6:	68fb      	ldr	r3, [r7, #12]
- 80011b8:	893a      	ldrh	r2, [r7, #8]
- 80011ba:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 8001222:	68fb      	ldr	r3, [r7, #12]
+ 8001224:	893a      	ldrh	r2, [r7, #8]
+ 8001226:	855a      	strh	r2, [r3, #42]	@ 0x2a
     hi2c->XferSize    = hi2c->XferCount;
- 80011bc:	68fb      	ldr	r3, [r7, #12]
- 80011be:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 80011c0:	b29a      	uxth	r2, r3
- 80011c2:	68fb      	ldr	r3, [r7, #12]
- 80011c4:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001228:	68fb      	ldr	r3, [r7, #12]
+ 800122a:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 800122c:	b29a      	uxth	r2, r3
+ 800122e:	68fb      	ldr	r3, [r7, #12]
+ 8001230:	851a      	strh	r2, [r3, #40]	@ 0x28
     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- 80011c6:	68fb      	ldr	r3, [r7, #12]
- 80011c8:	4a50      	ldr	r2, [pc, #320]	@ (800130c <HAL_I2C_Master_Transmit+0x1f8>)
- 80011ca:	62da      	str	r2, [r3, #44]	@ 0x2c
+ 8001232:	68fb      	ldr	r3, [r7, #12]
+ 8001234:	4a50      	ldr	r2, [pc, #320]	@ (8001378 <HAL_I2C_Master_Transmit+0x1f8>)
+ 8001236:	62da      	str	r2, [r3, #44]	@ 0x2c
 
     /* Send Slave Address */
     if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- 80011cc:	8979      	ldrh	r1, [r7, #10]
- 80011ce:	697b      	ldr	r3, [r7, #20]
- 80011d0:	6a3a      	ldr	r2, [r7, #32]
- 80011d2:	68f8      	ldr	r0, [r7, #12]
- 80011d4:	f000 face 	bl	8001774 <I2C_MasterRequestWrite>
- 80011d8:	4603      	mov	r3, r0
- 80011da:	2b00      	cmp	r3, #0
- 80011dc:	d001      	beq.n	80011e2 <HAL_I2C_Master_Transmit+0xce>
+ 8001238:	8979      	ldrh	r1, [r7, #10]
+ 800123a:	697b      	ldr	r3, [r7, #20]
+ 800123c:	6a3a      	ldr	r2, [r7, #32]
+ 800123e:	68f8      	ldr	r0, [r7, #12]
+ 8001240:	f000 face 	bl	80017e0 <I2C_MasterRequestWrite>
+ 8001244:	4603      	mov	r3, r0
+ 8001246:	2b00      	cmp	r3, #0
+ 8001248:	d001      	beq.n	800124e <HAL_I2C_Master_Transmit+0xce>
     {
       return HAL_ERROR;
- 80011de:	2301      	movs	r3, #1
- 80011e0:	e08d      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
+ 800124a:	2301      	movs	r3, #1
+ 800124c:	e08d      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
     }
 
     /* Clear ADDR flag */
     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 80011e2:	2300      	movs	r3, #0
- 80011e4:	613b      	str	r3, [r7, #16]
- 80011e6:	68fb      	ldr	r3, [r7, #12]
- 80011e8:	681b      	ldr	r3, [r3, #0]
- 80011ea:	695b      	ldr	r3, [r3, #20]
- 80011ec:	613b      	str	r3, [r7, #16]
- 80011ee:	68fb      	ldr	r3, [r7, #12]
- 80011f0:	681b      	ldr	r3, [r3, #0]
- 80011f2:	699b      	ldr	r3, [r3, #24]
- 80011f4:	613b      	str	r3, [r7, #16]
- 80011f6:	693b      	ldr	r3, [r7, #16]
+ 800124e:	2300      	movs	r3, #0
+ 8001250:	613b      	str	r3, [r7, #16]
+ 8001252:	68fb      	ldr	r3, [r7, #12]
+ 8001254:	681b      	ldr	r3, [r3, #0]
+ 8001256:	695b      	ldr	r3, [r3, #20]
+ 8001258:	613b      	str	r3, [r7, #16]
+ 800125a:	68fb      	ldr	r3, [r7, #12]
+ 800125c:	681b      	ldr	r3, [r3, #0]
+ 800125e:	699b      	ldr	r3, [r3, #24]
+ 8001260:	613b      	str	r3, [r7, #16]
+ 8001262:	693b      	ldr	r3, [r7, #16]
 
     while (hi2c->XferSize > 0U)
- 80011f8:	e066      	b.n	80012c8 <HAL_I2C_Master_Transmit+0x1b4>
+ 8001264:	e066      	b.n	8001334 <HAL_I2C_Master_Transmit+0x1b4>
     {
       /* Wait until TXE flag is set */
       if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 80011fa:	697a      	ldr	r2, [r7, #20]
- 80011fc:	6a39      	ldr	r1, [r7, #32]
- 80011fe:	68f8      	ldr	r0, [r7, #12]
- 8001200:	f000 fd22 	bl	8001c48 <I2C_WaitOnTXEFlagUntilTimeout>
- 8001204:	4603      	mov	r3, r0
- 8001206:	2b00      	cmp	r3, #0
- 8001208:	d00d      	beq.n	8001226 <HAL_I2C_Master_Transmit+0x112>
+ 8001266:	697a      	ldr	r2, [r7, #20]
+ 8001268:	6a39      	ldr	r1, [r7, #32]
+ 800126a:	68f8      	ldr	r0, [r7, #12]
+ 800126c:	f000 fd22 	bl	8001cb4 <I2C_WaitOnTXEFlagUntilTimeout>
+ 8001270:	4603      	mov	r3, r0
+ 8001272:	2b00      	cmp	r3, #0
+ 8001274:	d00d      	beq.n	8001292 <HAL_I2C_Master_Transmit+0x112>
       {
         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- 800120a:	68fb      	ldr	r3, [r7, #12]
- 800120c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 800120e:	2b04      	cmp	r3, #4
- 8001210:	d107      	bne.n	8001222 <HAL_I2C_Master_Transmit+0x10e>
+ 8001276:	68fb      	ldr	r3, [r7, #12]
+ 8001278:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800127a:	2b04      	cmp	r3, #4
+ 800127c:	d107      	bne.n	800128e <HAL_I2C_Master_Transmit+0x10e>
         {
           /* Generate Stop */
           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 8001212:	68fb      	ldr	r3, [r7, #12]
- 8001214:	681b      	ldr	r3, [r3, #0]
- 8001216:	681a      	ldr	r2, [r3, #0]
- 8001218:	68fb      	ldr	r3, [r7, #12]
- 800121a:	681b      	ldr	r3, [r3, #0]
- 800121c:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 8001220:	601a      	str	r2, [r3, #0]
+ 800127e:	68fb      	ldr	r3, [r7, #12]
+ 8001280:	681b      	ldr	r3, [r3, #0]
+ 8001282:	681a      	ldr	r2, [r3, #0]
+ 8001284:	68fb      	ldr	r3, [r7, #12]
+ 8001286:	681b      	ldr	r3, [r3, #0]
+ 8001288:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 800128c:	601a      	str	r2, [r3, #0]
         }
         return HAL_ERROR;
- 8001222:	2301      	movs	r3, #1
- 8001224:	e06b      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
+ 800128e:	2301      	movs	r3, #1
+ 8001290:	e06b      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
       }
 
       /* Write data to DR */
       hi2c->Instance->DR = *hi2c->pBuffPtr;
- 8001226:	68fb      	ldr	r3, [r7, #12]
- 8001228:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800122a:	781a      	ldrb	r2, [r3, #0]
- 800122c:	68fb      	ldr	r3, [r7, #12]
- 800122e:	681b      	ldr	r3, [r3, #0]
- 8001230:	611a      	str	r2, [r3, #16]
+ 8001292:	68fb      	ldr	r3, [r7, #12]
+ 8001294:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001296:	781a      	ldrb	r2, [r3, #0]
+ 8001298:	68fb      	ldr	r3, [r7, #12]
+ 800129a:	681b      	ldr	r3, [r3, #0]
+ 800129c:	611a      	str	r2, [r3, #16]
 
       /* Increment Buffer pointer */
       hi2c->pBuffPtr++;
- 8001232:	68fb      	ldr	r3, [r7, #12]
- 8001234:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001236:	1c5a      	adds	r2, r3, #1
- 8001238:	68fb      	ldr	r3, [r7, #12]
- 800123a:	625a      	str	r2, [r3, #36]	@ 0x24
+ 800129e:	68fb      	ldr	r3, [r7, #12]
+ 80012a0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80012a2:	1c5a      	adds	r2, r3, #1
+ 80012a4:	68fb      	ldr	r3, [r7, #12]
+ 80012a6:	625a      	str	r2, [r3, #36]	@ 0x24
 
       /* Update counter */
       hi2c->XferCount--;
- 800123c:	68fb      	ldr	r3, [r7, #12]
- 800123e:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001240:	b29b      	uxth	r3, r3
- 8001242:	3b01      	subs	r3, #1
- 8001244:	b29a      	uxth	r2, r3
- 8001246:	68fb      	ldr	r3, [r7, #12]
- 8001248:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 80012a8:	68fb      	ldr	r3, [r7, #12]
+ 80012aa:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 80012ac:	b29b      	uxth	r3, r3
+ 80012ae:	3b01      	subs	r3, #1
+ 80012b0:	b29a      	uxth	r2, r3
+ 80012b2:	68fb      	ldr	r3, [r7, #12]
+ 80012b4:	855a      	strh	r2, [r3, #42]	@ 0x2a
       hi2c->XferSize--;
- 800124a:	68fb      	ldr	r3, [r7, #12]
- 800124c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 800124e:	3b01      	subs	r3, #1
- 8001250:	b29a      	uxth	r2, r3
- 8001252:	68fb      	ldr	r3, [r7, #12]
- 8001254:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 80012b6:	68fb      	ldr	r3, [r7, #12]
+ 80012b8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80012ba:	3b01      	subs	r3, #1
+ 80012bc:	b29a      	uxth	r2, r3
+ 80012be:	68fb      	ldr	r3, [r7, #12]
+ 80012c0:	851a      	strh	r2, [r3, #40]	@ 0x28
 
       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
- 8001256:	68fb      	ldr	r3, [r7, #12]
- 8001258:	681b      	ldr	r3, [r3, #0]
- 800125a:	695b      	ldr	r3, [r3, #20]
- 800125c:	f003 0304 	and.w	r3, r3, #4
- 8001260:	2b04      	cmp	r3, #4
- 8001262:	d11b      	bne.n	800129c <HAL_I2C_Master_Transmit+0x188>
- 8001264:	68fb      	ldr	r3, [r7, #12]
- 8001266:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001268:	2b00      	cmp	r3, #0
- 800126a:	d017      	beq.n	800129c <HAL_I2C_Master_Transmit+0x188>
+ 80012c2:	68fb      	ldr	r3, [r7, #12]
+ 80012c4:	681b      	ldr	r3, [r3, #0]
+ 80012c6:	695b      	ldr	r3, [r3, #20]
+ 80012c8:	f003 0304 	and.w	r3, r3, #4
+ 80012cc:	2b04      	cmp	r3, #4
+ 80012ce:	d11b      	bne.n	8001308 <HAL_I2C_Master_Transmit+0x188>
+ 80012d0:	68fb      	ldr	r3, [r7, #12]
+ 80012d2:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80012d4:	2b00      	cmp	r3, #0
+ 80012d6:	d017      	beq.n	8001308 <HAL_I2C_Master_Transmit+0x188>
       {
         /* Write data to DR */
         hi2c->Instance->DR = *hi2c->pBuffPtr;
- 800126c:	68fb      	ldr	r3, [r7, #12]
- 800126e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001270:	781a      	ldrb	r2, [r3, #0]
- 8001272:	68fb      	ldr	r3, [r7, #12]
- 8001274:	681b      	ldr	r3, [r3, #0]
- 8001276:	611a      	str	r2, [r3, #16]
+ 80012d8:	68fb      	ldr	r3, [r7, #12]
+ 80012da:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80012dc:	781a      	ldrb	r2, [r3, #0]
+ 80012de:	68fb      	ldr	r3, [r7, #12]
+ 80012e0:	681b      	ldr	r3, [r3, #0]
+ 80012e2:	611a      	str	r2, [r3, #16]
 
         /* Increment Buffer pointer */
         hi2c->pBuffPtr++;
- 8001278:	68fb      	ldr	r3, [r7, #12]
- 800127a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800127c:	1c5a      	adds	r2, r3, #1
- 800127e:	68fb      	ldr	r3, [r7, #12]
- 8001280:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80012e4:	68fb      	ldr	r3, [r7, #12]
+ 80012e6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80012e8:	1c5a      	adds	r2, r3, #1
+ 80012ea:	68fb      	ldr	r3, [r7, #12]
+ 80012ec:	625a      	str	r2, [r3, #36]	@ 0x24
 
         /* Update counter */
         hi2c->XferCount--;
- 8001282:	68fb      	ldr	r3, [r7, #12]
- 8001284:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001286:	b29b      	uxth	r3, r3
- 8001288:	3b01      	subs	r3, #1
- 800128a:	b29a      	uxth	r2, r3
- 800128c:	68fb      	ldr	r3, [r7, #12]
- 800128e:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 80012ee:	68fb      	ldr	r3, [r7, #12]
+ 80012f0:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 80012f2:	b29b      	uxth	r3, r3
+ 80012f4:	3b01      	subs	r3, #1
+ 80012f6:	b29a      	uxth	r2, r3
+ 80012f8:	68fb      	ldr	r3, [r7, #12]
+ 80012fa:	855a      	strh	r2, [r3, #42]	@ 0x2a
         hi2c->XferSize--;
- 8001290:	68fb      	ldr	r3, [r7, #12]
- 8001292:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001294:	3b01      	subs	r3, #1
- 8001296:	b29a      	uxth	r2, r3
- 8001298:	68fb      	ldr	r3, [r7, #12]
- 800129a:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 80012fc:	68fb      	ldr	r3, [r7, #12]
+ 80012fe:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001300:	3b01      	subs	r3, #1
+ 8001302:	b29a      	uxth	r2, r3
+ 8001304:	68fb      	ldr	r3, [r7, #12]
+ 8001306:	851a      	strh	r2, [r3, #40]	@ 0x28
       }
 
       /* Wait until BTF flag is set */
       if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 800129c:	697a      	ldr	r2, [r7, #20]
- 800129e:	6a39      	ldr	r1, [r7, #32]
- 80012a0:	68f8      	ldr	r0, [r7, #12]
- 80012a2:	f000 fd19 	bl	8001cd8 <I2C_WaitOnBTFFlagUntilTimeout>
- 80012a6:	4603      	mov	r3, r0
- 80012a8:	2b00      	cmp	r3, #0
- 80012aa:	d00d      	beq.n	80012c8 <HAL_I2C_Master_Transmit+0x1b4>
+ 8001308:	697a      	ldr	r2, [r7, #20]
+ 800130a:	6a39      	ldr	r1, [r7, #32]
+ 800130c:	68f8      	ldr	r0, [r7, #12]
+ 800130e:	f000 fd19 	bl	8001d44 <I2C_WaitOnBTFFlagUntilTimeout>
+ 8001312:	4603      	mov	r3, r0
+ 8001314:	2b00      	cmp	r3, #0
+ 8001316:	d00d      	beq.n	8001334 <HAL_I2C_Master_Transmit+0x1b4>
       {
         if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- 80012ac:	68fb      	ldr	r3, [r7, #12]
- 80012ae:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 80012b0:	2b04      	cmp	r3, #4
- 80012b2:	d107      	bne.n	80012c4 <HAL_I2C_Master_Transmit+0x1b0>
+ 8001318:	68fb      	ldr	r3, [r7, #12]
+ 800131a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800131c:	2b04      	cmp	r3, #4
+ 800131e:	d107      	bne.n	8001330 <HAL_I2C_Master_Transmit+0x1b0>
         {
           /* Generate Stop */
           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 80012b4:	68fb      	ldr	r3, [r7, #12]
- 80012b6:	681b      	ldr	r3, [r3, #0]
- 80012b8:	681a      	ldr	r2, [r3, #0]
- 80012ba:	68fb      	ldr	r3, [r7, #12]
- 80012bc:	681b      	ldr	r3, [r3, #0]
- 80012be:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 80012c2:	601a      	str	r2, [r3, #0]
+ 8001320:	68fb      	ldr	r3, [r7, #12]
+ 8001322:	681b      	ldr	r3, [r3, #0]
+ 8001324:	681a      	ldr	r2, [r3, #0]
+ 8001326:	68fb      	ldr	r3, [r7, #12]
+ 8001328:	681b      	ldr	r3, [r3, #0]
+ 800132a:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 800132e:	601a      	str	r2, [r3, #0]
         }
         return HAL_ERROR;
- 80012c4:	2301      	movs	r3, #1
- 80012c6:	e01a      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
+ 8001330:	2301      	movs	r3, #1
+ 8001332:	e01a      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
     while (hi2c->XferSize > 0U)
- 80012c8:	68fb      	ldr	r3, [r7, #12]
- 80012ca:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80012cc:	2b00      	cmp	r3, #0
- 80012ce:	d194      	bne.n	80011fa <HAL_I2C_Master_Transmit+0xe6>
+ 8001334:	68fb      	ldr	r3, [r7, #12]
+ 8001336:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001338:	2b00      	cmp	r3, #0
+ 800133a:	d194      	bne.n	8001266 <HAL_I2C_Master_Transmit+0xe6>
       }
     }
 
     /* Generate Stop */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 80012d0:	68fb      	ldr	r3, [r7, #12]
- 80012d2:	681b      	ldr	r3, [r3, #0]
- 80012d4:	681a      	ldr	r2, [r3, #0]
- 80012d6:	68fb      	ldr	r3, [r7, #12]
- 80012d8:	681b      	ldr	r3, [r3, #0]
- 80012da:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 80012de:	601a      	str	r2, [r3, #0]
+ 800133c:	68fb      	ldr	r3, [r7, #12]
+ 800133e:	681b      	ldr	r3, [r3, #0]
+ 8001340:	681a      	ldr	r2, [r3, #0]
+ 8001342:	68fb      	ldr	r3, [r7, #12]
+ 8001344:	681b      	ldr	r3, [r3, #0]
+ 8001346:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 800134a:	601a      	str	r2, [r3, #0]
 
     hi2c->State = HAL_I2C_STATE_READY;
- 80012e0:	68fb      	ldr	r3, [r7, #12]
- 80012e2:	2220      	movs	r2, #32
- 80012e4:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 800134c:	68fb      	ldr	r3, [r7, #12]
+ 800134e:	2220      	movs	r2, #32
+ 8001350:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
     hi2c->Mode = HAL_I2C_MODE_NONE;
- 80012e8:	68fb      	ldr	r3, [r7, #12]
- 80012ea:	2200      	movs	r2, #0
- 80012ec:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001354:	68fb      	ldr	r3, [r7, #12]
+ 8001356:	2200      	movs	r2, #0
+ 8001358:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 
     /* Process Unlocked */
     __HAL_UNLOCK(hi2c);
- 80012f0:	68fb      	ldr	r3, [r7, #12]
- 80012f2:	2200      	movs	r2, #0
- 80012f4:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 800135c:	68fb      	ldr	r3, [r7, #12]
+ 800135e:	2200      	movs	r2, #0
+ 8001360:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     return HAL_OK;
- 80012f8:	2300      	movs	r3, #0
- 80012fa:	e000      	b.n	80012fe <HAL_I2C_Master_Transmit+0x1ea>
+ 8001364:	2300      	movs	r3, #0
+ 8001366:	e000      	b.n	800136a <HAL_I2C_Master_Transmit+0x1ea>
   }
   else
   {
     return HAL_BUSY;
- 80012fc:	2302      	movs	r3, #2
+ 8001368:	2302      	movs	r3, #2
   }
 }
- 80012fe:	4618      	mov	r0, r3
- 8001300:	3718      	adds	r7, #24
- 8001302:	46bd      	mov	sp, r7
- 8001304:	bd80      	pop	{r7, pc}
- 8001306:	bf00      	nop
- 8001308:	00100002 	.word	0x00100002
- 800130c:	ffff0000 	.word	0xffff0000
+ 800136a:	4618      	mov	r0, r3
+ 800136c:	3718      	adds	r7, #24
+ 800136e:	46bd      	mov	sp, r7
+ 8001370:	bd80      	pop	{r7, pc}
+ 8001372:	bf00      	nop
+ 8001374:	00100002 	.word	0x00100002
+ 8001378:	ffff0000 	.word	0xffff0000
 
-08001310 <HAL_I2C_Master_Receive>:
+0800137c <HAL_I2C_Master_Receive>:
   * @param  Size Amount of data to be sent
   * @param  Timeout Timeout duration
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
- 8001310:	b580      	push	{r7, lr}
- 8001312:	b08c      	sub	sp, #48	@ 0x30
- 8001314:	af02      	add	r7, sp, #8
- 8001316:	60f8      	str	r0, [r7, #12]
- 8001318:	607a      	str	r2, [r7, #4]
- 800131a:	461a      	mov	r2, r3
- 800131c:	460b      	mov	r3, r1
- 800131e:	817b      	strh	r3, [r7, #10]
- 8001320:	4613      	mov	r3, r2
- 8001322:	813b      	strh	r3, [r7, #8]
+ 800137c:	b580      	push	{r7, lr}
+ 800137e:	b08c      	sub	sp, #48	@ 0x30
+ 8001380:	af02      	add	r7, sp, #8
+ 8001382:	60f8      	str	r0, [r7, #12]
+ 8001384:	607a      	str	r2, [r7, #4]
+ 8001386:	461a      	mov	r2, r3
+ 8001388:	460b      	mov	r3, r1
+ 800138a:	817b      	strh	r3, [r7, #10]
+ 800138c:	4613      	mov	r3, r2
+ 800138e:	813b      	strh	r3, [r7, #8]
   /* Init tickstart for timeout management*/
   uint32_t tickstart = HAL_GetTick();
- 8001324:	f7ff fafa 	bl	800091c <HAL_GetTick>
- 8001328:	6278      	str	r0, [r7, #36]	@ 0x24
+ 8001390:	f7ff fafa 	bl	8000988 <HAL_GetTick>
+ 8001394:	6278      	str	r0, [r7, #36]	@ 0x24
 
   if (hi2c->State == HAL_I2C_STATE_READY)
- 800132a:	68fb      	ldr	r3, [r7, #12]
- 800132c:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
- 8001330:	b2db      	uxtb	r3, r3
- 8001332:	2b20      	cmp	r3, #32
- 8001334:	f040 8217 	bne.w	8001766 <HAL_I2C_Master_Receive+0x456>
+ 8001396:	68fb      	ldr	r3, [r7, #12]
+ 8001398:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 800139c:	b2db      	uxtb	r3, r3
+ 800139e:	2b20      	cmp	r3, #32
+ 80013a0:	f040 8217 	bne.w	80017d2 <HAL_I2C_Master_Receive+0x456>
   {
     /* Wait until BUSY flag is reset */
     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- 8001338:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 800133a:	9300      	str	r3, [sp, #0]
- 800133c:	2319      	movs	r3, #25
- 800133e:	2201      	movs	r2, #1
- 8001340:	497c      	ldr	r1, [pc, #496]	@ (8001534 <HAL_I2C_Master_Receive+0x224>)
- 8001342:	68f8      	ldr	r0, [r7, #12]
- 8001344:	f000 fb66 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 8001348:	4603      	mov	r3, r0
- 800134a:	2b00      	cmp	r3, #0
- 800134c:	d001      	beq.n	8001352 <HAL_I2C_Master_Receive+0x42>
+ 80013a4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80013a6:	9300      	str	r3, [sp, #0]
+ 80013a8:	2319      	movs	r3, #25
+ 80013aa:	2201      	movs	r2, #1
+ 80013ac:	497c      	ldr	r1, [pc, #496]	@ (80015a0 <HAL_I2C_Master_Receive+0x224>)
+ 80013ae:	68f8      	ldr	r0, [r7, #12]
+ 80013b0:	f000 fb66 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 80013b4:	4603      	mov	r3, r0
+ 80013b6:	2b00      	cmp	r3, #0
+ 80013b8:	d001      	beq.n	80013be <HAL_I2C_Master_Receive+0x42>
     {
       return HAL_BUSY;
- 800134e:	2302      	movs	r3, #2
- 8001350:	e20a      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 80013ba:	2302      	movs	r3, #2
+ 80013bc:	e20a      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
     }
 
     /* Process Locked */
     __HAL_LOCK(hi2c);
- 8001352:	68fb      	ldr	r3, [r7, #12]
- 8001354:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
- 8001358:	2b01      	cmp	r3, #1
- 800135a:	d101      	bne.n	8001360 <HAL_I2C_Master_Receive+0x50>
- 800135c:	2302      	movs	r3, #2
- 800135e:	e203      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
- 8001360:	68fb      	ldr	r3, [r7, #12]
- 8001362:	2201      	movs	r2, #1
- 8001364:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 80013be:	68fb      	ldr	r3, [r7, #12]
+ 80013c0:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
+ 80013c4:	2b01      	cmp	r3, #1
+ 80013c6:	d101      	bne.n	80013cc <HAL_I2C_Master_Receive+0x50>
+ 80013c8:	2302      	movs	r3, #2
+ 80013ca:	e203      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
+ 80013cc:	68fb      	ldr	r3, [r7, #12]
+ 80013ce:	2201      	movs	r2, #1
+ 80013d0:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     /* Check if the I2C is already enabled */
     if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- 8001368:	68fb      	ldr	r3, [r7, #12]
- 800136a:	681b      	ldr	r3, [r3, #0]
- 800136c:	681b      	ldr	r3, [r3, #0]
- 800136e:	f003 0301 	and.w	r3, r3, #1
- 8001372:	2b01      	cmp	r3, #1
- 8001374:	d007      	beq.n	8001386 <HAL_I2C_Master_Receive+0x76>
+ 80013d4:	68fb      	ldr	r3, [r7, #12]
+ 80013d6:	681b      	ldr	r3, [r3, #0]
+ 80013d8:	681b      	ldr	r3, [r3, #0]
+ 80013da:	f003 0301 	and.w	r3, r3, #1
+ 80013de:	2b01      	cmp	r3, #1
+ 80013e0:	d007      	beq.n	80013f2 <HAL_I2C_Master_Receive+0x76>
     {
       /* Enable I2C peripheral */
       __HAL_I2C_ENABLE(hi2c);
- 8001376:	68fb      	ldr	r3, [r7, #12]
- 8001378:	681b      	ldr	r3, [r3, #0]
- 800137a:	681a      	ldr	r2, [r3, #0]
- 800137c:	68fb      	ldr	r3, [r7, #12]
- 800137e:	681b      	ldr	r3, [r3, #0]
- 8001380:	f042 0201 	orr.w	r2, r2, #1
- 8001384:	601a      	str	r2, [r3, #0]
+ 80013e2:	68fb      	ldr	r3, [r7, #12]
+ 80013e4:	681b      	ldr	r3, [r3, #0]
+ 80013e6:	681a      	ldr	r2, [r3, #0]
+ 80013e8:	68fb      	ldr	r3, [r7, #12]
+ 80013ea:	681b      	ldr	r3, [r3, #0]
+ 80013ec:	f042 0201 	orr.w	r2, r2, #1
+ 80013f0:	601a      	str	r2, [r3, #0]
     }
 
     /* Disable Pos */
     CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- 8001386:	68fb      	ldr	r3, [r7, #12]
- 8001388:	681b      	ldr	r3, [r3, #0]
- 800138a:	681a      	ldr	r2, [r3, #0]
- 800138c:	68fb      	ldr	r3, [r7, #12]
- 800138e:	681b      	ldr	r3, [r3, #0]
- 8001390:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
- 8001394:	601a      	str	r2, [r3, #0]
+ 80013f2:	68fb      	ldr	r3, [r7, #12]
+ 80013f4:	681b      	ldr	r3, [r3, #0]
+ 80013f6:	681a      	ldr	r2, [r3, #0]
+ 80013f8:	68fb      	ldr	r3, [r7, #12]
+ 80013fa:	681b      	ldr	r3, [r3, #0]
+ 80013fc:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
+ 8001400:	601a      	str	r2, [r3, #0]
 
     hi2c->State       = HAL_I2C_STATE_BUSY_RX;
- 8001396:	68fb      	ldr	r3, [r7, #12]
- 8001398:	2222      	movs	r2, #34	@ 0x22
- 800139a:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001402:	68fb      	ldr	r3, [r7, #12]
+ 8001404:	2222      	movs	r2, #34	@ 0x22
+ 8001406:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
     hi2c->Mode        = HAL_I2C_MODE_MASTER;
- 800139e:	68fb      	ldr	r3, [r7, #12]
- 80013a0:	2210      	movs	r2, #16
- 80013a2:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 800140a:	68fb      	ldr	r3, [r7, #12]
+ 800140c:	2210      	movs	r2, #16
+ 800140e:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
     hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
- 80013a6:	68fb      	ldr	r3, [r7, #12]
- 80013a8:	2200      	movs	r2, #0
- 80013aa:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001412:	68fb      	ldr	r3, [r7, #12]
+ 8001414:	2200      	movs	r2, #0
+ 8001416:	641a      	str	r2, [r3, #64]	@ 0x40
 
     /* Prepare transfer parameters */
     hi2c->pBuffPtr    = pData;
- 80013ac:	68fb      	ldr	r3, [r7, #12]
- 80013ae:	687a      	ldr	r2, [r7, #4]
- 80013b0:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001418:	68fb      	ldr	r3, [r7, #12]
+ 800141a:	687a      	ldr	r2, [r7, #4]
+ 800141c:	625a      	str	r2, [r3, #36]	@ 0x24
     hi2c->XferCount   = Size;
- 80013b2:	68fb      	ldr	r3, [r7, #12]
- 80013b4:	893a      	ldrh	r2, [r7, #8]
- 80013b6:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 800141e:	68fb      	ldr	r3, [r7, #12]
+ 8001420:	893a      	ldrh	r2, [r7, #8]
+ 8001422:	855a      	strh	r2, [r3, #42]	@ 0x2a
     hi2c->XferSize    = hi2c->XferCount;
- 80013b8:	68fb      	ldr	r3, [r7, #12]
- 80013ba:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 80013bc:	b29a      	uxth	r2, r3
- 80013be:	68fb      	ldr	r3, [r7, #12]
- 80013c0:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001424:	68fb      	ldr	r3, [r7, #12]
+ 8001426:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 8001428:	b29a      	uxth	r2, r3
+ 800142a:	68fb      	ldr	r3, [r7, #12]
+ 800142c:	851a      	strh	r2, [r3, #40]	@ 0x28
     hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- 80013c2:	68fb      	ldr	r3, [r7, #12]
- 80013c4:	4a5c      	ldr	r2, [pc, #368]	@ (8001538 <HAL_I2C_Master_Receive+0x228>)
- 80013c6:	62da      	str	r2, [r3, #44]	@ 0x2c
+ 800142e:	68fb      	ldr	r3, [r7, #12]
+ 8001430:	4a5c      	ldr	r2, [pc, #368]	@ (80015a4 <HAL_I2C_Master_Receive+0x228>)
+ 8001432:	62da      	str	r2, [r3, #44]	@ 0x2c
 
     /* Send Slave Address */
     if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- 80013c8:	8979      	ldrh	r1, [r7, #10]
- 80013ca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 80013cc:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
- 80013ce:	68f8      	ldr	r0, [r7, #12]
- 80013d0:	f000 fa52 	bl	8001878 <I2C_MasterRequestRead>
- 80013d4:	4603      	mov	r3, r0
- 80013d6:	2b00      	cmp	r3, #0
- 80013d8:	d001      	beq.n	80013de <HAL_I2C_Master_Receive+0xce>
+ 8001434:	8979      	ldrh	r1, [r7, #10]
+ 8001436:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 8001438:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
+ 800143a:	68f8      	ldr	r0, [r7, #12]
+ 800143c:	f000 fa52 	bl	80018e4 <I2C_MasterRequestRead>
+ 8001440:	4603      	mov	r3, r0
+ 8001442:	2b00      	cmp	r3, #0
+ 8001444:	d001      	beq.n	800144a <HAL_I2C_Master_Receive+0xce>
     {
       return HAL_ERROR;
- 80013da:	2301      	movs	r3, #1
- 80013dc:	e1c4      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 8001446:	2301      	movs	r3, #1
+ 8001448:	e1c4      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
     }
 
     if (hi2c->XferSize == 0U)
- 80013de:	68fb      	ldr	r3, [r7, #12]
- 80013e0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80013e2:	2b00      	cmp	r3, #0
- 80013e4:	d113      	bne.n	800140e <HAL_I2C_Master_Receive+0xfe>
+ 800144a:	68fb      	ldr	r3, [r7, #12]
+ 800144c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 800144e:	2b00      	cmp	r3, #0
+ 8001450:	d113      	bne.n	800147a <HAL_I2C_Master_Receive+0xfe>
     {
       /* Clear ADDR flag */
       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 80013e6:	2300      	movs	r3, #0
- 80013e8:	623b      	str	r3, [r7, #32]
- 80013ea:	68fb      	ldr	r3, [r7, #12]
- 80013ec:	681b      	ldr	r3, [r3, #0]
- 80013ee:	695b      	ldr	r3, [r3, #20]
- 80013f0:	623b      	str	r3, [r7, #32]
- 80013f2:	68fb      	ldr	r3, [r7, #12]
- 80013f4:	681b      	ldr	r3, [r3, #0]
- 80013f6:	699b      	ldr	r3, [r3, #24]
- 80013f8:	623b      	str	r3, [r7, #32]
- 80013fa:	6a3b      	ldr	r3, [r7, #32]
-
-      /* Generate Stop */
-      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 80013fc:	68fb      	ldr	r3, [r7, #12]
- 80013fe:	681b      	ldr	r3, [r3, #0]
- 8001400:	681a      	ldr	r2, [r3, #0]
- 8001402:	68fb      	ldr	r3, [r7, #12]
- 8001404:	681b      	ldr	r3, [r3, #0]
- 8001406:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 800140a:	601a      	str	r2, [r3, #0]
- 800140c:	e198      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
-    }
-    else if (hi2c->XferSize == 1U)
- 800140e:	68fb      	ldr	r3, [r7, #12]
- 8001410:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001412:	2b01      	cmp	r3, #1
- 8001414:	d11b      	bne.n	800144e <HAL_I2C_Master_Receive+0x13e>
-    {
-      /* Disable Acknowledge */
-      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- 8001416:	68fb      	ldr	r3, [r7, #12]
- 8001418:	681b      	ldr	r3, [r3, #0]
- 800141a:	681a      	ldr	r2, [r3, #0]
- 800141c:	68fb      	ldr	r3, [r7, #12]
- 800141e:	681b      	ldr	r3, [r3, #0]
- 8001420:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
- 8001424:	601a      	str	r2, [r3, #0]
-
-      /* Clear ADDR flag */
-      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 8001426:	2300      	movs	r3, #0
- 8001428:	61fb      	str	r3, [r7, #28]
- 800142a:	68fb      	ldr	r3, [r7, #12]
- 800142c:	681b      	ldr	r3, [r3, #0]
- 800142e:	695b      	ldr	r3, [r3, #20]
- 8001430:	61fb      	str	r3, [r7, #28]
- 8001432:	68fb      	ldr	r3, [r7, #12]
- 8001434:	681b      	ldr	r3, [r3, #0]
- 8001436:	699b      	ldr	r3, [r3, #24]
- 8001438:	61fb      	str	r3, [r7, #28]
- 800143a:	69fb      	ldr	r3, [r7, #28]
-
-      /* Generate Stop */
-      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 800143c:	68fb      	ldr	r3, [r7, #12]
- 800143e:	681b      	ldr	r3, [r3, #0]
- 8001440:	681a      	ldr	r2, [r3, #0]
- 8001442:	68fb      	ldr	r3, [r7, #12]
- 8001444:	681b      	ldr	r3, [r3, #0]
- 8001446:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 800144a:	601a      	str	r2, [r3, #0]
- 800144c:	e178      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
-    }
-    else if (hi2c->XferSize == 2U)
- 800144e:	68fb      	ldr	r3, [r7, #12]
- 8001450:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001452:	2b02      	cmp	r3, #2
- 8001454:	d11b      	bne.n	800148e <HAL_I2C_Master_Receive+0x17e>
-    {
-      /* Disable Acknowledge */
-      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ 8001452:	2300      	movs	r3, #0
+ 8001454:	623b      	str	r3, [r7, #32]
  8001456:	68fb      	ldr	r3, [r7, #12]
  8001458:	681b      	ldr	r3, [r3, #0]
- 800145a:	681a      	ldr	r2, [r3, #0]
- 800145c:	68fb      	ldr	r3, [r7, #12]
- 800145e:	681b      	ldr	r3, [r3, #0]
- 8001460:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
- 8001464:	601a      	str	r2, [r3, #0]
+ 800145a:	695b      	ldr	r3, [r3, #20]
+ 800145c:	623b      	str	r3, [r7, #32]
+ 800145e:	68fb      	ldr	r3, [r7, #12]
+ 8001460:	681b      	ldr	r3, [r3, #0]
+ 8001462:	699b      	ldr	r3, [r3, #24]
+ 8001464:	623b      	str	r3, [r7, #32]
+ 8001466:	6a3b      	ldr	r3, [r7, #32]
+
+      /* Generate Stop */
+      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
+ 8001468:	68fb      	ldr	r3, [r7, #12]
+ 800146a:	681b      	ldr	r3, [r3, #0]
+ 800146c:	681a      	ldr	r2, [r3, #0]
+ 800146e:	68fb      	ldr	r3, [r7, #12]
+ 8001470:	681b      	ldr	r3, [r3, #0]
+ 8001472:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 8001476:	601a      	str	r2, [r3, #0]
+ 8001478:	e198      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
+    }
+    else if (hi2c->XferSize == 1U)
+ 800147a:	68fb      	ldr	r3, [r7, #12]
+ 800147c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 800147e:	2b01      	cmp	r3, #1
+ 8001480:	d11b      	bne.n	80014ba <HAL_I2C_Master_Receive+0x13e>
+    {
+      /* Disable Acknowledge */
+      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ 8001482:	68fb      	ldr	r3, [r7, #12]
+ 8001484:	681b      	ldr	r3, [r3, #0]
+ 8001486:	681a      	ldr	r2, [r3, #0]
+ 8001488:	68fb      	ldr	r3, [r7, #12]
+ 800148a:	681b      	ldr	r3, [r3, #0]
+ 800148c:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
+ 8001490:	601a      	str	r2, [r3, #0]
+
+      /* Clear ADDR flag */
+      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+ 8001492:	2300      	movs	r3, #0
+ 8001494:	61fb      	str	r3, [r7, #28]
+ 8001496:	68fb      	ldr	r3, [r7, #12]
+ 8001498:	681b      	ldr	r3, [r3, #0]
+ 800149a:	695b      	ldr	r3, [r3, #20]
+ 800149c:	61fb      	str	r3, [r7, #28]
+ 800149e:	68fb      	ldr	r3, [r7, #12]
+ 80014a0:	681b      	ldr	r3, [r3, #0]
+ 80014a2:	699b      	ldr	r3, [r3, #24]
+ 80014a4:	61fb      	str	r3, [r7, #28]
+ 80014a6:	69fb      	ldr	r3, [r7, #28]
+
+      /* Generate Stop */
+      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
+ 80014a8:	68fb      	ldr	r3, [r7, #12]
+ 80014aa:	681b      	ldr	r3, [r3, #0]
+ 80014ac:	681a      	ldr	r2, [r3, #0]
+ 80014ae:	68fb      	ldr	r3, [r7, #12]
+ 80014b0:	681b      	ldr	r3, [r3, #0]
+ 80014b2:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 80014b6:	601a      	str	r2, [r3, #0]
+ 80014b8:	e178      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
+    }
+    else if (hi2c->XferSize == 2U)
+ 80014ba:	68fb      	ldr	r3, [r7, #12]
+ 80014bc:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80014be:	2b02      	cmp	r3, #2
+ 80014c0:	d11b      	bne.n	80014fa <HAL_I2C_Master_Receive+0x17e>
+    {
+      /* Disable Acknowledge */
+      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ 80014c2:	68fb      	ldr	r3, [r7, #12]
+ 80014c4:	681b      	ldr	r3, [r3, #0]
+ 80014c6:	681a      	ldr	r2, [r3, #0]
+ 80014c8:	68fb      	ldr	r3, [r7, #12]
+ 80014ca:	681b      	ldr	r3, [r3, #0]
+ 80014cc:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
+ 80014d0:	601a      	str	r2, [r3, #0]
 
       /* Enable Pos */
       SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- 8001466:	68fb      	ldr	r3, [r7, #12]
- 8001468:	681b      	ldr	r3, [r3, #0]
- 800146a:	681a      	ldr	r2, [r3, #0]
- 800146c:	68fb      	ldr	r3, [r7, #12]
- 800146e:	681b      	ldr	r3, [r3, #0]
- 8001470:	f442 6200 	orr.w	r2, r2, #2048	@ 0x800
- 8001474:	601a      	str	r2, [r3, #0]
+ 80014d2:	68fb      	ldr	r3, [r7, #12]
+ 80014d4:	681b      	ldr	r3, [r3, #0]
+ 80014d6:	681a      	ldr	r2, [r3, #0]
+ 80014d8:	68fb      	ldr	r3, [r7, #12]
+ 80014da:	681b      	ldr	r3, [r3, #0]
+ 80014dc:	f442 6200 	orr.w	r2, r2, #2048	@ 0x800
+ 80014e0:	601a      	str	r2, [r3, #0]
 
       /* Clear ADDR flag */
       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 8001476:	2300      	movs	r3, #0
- 8001478:	61bb      	str	r3, [r7, #24]
- 800147a:	68fb      	ldr	r3, [r7, #12]
- 800147c:	681b      	ldr	r3, [r3, #0]
- 800147e:	695b      	ldr	r3, [r3, #20]
- 8001480:	61bb      	str	r3, [r7, #24]
- 8001482:	68fb      	ldr	r3, [r7, #12]
- 8001484:	681b      	ldr	r3, [r3, #0]
- 8001486:	699b      	ldr	r3, [r3, #24]
- 8001488:	61bb      	str	r3, [r7, #24]
- 800148a:	69bb      	ldr	r3, [r7, #24]
- 800148c:	e158      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 80014e2:	2300      	movs	r3, #0
+ 80014e4:	61bb      	str	r3, [r7, #24]
+ 80014e6:	68fb      	ldr	r3, [r7, #12]
+ 80014e8:	681b      	ldr	r3, [r3, #0]
+ 80014ea:	695b      	ldr	r3, [r3, #20]
+ 80014ec:	61bb      	str	r3, [r7, #24]
+ 80014ee:	68fb      	ldr	r3, [r7, #12]
+ 80014f0:	681b      	ldr	r3, [r3, #0]
+ 80014f2:	699b      	ldr	r3, [r3, #24]
+ 80014f4:	61bb      	str	r3, [r7, #24]
+ 80014f6:	69bb      	ldr	r3, [r7, #24]
+ 80014f8:	e158      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
     }
     else
     {
       /* Enable Acknowledge */
       SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- 800148e:	68fb      	ldr	r3, [r7, #12]
- 8001490:	681b      	ldr	r3, [r3, #0]
- 8001492:	681a      	ldr	r2, [r3, #0]
- 8001494:	68fb      	ldr	r3, [r7, #12]
- 8001496:	681b      	ldr	r3, [r3, #0]
- 8001498:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
- 800149c:	601a      	str	r2, [r3, #0]
+ 80014fa:	68fb      	ldr	r3, [r7, #12]
+ 80014fc:	681b      	ldr	r3, [r3, #0]
+ 80014fe:	681a      	ldr	r2, [r3, #0]
+ 8001500:	68fb      	ldr	r3, [r7, #12]
+ 8001502:	681b      	ldr	r3, [r3, #0]
+ 8001504:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
+ 8001508:	601a      	str	r2, [r3, #0]
 
       /* Clear ADDR flag */
       __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 800149e:	2300      	movs	r3, #0
- 80014a0:	617b      	str	r3, [r7, #20]
- 80014a2:	68fb      	ldr	r3, [r7, #12]
- 80014a4:	681b      	ldr	r3, [r3, #0]
- 80014a6:	695b      	ldr	r3, [r3, #20]
- 80014a8:	617b      	str	r3, [r7, #20]
- 80014aa:	68fb      	ldr	r3, [r7, #12]
- 80014ac:	681b      	ldr	r3, [r3, #0]
- 80014ae:	699b      	ldr	r3, [r3, #24]
- 80014b0:	617b      	str	r3, [r7, #20]
- 80014b2:	697b      	ldr	r3, [r7, #20]
+ 800150a:	2300      	movs	r3, #0
+ 800150c:	617b      	str	r3, [r7, #20]
+ 800150e:	68fb      	ldr	r3, [r7, #12]
+ 8001510:	681b      	ldr	r3, [r3, #0]
+ 8001512:	695b      	ldr	r3, [r3, #20]
+ 8001514:	617b      	str	r3, [r7, #20]
+ 8001516:	68fb      	ldr	r3, [r7, #12]
+ 8001518:	681b      	ldr	r3, [r3, #0]
+ 800151a:	699b      	ldr	r3, [r3, #24]
+ 800151c:	617b      	str	r3, [r7, #20]
+ 800151e:	697b      	ldr	r3, [r7, #20]
     }
 
     while (hi2c->XferSize > 0U)
- 80014b4:	e144      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 8001520:	e144      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
     {
       if (hi2c->XferSize <= 3U)
- 80014b6:	68fb      	ldr	r3, [r7, #12]
- 80014b8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80014ba:	2b03      	cmp	r3, #3
- 80014bc:	f200 80f1 	bhi.w	80016a2 <HAL_I2C_Master_Receive+0x392>
+ 8001522:	68fb      	ldr	r3, [r7, #12]
+ 8001524:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001526:	2b03      	cmp	r3, #3
+ 8001528:	f200 80f1 	bhi.w	800170e <HAL_I2C_Master_Receive+0x392>
       {
         /* One byte */
         if (hi2c->XferSize == 1U)
- 80014c0:	68fb      	ldr	r3, [r7, #12]
- 80014c2:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80014c4:	2b01      	cmp	r3, #1
- 80014c6:	d123      	bne.n	8001510 <HAL_I2C_Master_Receive+0x200>
+ 800152c:	68fb      	ldr	r3, [r7, #12]
+ 800152e:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001530:	2b01      	cmp	r3, #1
+ 8001532:	d123      	bne.n	800157c <HAL_I2C_Master_Receive+0x200>
         {
           /* Wait until RXNE flag is set */
           if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 80014c8:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
- 80014ca:	6b39      	ldr	r1, [r7, #48]	@ 0x30
- 80014cc:	68f8      	ldr	r0, [r7, #12]
- 80014ce:	f000 fc4b 	bl	8001d68 <I2C_WaitOnRXNEFlagUntilTimeout>
- 80014d2:	4603      	mov	r3, r0
- 80014d4:	2b00      	cmp	r3, #0
- 80014d6:	d001      	beq.n	80014dc <HAL_I2C_Master_Receive+0x1cc>
+ 8001534:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
+ 8001536:	6b39      	ldr	r1, [r7, #48]	@ 0x30
+ 8001538:	68f8      	ldr	r0, [r7, #12]
+ 800153a:	f000 fc4b 	bl	8001dd4 <I2C_WaitOnRXNEFlagUntilTimeout>
+ 800153e:	4603      	mov	r3, r0
+ 8001540:	2b00      	cmp	r3, #0
+ 8001542:	d001      	beq.n	8001548 <HAL_I2C_Master_Receive+0x1cc>
           {
             return HAL_ERROR;
- 80014d8:	2301      	movs	r3, #1
- 80014da:	e145      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 8001544:	2301      	movs	r3, #1
+ 8001546:	e145      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
           }
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 80014dc:	68fb      	ldr	r3, [r7, #12]
- 80014de:	681b      	ldr	r3, [r3, #0]
- 80014e0:	691a      	ldr	r2, [r3, #16]
- 80014e2:	68fb      	ldr	r3, [r7, #12]
- 80014e4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80014e6:	b2d2      	uxtb	r2, r2
- 80014e8:	701a      	strb	r2, [r3, #0]
+ 8001548:	68fb      	ldr	r3, [r7, #12]
+ 800154a:	681b      	ldr	r3, [r3, #0]
+ 800154c:	691a      	ldr	r2, [r3, #16]
+ 800154e:	68fb      	ldr	r3, [r7, #12]
+ 8001550:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001552:	b2d2      	uxtb	r2, r2
+ 8001554:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 80014ea:	68fb      	ldr	r3, [r7, #12]
- 80014ec:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80014ee:	1c5a      	adds	r2, r3, #1
- 80014f0:	68fb      	ldr	r3, [r7, #12]
- 80014f2:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001556:	68fb      	ldr	r3, [r7, #12]
+ 8001558:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800155a:	1c5a      	adds	r2, r3, #1
+ 800155c:	68fb      	ldr	r3, [r7, #12]
+ 800155e:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 80014f4:	68fb      	ldr	r3, [r7, #12]
- 80014f6:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80014f8:	3b01      	subs	r3, #1
- 80014fa:	b29a      	uxth	r2, r3
- 80014fc:	68fb      	ldr	r3, [r7, #12]
- 80014fe:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001560:	68fb      	ldr	r3, [r7, #12]
+ 8001562:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001564:	3b01      	subs	r3, #1
+ 8001566:	b29a      	uxth	r2, r3
+ 8001568:	68fb      	ldr	r3, [r7, #12]
+ 800156a:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001500:	68fb      	ldr	r3, [r7, #12]
- 8001502:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001504:	b29b      	uxth	r3, r3
- 8001506:	3b01      	subs	r3, #1
- 8001508:	b29a      	uxth	r2, r3
- 800150a:	68fb      	ldr	r3, [r7, #12]
- 800150c:	855a      	strh	r2, [r3, #42]	@ 0x2a
- 800150e:	e117      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 800156c:	68fb      	ldr	r3, [r7, #12]
+ 800156e:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 8001570:	b29b      	uxth	r3, r3
+ 8001572:	3b01      	subs	r3, #1
+ 8001574:	b29a      	uxth	r2, r3
+ 8001576:	68fb      	ldr	r3, [r7, #12]
+ 8001578:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 800157a:	e117      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
         }
         /* Two bytes */
         else if (hi2c->XferSize == 2U)
- 8001510:	68fb      	ldr	r3, [r7, #12]
- 8001512:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001514:	2b02      	cmp	r3, #2
- 8001516:	d14e      	bne.n	80015b6 <HAL_I2C_Master_Receive+0x2a6>
+ 800157c:	68fb      	ldr	r3, [r7, #12]
+ 800157e:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001580:	2b02      	cmp	r3, #2
+ 8001582:	d14e      	bne.n	8001622 <HAL_I2C_Master_Receive+0x2a6>
         {
           /* Wait until BTF flag is set */
           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- 8001518:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 800151a:	9300      	str	r3, [sp, #0]
- 800151c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 800151e:	2200      	movs	r2, #0
- 8001520:	4906      	ldr	r1, [pc, #24]	@ (800153c <HAL_I2C_Master_Receive+0x22c>)
- 8001522:	68f8      	ldr	r0, [r7, #12]
- 8001524:	f000 fa76 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 8001528:	4603      	mov	r3, r0
- 800152a:	2b00      	cmp	r3, #0
- 800152c:	d008      	beq.n	8001540 <HAL_I2C_Master_Receive+0x230>
+ 8001584:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 8001586:	9300      	str	r3, [sp, #0]
+ 8001588:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 800158a:	2200      	movs	r2, #0
+ 800158c:	4906      	ldr	r1, [pc, #24]	@ (80015a8 <HAL_I2C_Master_Receive+0x22c>)
+ 800158e:	68f8      	ldr	r0, [r7, #12]
+ 8001590:	f000 fa76 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 8001594:	4603      	mov	r3, r0
+ 8001596:	2b00      	cmp	r3, #0
+ 8001598:	d008      	beq.n	80015ac <HAL_I2C_Master_Receive+0x230>
           {
             return HAL_ERROR;
- 800152e:	2301      	movs	r3, #1
- 8001530:	e11a      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
- 8001532:	bf00      	nop
- 8001534:	00100002 	.word	0x00100002
- 8001538:	ffff0000 	.word	0xffff0000
- 800153c:	00010004 	.word	0x00010004
+ 800159a:	2301      	movs	r3, #1
+ 800159c:	e11a      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
+ 800159e:	bf00      	nop
+ 80015a0:	00100002 	.word	0x00100002
+ 80015a4:	ffff0000 	.word	0xffff0000
+ 80015a8:	00010004 	.word	0x00010004
           }
 
           /* Generate Stop */
           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 8001540:	68fb      	ldr	r3, [r7, #12]
- 8001542:	681b      	ldr	r3, [r3, #0]
- 8001544:	681a      	ldr	r2, [r3, #0]
- 8001546:	68fb      	ldr	r3, [r7, #12]
- 8001548:	681b      	ldr	r3, [r3, #0]
- 800154a:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 800154e:	601a      	str	r2, [r3, #0]
+ 80015ac:	68fb      	ldr	r3, [r7, #12]
+ 80015ae:	681b      	ldr	r3, [r3, #0]
+ 80015b0:	681a      	ldr	r2, [r3, #0]
+ 80015b2:	68fb      	ldr	r3, [r7, #12]
+ 80015b4:	681b      	ldr	r3, [r3, #0]
+ 80015b6:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 80015ba:	601a      	str	r2, [r3, #0]
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 8001550:	68fb      	ldr	r3, [r7, #12]
- 8001552:	681b      	ldr	r3, [r3, #0]
- 8001554:	691a      	ldr	r2, [r3, #16]
- 8001556:	68fb      	ldr	r3, [r7, #12]
- 8001558:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800155a:	b2d2      	uxtb	r2, r2
- 800155c:	701a      	strb	r2, [r3, #0]
+ 80015bc:	68fb      	ldr	r3, [r7, #12]
+ 80015be:	681b      	ldr	r3, [r3, #0]
+ 80015c0:	691a      	ldr	r2, [r3, #16]
+ 80015c2:	68fb      	ldr	r3, [r7, #12]
+ 80015c4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80015c6:	b2d2      	uxtb	r2, r2
+ 80015c8:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 800155e:	68fb      	ldr	r3, [r7, #12]
- 8001560:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001562:	1c5a      	adds	r2, r3, #1
- 8001564:	68fb      	ldr	r3, [r7, #12]
- 8001566:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80015ca:	68fb      	ldr	r3, [r7, #12]
+ 80015cc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80015ce:	1c5a      	adds	r2, r3, #1
+ 80015d0:	68fb      	ldr	r3, [r7, #12]
+ 80015d2:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 8001568:	68fb      	ldr	r3, [r7, #12]
- 800156a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 800156c:	3b01      	subs	r3, #1
- 800156e:	b29a      	uxth	r2, r3
- 8001570:	68fb      	ldr	r3, [r7, #12]
- 8001572:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 80015d4:	68fb      	ldr	r3, [r7, #12]
+ 80015d6:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80015d8:	3b01      	subs	r3, #1
+ 80015da:	b29a      	uxth	r2, r3
+ 80015dc:	68fb      	ldr	r3, [r7, #12]
+ 80015de:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001574:	68fb      	ldr	r3, [r7, #12]
- 8001576:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001578:	b29b      	uxth	r3, r3
- 800157a:	3b01      	subs	r3, #1
- 800157c:	b29a      	uxth	r2, r3
- 800157e:	68fb      	ldr	r3, [r7, #12]
- 8001580:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 80015e0:	68fb      	ldr	r3, [r7, #12]
+ 80015e2:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 80015e4:	b29b      	uxth	r3, r3
+ 80015e6:	3b01      	subs	r3, #1
+ 80015e8:	b29a      	uxth	r2, r3
+ 80015ea:	68fb      	ldr	r3, [r7, #12]
+ 80015ec:	855a      	strh	r2, [r3, #42]	@ 0x2a
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 8001582:	68fb      	ldr	r3, [r7, #12]
- 8001584:	681b      	ldr	r3, [r3, #0]
- 8001586:	691a      	ldr	r2, [r3, #16]
- 8001588:	68fb      	ldr	r3, [r7, #12]
- 800158a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800158c:	b2d2      	uxtb	r2, r2
- 800158e:	701a      	strb	r2, [r3, #0]
+ 80015ee:	68fb      	ldr	r3, [r7, #12]
+ 80015f0:	681b      	ldr	r3, [r3, #0]
+ 80015f2:	691a      	ldr	r2, [r3, #16]
+ 80015f4:	68fb      	ldr	r3, [r7, #12]
+ 80015f6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80015f8:	b2d2      	uxtb	r2, r2
+ 80015fa:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 8001590:	68fb      	ldr	r3, [r7, #12]
- 8001592:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001594:	1c5a      	adds	r2, r3, #1
- 8001596:	68fb      	ldr	r3, [r7, #12]
- 8001598:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80015fc:	68fb      	ldr	r3, [r7, #12]
+ 80015fe:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001600:	1c5a      	adds	r2, r3, #1
+ 8001602:	68fb      	ldr	r3, [r7, #12]
+ 8001604:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 800159a:	68fb      	ldr	r3, [r7, #12]
- 800159c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 800159e:	3b01      	subs	r3, #1
- 80015a0:	b29a      	uxth	r2, r3
- 80015a2:	68fb      	ldr	r3, [r7, #12]
- 80015a4:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001606:	68fb      	ldr	r3, [r7, #12]
+ 8001608:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 800160a:	3b01      	subs	r3, #1
+ 800160c:	b29a      	uxth	r2, r3
+ 800160e:	68fb      	ldr	r3, [r7, #12]
+ 8001610:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 80015a6:	68fb      	ldr	r3, [r7, #12]
- 80015a8:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 80015aa:	b29b      	uxth	r3, r3
- 80015ac:	3b01      	subs	r3, #1
- 80015ae:	b29a      	uxth	r2, r3
- 80015b0:	68fb      	ldr	r3, [r7, #12]
- 80015b2:	855a      	strh	r2, [r3, #42]	@ 0x2a
- 80015b4:	e0c4      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 8001612:	68fb      	ldr	r3, [r7, #12]
+ 8001614:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 8001616:	b29b      	uxth	r3, r3
+ 8001618:	3b01      	subs	r3, #1
+ 800161a:	b29a      	uxth	r2, r3
+ 800161c:	68fb      	ldr	r3, [r7, #12]
+ 800161e:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 8001620:	e0c4      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
         }
         /* 3 Last bytes */
         else
         {
           /* Wait until BTF flag is set */
           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- 80015b6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 80015b8:	9300      	str	r3, [sp, #0]
- 80015ba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 80015bc:	2200      	movs	r2, #0
- 80015be:	496c      	ldr	r1, [pc, #432]	@ (8001770 <HAL_I2C_Master_Receive+0x460>)
- 80015c0:	68f8      	ldr	r0, [r7, #12]
- 80015c2:	f000 fa27 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 80015c6:	4603      	mov	r3, r0
- 80015c8:	2b00      	cmp	r3, #0
- 80015ca:	d001      	beq.n	80015d0 <HAL_I2C_Master_Receive+0x2c0>
+ 8001622:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 8001624:	9300      	str	r3, [sp, #0]
+ 8001626:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8001628:	2200      	movs	r2, #0
+ 800162a:	496c      	ldr	r1, [pc, #432]	@ (80017dc <HAL_I2C_Master_Receive+0x460>)
+ 800162c:	68f8      	ldr	r0, [r7, #12]
+ 800162e:	f000 fa27 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 8001632:	4603      	mov	r3, r0
+ 8001634:	2b00      	cmp	r3, #0
+ 8001636:	d001      	beq.n	800163c <HAL_I2C_Master_Receive+0x2c0>
           {
             return HAL_ERROR;
- 80015cc:	2301      	movs	r3, #1
- 80015ce:	e0cb      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 8001638:	2301      	movs	r3, #1
+ 800163a:	e0cb      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
           }
 
           /* Disable Acknowledge */
           CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- 80015d0:	68fb      	ldr	r3, [r7, #12]
- 80015d2:	681b      	ldr	r3, [r3, #0]
- 80015d4:	681a      	ldr	r2, [r3, #0]
- 80015d6:	68fb      	ldr	r3, [r7, #12]
- 80015d8:	681b      	ldr	r3, [r3, #0]
- 80015da:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
- 80015de:	601a      	str	r2, [r3, #0]
+ 800163c:	68fb      	ldr	r3, [r7, #12]
+ 800163e:	681b      	ldr	r3, [r3, #0]
+ 8001640:	681a      	ldr	r2, [r3, #0]
+ 8001642:	68fb      	ldr	r3, [r7, #12]
+ 8001644:	681b      	ldr	r3, [r3, #0]
+ 8001646:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
+ 800164a:	601a      	str	r2, [r3, #0]
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 80015e0:	68fb      	ldr	r3, [r7, #12]
- 80015e2:	681b      	ldr	r3, [r3, #0]
- 80015e4:	691a      	ldr	r2, [r3, #16]
- 80015e6:	68fb      	ldr	r3, [r7, #12]
- 80015e8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80015ea:	b2d2      	uxtb	r2, r2
- 80015ec:	701a      	strb	r2, [r3, #0]
+ 800164c:	68fb      	ldr	r3, [r7, #12]
+ 800164e:	681b      	ldr	r3, [r3, #0]
+ 8001650:	691a      	ldr	r2, [r3, #16]
+ 8001652:	68fb      	ldr	r3, [r7, #12]
+ 8001654:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001656:	b2d2      	uxtb	r2, r2
+ 8001658:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 80015ee:	68fb      	ldr	r3, [r7, #12]
- 80015f0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80015f2:	1c5a      	adds	r2, r3, #1
- 80015f4:	68fb      	ldr	r3, [r7, #12]
- 80015f6:	625a      	str	r2, [r3, #36]	@ 0x24
+ 800165a:	68fb      	ldr	r3, [r7, #12]
+ 800165c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800165e:	1c5a      	adds	r2, r3, #1
+ 8001660:	68fb      	ldr	r3, [r7, #12]
+ 8001662:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 80015f8:	68fb      	ldr	r3, [r7, #12]
- 80015fa:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80015fc:	3b01      	subs	r3, #1
- 80015fe:	b29a      	uxth	r2, r3
- 8001600:	68fb      	ldr	r3, [r7, #12]
- 8001602:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001664:	68fb      	ldr	r3, [r7, #12]
+ 8001666:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001668:	3b01      	subs	r3, #1
+ 800166a:	b29a      	uxth	r2, r3
+ 800166c:	68fb      	ldr	r3, [r7, #12]
+ 800166e:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001604:	68fb      	ldr	r3, [r7, #12]
- 8001606:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001608:	b29b      	uxth	r3, r3
- 800160a:	3b01      	subs	r3, #1
- 800160c:	b29a      	uxth	r2, r3
- 800160e:	68fb      	ldr	r3, [r7, #12]
- 8001610:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 8001670:	68fb      	ldr	r3, [r7, #12]
+ 8001672:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 8001674:	b29b      	uxth	r3, r3
+ 8001676:	3b01      	subs	r3, #1
+ 8001678:	b29a      	uxth	r2, r3
+ 800167a:	68fb      	ldr	r3, [r7, #12]
+ 800167c:	855a      	strh	r2, [r3, #42]	@ 0x2a
 
           /* Wait until BTF flag is set */
           if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- 8001612:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8001614:	9300      	str	r3, [sp, #0]
- 8001616:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 8001618:	2200      	movs	r2, #0
- 800161a:	4955      	ldr	r1, [pc, #340]	@ (8001770 <HAL_I2C_Master_Receive+0x460>)
- 800161c:	68f8      	ldr	r0, [r7, #12]
- 800161e:	f000 f9f9 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 8001622:	4603      	mov	r3, r0
- 8001624:	2b00      	cmp	r3, #0
- 8001626:	d001      	beq.n	800162c <HAL_I2C_Master_Receive+0x31c>
+ 800167e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 8001680:	9300      	str	r3, [sp, #0]
+ 8001682:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8001684:	2200      	movs	r2, #0
+ 8001686:	4955      	ldr	r1, [pc, #340]	@ (80017dc <HAL_I2C_Master_Receive+0x460>)
+ 8001688:	68f8      	ldr	r0, [r7, #12]
+ 800168a:	f000 f9f9 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 800168e:	4603      	mov	r3, r0
+ 8001690:	2b00      	cmp	r3, #0
+ 8001692:	d001      	beq.n	8001698 <HAL_I2C_Master_Receive+0x31c>
           {
             return HAL_ERROR;
- 8001628:	2301      	movs	r3, #1
- 800162a:	e09d      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 8001694:	2301      	movs	r3, #1
+ 8001696:	e09d      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
           }
 
           /* Generate Stop */
           SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 800162c:	68fb      	ldr	r3, [r7, #12]
- 800162e:	681b      	ldr	r3, [r3, #0]
- 8001630:	681a      	ldr	r2, [r3, #0]
- 8001632:	68fb      	ldr	r3, [r7, #12]
- 8001634:	681b      	ldr	r3, [r3, #0]
- 8001636:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 800163a:	601a      	str	r2, [r3, #0]
+ 8001698:	68fb      	ldr	r3, [r7, #12]
+ 800169a:	681b      	ldr	r3, [r3, #0]
+ 800169c:	681a      	ldr	r2, [r3, #0]
+ 800169e:	68fb      	ldr	r3, [r7, #12]
+ 80016a0:	681b      	ldr	r3, [r3, #0]
+ 80016a2:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 80016a6:	601a      	str	r2, [r3, #0]
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 800163c:	68fb      	ldr	r3, [r7, #12]
- 800163e:	681b      	ldr	r3, [r3, #0]
- 8001640:	691a      	ldr	r2, [r3, #16]
- 8001642:	68fb      	ldr	r3, [r7, #12]
- 8001644:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001646:	b2d2      	uxtb	r2, r2
- 8001648:	701a      	strb	r2, [r3, #0]
+ 80016a8:	68fb      	ldr	r3, [r7, #12]
+ 80016aa:	681b      	ldr	r3, [r3, #0]
+ 80016ac:	691a      	ldr	r2, [r3, #16]
+ 80016ae:	68fb      	ldr	r3, [r7, #12]
+ 80016b0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80016b2:	b2d2      	uxtb	r2, r2
+ 80016b4:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 800164a:	68fb      	ldr	r3, [r7, #12]
- 800164c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800164e:	1c5a      	adds	r2, r3, #1
- 8001650:	68fb      	ldr	r3, [r7, #12]
- 8001652:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80016b6:	68fb      	ldr	r3, [r7, #12]
+ 80016b8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80016ba:	1c5a      	adds	r2, r3, #1
+ 80016bc:	68fb      	ldr	r3, [r7, #12]
+ 80016be:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 8001654:	68fb      	ldr	r3, [r7, #12]
- 8001656:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001658:	3b01      	subs	r3, #1
- 800165a:	b29a      	uxth	r2, r3
- 800165c:	68fb      	ldr	r3, [r7, #12]
- 800165e:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 80016c0:	68fb      	ldr	r3, [r7, #12]
+ 80016c2:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80016c4:	3b01      	subs	r3, #1
+ 80016c6:	b29a      	uxth	r2, r3
+ 80016c8:	68fb      	ldr	r3, [r7, #12]
+ 80016ca:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001660:	68fb      	ldr	r3, [r7, #12]
- 8001662:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001664:	b29b      	uxth	r3, r3
- 8001666:	3b01      	subs	r3, #1
- 8001668:	b29a      	uxth	r2, r3
- 800166a:	68fb      	ldr	r3, [r7, #12]
- 800166c:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 80016cc:	68fb      	ldr	r3, [r7, #12]
+ 80016ce:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 80016d0:	b29b      	uxth	r3, r3
+ 80016d2:	3b01      	subs	r3, #1
+ 80016d4:	b29a      	uxth	r2, r3
+ 80016d6:	68fb      	ldr	r3, [r7, #12]
+ 80016d8:	855a      	strh	r2, [r3, #42]	@ 0x2a
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 800166e:	68fb      	ldr	r3, [r7, #12]
- 8001670:	681b      	ldr	r3, [r3, #0]
- 8001672:	691a      	ldr	r2, [r3, #16]
- 8001674:	68fb      	ldr	r3, [r7, #12]
- 8001676:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001678:	b2d2      	uxtb	r2, r2
- 800167a:	701a      	strb	r2, [r3, #0]
+ 80016da:	68fb      	ldr	r3, [r7, #12]
+ 80016dc:	681b      	ldr	r3, [r3, #0]
+ 80016de:	691a      	ldr	r2, [r3, #16]
+ 80016e0:	68fb      	ldr	r3, [r7, #12]
+ 80016e2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80016e4:	b2d2      	uxtb	r2, r2
+ 80016e6:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 800167c:	68fb      	ldr	r3, [r7, #12]
- 800167e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001680:	1c5a      	adds	r2, r3, #1
- 8001682:	68fb      	ldr	r3, [r7, #12]
- 8001684:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80016e8:	68fb      	ldr	r3, [r7, #12]
+ 80016ea:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80016ec:	1c5a      	adds	r2, r3, #1
+ 80016ee:	68fb      	ldr	r3, [r7, #12]
+ 80016f0:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 8001686:	68fb      	ldr	r3, [r7, #12]
- 8001688:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 800168a:	3b01      	subs	r3, #1
- 800168c:	b29a      	uxth	r2, r3
- 800168e:	68fb      	ldr	r3, [r7, #12]
- 8001690:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 80016f2:	68fb      	ldr	r3, [r7, #12]
+ 80016f4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80016f6:	3b01      	subs	r3, #1
+ 80016f8:	b29a      	uxth	r2, r3
+ 80016fa:	68fb      	ldr	r3, [r7, #12]
+ 80016fc:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001692:	68fb      	ldr	r3, [r7, #12]
- 8001694:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001696:	b29b      	uxth	r3, r3
- 8001698:	3b01      	subs	r3, #1
- 800169a:	b29a      	uxth	r2, r3
- 800169c:	68fb      	ldr	r3, [r7, #12]
- 800169e:	855a      	strh	r2, [r3, #42]	@ 0x2a
- 80016a0:	e04e      	b.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 80016fe:	68fb      	ldr	r3, [r7, #12]
+ 8001700:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 8001702:	b29b      	uxth	r3, r3
+ 8001704:	3b01      	subs	r3, #1
+ 8001706:	b29a      	uxth	r2, r3
+ 8001708:	68fb      	ldr	r3, [r7, #12]
+ 800170a:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 800170c:	e04e      	b.n	80017ac <HAL_I2C_Master_Receive+0x430>
         }
       }
       else
       {
         /* Wait until RXNE flag is set */
         if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 80016a2:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
- 80016a4:	6b39      	ldr	r1, [r7, #48]	@ 0x30
- 80016a6:	68f8      	ldr	r0, [r7, #12]
- 80016a8:	f000 fb5e 	bl	8001d68 <I2C_WaitOnRXNEFlagUntilTimeout>
- 80016ac:	4603      	mov	r3, r0
- 80016ae:	2b00      	cmp	r3, #0
- 80016b0:	d001      	beq.n	80016b6 <HAL_I2C_Master_Receive+0x3a6>
+ 800170e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
+ 8001710:	6b39      	ldr	r1, [r7, #48]	@ 0x30
+ 8001712:	68f8      	ldr	r0, [r7, #12]
+ 8001714:	f000 fb5e 	bl	8001dd4 <I2C_WaitOnRXNEFlagUntilTimeout>
+ 8001718:	4603      	mov	r3, r0
+ 800171a:	2b00      	cmp	r3, #0
+ 800171c:	d001      	beq.n	8001722 <HAL_I2C_Master_Receive+0x3a6>
         {
           return HAL_ERROR;
- 80016b2:	2301      	movs	r3, #1
- 80016b4:	e058      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 800171e:	2301      	movs	r3, #1
+ 8001720:	e058      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
         }
 
         /* Read data from DR */
         *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 80016b6:	68fb      	ldr	r3, [r7, #12]
- 80016b8:	681b      	ldr	r3, [r3, #0]
- 80016ba:	691a      	ldr	r2, [r3, #16]
- 80016bc:	68fb      	ldr	r3, [r7, #12]
- 80016be:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80016c0:	b2d2      	uxtb	r2, r2
- 80016c2:	701a      	strb	r2, [r3, #0]
+ 8001722:	68fb      	ldr	r3, [r7, #12]
+ 8001724:	681b      	ldr	r3, [r3, #0]
+ 8001726:	691a      	ldr	r2, [r3, #16]
+ 8001728:	68fb      	ldr	r3, [r7, #12]
+ 800172a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800172c:	b2d2      	uxtb	r2, r2
+ 800172e:	701a      	strb	r2, [r3, #0]
 
         /* Increment Buffer pointer */
         hi2c->pBuffPtr++;
- 80016c4:	68fb      	ldr	r3, [r7, #12]
- 80016c6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80016c8:	1c5a      	adds	r2, r3, #1
- 80016ca:	68fb      	ldr	r3, [r7, #12]
- 80016cc:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001730:	68fb      	ldr	r3, [r7, #12]
+ 8001732:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001734:	1c5a      	adds	r2, r3, #1
+ 8001736:	68fb      	ldr	r3, [r7, #12]
+ 8001738:	625a      	str	r2, [r3, #36]	@ 0x24
 
         /* Update counter */
         hi2c->XferSize--;
- 80016ce:	68fb      	ldr	r3, [r7, #12]
- 80016d0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80016d2:	3b01      	subs	r3, #1
- 80016d4:	b29a      	uxth	r2, r3
- 80016d6:	68fb      	ldr	r3, [r7, #12]
- 80016d8:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 800173a:	68fb      	ldr	r3, [r7, #12]
+ 800173c:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 800173e:	3b01      	subs	r3, #1
+ 8001740:	b29a      	uxth	r2, r3
+ 8001742:	68fb      	ldr	r3, [r7, #12]
+ 8001744:	851a      	strh	r2, [r3, #40]	@ 0x28
         hi2c->XferCount--;
- 80016da:	68fb      	ldr	r3, [r7, #12]
- 80016dc:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 80016de:	b29b      	uxth	r3, r3
- 80016e0:	3b01      	subs	r3, #1
- 80016e2:	b29a      	uxth	r2, r3
- 80016e4:	68fb      	ldr	r3, [r7, #12]
- 80016e6:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 8001746:	68fb      	ldr	r3, [r7, #12]
+ 8001748:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 800174a:	b29b      	uxth	r3, r3
+ 800174c:	3b01      	subs	r3, #1
+ 800174e:	b29a      	uxth	r2, r3
+ 8001750:	68fb      	ldr	r3, [r7, #12]
+ 8001752:	855a      	strh	r2, [r3, #42]	@ 0x2a
 
         if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- 80016e8:	68fb      	ldr	r3, [r7, #12]
- 80016ea:	681b      	ldr	r3, [r3, #0]
- 80016ec:	695b      	ldr	r3, [r3, #20]
- 80016ee:	f003 0304 	and.w	r3, r3, #4
- 80016f2:	2b04      	cmp	r3, #4
- 80016f4:	d124      	bne.n	8001740 <HAL_I2C_Master_Receive+0x430>
+ 8001754:	68fb      	ldr	r3, [r7, #12]
+ 8001756:	681b      	ldr	r3, [r3, #0]
+ 8001758:	695b      	ldr	r3, [r3, #20]
+ 800175a:	f003 0304 	and.w	r3, r3, #4
+ 800175e:	2b04      	cmp	r3, #4
+ 8001760:	d124      	bne.n	80017ac <HAL_I2C_Master_Receive+0x430>
         {
 
           if (hi2c->XferSize == 3U)
- 80016f6:	68fb      	ldr	r3, [r7, #12]
- 80016f8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 80016fa:	2b03      	cmp	r3, #3
- 80016fc:	d107      	bne.n	800170e <HAL_I2C_Master_Receive+0x3fe>
+ 8001762:	68fb      	ldr	r3, [r7, #12]
+ 8001764:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001766:	2b03      	cmp	r3, #3
+ 8001768:	d107      	bne.n	800177a <HAL_I2C_Master_Receive+0x3fe>
           {
             /* Disable Acknowledge */
             CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- 80016fe:	68fb      	ldr	r3, [r7, #12]
- 8001700:	681b      	ldr	r3, [r3, #0]
- 8001702:	681a      	ldr	r2, [r3, #0]
- 8001704:	68fb      	ldr	r3, [r7, #12]
- 8001706:	681b      	ldr	r3, [r3, #0]
- 8001708:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
- 800170c:	601a      	str	r2, [r3, #0]
+ 800176a:	68fb      	ldr	r3, [r7, #12]
+ 800176c:	681b      	ldr	r3, [r3, #0]
+ 800176e:	681a      	ldr	r2, [r3, #0]
+ 8001770:	68fb      	ldr	r3, [r7, #12]
+ 8001772:	681b      	ldr	r3, [r3, #0]
+ 8001774:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
+ 8001778:	601a      	str	r2, [r3, #0]
           }
 
           /* Read data from DR */
           *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
- 800170e:	68fb      	ldr	r3, [r7, #12]
- 8001710:	681b      	ldr	r3, [r3, #0]
- 8001712:	691a      	ldr	r2, [r3, #16]
- 8001714:	68fb      	ldr	r3, [r7, #12]
- 8001716:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001718:	b2d2      	uxtb	r2, r2
- 800171a:	701a      	strb	r2, [r3, #0]
+ 800177a:	68fb      	ldr	r3, [r7, #12]
+ 800177c:	681b      	ldr	r3, [r3, #0]
+ 800177e:	691a      	ldr	r2, [r3, #16]
+ 8001780:	68fb      	ldr	r3, [r7, #12]
+ 8001782:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8001784:	b2d2      	uxtb	r2, r2
+ 8001786:	701a      	strb	r2, [r3, #0]
 
           /* Increment Buffer pointer */
           hi2c->pBuffPtr++;
- 800171c:	68fb      	ldr	r3, [r7, #12]
- 800171e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001720:	1c5a      	adds	r2, r3, #1
- 8001722:	68fb      	ldr	r3, [r7, #12]
- 8001724:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001788:	68fb      	ldr	r3, [r7, #12]
+ 800178a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800178c:	1c5a      	adds	r2, r3, #1
+ 800178e:	68fb      	ldr	r3, [r7, #12]
+ 8001790:	625a      	str	r2, [r3, #36]	@ 0x24
 
           /* Update counter */
           hi2c->XferSize--;
- 8001726:	68fb      	ldr	r3, [r7, #12]
- 8001728:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 800172a:	3b01      	subs	r3, #1
- 800172c:	b29a      	uxth	r2, r3
- 800172e:	68fb      	ldr	r3, [r7, #12]
- 8001730:	851a      	strh	r2, [r3, #40]	@ 0x28
+ 8001792:	68fb      	ldr	r3, [r7, #12]
+ 8001794:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 8001796:	3b01      	subs	r3, #1
+ 8001798:	b29a      	uxth	r2, r3
+ 800179a:	68fb      	ldr	r3, [r7, #12]
+ 800179c:	851a      	strh	r2, [r3, #40]	@ 0x28
           hi2c->XferCount--;
- 8001732:	68fb      	ldr	r3, [r7, #12]
- 8001734:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
- 8001736:	b29b      	uxth	r3, r3
- 8001738:	3b01      	subs	r3, #1
- 800173a:	b29a      	uxth	r2, r3
- 800173c:	68fb      	ldr	r3, [r7, #12]
- 800173e:	855a      	strh	r2, [r3, #42]	@ 0x2a
+ 800179e:	68fb      	ldr	r3, [r7, #12]
+ 80017a0:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
+ 80017a2:	b29b      	uxth	r3, r3
+ 80017a4:	3b01      	subs	r3, #1
+ 80017a6:	b29a      	uxth	r2, r3
+ 80017a8:	68fb      	ldr	r3, [r7, #12]
+ 80017aa:	855a      	strh	r2, [r3, #42]	@ 0x2a
     while (hi2c->XferSize > 0U)
- 8001740:	68fb      	ldr	r3, [r7, #12]
- 8001742:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
- 8001744:	2b00      	cmp	r3, #0
- 8001746:	f47f aeb6 	bne.w	80014b6 <HAL_I2C_Master_Receive+0x1a6>
+ 80017ac:	68fb      	ldr	r3, [r7, #12]
+ 80017ae:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
+ 80017b0:	2b00      	cmp	r3, #0
+ 80017b2:	f47f aeb6 	bne.w	8001522 <HAL_I2C_Master_Receive+0x1a6>
         }
       }
     }
 
     hi2c->State = HAL_I2C_STATE_READY;
- 800174a:	68fb      	ldr	r3, [r7, #12]
- 800174c:	2220      	movs	r2, #32
- 800174e:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 80017b6:	68fb      	ldr	r3, [r7, #12]
+ 80017b8:	2220      	movs	r2, #32
+ 80017ba:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
     hi2c->Mode = HAL_I2C_MODE_NONE;
- 8001752:	68fb      	ldr	r3, [r7, #12]
- 8001754:	2200      	movs	r2, #0
- 8001756:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 80017be:	68fb      	ldr	r3, [r7, #12]
+ 80017c0:	2200      	movs	r2, #0
+ 80017c2:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 
     /* Process Unlocked */
     __HAL_UNLOCK(hi2c);
- 800175a:	68fb      	ldr	r3, [r7, #12]
- 800175c:	2200      	movs	r2, #0
- 800175e:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 80017c6:	68fb      	ldr	r3, [r7, #12]
+ 80017c8:	2200      	movs	r2, #0
+ 80017ca:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     return HAL_OK;
- 8001762:	2300      	movs	r3, #0
- 8001764:	e000      	b.n	8001768 <HAL_I2C_Master_Receive+0x458>
+ 80017ce:	2300      	movs	r3, #0
+ 80017d0:	e000      	b.n	80017d4 <HAL_I2C_Master_Receive+0x458>
   }
   else
   {
     return HAL_BUSY;
- 8001766:	2302      	movs	r3, #2
+ 80017d2:	2302      	movs	r3, #2
   }
 }
- 8001768:	4618      	mov	r0, r3
- 800176a:	3728      	adds	r7, #40	@ 0x28
- 800176c:	46bd      	mov	sp, r7
- 800176e:	bd80      	pop	{r7, pc}
- 8001770:	00010004 	.word	0x00010004
+ 80017d4:	4618      	mov	r0, r3
+ 80017d6:	3728      	adds	r7, #40	@ 0x28
+ 80017d8:	46bd      	mov	sp, r7
+ 80017da:	bd80      	pop	{r7, pc}
+ 80017dc:	00010004 	.word	0x00010004
 
-08001774 <I2C_MasterRequestWrite>:
+080017e0 <I2C_MasterRequestWrite>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001774:	b580      	push	{r7, lr}
- 8001776:	b088      	sub	sp, #32
- 8001778:	af02      	add	r7, sp, #8
- 800177a:	60f8      	str	r0, [r7, #12]
- 800177c:	607a      	str	r2, [r7, #4]
- 800177e:	603b      	str	r3, [r7, #0]
- 8001780:	460b      	mov	r3, r1
- 8001782:	817b      	strh	r3, [r7, #10]
+ 80017e0:	b580      	push	{r7, lr}
+ 80017e2:	b088      	sub	sp, #32
+ 80017e4:	af02      	add	r7, sp, #8
+ 80017e6:	60f8      	str	r0, [r7, #12]
+ 80017e8:	607a      	str	r2, [r7, #4]
+ 80017ea:	603b      	str	r3, [r7, #0]
+ 80017ec:	460b      	mov	r3, r1
+ 80017ee:	817b      	strh	r3, [r7, #10]
   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
   uint32_t CurrentXferOptions = hi2c->XferOptions;
- 8001784:	68fb      	ldr	r3, [r7, #12]
- 8001786:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
- 8001788:	617b      	str	r3, [r7, #20]
+ 80017f0:	68fb      	ldr	r3, [r7, #12]
+ 80017f2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80017f4:	617b      	str	r3, [r7, #20]
 
   /* Generate Start condition if first transfer */
   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- 800178a:	697b      	ldr	r3, [r7, #20]
- 800178c:	2b08      	cmp	r3, #8
- 800178e:	d006      	beq.n	800179e <I2C_MasterRequestWrite+0x2a>
- 8001790:	697b      	ldr	r3, [r7, #20]
- 8001792:	2b01      	cmp	r3, #1
- 8001794:	d003      	beq.n	800179e <I2C_MasterRequestWrite+0x2a>
- 8001796:	697b      	ldr	r3, [r7, #20]
- 8001798:	f513 3f80 	cmn.w	r3, #65536	@ 0x10000
- 800179c:	d108      	bne.n	80017b0 <I2C_MasterRequestWrite+0x3c>
+ 80017f6:	697b      	ldr	r3, [r7, #20]
+ 80017f8:	2b08      	cmp	r3, #8
+ 80017fa:	d006      	beq.n	800180a <I2C_MasterRequestWrite+0x2a>
+ 80017fc:	697b      	ldr	r3, [r7, #20]
+ 80017fe:	2b01      	cmp	r3, #1
+ 8001800:	d003      	beq.n	800180a <I2C_MasterRequestWrite+0x2a>
+ 8001802:	697b      	ldr	r3, [r7, #20]
+ 8001804:	f513 3f80 	cmn.w	r3, #65536	@ 0x10000
+ 8001808:	d108      	bne.n	800181c <I2C_MasterRequestWrite+0x3c>
   {
     /* Generate Start */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- 800179e:	68fb      	ldr	r3, [r7, #12]
- 80017a0:	681b      	ldr	r3, [r3, #0]
- 80017a2:	681a      	ldr	r2, [r3, #0]
- 80017a4:	68fb      	ldr	r3, [r7, #12]
- 80017a6:	681b      	ldr	r3, [r3, #0]
- 80017a8:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
- 80017ac:	601a      	str	r2, [r3, #0]
- 80017ae:	e00b      	b.n	80017c8 <I2C_MasterRequestWrite+0x54>
+ 800180a:	68fb      	ldr	r3, [r7, #12]
+ 800180c:	681b      	ldr	r3, [r3, #0]
+ 800180e:	681a      	ldr	r2, [r3, #0]
+ 8001810:	68fb      	ldr	r3, [r7, #12]
+ 8001812:	681b      	ldr	r3, [r3, #0]
+ 8001814:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
+ 8001818:	601a      	str	r2, [r3, #0]
+ 800181a:	e00b      	b.n	8001834 <I2C_MasterRequestWrite+0x54>
   }
   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
- 80017b0:	68fb      	ldr	r3, [r7, #12]
- 80017b2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
- 80017b4:	2b12      	cmp	r3, #18
- 80017b6:	d107      	bne.n	80017c8 <I2C_MasterRequestWrite+0x54>
+ 800181c:	68fb      	ldr	r3, [r7, #12]
+ 800181e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8001820:	2b12      	cmp	r3, #18
+ 8001822:	d107      	bne.n	8001834 <I2C_MasterRequestWrite+0x54>
   {
     /* Generate ReStart */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- 80017b8:	68fb      	ldr	r3, [r7, #12]
- 80017ba:	681b      	ldr	r3, [r3, #0]
- 80017bc:	681a      	ldr	r2, [r3, #0]
- 80017be:	68fb      	ldr	r3, [r7, #12]
- 80017c0:	681b      	ldr	r3, [r3, #0]
- 80017c2:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
- 80017c6:	601a      	str	r2, [r3, #0]
+ 8001824:	68fb      	ldr	r3, [r7, #12]
+ 8001826:	681b      	ldr	r3, [r3, #0]
+ 8001828:	681a      	ldr	r2, [r3, #0]
+ 800182a:	68fb      	ldr	r3, [r7, #12]
+ 800182c:	681b      	ldr	r3, [r3, #0]
+ 800182e:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
+ 8001832:	601a      	str	r2, [r3, #0]
   {
     /* Do nothing */
   }
 
   /* Wait until SB flag is set */
   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- 80017c8:	683b      	ldr	r3, [r7, #0]
- 80017ca:	9300      	str	r3, [sp, #0]
- 80017cc:	687b      	ldr	r3, [r7, #4]
- 80017ce:	2200      	movs	r2, #0
- 80017d0:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
- 80017d4:	68f8      	ldr	r0, [r7, #12]
- 80017d6:	f000 f91d 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 80017da:	4603      	mov	r3, r0
- 80017dc:	2b00      	cmp	r3, #0
- 80017de:	d00d      	beq.n	80017fc <I2C_MasterRequestWrite+0x88>
+ 8001834:	683b      	ldr	r3, [r7, #0]
+ 8001836:	9300      	str	r3, [sp, #0]
+ 8001838:	687b      	ldr	r3, [r7, #4]
+ 800183a:	2200      	movs	r2, #0
+ 800183c:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
+ 8001840:	68f8      	ldr	r0, [r7, #12]
+ 8001842:	f000 f91d 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 8001846:	4603      	mov	r3, r0
+ 8001848:	2b00      	cmp	r3, #0
+ 800184a:	d00d      	beq.n	8001868 <I2C_MasterRequestWrite+0x88>
   {
     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- 80017e0:	68fb      	ldr	r3, [r7, #12]
- 80017e2:	681b      	ldr	r3, [r3, #0]
- 80017e4:	681b      	ldr	r3, [r3, #0]
- 80017e6:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 80017ea:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
- 80017ee:	d103      	bne.n	80017f8 <I2C_MasterRequestWrite+0x84>
+ 800184c:	68fb      	ldr	r3, [r7, #12]
+ 800184e:	681b      	ldr	r3, [r3, #0]
+ 8001850:	681b      	ldr	r3, [r3, #0]
+ 8001852:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8001856:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
+ 800185a:	d103      	bne.n	8001864 <I2C_MasterRequestWrite+0x84>
     {
       hi2c->ErrorCode = HAL_I2C_WRONG_START;
- 80017f0:	68fb      	ldr	r3, [r7, #12]
- 80017f2:	f44f 7200 	mov.w	r2, #512	@ 0x200
- 80017f6:	641a      	str	r2, [r3, #64]	@ 0x40
+ 800185c:	68fb      	ldr	r3, [r7, #12]
+ 800185e:	f44f 7200 	mov.w	r2, #512	@ 0x200
+ 8001862:	641a      	str	r2, [r3, #64]	@ 0x40
     }
     return HAL_TIMEOUT;
- 80017f8:	2303      	movs	r3, #3
- 80017fa:	e035      	b.n	8001868 <I2C_MasterRequestWrite+0xf4>
+ 8001864:	2303      	movs	r3, #3
+ 8001866:	e035      	b.n	80018d4 <I2C_MasterRequestWrite+0xf4>
   }
 
   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- 80017fc:	68fb      	ldr	r3, [r7, #12]
- 80017fe:	691b      	ldr	r3, [r3, #16]
- 8001800:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
- 8001804:	d108      	bne.n	8001818 <I2C_MasterRequestWrite+0xa4>
+ 8001868:	68fb      	ldr	r3, [r7, #12]
+ 800186a:	691b      	ldr	r3, [r3, #16]
+ 800186c:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
+ 8001870:	d108      	bne.n	8001884 <I2C_MasterRequestWrite+0xa4>
   {
     /* Send slave address */
     hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
- 8001806:	897b      	ldrh	r3, [r7, #10]
- 8001808:	b2db      	uxtb	r3, r3
- 800180a:	461a      	mov	r2, r3
- 800180c:	68fb      	ldr	r3, [r7, #12]
- 800180e:	681b      	ldr	r3, [r3, #0]
- 8001810:	f002 02fe 	and.w	r2, r2, #254	@ 0xfe
- 8001814:	611a      	str	r2, [r3, #16]
- 8001816:	e01b      	b.n	8001850 <I2C_MasterRequestWrite+0xdc>
+ 8001872:	897b      	ldrh	r3, [r7, #10]
+ 8001874:	b2db      	uxtb	r3, r3
+ 8001876:	461a      	mov	r2, r3
+ 8001878:	68fb      	ldr	r3, [r7, #12]
+ 800187a:	681b      	ldr	r3, [r3, #0]
+ 800187c:	f002 02fe 	and.w	r2, r2, #254	@ 0xfe
+ 8001880:	611a      	str	r2, [r3, #16]
+ 8001882:	e01b      	b.n	80018bc <I2C_MasterRequestWrite+0xdc>
   }
   else
   {
     /* Send header of slave address */
     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
- 8001818:	897b      	ldrh	r3, [r7, #10]
- 800181a:	11db      	asrs	r3, r3, #7
- 800181c:	b2db      	uxtb	r3, r3
- 800181e:	f003 0306 	and.w	r3, r3, #6
- 8001822:	b2db      	uxtb	r3, r3
- 8001824:	f063 030f 	orn	r3, r3, #15
- 8001828:	b2da      	uxtb	r2, r3
- 800182a:	68fb      	ldr	r3, [r7, #12]
- 800182c:	681b      	ldr	r3, [r3, #0]
- 800182e:	611a      	str	r2, [r3, #16]
+ 8001884:	897b      	ldrh	r3, [r7, #10]
+ 8001886:	11db      	asrs	r3, r3, #7
+ 8001888:	b2db      	uxtb	r3, r3
+ 800188a:	f003 0306 	and.w	r3, r3, #6
+ 800188e:	b2db      	uxtb	r3, r3
+ 8001890:	f063 030f 	orn	r3, r3, #15
+ 8001894:	b2da      	uxtb	r2, r3
+ 8001896:	68fb      	ldr	r3, [r7, #12]
+ 8001898:	681b      	ldr	r3, [r3, #0]
+ 800189a:	611a      	str	r2, [r3, #16]
 
     /* Wait until ADD10 flag is set */
     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- 8001830:	683b      	ldr	r3, [r7, #0]
- 8001832:	687a      	ldr	r2, [r7, #4]
- 8001834:	490e      	ldr	r1, [pc, #56]	@ (8001870 <I2C_MasterRequestWrite+0xfc>)
- 8001836:	68f8      	ldr	r0, [r7, #12]
- 8001838:	f000 f966 	bl	8001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>
- 800183c:	4603      	mov	r3, r0
- 800183e:	2b00      	cmp	r3, #0
- 8001840:	d001      	beq.n	8001846 <I2C_MasterRequestWrite+0xd2>
+ 800189c:	683b      	ldr	r3, [r7, #0]
+ 800189e:	687a      	ldr	r2, [r7, #4]
+ 80018a0:	490e      	ldr	r1, [pc, #56]	@ (80018dc <I2C_MasterRequestWrite+0xfc>)
+ 80018a2:	68f8      	ldr	r0, [r7, #12]
+ 80018a4:	f000 f966 	bl	8001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>
+ 80018a8:	4603      	mov	r3, r0
+ 80018aa:	2b00      	cmp	r3, #0
+ 80018ac:	d001      	beq.n	80018b2 <I2C_MasterRequestWrite+0xd2>
     {
       return HAL_ERROR;
- 8001842:	2301      	movs	r3, #1
- 8001844:	e010      	b.n	8001868 <I2C_MasterRequestWrite+0xf4>
+ 80018ae:	2301      	movs	r3, #1
+ 80018b0:	e010      	b.n	80018d4 <I2C_MasterRequestWrite+0xf4>
     }
 
     /* Send slave address */
     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
- 8001846:	897b      	ldrh	r3, [r7, #10]
- 8001848:	b2da      	uxtb	r2, r3
- 800184a:	68fb      	ldr	r3, [r7, #12]
- 800184c:	681b      	ldr	r3, [r3, #0]
- 800184e:	611a      	str	r2, [r3, #16]
+ 80018b2:	897b      	ldrh	r3, [r7, #10]
+ 80018b4:	b2da      	uxtb	r2, r3
+ 80018b6:	68fb      	ldr	r3, [r7, #12]
+ 80018b8:	681b      	ldr	r3, [r3, #0]
+ 80018ba:	611a      	str	r2, [r3, #16]
   }
 
   /* Wait until ADDR flag is set */
   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- 8001850:	683b      	ldr	r3, [r7, #0]
- 8001852:	687a      	ldr	r2, [r7, #4]
- 8001854:	4907      	ldr	r1, [pc, #28]	@ (8001874 <I2C_MasterRequestWrite+0x100>)
- 8001856:	68f8      	ldr	r0, [r7, #12]
- 8001858:	f000 f956 	bl	8001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>
- 800185c:	4603      	mov	r3, r0
- 800185e:	2b00      	cmp	r3, #0
- 8001860:	d001      	beq.n	8001866 <I2C_MasterRequestWrite+0xf2>
+ 80018bc:	683b      	ldr	r3, [r7, #0]
+ 80018be:	687a      	ldr	r2, [r7, #4]
+ 80018c0:	4907      	ldr	r1, [pc, #28]	@ (80018e0 <I2C_MasterRequestWrite+0x100>)
+ 80018c2:	68f8      	ldr	r0, [r7, #12]
+ 80018c4:	f000 f956 	bl	8001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>
+ 80018c8:	4603      	mov	r3, r0
+ 80018ca:	2b00      	cmp	r3, #0
+ 80018cc:	d001      	beq.n	80018d2 <I2C_MasterRequestWrite+0xf2>
   {
     return HAL_ERROR;
- 8001862:	2301      	movs	r3, #1
- 8001864:	e000      	b.n	8001868 <I2C_MasterRequestWrite+0xf4>
+ 80018ce:	2301      	movs	r3, #1
+ 80018d0:	e000      	b.n	80018d4 <I2C_MasterRequestWrite+0xf4>
   }
 
   return HAL_OK;
- 8001866:	2300      	movs	r3, #0
+ 80018d2:	2300      	movs	r3, #0
 }
- 8001868:	4618      	mov	r0, r3
- 800186a:	3718      	adds	r7, #24
- 800186c:	46bd      	mov	sp, r7
- 800186e:	bd80      	pop	{r7, pc}
- 8001870:	00010008 	.word	0x00010008
- 8001874:	00010002 	.word	0x00010002
+ 80018d4:	4618      	mov	r0, r3
+ 80018d6:	3718      	adds	r7, #24
+ 80018d8:	46bd      	mov	sp, r7
+ 80018da:	bd80      	pop	{r7, pc}
+ 80018dc:	00010008 	.word	0x00010008
+ 80018e0:	00010002 	.word	0x00010002
 
-08001878 <I2C_MasterRequestRead>:
+080018e4 <I2C_MasterRequestRead>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001878:	b580      	push	{r7, lr}
- 800187a:	b088      	sub	sp, #32
- 800187c:	af02      	add	r7, sp, #8
- 800187e:	60f8      	str	r0, [r7, #12]
- 8001880:	607a      	str	r2, [r7, #4]
- 8001882:	603b      	str	r3, [r7, #0]
- 8001884:	460b      	mov	r3, r1
- 8001886:	817b      	strh	r3, [r7, #10]
+ 80018e4:	b580      	push	{r7, lr}
+ 80018e6:	b088      	sub	sp, #32
+ 80018e8:	af02      	add	r7, sp, #8
+ 80018ea:	60f8      	str	r0, [r7, #12]
+ 80018ec:	607a      	str	r2, [r7, #4]
+ 80018ee:	603b      	str	r3, [r7, #0]
+ 80018f0:	460b      	mov	r3, r1
+ 80018f2:	817b      	strh	r3, [r7, #10]
   /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
   uint32_t CurrentXferOptions = hi2c->XferOptions;
- 8001888:	68fb      	ldr	r3, [r7, #12]
- 800188a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
- 800188c:	617b      	str	r3, [r7, #20]
+ 80018f4:	68fb      	ldr	r3, [r7, #12]
+ 80018f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80018f8:	617b      	str	r3, [r7, #20]
 
   /* Enable Acknowledge */
   SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- 800188e:	68fb      	ldr	r3, [r7, #12]
- 8001890:	681b      	ldr	r3, [r3, #0]
- 8001892:	681a      	ldr	r2, [r3, #0]
- 8001894:	68fb      	ldr	r3, [r7, #12]
- 8001896:	681b      	ldr	r3, [r3, #0]
- 8001898:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
- 800189c:	601a      	str	r2, [r3, #0]
+ 80018fa:	68fb      	ldr	r3, [r7, #12]
+ 80018fc:	681b      	ldr	r3, [r3, #0]
+ 80018fe:	681a      	ldr	r2, [r3, #0]
+ 8001900:	68fb      	ldr	r3, [r7, #12]
+ 8001902:	681b      	ldr	r3, [r3, #0]
+ 8001904:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
+ 8001908:	601a      	str	r2, [r3, #0]
 
   /* Generate Start condition if first transfer */
   if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME)  || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- 800189e:	697b      	ldr	r3, [r7, #20]
- 80018a0:	2b08      	cmp	r3, #8
- 80018a2:	d006      	beq.n	80018b2 <I2C_MasterRequestRead+0x3a>
- 80018a4:	697b      	ldr	r3, [r7, #20]
- 80018a6:	2b01      	cmp	r3, #1
- 80018a8:	d003      	beq.n	80018b2 <I2C_MasterRequestRead+0x3a>
- 80018aa:	697b      	ldr	r3, [r7, #20]
- 80018ac:	f513 3f80 	cmn.w	r3, #65536	@ 0x10000
- 80018b0:	d108      	bne.n	80018c4 <I2C_MasterRequestRead+0x4c>
+ 800190a:	697b      	ldr	r3, [r7, #20]
+ 800190c:	2b08      	cmp	r3, #8
+ 800190e:	d006      	beq.n	800191e <I2C_MasterRequestRead+0x3a>
+ 8001910:	697b      	ldr	r3, [r7, #20]
+ 8001912:	2b01      	cmp	r3, #1
+ 8001914:	d003      	beq.n	800191e <I2C_MasterRequestRead+0x3a>
+ 8001916:	697b      	ldr	r3, [r7, #20]
+ 8001918:	f513 3f80 	cmn.w	r3, #65536	@ 0x10000
+ 800191c:	d108      	bne.n	8001930 <I2C_MasterRequestRead+0x4c>
   {
     /* Generate Start */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- 80018b2:	68fb      	ldr	r3, [r7, #12]
- 80018b4:	681b      	ldr	r3, [r3, #0]
- 80018b6:	681a      	ldr	r2, [r3, #0]
- 80018b8:	68fb      	ldr	r3, [r7, #12]
- 80018ba:	681b      	ldr	r3, [r3, #0]
- 80018bc:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
- 80018c0:	601a      	str	r2, [r3, #0]
- 80018c2:	e00b      	b.n	80018dc <I2C_MasterRequestRead+0x64>
+ 800191e:	68fb      	ldr	r3, [r7, #12]
+ 8001920:	681b      	ldr	r3, [r3, #0]
+ 8001922:	681a      	ldr	r2, [r3, #0]
+ 8001924:	68fb      	ldr	r3, [r7, #12]
+ 8001926:	681b      	ldr	r3, [r3, #0]
+ 8001928:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
+ 800192c:	601a      	str	r2, [r3, #0]
+ 800192e:	e00b      	b.n	8001948 <I2C_MasterRequestRead+0x64>
   }
   else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
- 80018c4:	68fb      	ldr	r3, [r7, #12]
- 80018c6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
- 80018c8:	2b11      	cmp	r3, #17
- 80018ca:	d107      	bne.n	80018dc <I2C_MasterRequestRead+0x64>
+ 8001930:	68fb      	ldr	r3, [r7, #12]
+ 8001932:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8001934:	2b11      	cmp	r3, #17
+ 8001936:	d107      	bne.n	8001948 <I2C_MasterRequestRead+0x64>
   {
     /* Generate ReStart */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- 80018cc:	68fb      	ldr	r3, [r7, #12]
- 80018ce:	681b      	ldr	r3, [r3, #0]
- 80018d0:	681a      	ldr	r2, [r3, #0]
- 80018d2:	68fb      	ldr	r3, [r7, #12]
- 80018d4:	681b      	ldr	r3, [r3, #0]
- 80018d6:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
- 80018da:	601a      	str	r2, [r3, #0]
+ 8001938:	68fb      	ldr	r3, [r7, #12]
+ 800193a:	681b      	ldr	r3, [r3, #0]
+ 800193c:	681a      	ldr	r2, [r3, #0]
+ 800193e:	68fb      	ldr	r3, [r7, #12]
+ 8001940:	681b      	ldr	r3, [r3, #0]
+ 8001942:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
+ 8001946:	601a      	str	r2, [r3, #0]
   {
     /* Do nothing */
   }
 
   /* Wait until SB flag is set */
   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- 80018dc:	683b      	ldr	r3, [r7, #0]
- 80018de:	9300      	str	r3, [sp, #0]
- 80018e0:	687b      	ldr	r3, [r7, #4]
- 80018e2:	2200      	movs	r2, #0
- 80018e4:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
- 80018e8:	68f8      	ldr	r0, [r7, #12]
- 80018ea:	f000 f893 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 80018ee:	4603      	mov	r3, r0
- 80018f0:	2b00      	cmp	r3, #0
- 80018f2:	d00d      	beq.n	8001910 <I2C_MasterRequestRead+0x98>
+ 8001948:	683b      	ldr	r3, [r7, #0]
+ 800194a:	9300      	str	r3, [sp, #0]
+ 800194c:	687b      	ldr	r3, [r7, #4]
+ 800194e:	2200      	movs	r2, #0
+ 8001950:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
+ 8001954:	68f8      	ldr	r0, [r7, #12]
+ 8001956:	f000 f893 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 800195a:	4603      	mov	r3, r0
+ 800195c:	2b00      	cmp	r3, #0
+ 800195e:	d00d      	beq.n	800197c <I2C_MasterRequestRead+0x98>
   {
     if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- 80018f4:	68fb      	ldr	r3, [r7, #12]
- 80018f6:	681b      	ldr	r3, [r3, #0]
- 80018f8:	681b      	ldr	r3, [r3, #0]
- 80018fa:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 80018fe:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
- 8001902:	d103      	bne.n	800190c <I2C_MasterRequestRead+0x94>
+ 8001960:	68fb      	ldr	r3, [r7, #12]
+ 8001962:	681b      	ldr	r3, [r3, #0]
+ 8001964:	681b      	ldr	r3, [r3, #0]
+ 8001966:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 800196a:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
+ 800196e:	d103      	bne.n	8001978 <I2C_MasterRequestRead+0x94>
     {
       hi2c->ErrorCode = HAL_I2C_WRONG_START;
- 8001904:	68fb      	ldr	r3, [r7, #12]
- 8001906:	f44f 7200 	mov.w	r2, #512	@ 0x200
- 800190a:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001970:	68fb      	ldr	r3, [r7, #12]
+ 8001972:	f44f 7200 	mov.w	r2, #512	@ 0x200
+ 8001976:	641a      	str	r2, [r3, #64]	@ 0x40
     }
     return HAL_TIMEOUT;
- 800190c:	2303      	movs	r3, #3
- 800190e:	e079      	b.n	8001a04 <I2C_MasterRequestRead+0x18c>
+ 8001978:	2303      	movs	r3, #3
+ 800197a:	e079      	b.n	8001a70 <I2C_MasterRequestRead+0x18c>
   }
 
   if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- 8001910:	68fb      	ldr	r3, [r7, #12]
- 8001912:	691b      	ldr	r3, [r3, #16]
- 8001914:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
- 8001918:	d108      	bne.n	800192c <I2C_MasterRequestRead+0xb4>
+ 800197c:	68fb      	ldr	r3, [r7, #12]
+ 800197e:	691b      	ldr	r3, [r3, #16]
+ 8001980:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
+ 8001984:	d108      	bne.n	8001998 <I2C_MasterRequestRead+0xb4>
   {
     /* Send slave address */
     hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
- 800191a:	897b      	ldrh	r3, [r7, #10]
- 800191c:	b2db      	uxtb	r3, r3
- 800191e:	f043 0301 	orr.w	r3, r3, #1
- 8001922:	b2da      	uxtb	r2, r3
- 8001924:	68fb      	ldr	r3, [r7, #12]
- 8001926:	681b      	ldr	r3, [r3, #0]
- 8001928:	611a      	str	r2, [r3, #16]
- 800192a:	e05f      	b.n	80019ec <I2C_MasterRequestRead+0x174>
+ 8001986:	897b      	ldrh	r3, [r7, #10]
+ 8001988:	b2db      	uxtb	r3, r3
+ 800198a:	f043 0301 	orr.w	r3, r3, #1
+ 800198e:	b2da      	uxtb	r2, r3
+ 8001990:	68fb      	ldr	r3, [r7, #12]
+ 8001992:	681b      	ldr	r3, [r3, #0]
+ 8001994:	611a      	str	r2, [r3, #16]
+ 8001996:	e05f      	b.n	8001a58 <I2C_MasterRequestRead+0x174>
   }
   else
   {
     /* Send header of slave address */
     hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
- 800192c:	897b      	ldrh	r3, [r7, #10]
- 800192e:	11db      	asrs	r3, r3, #7
- 8001930:	b2db      	uxtb	r3, r3
- 8001932:	f003 0306 	and.w	r3, r3, #6
- 8001936:	b2db      	uxtb	r3, r3
- 8001938:	f063 030f 	orn	r3, r3, #15
- 800193c:	b2da      	uxtb	r2, r3
- 800193e:	68fb      	ldr	r3, [r7, #12]
- 8001940:	681b      	ldr	r3, [r3, #0]
- 8001942:	611a      	str	r2, [r3, #16]
+ 8001998:	897b      	ldrh	r3, [r7, #10]
+ 800199a:	11db      	asrs	r3, r3, #7
+ 800199c:	b2db      	uxtb	r3, r3
+ 800199e:	f003 0306 	and.w	r3, r3, #6
+ 80019a2:	b2db      	uxtb	r3, r3
+ 80019a4:	f063 030f 	orn	r3, r3, #15
+ 80019a8:	b2da      	uxtb	r2, r3
+ 80019aa:	68fb      	ldr	r3, [r7, #12]
+ 80019ac:	681b      	ldr	r3, [r3, #0]
+ 80019ae:	611a      	str	r2, [r3, #16]
 
     /* Wait until ADD10 flag is set */
     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- 8001944:	683b      	ldr	r3, [r7, #0]
- 8001946:	687a      	ldr	r2, [r7, #4]
- 8001948:	4930      	ldr	r1, [pc, #192]	@ (8001a0c <I2C_MasterRequestRead+0x194>)
- 800194a:	68f8      	ldr	r0, [r7, #12]
- 800194c:	f000 f8dc 	bl	8001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>
- 8001950:	4603      	mov	r3, r0
- 8001952:	2b00      	cmp	r3, #0
- 8001954:	d001      	beq.n	800195a <I2C_MasterRequestRead+0xe2>
+ 80019b0:	683b      	ldr	r3, [r7, #0]
+ 80019b2:	687a      	ldr	r2, [r7, #4]
+ 80019b4:	4930      	ldr	r1, [pc, #192]	@ (8001a78 <I2C_MasterRequestRead+0x194>)
+ 80019b6:	68f8      	ldr	r0, [r7, #12]
+ 80019b8:	f000 f8dc 	bl	8001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>
+ 80019bc:	4603      	mov	r3, r0
+ 80019be:	2b00      	cmp	r3, #0
+ 80019c0:	d001      	beq.n	80019c6 <I2C_MasterRequestRead+0xe2>
     {
       return HAL_ERROR;
- 8001956:	2301      	movs	r3, #1
- 8001958:	e054      	b.n	8001a04 <I2C_MasterRequestRead+0x18c>
+ 80019c2:	2301      	movs	r3, #1
+ 80019c4:	e054      	b.n	8001a70 <I2C_MasterRequestRead+0x18c>
     }
 
     /* Send slave address */
     hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
- 800195a:	897b      	ldrh	r3, [r7, #10]
- 800195c:	b2da      	uxtb	r2, r3
- 800195e:	68fb      	ldr	r3, [r7, #12]
- 8001960:	681b      	ldr	r3, [r3, #0]
- 8001962:	611a      	str	r2, [r3, #16]
+ 80019c6:	897b      	ldrh	r3, [r7, #10]
+ 80019c8:	b2da      	uxtb	r2, r3
+ 80019ca:	68fb      	ldr	r3, [r7, #12]
+ 80019cc:	681b      	ldr	r3, [r3, #0]
+ 80019ce:	611a      	str	r2, [r3, #16]
 
     /* Wait until ADDR flag is set */
     if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- 8001964:	683b      	ldr	r3, [r7, #0]
- 8001966:	687a      	ldr	r2, [r7, #4]
- 8001968:	4929      	ldr	r1, [pc, #164]	@ (8001a10 <I2C_MasterRequestRead+0x198>)
- 800196a:	68f8      	ldr	r0, [r7, #12]
- 800196c:	f000 f8cc 	bl	8001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>
- 8001970:	4603      	mov	r3, r0
- 8001972:	2b00      	cmp	r3, #0
- 8001974:	d001      	beq.n	800197a <I2C_MasterRequestRead+0x102>
+ 80019d0:	683b      	ldr	r3, [r7, #0]
+ 80019d2:	687a      	ldr	r2, [r7, #4]
+ 80019d4:	4929      	ldr	r1, [pc, #164]	@ (8001a7c <I2C_MasterRequestRead+0x198>)
+ 80019d6:	68f8      	ldr	r0, [r7, #12]
+ 80019d8:	f000 f8cc 	bl	8001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>
+ 80019dc:	4603      	mov	r3, r0
+ 80019de:	2b00      	cmp	r3, #0
+ 80019e0:	d001      	beq.n	80019e6 <I2C_MasterRequestRead+0x102>
     {
       return HAL_ERROR;
- 8001976:	2301      	movs	r3, #1
- 8001978:	e044      	b.n	8001a04 <I2C_MasterRequestRead+0x18c>
+ 80019e2:	2301      	movs	r3, #1
+ 80019e4:	e044      	b.n	8001a70 <I2C_MasterRequestRead+0x18c>
     }
 
     /* Clear ADDR flag */
     __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- 800197a:	2300      	movs	r3, #0
- 800197c:	613b      	str	r3, [r7, #16]
- 800197e:	68fb      	ldr	r3, [r7, #12]
- 8001980:	681b      	ldr	r3, [r3, #0]
- 8001982:	695b      	ldr	r3, [r3, #20]
- 8001984:	613b      	str	r3, [r7, #16]
- 8001986:	68fb      	ldr	r3, [r7, #12]
- 8001988:	681b      	ldr	r3, [r3, #0]
- 800198a:	699b      	ldr	r3, [r3, #24]
- 800198c:	613b      	str	r3, [r7, #16]
- 800198e:	693b      	ldr	r3, [r7, #16]
+ 80019e6:	2300      	movs	r3, #0
+ 80019e8:	613b      	str	r3, [r7, #16]
+ 80019ea:	68fb      	ldr	r3, [r7, #12]
+ 80019ec:	681b      	ldr	r3, [r3, #0]
+ 80019ee:	695b      	ldr	r3, [r3, #20]
+ 80019f0:	613b      	str	r3, [r7, #16]
+ 80019f2:	68fb      	ldr	r3, [r7, #12]
+ 80019f4:	681b      	ldr	r3, [r3, #0]
+ 80019f6:	699b      	ldr	r3, [r3, #24]
+ 80019f8:	613b      	str	r3, [r7, #16]
+ 80019fa:	693b      	ldr	r3, [r7, #16]
 
     /* Generate Restart */
     SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- 8001990:	68fb      	ldr	r3, [r7, #12]
- 8001992:	681b      	ldr	r3, [r3, #0]
- 8001994:	681a      	ldr	r2, [r3, #0]
- 8001996:	68fb      	ldr	r3, [r7, #12]
- 8001998:	681b      	ldr	r3, [r3, #0]
- 800199a:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
- 800199e:	601a      	str	r2, [r3, #0]
+ 80019fc:	68fb      	ldr	r3, [r7, #12]
+ 80019fe:	681b      	ldr	r3, [r3, #0]
+ 8001a00:	681a      	ldr	r2, [r3, #0]
+ 8001a02:	68fb      	ldr	r3, [r7, #12]
+ 8001a04:	681b      	ldr	r3, [r3, #0]
+ 8001a06:	f442 7280 	orr.w	r2, r2, #256	@ 0x100
+ 8001a0a:	601a      	str	r2, [r3, #0]
 
     /* Wait until SB flag is set */
     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- 80019a0:	683b      	ldr	r3, [r7, #0]
- 80019a2:	9300      	str	r3, [sp, #0]
- 80019a4:	687b      	ldr	r3, [r7, #4]
- 80019a6:	2200      	movs	r2, #0
- 80019a8:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
- 80019ac:	68f8      	ldr	r0, [r7, #12]
- 80019ae:	f000 f831 	bl	8001a14 <I2C_WaitOnFlagUntilTimeout>
- 80019b2:	4603      	mov	r3, r0
- 80019b4:	2b00      	cmp	r3, #0
- 80019b6:	d00d      	beq.n	80019d4 <I2C_MasterRequestRead+0x15c>
+ 8001a0c:	683b      	ldr	r3, [r7, #0]
+ 8001a0e:	9300      	str	r3, [sp, #0]
+ 8001a10:	687b      	ldr	r3, [r7, #4]
+ 8001a12:	2200      	movs	r2, #0
+ 8001a14:	f04f 1101 	mov.w	r1, #65537	@ 0x10001
+ 8001a18:	68f8      	ldr	r0, [r7, #12]
+ 8001a1a:	f000 f831 	bl	8001a80 <I2C_WaitOnFlagUntilTimeout>
+ 8001a1e:	4603      	mov	r3, r0
+ 8001a20:	2b00      	cmp	r3, #0
+ 8001a22:	d00d      	beq.n	8001a40 <I2C_MasterRequestRead+0x15c>
     {
       if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- 80019b8:	68fb      	ldr	r3, [r7, #12]
- 80019ba:	681b      	ldr	r3, [r3, #0]
- 80019bc:	681b      	ldr	r3, [r3, #0]
- 80019be:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 80019c2:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
- 80019c6:	d103      	bne.n	80019d0 <I2C_MasterRequestRead+0x158>
+ 8001a24:	68fb      	ldr	r3, [r7, #12]
+ 8001a26:	681b      	ldr	r3, [r3, #0]
+ 8001a28:	681b      	ldr	r3, [r3, #0]
+ 8001a2a:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8001a2e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
+ 8001a32:	d103      	bne.n	8001a3c <I2C_MasterRequestRead+0x158>
       {
         hi2c->ErrorCode = HAL_I2C_WRONG_START;
- 80019c8:	68fb      	ldr	r3, [r7, #12]
- 80019ca:	f44f 7200 	mov.w	r2, #512	@ 0x200
- 80019ce:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001a34:	68fb      	ldr	r3, [r7, #12]
+ 8001a36:	f44f 7200 	mov.w	r2, #512	@ 0x200
+ 8001a3a:	641a      	str	r2, [r3, #64]	@ 0x40
       }
       return HAL_TIMEOUT;
- 80019d0:	2303      	movs	r3, #3
- 80019d2:	e017      	b.n	8001a04 <I2C_MasterRequestRead+0x18c>
+ 8001a3c:	2303      	movs	r3, #3
+ 8001a3e:	e017      	b.n	8001a70 <I2C_MasterRequestRead+0x18c>
     }
 
     /* Send header of slave address */
     hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
- 80019d4:	897b      	ldrh	r3, [r7, #10]
- 80019d6:	11db      	asrs	r3, r3, #7
- 80019d8:	b2db      	uxtb	r3, r3
- 80019da:	f003 0306 	and.w	r3, r3, #6
- 80019de:	b2db      	uxtb	r3, r3
- 80019e0:	f063 030e 	orn	r3, r3, #14
- 80019e4:	b2da      	uxtb	r2, r3
- 80019e6:	68fb      	ldr	r3, [r7, #12]
- 80019e8:	681b      	ldr	r3, [r3, #0]
- 80019ea:	611a      	str	r2, [r3, #16]
+ 8001a40:	897b      	ldrh	r3, [r7, #10]
+ 8001a42:	11db      	asrs	r3, r3, #7
+ 8001a44:	b2db      	uxtb	r3, r3
+ 8001a46:	f003 0306 	and.w	r3, r3, #6
+ 8001a4a:	b2db      	uxtb	r3, r3
+ 8001a4c:	f063 030e 	orn	r3, r3, #14
+ 8001a50:	b2da      	uxtb	r2, r3
+ 8001a52:	68fb      	ldr	r3, [r7, #12]
+ 8001a54:	681b      	ldr	r3, [r3, #0]
+ 8001a56:	611a      	str	r2, [r3, #16]
   }
 
   /* Wait until ADDR flag is set */
   if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- 80019ec:	683b      	ldr	r3, [r7, #0]
- 80019ee:	687a      	ldr	r2, [r7, #4]
- 80019f0:	4907      	ldr	r1, [pc, #28]	@ (8001a10 <I2C_MasterRequestRead+0x198>)
- 80019f2:	68f8      	ldr	r0, [r7, #12]
- 80019f4:	f000 f888 	bl	8001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>
- 80019f8:	4603      	mov	r3, r0
- 80019fa:	2b00      	cmp	r3, #0
- 80019fc:	d001      	beq.n	8001a02 <I2C_MasterRequestRead+0x18a>
+ 8001a58:	683b      	ldr	r3, [r7, #0]
+ 8001a5a:	687a      	ldr	r2, [r7, #4]
+ 8001a5c:	4907      	ldr	r1, [pc, #28]	@ (8001a7c <I2C_MasterRequestRead+0x198>)
+ 8001a5e:	68f8      	ldr	r0, [r7, #12]
+ 8001a60:	f000 f888 	bl	8001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>
+ 8001a64:	4603      	mov	r3, r0
+ 8001a66:	2b00      	cmp	r3, #0
+ 8001a68:	d001      	beq.n	8001a6e <I2C_MasterRequestRead+0x18a>
   {
     return HAL_ERROR;
- 80019fe:	2301      	movs	r3, #1
- 8001a00:	e000      	b.n	8001a04 <I2C_MasterRequestRead+0x18c>
+ 8001a6a:	2301      	movs	r3, #1
+ 8001a6c:	e000      	b.n	8001a70 <I2C_MasterRequestRead+0x18c>
   }
 
   return HAL_OK;
- 8001a02:	2300      	movs	r3, #0
+ 8001a6e:	2300      	movs	r3, #0
 }
- 8001a04:	4618      	mov	r0, r3
- 8001a06:	3718      	adds	r7, #24
- 8001a08:	46bd      	mov	sp, r7
- 8001a0a:	bd80      	pop	{r7, pc}
- 8001a0c:	00010008 	.word	0x00010008
- 8001a10:	00010002 	.word	0x00010002
+ 8001a70:	4618      	mov	r0, r3
+ 8001a72:	3718      	adds	r7, #24
+ 8001a74:	46bd      	mov	sp, r7
+ 8001a76:	bd80      	pop	{r7, pc}
+ 8001a78:	00010008 	.word	0x00010008
+ 8001a7c:	00010002 	.word	0x00010002
 
-08001a14 <I2C_WaitOnFlagUntilTimeout>:
+08001a80 <I2C_WaitOnFlagUntilTimeout>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001a14:	b580      	push	{r7, lr}
- 8001a16:	b084      	sub	sp, #16
- 8001a18:	af00      	add	r7, sp, #0
- 8001a1a:	60f8      	str	r0, [r7, #12]
- 8001a1c:	60b9      	str	r1, [r7, #8]
- 8001a1e:	603b      	str	r3, [r7, #0]
- 8001a20:	4613      	mov	r3, r2
- 8001a22:	71fb      	strb	r3, [r7, #7]
+ 8001a80:	b580      	push	{r7, lr}
+ 8001a82:	b084      	sub	sp, #16
+ 8001a84:	af00      	add	r7, sp, #0
+ 8001a86:	60f8      	str	r0, [r7, #12]
+ 8001a88:	60b9      	str	r1, [r7, #8]
+ 8001a8a:	603b      	str	r3, [r7, #0]
+ 8001a8c:	4613      	mov	r3, r2
+ 8001a8e:	71fb      	strb	r3, [r7, #7]
   /* Wait until flag is set */
   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
- 8001a24:	e048      	b.n	8001ab8 <I2C_WaitOnFlagUntilTimeout+0xa4>
+ 8001a90:	e048      	b.n	8001b24 <I2C_WaitOnFlagUntilTimeout+0xa4>
   {
     /* Check for the Timeout */
     if (Timeout != HAL_MAX_DELAY)
- 8001a26:	683b      	ldr	r3, [r7, #0]
- 8001a28:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8001a2c:	d044      	beq.n	8001ab8 <I2C_WaitOnFlagUntilTimeout+0xa4>
+ 8001a92:	683b      	ldr	r3, [r7, #0]
+ 8001a94:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8001a98:	d044      	beq.n	8001b24 <I2C_WaitOnFlagUntilTimeout+0xa4>
     {
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8001a2e:	f7fe ff75 	bl	800091c <HAL_GetTick>
- 8001a32:	4602      	mov	r2, r0
- 8001a34:	69bb      	ldr	r3, [r7, #24]
- 8001a36:	1ad3      	subs	r3, r2, r3
- 8001a38:	683a      	ldr	r2, [r7, #0]
- 8001a3a:	429a      	cmp	r2, r3
- 8001a3c:	d302      	bcc.n	8001a44 <I2C_WaitOnFlagUntilTimeout+0x30>
- 8001a3e:	683b      	ldr	r3, [r7, #0]
- 8001a40:	2b00      	cmp	r3, #0
- 8001a42:	d139      	bne.n	8001ab8 <I2C_WaitOnFlagUntilTimeout+0xa4>
+ 8001a9a:	f7fe ff75 	bl	8000988 <HAL_GetTick>
+ 8001a9e:	4602      	mov	r2, r0
+ 8001aa0:	69bb      	ldr	r3, [r7, #24]
+ 8001aa2:	1ad3      	subs	r3, r2, r3
+ 8001aa4:	683a      	ldr	r2, [r7, #0]
+ 8001aa6:	429a      	cmp	r2, r3
+ 8001aa8:	d302      	bcc.n	8001ab0 <I2C_WaitOnFlagUntilTimeout+0x30>
+ 8001aaa:	683b      	ldr	r3, [r7, #0]
+ 8001aac:	2b00      	cmp	r3, #0
+ 8001aae:	d139      	bne.n	8001b24 <I2C_WaitOnFlagUntilTimeout+0xa4>
       {
         if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
- 8001a44:	68bb      	ldr	r3, [r7, #8]
- 8001a46:	0c1b      	lsrs	r3, r3, #16
- 8001a48:	b2db      	uxtb	r3, r3
- 8001a4a:	2b01      	cmp	r3, #1
- 8001a4c:	d10d      	bne.n	8001a6a <I2C_WaitOnFlagUntilTimeout+0x56>
- 8001a4e:	68fb      	ldr	r3, [r7, #12]
- 8001a50:	681b      	ldr	r3, [r3, #0]
- 8001a52:	695b      	ldr	r3, [r3, #20]
- 8001a54:	43da      	mvns	r2, r3
- 8001a56:	68bb      	ldr	r3, [r7, #8]
- 8001a58:	4013      	ands	r3, r2
- 8001a5a:	b29b      	uxth	r3, r3
- 8001a5c:	2b00      	cmp	r3, #0
- 8001a5e:	bf0c      	ite	eq
- 8001a60:	2301      	moveq	r3, #1
- 8001a62:	2300      	movne	r3, #0
- 8001a64:	b2db      	uxtb	r3, r3
- 8001a66:	461a      	mov	r2, r3
- 8001a68:	e00c      	b.n	8001a84 <I2C_WaitOnFlagUntilTimeout+0x70>
- 8001a6a:	68fb      	ldr	r3, [r7, #12]
- 8001a6c:	681b      	ldr	r3, [r3, #0]
- 8001a6e:	699b      	ldr	r3, [r3, #24]
- 8001a70:	43da      	mvns	r2, r3
- 8001a72:	68bb      	ldr	r3, [r7, #8]
- 8001a74:	4013      	ands	r3, r2
- 8001a76:	b29b      	uxth	r3, r3
- 8001a78:	2b00      	cmp	r3, #0
- 8001a7a:	bf0c      	ite	eq
- 8001a7c:	2301      	moveq	r3, #1
- 8001a7e:	2300      	movne	r3, #0
- 8001a80:	b2db      	uxtb	r3, r3
- 8001a82:	461a      	mov	r2, r3
- 8001a84:	79fb      	ldrb	r3, [r7, #7]
- 8001a86:	429a      	cmp	r2, r3
- 8001a88:	d116      	bne.n	8001ab8 <I2C_WaitOnFlagUntilTimeout+0xa4>
+ 8001ab0:	68bb      	ldr	r3, [r7, #8]
+ 8001ab2:	0c1b      	lsrs	r3, r3, #16
+ 8001ab4:	b2db      	uxtb	r3, r3
+ 8001ab6:	2b01      	cmp	r3, #1
+ 8001ab8:	d10d      	bne.n	8001ad6 <I2C_WaitOnFlagUntilTimeout+0x56>
+ 8001aba:	68fb      	ldr	r3, [r7, #12]
+ 8001abc:	681b      	ldr	r3, [r3, #0]
+ 8001abe:	695b      	ldr	r3, [r3, #20]
+ 8001ac0:	43da      	mvns	r2, r3
+ 8001ac2:	68bb      	ldr	r3, [r7, #8]
+ 8001ac4:	4013      	ands	r3, r2
+ 8001ac6:	b29b      	uxth	r3, r3
+ 8001ac8:	2b00      	cmp	r3, #0
+ 8001aca:	bf0c      	ite	eq
+ 8001acc:	2301      	moveq	r3, #1
+ 8001ace:	2300      	movne	r3, #0
+ 8001ad0:	b2db      	uxtb	r3, r3
+ 8001ad2:	461a      	mov	r2, r3
+ 8001ad4:	e00c      	b.n	8001af0 <I2C_WaitOnFlagUntilTimeout+0x70>
+ 8001ad6:	68fb      	ldr	r3, [r7, #12]
+ 8001ad8:	681b      	ldr	r3, [r3, #0]
+ 8001ada:	699b      	ldr	r3, [r3, #24]
+ 8001adc:	43da      	mvns	r2, r3
+ 8001ade:	68bb      	ldr	r3, [r7, #8]
+ 8001ae0:	4013      	ands	r3, r2
+ 8001ae2:	b29b      	uxth	r3, r3
+ 8001ae4:	2b00      	cmp	r3, #0
+ 8001ae6:	bf0c      	ite	eq
+ 8001ae8:	2301      	moveq	r3, #1
+ 8001aea:	2300      	movne	r3, #0
+ 8001aec:	b2db      	uxtb	r3, r3
+ 8001aee:	461a      	mov	r2, r3
+ 8001af0:	79fb      	ldrb	r3, [r7, #7]
+ 8001af2:	429a      	cmp	r2, r3
+ 8001af4:	d116      	bne.n	8001b24 <I2C_WaitOnFlagUntilTimeout+0xa4>
         {
           hi2c->PreviousState     = I2C_STATE_NONE;
- 8001a8a:	68fb      	ldr	r3, [r7, #12]
- 8001a8c:	2200      	movs	r2, #0
- 8001a8e:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001af6:	68fb      	ldr	r3, [r7, #12]
+ 8001af8:	2200      	movs	r2, #0
+ 8001afa:	631a      	str	r2, [r3, #48]	@ 0x30
           hi2c->State             = HAL_I2C_STATE_READY;
- 8001a90:	68fb      	ldr	r3, [r7, #12]
- 8001a92:	2220      	movs	r2, #32
- 8001a94:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001afc:	68fb      	ldr	r3, [r7, #12]
+ 8001afe:	2220      	movs	r2, #32
+ 8001b00:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
           hi2c->Mode              = HAL_I2C_MODE_NONE;
- 8001a98:	68fb      	ldr	r3, [r7, #12]
- 8001a9a:	2200      	movs	r2, #0
- 8001a9c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001b04:	68fb      	ldr	r3, [r7, #12]
+ 8001b06:	2200      	movs	r2, #0
+ 8001b08:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
           hi2c->ErrorCode         |= HAL_I2C_ERROR_TIMEOUT;
- 8001aa0:	68fb      	ldr	r3, [r7, #12]
- 8001aa2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001aa4:	f043 0220 	orr.w	r2, r3, #32
- 8001aa8:	68fb      	ldr	r3, [r7, #12]
- 8001aaa:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001b0c:	68fb      	ldr	r3, [r7, #12]
+ 8001b0e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001b10:	f043 0220 	orr.w	r2, r3, #32
+ 8001b14:	68fb      	ldr	r3, [r7, #12]
+ 8001b16:	641a      	str	r2, [r3, #64]	@ 0x40
 
           /* Process Unlocked */
           __HAL_UNLOCK(hi2c);
- 8001aac:	68fb      	ldr	r3, [r7, #12]
- 8001aae:	2200      	movs	r2, #0
- 8001ab0:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001b18:	68fb      	ldr	r3, [r7, #12]
+ 8001b1a:	2200      	movs	r2, #0
+ 8001b1c:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
           return HAL_ERROR;
- 8001ab4:	2301      	movs	r3, #1
- 8001ab6:	e023      	b.n	8001b00 <I2C_WaitOnFlagUntilTimeout+0xec>
+ 8001b20:	2301      	movs	r3, #1
+ 8001b22:	e023      	b.n	8001b6c <I2C_WaitOnFlagUntilTimeout+0xec>
   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
- 8001ab8:	68bb      	ldr	r3, [r7, #8]
- 8001aba:	0c1b      	lsrs	r3, r3, #16
- 8001abc:	b2db      	uxtb	r3, r3
- 8001abe:	2b01      	cmp	r3, #1
- 8001ac0:	d10d      	bne.n	8001ade <I2C_WaitOnFlagUntilTimeout+0xca>
- 8001ac2:	68fb      	ldr	r3, [r7, #12]
- 8001ac4:	681b      	ldr	r3, [r3, #0]
- 8001ac6:	695b      	ldr	r3, [r3, #20]
- 8001ac8:	43da      	mvns	r2, r3
- 8001aca:	68bb      	ldr	r3, [r7, #8]
- 8001acc:	4013      	ands	r3, r2
- 8001ace:	b29b      	uxth	r3, r3
- 8001ad0:	2b00      	cmp	r3, #0
- 8001ad2:	bf0c      	ite	eq
- 8001ad4:	2301      	moveq	r3, #1
- 8001ad6:	2300      	movne	r3, #0
- 8001ad8:	b2db      	uxtb	r3, r3
- 8001ada:	461a      	mov	r2, r3
- 8001adc:	e00c      	b.n	8001af8 <I2C_WaitOnFlagUntilTimeout+0xe4>
- 8001ade:	68fb      	ldr	r3, [r7, #12]
- 8001ae0:	681b      	ldr	r3, [r3, #0]
- 8001ae2:	699b      	ldr	r3, [r3, #24]
- 8001ae4:	43da      	mvns	r2, r3
- 8001ae6:	68bb      	ldr	r3, [r7, #8]
- 8001ae8:	4013      	ands	r3, r2
- 8001aea:	b29b      	uxth	r3, r3
- 8001aec:	2b00      	cmp	r3, #0
- 8001aee:	bf0c      	ite	eq
- 8001af0:	2301      	moveq	r3, #1
- 8001af2:	2300      	movne	r3, #0
- 8001af4:	b2db      	uxtb	r3, r3
- 8001af6:	461a      	mov	r2, r3
- 8001af8:	79fb      	ldrb	r3, [r7, #7]
- 8001afa:	429a      	cmp	r2, r3
- 8001afc:	d093      	beq.n	8001a26 <I2C_WaitOnFlagUntilTimeout+0x12>
+ 8001b24:	68bb      	ldr	r3, [r7, #8]
+ 8001b26:	0c1b      	lsrs	r3, r3, #16
+ 8001b28:	b2db      	uxtb	r3, r3
+ 8001b2a:	2b01      	cmp	r3, #1
+ 8001b2c:	d10d      	bne.n	8001b4a <I2C_WaitOnFlagUntilTimeout+0xca>
+ 8001b2e:	68fb      	ldr	r3, [r7, #12]
+ 8001b30:	681b      	ldr	r3, [r3, #0]
+ 8001b32:	695b      	ldr	r3, [r3, #20]
+ 8001b34:	43da      	mvns	r2, r3
+ 8001b36:	68bb      	ldr	r3, [r7, #8]
+ 8001b38:	4013      	ands	r3, r2
+ 8001b3a:	b29b      	uxth	r3, r3
+ 8001b3c:	2b00      	cmp	r3, #0
+ 8001b3e:	bf0c      	ite	eq
+ 8001b40:	2301      	moveq	r3, #1
+ 8001b42:	2300      	movne	r3, #0
+ 8001b44:	b2db      	uxtb	r3, r3
+ 8001b46:	461a      	mov	r2, r3
+ 8001b48:	e00c      	b.n	8001b64 <I2C_WaitOnFlagUntilTimeout+0xe4>
+ 8001b4a:	68fb      	ldr	r3, [r7, #12]
+ 8001b4c:	681b      	ldr	r3, [r3, #0]
+ 8001b4e:	699b      	ldr	r3, [r3, #24]
+ 8001b50:	43da      	mvns	r2, r3
+ 8001b52:	68bb      	ldr	r3, [r7, #8]
+ 8001b54:	4013      	ands	r3, r2
+ 8001b56:	b29b      	uxth	r3, r3
+ 8001b58:	2b00      	cmp	r3, #0
+ 8001b5a:	bf0c      	ite	eq
+ 8001b5c:	2301      	moveq	r3, #1
+ 8001b5e:	2300      	movne	r3, #0
+ 8001b60:	b2db      	uxtb	r3, r3
+ 8001b62:	461a      	mov	r2, r3
+ 8001b64:	79fb      	ldrb	r3, [r7, #7]
+ 8001b66:	429a      	cmp	r2, r3
+ 8001b68:	d093      	beq.n	8001a92 <I2C_WaitOnFlagUntilTimeout+0x12>
         }
       }
     }
   }
   return HAL_OK;
- 8001afe:	2300      	movs	r3, #0
+ 8001b6a:	2300      	movs	r3, #0
 }
- 8001b00:	4618      	mov	r0, r3
- 8001b02:	3710      	adds	r7, #16
- 8001b04:	46bd      	mov	sp, r7
- 8001b06:	bd80      	pop	{r7, pc}
+ 8001b6c:	4618      	mov	r0, r3
+ 8001b6e:	3710      	adds	r7, #16
+ 8001b70:	46bd      	mov	sp, r7
+ 8001b72:	bd80      	pop	{r7, pc}
 
-08001b08 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
+08001b74 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001b08:	b580      	push	{r7, lr}
- 8001b0a:	b084      	sub	sp, #16
- 8001b0c:	af00      	add	r7, sp, #0
- 8001b0e:	60f8      	str	r0, [r7, #12]
- 8001b10:	60b9      	str	r1, [r7, #8]
- 8001b12:	607a      	str	r2, [r7, #4]
- 8001b14:	603b      	str	r3, [r7, #0]
+ 8001b74:	b580      	push	{r7, lr}
+ 8001b76:	b084      	sub	sp, #16
+ 8001b78:	af00      	add	r7, sp, #0
+ 8001b7a:	60f8      	str	r0, [r7, #12]
+ 8001b7c:	60b9      	str	r1, [r7, #8]
+ 8001b7e:	607a      	str	r2, [r7, #4]
+ 8001b80:	603b      	str	r3, [r7, #0]
   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
- 8001b16:	e071      	b.n	8001bfc <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
+ 8001b82:	e071      	b.n	8001c68 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
   {
     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- 8001b18:	68fb      	ldr	r3, [r7, #12]
- 8001b1a:	681b      	ldr	r3, [r3, #0]
- 8001b1c:	695b      	ldr	r3, [r3, #20]
- 8001b1e:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
- 8001b22:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
- 8001b26:	d123      	bne.n	8001b70 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
+ 8001b84:	68fb      	ldr	r3, [r7, #12]
+ 8001b86:	681b      	ldr	r3, [r3, #0]
+ 8001b88:	695b      	ldr	r3, [r3, #20]
+ 8001b8a:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
+ 8001b8e:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
+ 8001b92:	d123      	bne.n	8001bdc <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
     {
       /* Generate Stop */
       SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- 8001b28:	68fb      	ldr	r3, [r7, #12]
- 8001b2a:	681b      	ldr	r3, [r3, #0]
- 8001b2c:	681a      	ldr	r2, [r3, #0]
- 8001b2e:	68fb      	ldr	r3, [r7, #12]
- 8001b30:	681b      	ldr	r3, [r3, #0]
- 8001b32:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
- 8001b36:	601a      	str	r2, [r3, #0]
+ 8001b94:	68fb      	ldr	r3, [r7, #12]
+ 8001b96:	681b      	ldr	r3, [r3, #0]
+ 8001b98:	681a      	ldr	r2, [r3, #0]
+ 8001b9a:	68fb      	ldr	r3, [r7, #12]
+ 8001b9c:	681b      	ldr	r3, [r3, #0]
+ 8001b9e:	f442 7200 	orr.w	r2, r2, #512	@ 0x200
+ 8001ba2:	601a      	str	r2, [r3, #0]
 
       /* Clear AF Flag */
       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- 8001b38:	68fb      	ldr	r3, [r7, #12]
- 8001b3a:	681b      	ldr	r3, [r3, #0]
- 8001b3c:	f46f 6280 	mvn.w	r2, #1024	@ 0x400
- 8001b40:	615a      	str	r2, [r3, #20]
+ 8001ba4:	68fb      	ldr	r3, [r7, #12]
+ 8001ba6:	681b      	ldr	r3, [r3, #0]
+ 8001ba8:	f46f 6280 	mvn.w	r2, #1024	@ 0x400
+ 8001bac:	615a      	str	r2, [r3, #20]
 
       hi2c->PreviousState       = I2C_STATE_NONE;
- 8001b42:	68fb      	ldr	r3, [r7, #12]
- 8001b44:	2200      	movs	r2, #0
- 8001b46:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001bae:	68fb      	ldr	r3, [r7, #12]
+ 8001bb0:	2200      	movs	r2, #0
+ 8001bb2:	631a      	str	r2, [r3, #48]	@ 0x30
       hi2c->State               = HAL_I2C_STATE_READY;
- 8001b48:	68fb      	ldr	r3, [r7, #12]
- 8001b4a:	2220      	movs	r2, #32
- 8001b4c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001bb4:	68fb      	ldr	r3, [r7, #12]
+ 8001bb6:	2220      	movs	r2, #32
+ 8001bb8:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
       hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001b50:	68fb      	ldr	r3, [r7, #12]
- 8001b52:	2200      	movs	r2, #0
- 8001b54:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001bbc:	68fb      	ldr	r3, [r7, #12]
+ 8001bbe:	2200      	movs	r2, #0
+ 8001bc0:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
       hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
- 8001b58:	68fb      	ldr	r3, [r7, #12]
- 8001b5a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001b5c:	f043 0204 	orr.w	r2, r3, #4
- 8001b60:	68fb      	ldr	r3, [r7, #12]
- 8001b62:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001bc4:	68fb      	ldr	r3, [r7, #12]
+ 8001bc6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001bc8:	f043 0204 	orr.w	r2, r3, #4
+ 8001bcc:	68fb      	ldr	r3, [r7, #12]
+ 8001bce:	641a      	str	r2, [r3, #64]	@ 0x40
 
       /* Process Unlocked */
       __HAL_UNLOCK(hi2c);
- 8001b64:	68fb      	ldr	r3, [r7, #12]
- 8001b66:	2200      	movs	r2, #0
- 8001b68:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001bd0:	68fb      	ldr	r3, [r7, #12]
+ 8001bd2:	2200      	movs	r2, #0
+ 8001bd4:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
       return HAL_ERROR;
- 8001b6c:	2301      	movs	r3, #1
- 8001b6e:	e067      	b.n	8001c40 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x138>
+ 8001bd8:	2301      	movs	r3, #1
+ 8001bda:	e067      	b.n	8001cac <I2C_WaitOnMasterAddressFlagUntilTimeout+0x138>
     }
 
     /* Check for the Timeout */
     if (Timeout != HAL_MAX_DELAY)
- 8001b70:	687b      	ldr	r3, [r7, #4]
- 8001b72:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8001b76:	d041      	beq.n	8001bfc <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
+ 8001bdc:	687b      	ldr	r3, [r7, #4]
+ 8001bde:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8001be2:	d041      	beq.n	8001c68 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
     {
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8001b78:	f7fe fed0 	bl	800091c <HAL_GetTick>
- 8001b7c:	4602      	mov	r2, r0
- 8001b7e:	683b      	ldr	r3, [r7, #0]
- 8001b80:	1ad3      	subs	r3, r2, r3
- 8001b82:	687a      	ldr	r2, [r7, #4]
- 8001b84:	429a      	cmp	r2, r3
- 8001b86:	d302      	bcc.n	8001b8e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
- 8001b88:	687b      	ldr	r3, [r7, #4]
- 8001b8a:	2b00      	cmp	r3, #0
- 8001b8c:	d136      	bne.n	8001bfc <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
+ 8001be4:	f7fe fed0 	bl	8000988 <HAL_GetTick>
+ 8001be8:	4602      	mov	r2, r0
+ 8001bea:	683b      	ldr	r3, [r7, #0]
+ 8001bec:	1ad3      	subs	r3, r2, r3
+ 8001bee:	687a      	ldr	r2, [r7, #4]
+ 8001bf0:	429a      	cmp	r2, r3
+ 8001bf2:	d302      	bcc.n	8001bfa <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
+ 8001bf4:	687b      	ldr	r3, [r7, #4]
+ 8001bf6:	2b00      	cmp	r3, #0
+ 8001bf8:	d136      	bne.n	8001c68 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
       {
         if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET))
- 8001b8e:	68bb      	ldr	r3, [r7, #8]
- 8001b90:	0c1b      	lsrs	r3, r3, #16
- 8001b92:	b2db      	uxtb	r3, r3
- 8001b94:	2b01      	cmp	r3, #1
- 8001b96:	d10c      	bne.n	8001bb2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xaa>
- 8001b98:	68fb      	ldr	r3, [r7, #12]
- 8001b9a:	681b      	ldr	r3, [r3, #0]
- 8001b9c:	695b      	ldr	r3, [r3, #20]
- 8001b9e:	43da      	mvns	r2, r3
- 8001ba0:	68bb      	ldr	r3, [r7, #8]
- 8001ba2:	4013      	ands	r3, r2
- 8001ba4:	b29b      	uxth	r3, r3
- 8001ba6:	2b00      	cmp	r3, #0
- 8001ba8:	bf14      	ite	ne
- 8001baa:	2301      	movne	r3, #1
- 8001bac:	2300      	moveq	r3, #0
- 8001bae:	b2db      	uxtb	r3, r3
- 8001bb0:	e00b      	b.n	8001bca <I2C_WaitOnMasterAddressFlagUntilTimeout+0xc2>
- 8001bb2:	68fb      	ldr	r3, [r7, #12]
- 8001bb4:	681b      	ldr	r3, [r3, #0]
- 8001bb6:	699b      	ldr	r3, [r3, #24]
- 8001bb8:	43da      	mvns	r2, r3
- 8001bba:	68bb      	ldr	r3, [r7, #8]
- 8001bbc:	4013      	ands	r3, r2
- 8001bbe:	b29b      	uxth	r3, r3
- 8001bc0:	2b00      	cmp	r3, #0
- 8001bc2:	bf14      	ite	ne
- 8001bc4:	2301      	movne	r3, #1
- 8001bc6:	2300      	moveq	r3, #0
- 8001bc8:	b2db      	uxtb	r3, r3
- 8001bca:	2b00      	cmp	r3, #0
- 8001bcc:	d016      	beq.n	8001bfc <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
+ 8001bfa:	68bb      	ldr	r3, [r7, #8]
+ 8001bfc:	0c1b      	lsrs	r3, r3, #16
+ 8001bfe:	b2db      	uxtb	r3, r3
+ 8001c00:	2b01      	cmp	r3, #1
+ 8001c02:	d10c      	bne.n	8001c1e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xaa>
+ 8001c04:	68fb      	ldr	r3, [r7, #12]
+ 8001c06:	681b      	ldr	r3, [r3, #0]
+ 8001c08:	695b      	ldr	r3, [r3, #20]
+ 8001c0a:	43da      	mvns	r2, r3
+ 8001c0c:	68bb      	ldr	r3, [r7, #8]
+ 8001c0e:	4013      	ands	r3, r2
+ 8001c10:	b29b      	uxth	r3, r3
+ 8001c12:	2b00      	cmp	r3, #0
+ 8001c14:	bf14      	ite	ne
+ 8001c16:	2301      	movne	r3, #1
+ 8001c18:	2300      	moveq	r3, #0
+ 8001c1a:	b2db      	uxtb	r3, r3
+ 8001c1c:	e00b      	b.n	8001c36 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xc2>
+ 8001c1e:	68fb      	ldr	r3, [r7, #12]
+ 8001c20:	681b      	ldr	r3, [r3, #0]
+ 8001c22:	699b      	ldr	r3, [r3, #24]
+ 8001c24:	43da      	mvns	r2, r3
+ 8001c26:	68bb      	ldr	r3, [r7, #8]
+ 8001c28:	4013      	ands	r3, r2
+ 8001c2a:	b29b      	uxth	r3, r3
+ 8001c2c:	2b00      	cmp	r3, #0
+ 8001c2e:	bf14      	ite	ne
+ 8001c30:	2301      	movne	r3, #1
+ 8001c32:	2300      	moveq	r3, #0
+ 8001c34:	b2db      	uxtb	r3, r3
+ 8001c36:	2b00      	cmp	r3, #0
+ 8001c38:	d016      	beq.n	8001c68 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf4>
         {
           hi2c->PreviousState       = I2C_STATE_NONE;
- 8001bce:	68fb      	ldr	r3, [r7, #12]
- 8001bd0:	2200      	movs	r2, #0
- 8001bd2:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001c3a:	68fb      	ldr	r3, [r7, #12]
+ 8001c3c:	2200      	movs	r2, #0
+ 8001c3e:	631a      	str	r2, [r3, #48]	@ 0x30
           hi2c->State               = HAL_I2C_STATE_READY;
- 8001bd4:	68fb      	ldr	r3, [r7, #12]
- 8001bd6:	2220      	movs	r2, #32
- 8001bd8:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001c40:	68fb      	ldr	r3, [r7, #12]
+ 8001c42:	2220      	movs	r2, #32
+ 8001c44:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
           hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001bdc:	68fb      	ldr	r3, [r7, #12]
- 8001bde:	2200      	movs	r2, #0
- 8001be0:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001c48:	68fb      	ldr	r3, [r7, #12]
+ 8001c4a:	2200      	movs	r2, #0
+ 8001c4c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
- 8001be4:	68fb      	ldr	r3, [r7, #12]
- 8001be6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001be8:	f043 0220 	orr.w	r2, r3, #32
- 8001bec:	68fb      	ldr	r3, [r7, #12]
- 8001bee:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001c50:	68fb      	ldr	r3, [r7, #12]
+ 8001c52:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001c54:	f043 0220 	orr.w	r2, r3, #32
+ 8001c58:	68fb      	ldr	r3, [r7, #12]
+ 8001c5a:	641a      	str	r2, [r3, #64]	@ 0x40
 
           /* Process Unlocked */
           __HAL_UNLOCK(hi2c);
- 8001bf0:	68fb      	ldr	r3, [r7, #12]
- 8001bf2:	2200      	movs	r2, #0
- 8001bf4:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001c5c:	68fb      	ldr	r3, [r7, #12]
+ 8001c5e:	2200      	movs	r2, #0
+ 8001c60:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
           return HAL_ERROR;
- 8001bf8:	2301      	movs	r3, #1
- 8001bfa:	e021      	b.n	8001c40 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x138>
+ 8001c64:	2301      	movs	r3, #1
+ 8001c66:	e021      	b.n	8001cac <I2C_WaitOnMasterAddressFlagUntilTimeout+0x138>
   while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
- 8001bfc:	68bb      	ldr	r3, [r7, #8]
- 8001bfe:	0c1b      	lsrs	r3, r3, #16
- 8001c00:	b2db      	uxtb	r3, r3
- 8001c02:	2b01      	cmp	r3, #1
- 8001c04:	d10c      	bne.n	8001c20 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x118>
- 8001c06:	68fb      	ldr	r3, [r7, #12]
- 8001c08:	681b      	ldr	r3, [r3, #0]
- 8001c0a:	695b      	ldr	r3, [r3, #20]
- 8001c0c:	43da      	mvns	r2, r3
- 8001c0e:	68bb      	ldr	r3, [r7, #8]
- 8001c10:	4013      	ands	r3, r2
- 8001c12:	b29b      	uxth	r3, r3
- 8001c14:	2b00      	cmp	r3, #0
- 8001c16:	bf14      	ite	ne
- 8001c18:	2301      	movne	r3, #1
- 8001c1a:	2300      	moveq	r3, #0
- 8001c1c:	b2db      	uxtb	r3, r3
- 8001c1e:	e00b      	b.n	8001c38 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x130>
- 8001c20:	68fb      	ldr	r3, [r7, #12]
- 8001c22:	681b      	ldr	r3, [r3, #0]
- 8001c24:	699b      	ldr	r3, [r3, #24]
- 8001c26:	43da      	mvns	r2, r3
- 8001c28:	68bb      	ldr	r3, [r7, #8]
- 8001c2a:	4013      	ands	r3, r2
- 8001c2c:	b29b      	uxth	r3, r3
- 8001c2e:	2b00      	cmp	r3, #0
- 8001c30:	bf14      	ite	ne
- 8001c32:	2301      	movne	r3, #1
- 8001c34:	2300      	moveq	r3, #0
- 8001c36:	b2db      	uxtb	r3, r3
- 8001c38:	2b00      	cmp	r3, #0
- 8001c3a:	f47f af6d 	bne.w	8001b18 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
+ 8001c68:	68bb      	ldr	r3, [r7, #8]
+ 8001c6a:	0c1b      	lsrs	r3, r3, #16
+ 8001c6c:	b2db      	uxtb	r3, r3
+ 8001c6e:	2b01      	cmp	r3, #1
+ 8001c70:	d10c      	bne.n	8001c8c <I2C_WaitOnMasterAddressFlagUntilTimeout+0x118>
+ 8001c72:	68fb      	ldr	r3, [r7, #12]
+ 8001c74:	681b      	ldr	r3, [r3, #0]
+ 8001c76:	695b      	ldr	r3, [r3, #20]
+ 8001c78:	43da      	mvns	r2, r3
+ 8001c7a:	68bb      	ldr	r3, [r7, #8]
+ 8001c7c:	4013      	ands	r3, r2
+ 8001c7e:	b29b      	uxth	r3, r3
+ 8001c80:	2b00      	cmp	r3, #0
+ 8001c82:	bf14      	ite	ne
+ 8001c84:	2301      	movne	r3, #1
+ 8001c86:	2300      	moveq	r3, #0
+ 8001c88:	b2db      	uxtb	r3, r3
+ 8001c8a:	e00b      	b.n	8001ca4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x130>
+ 8001c8c:	68fb      	ldr	r3, [r7, #12]
+ 8001c8e:	681b      	ldr	r3, [r3, #0]
+ 8001c90:	699b      	ldr	r3, [r3, #24]
+ 8001c92:	43da      	mvns	r2, r3
+ 8001c94:	68bb      	ldr	r3, [r7, #8]
+ 8001c96:	4013      	ands	r3, r2
+ 8001c98:	b29b      	uxth	r3, r3
+ 8001c9a:	2b00      	cmp	r3, #0
+ 8001c9c:	bf14      	ite	ne
+ 8001c9e:	2301      	movne	r3, #1
+ 8001ca0:	2300      	moveq	r3, #0
+ 8001ca2:	b2db      	uxtb	r3, r3
+ 8001ca4:	2b00      	cmp	r3, #0
+ 8001ca6:	f47f af6d 	bne.w	8001b84 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
         }
       }
     }
   }
   return HAL_OK;
- 8001c3e:	2300      	movs	r3, #0
+ 8001caa:	2300      	movs	r3, #0
 }
- 8001c40:	4618      	mov	r0, r3
- 8001c42:	3710      	adds	r7, #16
- 8001c44:	46bd      	mov	sp, r7
- 8001c46:	bd80      	pop	{r7, pc}
+ 8001cac:	4618      	mov	r0, r3
+ 8001cae:	3710      	adds	r7, #16
+ 8001cb0:	46bd      	mov	sp, r7
+ 8001cb2:	bd80      	pop	{r7, pc}
 
-08001c48 <I2C_WaitOnTXEFlagUntilTimeout>:
+08001cb4 <I2C_WaitOnTXEFlagUntilTimeout>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001c48:	b580      	push	{r7, lr}
- 8001c4a:	b084      	sub	sp, #16
- 8001c4c:	af00      	add	r7, sp, #0
- 8001c4e:	60f8      	str	r0, [r7, #12]
- 8001c50:	60b9      	str	r1, [r7, #8]
- 8001c52:	607a      	str	r2, [r7, #4]
+ 8001cb4:	b580      	push	{r7, lr}
+ 8001cb6:	b084      	sub	sp, #16
+ 8001cb8:	af00      	add	r7, sp, #0
+ 8001cba:	60f8      	str	r0, [r7, #12]
+ 8001cbc:	60b9      	str	r1, [r7, #8]
+ 8001cbe:	607a      	str	r2, [r7, #4]
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
- 8001c54:	e034      	b.n	8001cc0 <I2C_WaitOnTXEFlagUntilTimeout+0x78>
+ 8001cc0:	e034      	b.n	8001d2c <I2C_WaitOnTXEFlagUntilTimeout+0x78>
   {
     /* Check if a NACK is detected */
     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- 8001c56:	68f8      	ldr	r0, [r7, #12]
- 8001c58:	f000 f8e3 	bl	8001e22 <I2C_IsAcknowledgeFailed>
- 8001c5c:	4603      	mov	r3, r0
- 8001c5e:	2b00      	cmp	r3, #0
- 8001c60:	d001      	beq.n	8001c66 <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
+ 8001cc2:	68f8      	ldr	r0, [r7, #12]
+ 8001cc4:	f000 f8e3 	bl	8001e8e <I2C_IsAcknowledgeFailed>
+ 8001cc8:	4603      	mov	r3, r0
+ 8001cca:	2b00      	cmp	r3, #0
+ 8001ccc:	d001      	beq.n	8001cd2 <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
     {
       return HAL_ERROR;
- 8001c62:	2301      	movs	r3, #1
- 8001c64:	e034      	b.n	8001cd0 <I2C_WaitOnTXEFlagUntilTimeout+0x88>
+ 8001cce:	2301      	movs	r3, #1
+ 8001cd0:	e034      	b.n	8001d3c <I2C_WaitOnTXEFlagUntilTimeout+0x88>
     }
 
     /* Check for the Timeout */
     if (Timeout != HAL_MAX_DELAY)
- 8001c66:	68bb      	ldr	r3, [r7, #8]
- 8001c68:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8001c6c:	d028      	beq.n	8001cc0 <I2C_WaitOnTXEFlagUntilTimeout+0x78>
+ 8001cd2:	68bb      	ldr	r3, [r7, #8]
+ 8001cd4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8001cd8:	d028      	beq.n	8001d2c <I2C_WaitOnTXEFlagUntilTimeout+0x78>
     {
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8001c6e:	f7fe fe55 	bl	800091c <HAL_GetTick>
- 8001c72:	4602      	mov	r2, r0
- 8001c74:	687b      	ldr	r3, [r7, #4]
- 8001c76:	1ad3      	subs	r3, r2, r3
- 8001c78:	68ba      	ldr	r2, [r7, #8]
- 8001c7a:	429a      	cmp	r2, r3
- 8001c7c:	d302      	bcc.n	8001c84 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
- 8001c7e:	68bb      	ldr	r3, [r7, #8]
- 8001c80:	2b00      	cmp	r3, #0
- 8001c82:	d11d      	bne.n	8001cc0 <I2C_WaitOnTXEFlagUntilTimeout+0x78>
+ 8001cda:	f7fe fe55 	bl	8000988 <HAL_GetTick>
+ 8001cde:	4602      	mov	r2, r0
+ 8001ce0:	687b      	ldr	r3, [r7, #4]
+ 8001ce2:	1ad3      	subs	r3, r2, r3
+ 8001ce4:	68ba      	ldr	r2, [r7, #8]
+ 8001ce6:	429a      	cmp	r2, r3
+ 8001ce8:	d302      	bcc.n	8001cf0 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
+ 8001cea:	68bb      	ldr	r3, [r7, #8]
+ 8001cec:	2b00      	cmp	r3, #0
+ 8001cee:	d11d      	bne.n	8001d2c <I2C_WaitOnTXEFlagUntilTimeout+0x78>
       {
         if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET))
- 8001c84:	68fb      	ldr	r3, [r7, #12]
- 8001c86:	681b      	ldr	r3, [r3, #0]
- 8001c88:	695b      	ldr	r3, [r3, #20]
- 8001c8a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
- 8001c8e:	2b80      	cmp	r3, #128	@ 0x80
- 8001c90:	d016      	beq.n	8001cc0 <I2C_WaitOnTXEFlagUntilTimeout+0x78>
+ 8001cf0:	68fb      	ldr	r3, [r7, #12]
+ 8001cf2:	681b      	ldr	r3, [r3, #0]
+ 8001cf4:	695b      	ldr	r3, [r3, #20]
+ 8001cf6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8001cfa:	2b80      	cmp	r3, #128	@ 0x80
+ 8001cfc:	d016      	beq.n	8001d2c <I2C_WaitOnTXEFlagUntilTimeout+0x78>
         {
           hi2c->PreviousState       = I2C_STATE_NONE;
- 8001c92:	68fb      	ldr	r3, [r7, #12]
- 8001c94:	2200      	movs	r2, #0
- 8001c96:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001cfe:	68fb      	ldr	r3, [r7, #12]
+ 8001d00:	2200      	movs	r2, #0
+ 8001d02:	631a      	str	r2, [r3, #48]	@ 0x30
           hi2c->State               = HAL_I2C_STATE_READY;
- 8001c98:	68fb      	ldr	r3, [r7, #12]
- 8001c9a:	2220      	movs	r2, #32
- 8001c9c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001d04:	68fb      	ldr	r3, [r7, #12]
+ 8001d06:	2220      	movs	r2, #32
+ 8001d08:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
           hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001ca0:	68fb      	ldr	r3, [r7, #12]
- 8001ca2:	2200      	movs	r2, #0
- 8001ca4:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001d0c:	68fb      	ldr	r3, [r7, #12]
+ 8001d0e:	2200      	movs	r2, #0
+ 8001d10:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
- 8001ca8:	68fb      	ldr	r3, [r7, #12]
- 8001caa:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001cac:	f043 0220 	orr.w	r2, r3, #32
- 8001cb0:	68fb      	ldr	r3, [r7, #12]
- 8001cb2:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001d14:	68fb      	ldr	r3, [r7, #12]
+ 8001d16:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001d18:	f043 0220 	orr.w	r2, r3, #32
+ 8001d1c:	68fb      	ldr	r3, [r7, #12]
+ 8001d1e:	641a      	str	r2, [r3, #64]	@ 0x40
 
           /* Process Unlocked */
           __HAL_UNLOCK(hi2c);
- 8001cb4:	68fb      	ldr	r3, [r7, #12]
- 8001cb6:	2200      	movs	r2, #0
- 8001cb8:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001d20:	68fb      	ldr	r3, [r7, #12]
+ 8001d22:	2200      	movs	r2, #0
+ 8001d24:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
           return HAL_ERROR;
- 8001cbc:	2301      	movs	r3, #1
- 8001cbe:	e007      	b.n	8001cd0 <I2C_WaitOnTXEFlagUntilTimeout+0x88>
+ 8001d28:	2301      	movs	r3, #1
+ 8001d2a:	e007      	b.n	8001d3c <I2C_WaitOnTXEFlagUntilTimeout+0x88>
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
- 8001cc0:	68fb      	ldr	r3, [r7, #12]
- 8001cc2:	681b      	ldr	r3, [r3, #0]
- 8001cc4:	695b      	ldr	r3, [r3, #20]
- 8001cc6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
- 8001cca:	2b80      	cmp	r3, #128	@ 0x80
- 8001ccc:	d1c3      	bne.n	8001c56 <I2C_WaitOnTXEFlagUntilTimeout+0xe>
+ 8001d2c:	68fb      	ldr	r3, [r7, #12]
+ 8001d2e:	681b      	ldr	r3, [r3, #0]
+ 8001d30:	695b      	ldr	r3, [r3, #20]
+ 8001d32:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8001d36:	2b80      	cmp	r3, #128	@ 0x80
+ 8001d38:	d1c3      	bne.n	8001cc2 <I2C_WaitOnTXEFlagUntilTimeout+0xe>
         }
       }
     }
   }
   return HAL_OK;
- 8001cce:	2300      	movs	r3, #0
+ 8001d3a:	2300      	movs	r3, #0
 }
- 8001cd0:	4618      	mov	r0, r3
- 8001cd2:	3710      	adds	r7, #16
- 8001cd4:	46bd      	mov	sp, r7
- 8001cd6:	bd80      	pop	{r7, pc}
+ 8001d3c:	4618      	mov	r0, r3
+ 8001d3e:	3710      	adds	r7, #16
+ 8001d40:	46bd      	mov	sp, r7
+ 8001d42:	bd80      	pop	{r7, pc}
 
-08001cd8 <I2C_WaitOnBTFFlagUntilTimeout>:
+08001d44 <I2C_WaitOnBTFFlagUntilTimeout>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001cd8:	b580      	push	{r7, lr}
- 8001cda:	b084      	sub	sp, #16
- 8001cdc:	af00      	add	r7, sp, #0
- 8001cde:	60f8      	str	r0, [r7, #12]
- 8001ce0:	60b9      	str	r1, [r7, #8]
- 8001ce2:	607a      	str	r2, [r7, #4]
+ 8001d44:	b580      	push	{r7, lr}
+ 8001d46:	b084      	sub	sp, #16
+ 8001d48:	af00      	add	r7, sp, #0
+ 8001d4a:	60f8      	str	r0, [r7, #12]
+ 8001d4c:	60b9      	str	r1, [r7, #8]
+ 8001d4e:	607a      	str	r2, [r7, #4]
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
- 8001ce4:	e034      	b.n	8001d50 <I2C_WaitOnBTFFlagUntilTimeout+0x78>
+ 8001d50:	e034      	b.n	8001dbc <I2C_WaitOnBTFFlagUntilTimeout+0x78>
   {
     /* Check if a NACK is detected */
     if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- 8001ce6:	68f8      	ldr	r0, [r7, #12]
- 8001ce8:	f000 f89b 	bl	8001e22 <I2C_IsAcknowledgeFailed>
- 8001cec:	4603      	mov	r3, r0
- 8001cee:	2b00      	cmp	r3, #0
- 8001cf0:	d001      	beq.n	8001cf6 <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
+ 8001d52:	68f8      	ldr	r0, [r7, #12]
+ 8001d54:	f000 f89b 	bl	8001e8e <I2C_IsAcknowledgeFailed>
+ 8001d58:	4603      	mov	r3, r0
+ 8001d5a:	2b00      	cmp	r3, #0
+ 8001d5c:	d001      	beq.n	8001d62 <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
     {
       return HAL_ERROR;
- 8001cf2:	2301      	movs	r3, #1
- 8001cf4:	e034      	b.n	8001d60 <I2C_WaitOnBTFFlagUntilTimeout+0x88>
+ 8001d5e:	2301      	movs	r3, #1
+ 8001d60:	e034      	b.n	8001dcc <I2C_WaitOnBTFFlagUntilTimeout+0x88>
     }
 
     /* Check for the Timeout */
     if (Timeout != HAL_MAX_DELAY)
- 8001cf6:	68bb      	ldr	r3, [r7, #8]
- 8001cf8:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8001cfc:	d028      	beq.n	8001d50 <I2C_WaitOnBTFFlagUntilTimeout+0x78>
+ 8001d62:	68bb      	ldr	r3, [r7, #8]
+ 8001d64:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8001d68:	d028      	beq.n	8001dbc <I2C_WaitOnBTFFlagUntilTimeout+0x78>
     {
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8001cfe:	f7fe fe0d 	bl	800091c <HAL_GetTick>
- 8001d02:	4602      	mov	r2, r0
- 8001d04:	687b      	ldr	r3, [r7, #4]
- 8001d06:	1ad3      	subs	r3, r2, r3
- 8001d08:	68ba      	ldr	r2, [r7, #8]
- 8001d0a:	429a      	cmp	r2, r3
- 8001d0c:	d302      	bcc.n	8001d14 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
- 8001d0e:	68bb      	ldr	r3, [r7, #8]
- 8001d10:	2b00      	cmp	r3, #0
- 8001d12:	d11d      	bne.n	8001d50 <I2C_WaitOnBTFFlagUntilTimeout+0x78>
+ 8001d6a:	f7fe fe0d 	bl	8000988 <HAL_GetTick>
+ 8001d6e:	4602      	mov	r2, r0
+ 8001d70:	687b      	ldr	r3, [r7, #4]
+ 8001d72:	1ad3      	subs	r3, r2, r3
+ 8001d74:	68ba      	ldr	r2, [r7, #8]
+ 8001d76:	429a      	cmp	r2, r3
+ 8001d78:	d302      	bcc.n	8001d80 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
+ 8001d7a:	68bb      	ldr	r3, [r7, #8]
+ 8001d7c:	2b00      	cmp	r3, #0
+ 8001d7e:	d11d      	bne.n	8001dbc <I2C_WaitOnBTFFlagUntilTimeout+0x78>
       {
         if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
- 8001d14:	68fb      	ldr	r3, [r7, #12]
- 8001d16:	681b      	ldr	r3, [r3, #0]
- 8001d18:	695b      	ldr	r3, [r3, #20]
- 8001d1a:	f003 0304 	and.w	r3, r3, #4
- 8001d1e:	2b04      	cmp	r3, #4
- 8001d20:	d016      	beq.n	8001d50 <I2C_WaitOnBTFFlagUntilTimeout+0x78>
+ 8001d80:	68fb      	ldr	r3, [r7, #12]
+ 8001d82:	681b      	ldr	r3, [r3, #0]
+ 8001d84:	695b      	ldr	r3, [r3, #20]
+ 8001d86:	f003 0304 	and.w	r3, r3, #4
+ 8001d8a:	2b04      	cmp	r3, #4
+ 8001d8c:	d016      	beq.n	8001dbc <I2C_WaitOnBTFFlagUntilTimeout+0x78>
         {
           hi2c->PreviousState       = I2C_STATE_NONE;
- 8001d22:	68fb      	ldr	r3, [r7, #12]
- 8001d24:	2200      	movs	r2, #0
- 8001d26:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001d8e:	68fb      	ldr	r3, [r7, #12]
+ 8001d90:	2200      	movs	r2, #0
+ 8001d92:	631a      	str	r2, [r3, #48]	@ 0x30
           hi2c->State               = HAL_I2C_STATE_READY;
- 8001d28:	68fb      	ldr	r3, [r7, #12]
- 8001d2a:	2220      	movs	r2, #32
- 8001d2c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001d94:	68fb      	ldr	r3, [r7, #12]
+ 8001d96:	2220      	movs	r2, #32
+ 8001d98:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
           hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001d30:	68fb      	ldr	r3, [r7, #12]
- 8001d32:	2200      	movs	r2, #0
- 8001d34:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001d9c:	68fb      	ldr	r3, [r7, #12]
+ 8001d9e:	2200      	movs	r2, #0
+ 8001da0:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
           hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
- 8001d38:	68fb      	ldr	r3, [r7, #12]
- 8001d3a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001d3c:	f043 0220 	orr.w	r2, r3, #32
- 8001d40:	68fb      	ldr	r3, [r7, #12]
- 8001d42:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001da4:	68fb      	ldr	r3, [r7, #12]
+ 8001da6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001da8:	f043 0220 	orr.w	r2, r3, #32
+ 8001dac:	68fb      	ldr	r3, [r7, #12]
+ 8001dae:	641a      	str	r2, [r3, #64]	@ 0x40
 
           /* Process Unlocked */
           __HAL_UNLOCK(hi2c);
- 8001d44:	68fb      	ldr	r3, [r7, #12]
- 8001d46:	2200      	movs	r2, #0
- 8001d48:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001db0:	68fb      	ldr	r3, [r7, #12]
+ 8001db2:	2200      	movs	r2, #0
+ 8001db4:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
           return HAL_ERROR;
- 8001d4c:	2301      	movs	r3, #1
- 8001d4e:	e007      	b.n	8001d60 <I2C_WaitOnBTFFlagUntilTimeout+0x88>
+ 8001db8:	2301      	movs	r3, #1
+ 8001dba:	e007      	b.n	8001dcc <I2C_WaitOnBTFFlagUntilTimeout+0x88>
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
- 8001d50:	68fb      	ldr	r3, [r7, #12]
- 8001d52:	681b      	ldr	r3, [r3, #0]
- 8001d54:	695b      	ldr	r3, [r3, #20]
- 8001d56:	f003 0304 	and.w	r3, r3, #4
- 8001d5a:	2b04      	cmp	r3, #4
- 8001d5c:	d1c3      	bne.n	8001ce6 <I2C_WaitOnBTFFlagUntilTimeout+0xe>
+ 8001dbc:	68fb      	ldr	r3, [r7, #12]
+ 8001dbe:	681b      	ldr	r3, [r3, #0]
+ 8001dc0:	695b      	ldr	r3, [r3, #20]
+ 8001dc2:	f003 0304 	and.w	r3, r3, #4
+ 8001dc6:	2b04      	cmp	r3, #4
+ 8001dc8:	d1c3      	bne.n	8001d52 <I2C_WaitOnBTFFlagUntilTimeout+0xe>
         }
       }
     }
   }
   return HAL_OK;
- 8001d5e:	2300      	movs	r3, #0
+ 8001dca:	2300      	movs	r3, #0
 }
- 8001d60:	4618      	mov	r0, r3
- 8001d62:	3710      	adds	r7, #16
- 8001d64:	46bd      	mov	sp, r7
- 8001d66:	bd80      	pop	{r7, pc}
+ 8001dcc:	4618      	mov	r0, r3
+ 8001dce:	3710      	adds	r7, #16
+ 8001dd0:	46bd      	mov	sp, r7
+ 8001dd2:	bd80      	pop	{r7, pc}
 
-08001d68 <I2C_WaitOnRXNEFlagUntilTimeout>:
+08001dd4 <I2C_WaitOnRXNEFlagUntilTimeout>:
   * @param  Timeout Timeout duration
   * @param  Tickstart Tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
 {
- 8001d68:	b580      	push	{r7, lr}
- 8001d6a:	b084      	sub	sp, #16
- 8001d6c:	af00      	add	r7, sp, #0
- 8001d6e:	60f8      	str	r0, [r7, #12]
- 8001d70:	60b9      	str	r1, [r7, #8]
- 8001d72:	607a      	str	r2, [r7, #4]
+ 8001dd4:	b580      	push	{r7, lr}
+ 8001dd6:	b084      	sub	sp, #16
+ 8001dd8:	af00      	add	r7, sp, #0
+ 8001dda:	60f8      	str	r0, [r7, #12]
+ 8001ddc:	60b9      	str	r1, [r7, #8]
+ 8001dde:	607a      	str	r2, [r7, #4]
 
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
- 8001d74:	e049      	b.n	8001e0a <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
+ 8001de0:	e049      	b.n	8001e76 <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
   {
     /* Check if a STOPF is detected */
     if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
- 8001d76:	68fb      	ldr	r3, [r7, #12]
- 8001d78:	681b      	ldr	r3, [r3, #0]
- 8001d7a:	695b      	ldr	r3, [r3, #20]
- 8001d7c:	f003 0310 	and.w	r3, r3, #16
- 8001d80:	2b10      	cmp	r3, #16
- 8001d82:	d119      	bne.n	8001db8 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
+ 8001de2:	68fb      	ldr	r3, [r7, #12]
+ 8001de4:	681b      	ldr	r3, [r3, #0]
+ 8001de6:	695b      	ldr	r3, [r3, #20]
+ 8001de8:	f003 0310 	and.w	r3, r3, #16
+ 8001dec:	2b10      	cmp	r3, #16
+ 8001dee:	d119      	bne.n	8001e24 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
     {
       /* Clear STOP Flag */
       __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
- 8001d84:	68fb      	ldr	r3, [r7, #12]
- 8001d86:	681b      	ldr	r3, [r3, #0]
- 8001d88:	f06f 0210 	mvn.w	r2, #16
- 8001d8c:	615a      	str	r2, [r3, #20]
+ 8001df0:	68fb      	ldr	r3, [r7, #12]
+ 8001df2:	681b      	ldr	r3, [r3, #0]
+ 8001df4:	f06f 0210 	mvn.w	r2, #16
+ 8001df8:	615a      	str	r2, [r3, #20]
 
       hi2c->PreviousState       = I2C_STATE_NONE;
- 8001d8e:	68fb      	ldr	r3, [r7, #12]
- 8001d90:	2200      	movs	r2, #0
- 8001d92:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001dfa:	68fb      	ldr	r3, [r7, #12]
+ 8001dfc:	2200      	movs	r2, #0
+ 8001dfe:	631a      	str	r2, [r3, #48]	@ 0x30
       hi2c->State               = HAL_I2C_STATE_READY;
- 8001d94:	68fb      	ldr	r3, [r7, #12]
- 8001d96:	2220      	movs	r2, #32
- 8001d98:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001e00:	68fb      	ldr	r3, [r7, #12]
+ 8001e02:	2220      	movs	r2, #32
+ 8001e04:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
       hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001d9c:	68fb      	ldr	r3, [r7, #12]
- 8001d9e:	2200      	movs	r2, #0
- 8001da0:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001e08:	68fb      	ldr	r3, [r7, #12]
+ 8001e0a:	2200      	movs	r2, #0
+ 8001e0c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
       hi2c->ErrorCode           |= HAL_I2C_ERROR_NONE;
- 8001da4:	68fb      	ldr	r3, [r7, #12]
- 8001da6:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
- 8001da8:	68fb      	ldr	r3, [r7, #12]
- 8001daa:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001e10:	68fb      	ldr	r3, [r7, #12]
+ 8001e12:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
+ 8001e14:	68fb      	ldr	r3, [r7, #12]
+ 8001e16:	641a      	str	r2, [r3, #64]	@ 0x40
 
       /* Process Unlocked */
       __HAL_UNLOCK(hi2c);
- 8001dac:	68fb      	ldr	r3, [r7, #12]
- 8001dae:	2200      	movs	r2, #0
- 8001db0:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001e18:	68fb      	ldr	r3, [r7, #12]
+ 8001e1a:	2200      	movs	r2, #0
+ 8001e1c:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
       return HAL_ERROR;
- 8001db4:	2301      	movs	r3, #1
- 8001db6:	e030      	b.n	8001e1a <I2C_WaitOnRXNEFlagUntilTimeout+0xb2>
+ 8001e20:	2301      	movs	r3, #1
+ 8001e22:	e030      	b.n	8001e86 <I2C_WaitOnRXNEFlagUntilTimeout+0xb2>
     }
 
     /* Check for the Timeout */
     if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8001db8:	f7fe fdb0 	bl	800091c <HAL_GetTick>
- 8001dbc:	4602      	mov	r2, r0
- 8001dbe:	687b      	ldr	r3, [r7, #4]
- 8001dc0:	1ad3      	subs	r3, r2, r3
- 8001dc2:	68ba      	ldr	r2, [r7, #8]
- 8001dc4:	429a      	cmp	r2, r3
- 8001dc6:	d302      	bcc.n	8001dce <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
- 8001dc8:	68bb      	ldr	r3, [r7, #8]
- 8001dca:	2b00      	cmp	r3, #0
- 8001dcc:	d11d      	bne.n	8001e0a <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
+ 8001e24:	f7fe fdb0 	bl	8000988 <HAL_GetTick>
+ 8001e28:	4602      	mov	r2, r0
+ 8001e2a:	687b      	ldr	r3, [r7, #4]
+ 8001e2c:	1ad3      	subs	r3, r2, r3
+ 8001e2e:	68ba      	ldr	r2, [r7, #8]
+ 8001e30:	429a      	cmp	r2, r3
+ 8001e32:	d302      	bcc.n	8001e3a <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
+ 8001e34:	68bb      	ldr	r3, [r7, #8]
+ 8001e36:	2b00      	cmp	r3, #0
+ 8001e38:	d11d      	bne.n	8001e76 <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
     {
       if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET))
- 8001dce:	68fb      	ldr	r3, [r7, #12]
- 8001dd0:	681b      	ldr	r3, [r3, #0]
- 8001dd2:	695b      	ldr	r3, [r3, #20]
- 8001dd4:	f003 0340 	and.w	r3, r3, #64	@ 0x40
- 8001dd8:	2b40      	cmp	r3, #64	@ 0x40
- 8001dda:	d016      	beq.n	8001e0a <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
+ 8001e3a:	68fb      	ldr	r3, [r7, #12]
+ 8001e3c:	681b      	ldr	r3, [r3, #0]
+ 8001e3e:	695b      	ldr	r3, [r3, #20]
+ 8001e40:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8001e44:	2b40      	cmp	r3, #64	@ 0x40
+ 8001e46:	d016      	beq.n	8001e76 <I2C_WaitOnRXNEFlagUntilTimeout+0xa2>
       {
         hi2c->PreviousState       = I2C_STATE_NONE;
- 8001ddc:	68fb      	ldr	r3, [r7, #12]
- 8001dde:	2200      	movs	r2, #0
- 8001de0:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001e48:	68fb      	ldr	r3, [r7, #12]
+ 8001e4a:	2200      	movs	r2, #0
+ 8001e4c:	631a      	str	r2, [r3, #48]	@ 0x30
         hi2c->State               = HAL_I2C_STATE_READY;
- 8001de2:	68fb      	ldr	r3, [r7, #12]
- 8001de4:	2220      	movs	r2, #32
- 8001de6:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001e4e:	68fb      	ldr	r3, [r7, #12]
+ 8001e50:	2220      	movs	r2, #32
+ 8001e52:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
         hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001dea:	68fb      	ldr	r3, [r7, #12]
- 8001dec:	2200      	movs	r2, #0
- 8001dee:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001e56:	68fb      	ldr	r3, [r7, #12]
+ 8001e58:	2200      	movs	r2, #0
+ 8001e5a:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
         hi2c->ErrorCode           |= HAL_I2C_ERROR_TIMEOUT;
- 8001df2:	68fb      	ldr	r3, [r7, #12]
- 8001df4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001df6:	f043 0220 	orr.w	r2, r3, #32
- 8001dfa:	68fb      	ldr	r3, [r7, #12]
- 8001dfc:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001e5e:	68fb      	ldr	r3, [r7, #12]
+ 8001e60:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001e62:	f043 0220 	orr.w	r2, r3, #32
+ 8001e66:	68fb      	ldr	r3, [r7, #12]
+ 8001e68:	641a      	str	r2, [r3, #64]	@ 0x40
 
         /* Process Unlocked */
         __HAL_UNLOCK(hi2c);
- 8001dfe:	68fb      	ldr	r3, [r7, #12]
- 8001e00:	2200      	movs	r2, #0
- 8001e02:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001e6a:	68fb      	ldr	r3, [r7, #12]
+ 8001e6c:	2200      	movs	r2, #0
+ 8001e6e:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
         return HAL_ERROR;
- 8001e06:	2301      	movs	r3, #1
- 8001e08:	e007      	b.n	8001e1a <I2C_WaitOnRXNEFlagUntilTimeout+0xb2>
+ 8001e72:	2301      	movs	r3, #1
+ 8001e74:	e007      	b.n	8001e86 <I2C_WaitOnRXNEFlagUntilTimeout+0xb2>
   while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
- 8001e0a:	68fb      	ldr	r3, [r7, #12]
- 8001e0c:	681b      	ldr	r3, [r3, #0]
- 8001e0e:	695b      	ldr	r3, [r3, #20]
- 8001e10:	f003 0340 	and.w	r3, r3, #64	@ 0x40
- 8001e14:	2b40      	cmp	r3, #64	@ 0x40
- 8001e16:	d1ae      	bne.n	8001d76 <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
+ 8001e76:	68fb      	ldr	r3, [r7, #12]
+ 8001e78:	681b      	ldr	r3, [r3, #0]
+ 8001e7a:	695b      	ldr	r3, [r3, #20]
+ 8001e7c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8001e80:	2b40      	cmp	r3, #64	@ 0x40
+ 8001e82:	d1ae      	bne.n	8001de2 <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
       }
     }
   }
   return HAL_OK;
- 8001e18:	2300      	movs	r3, #0
+ 8001e84:	2300      	movs	r3, #0
 }
- 8001e1a:	4618      	mov	r0, r3
- 8001e1c:	3710      	adds	r7, #16
- 8001e1e:	46bd      	mov	sp, r7
- 8001e20:	bd80      	pop	{r7, pc}
+ 8001e86:	4618      	mov	r0, r3
+ 8001e88:	3710      	adds	r7, #16
+ 8001e8a:	46bd      	mov	sp, r7
+ 8001e8c:	bd80      	pop	{r7, pc}
 
-08001e22 <I2C_IsAcknowledgeFailed>:
+08001e8e <I2C_IsAcknowledgeFailed>:
   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
   *                the configuration information for the specified I2C.
   * @retval HAL status
   */
 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
 {
- 8001e22:	b480      	push	{r7}
- 8001e24:	b083      	sub	sp, #12
- 8001e26:	af00      	add	r7, sp, #0
- 8001e28:	6078      	str	r0, [r7, #4]
+ 8001e8e:	b480      	push	{r7}
+ 8001e90:	b083      	sub	sp, #12
+ 8001e92:	af00      	add	r7, sp, #0
+ 8001e94:	6078      	str	r0, [r7, #4]
   if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- 8001e2a:	687b      	ldr	r3, [r7, #4]
- 8001e2c:	681b      	ldr	r3, [r3, #0]
- 8001e2e:	695b      	ldr	r3, [r3, #20]
- 8001e30:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
- 8001e34:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
- 8001e38:	d11b      	bne.n	8001e72 <I2C_IsAcknowledgeFailed+0x50>
+ 8001e96:	687b      	ldr	r3, [r7, #4]
+ 8001e98:	681b      	ldr	r3, [r3, #0]
+ 8001e9a:	695b      	ldr	r3, [r3, #20]
+ 8001e9c:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
+ 8001ea0:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
+ 8001ea4:	d11b      	bne.n	8001ede <I2C_IsAcknowledgeFailed+0x50>
   {
     /* Clear NACKF Flag */
     __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- 8001e3a:	687b      	ldr	r3, [r7, #4]
- 8001e3c:	681b      	ldr	r3, [r3, #0]
- 8001e3e:	f46f 6280 	mvn.w	r2, #1024	@ 0x400
- 8001e42:	615a      	str	r2, [r3, #20]
+ 8001ea6:	687b      	ldr	r3, [r7, #4]
+ 8001ea8:	681b      	ldr	r3, [r3, #0]
+ 8001eaa:	f46f 6280 	mvn.w	r2, #1024	@ 0x400
+ 8001eae:	615a      	str	r2, [r3, #20]
 
     hi2c->PreviousState       = I2C_STATE_NONE;
- 8001e44:	687b      	ldr	r3, [r7, #4]
- 8001e46:	2200      	movs	r2, #0
- 8001e48:	631a      	str	r2, [r3, #48]	@ 0x30
+ 8001eb0:	687b      	ldr	r3, [r7, #4]
+ 8001eb2:	2200      	movs	r2, #0
+ 8001eb4:	631a      	str	r2, [r3, #48]	@ 0x30
     hi2c->State               = HAL_I2C_STATE_READY;
- 8001e4a:	687b      	ldr	r3, [r7, #4]
- 8001e4c:	2220      	movs	r2, #32
- 8001e4e:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+ 8001eb6:	687b      	ldr	r3, [r7, #4]
+ 8001eb8:	2220      	movs	r2, #32
+ 8001eba:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
     hi2c->Mode                = HAL_I2C_MODE_NONE;
- 8001e52:	687b      	ldr	r3, [r7, #4]
- 8001e54:	2200      	movs	r2, #0
- 8001e56:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001ebe:	687b      	ldr	r3, [r7, #4]
+ 8001ec0:	2200      	movs	r2, #0
+ 8001ec2:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
     hi2c->ErrorCode           |= HAL_I2C_ERROR_AF;
- 8001e5a:	687b      	ldr	r3, [r7, #4]
- 8001e5c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8001e5e:	f043 0204 	orr.w	r2, r3, #4
- 8001e62:	687b      	ldr	r3, [r7, #4]
- 8001e64:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8001ec6:	687b      	ldr	r3, [r7, #4]
+ 8001ec8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001eca:	f043 0204 	orr.w	r2, r3, #4
+ 8001ece:	687b      	ldr	r3, [r7, #4]
+ 8001ed0:	641a      	str	r2, [r3, #64]	@ 0x40
 
     /* Process Unlocked */
     __HAL_UNLOCK(hi2c);
- 8001e66:	687b      	ldr	r3, [r7, #4]
- 8001e68:	2200      	movs	r2, #0
- 8001e6a:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+ 8001ed2:	687b      	ldr	r3, [r7, #4]
+ 8001ed4:	2200      	movs	r2, #0
+ 8001ed6:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
 
     return HAL_ERROR;
- 8001e6e:	2301      	movs	r3, #1
- 8001e70:	e000      	b.n	8001e74 <I2C_IsAcknowledgeFailed+0x52>
+ 8001eda:	2301      	movs	r3, #1
+ 8001edc:	e000      	b.n	8001ee0 <I2C_IsAcknowledgeFailed+0x52>
   }
   return HAL_OK;
- 8001e72:	2300      	movs	r3, #0
+ 8001ede:	2300      	movs	r3, #0
 }
- 8001e74:	4618      	mov	r0, r3
- 8001e76:	370c      	adds	r7, #12
- 8001e78:	46bd      	mov	sp, r7
- 8001e7a:	bc80      	pop	{r7}
- 8001e7c:	4770      	bx	lr
+ 8001ee0:	4618      	mov	r0, r3
+ 8001ee2:	370c      	adds	r7, #12
+ 8001ee4:	46bd      	mov	sp, r7
+ 8001ee6:	bc80      	pop	{r7}
+ 8001ee8:	4770      	bx	lr
 	...
 
-08001e80 <HAL_RCC_OscConfig>:
+08001eec <HAL_RCC_OscConfig>:
   *         supported by this macro. User should request a transition to HSE Off
   *         first and then HSE On or HSE Bypass.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
- 8001e80:	b580      	push	{r7, lr}
- 8001e82:	b088      	sub	sp, #32
- 8001e84:	af00      	add	r7, sp, #0
- 8001e86:	6078      	str	r0, [r7, #4]
+ 8001eec:	b580      	push	{r7, lr}
+ 8001eee:	b088      	sub	sp, #32
+ 8001ef0:	af00      	add	r7, sp, #0
+ 8001ef2:	6078      	str	r0, [r7, #4]
   uint32_t tickstart;
   HAL_StatusTypeDef status;
   uint32_t sysclk_source, pll_config;
 
   /* Check the parameters */
   if(RCC_OscInitStruct == NULL)
- 8001e88:	687b      	ldr	r3, [r7, #4]
- 8001e8a:	2b00      	cmp	r3, #0
- 8001e8c:	d101      	bne.n	8001e92 <HAL_RCC_OscConfig+0x12>
+ 8001ef4:	687b      	ldr	r3, [r7, #4]
+ 8001ef6:	2b00      	cmp	r3, #0
+ 8001ef8:	d101      	bne.n	8001efe <HAL_RCC_OscConfig+0x12>
   {
     return HAL_ERROR;
- 8001e8e:	2301      	movs	r3, #1
- 8001e90:	e31d      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8001efa:	2301      	movs	r3, #1
+ 8001efc:	e31d      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
   }
 
   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 
   sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
- 8001e92:	4b94      	ldr	r3, [pc, #592]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001e94:	689b      	ldr	r3, [r3, #8]
- 8001e96:	f003 030c 	and.w	r3, r3, #12
- 8001e9a:	61bb      	str	r3, [r7, #24]
+ 8001efe:	4b94      	ldr	r3, [pc, #592]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f00:	689b      	ldr	r3, [r3, #8]
+ 8001f02:	f003 030c 	and.w	r3, r3, #12
+ 8001f06:	61bb      	str	r3, [r7, #24]
   pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
- 8001e9c:	4b91      	ldr	r3, [pc, #580]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001e9e:	689b      	ldr	r3, [r3, #8]
- 8001ea0:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8001ea4:	617b      	str	r3, [r7, #20]
+ 8001f08:	4b91      	ldr	r3, [pc, #580]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f0a:	689b      	ldr	r3, [r3, #8]
+ 8001f0c:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
+ 8001f10:	617b      	str	r3, [r7, #20]
 
   /*------------------------------- HSE Configuration ------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 8001ea6:	687b      	ldr	r3, [r7, #4]
- 8001ea8:	681b      	ldr	r3, [r3, #0]
- 8001eaa:	f003 0301 	and.w	r3, r3, #1
- 8001eae:	2b00      	cmp	r3, #0
- 8001eb0:	d07b      	beq.n	8001faa <HAL_RCC_OscConfig+0x12a>
+ 8001f12:	687b      	ldr	r3, [r7, #4]
+ 8001f14:	681b      	ldr	r3, [r3, #0]
+ 8001f16:	f003 0301 	and.w	r3, r3, #1
+ 8001f1a:	2b00      	cmp	r3, #0
+ 8001f1c:	d07b      	beq.n	8002016 <HAL_RCC_OscConfig+0x12a>
   {
     /* Check the parameters */
     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 
     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
     if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
- 8001eb2:	69bb      	ldr	r3, [r7, #24]
- 8001eb4:	2b08      	cmp	r3, #8
- 8001eb6:	d006      	beq.n	8001ec6 <HAL_RCC_OscConfig+0x46>
+ 8001f1e:	69bb      	ldr	r3, [r7, #24]
+ 8001f20:	2b08      	cmp	r3, #8
+ 8001f22:	d006      	beq.n	8001f32 <HAL_RCC_OscConfig+0x46>
        || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
- 8001eb8:	69bb      	ldr	r3, [r7, #24]
- 8001eba:	2b0c      	cmp	r3, #12
- 8001ebc:	d10f      	bne.n	8001ede <HAL_RCC_OscConfig+0x5e>
- 8001ebe:	697b      	ldr	r3, [r7, #20]
- 8001ec0:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
- 8001ec4:	d10b      	bne.n	8001ede <HAL_RCC_OscConfig+0x5e>
+ 8001f24:	69bb      	ldr	r3, [r7, #24]
+ 8001f26:	2b0c      	cmp	r3, #12
+ 8001f28:	d10f      	bne.n	8001f4a <HAL_RCC_OscConfig+0x5e>
+ 8001f2a:	697b      	ldr	r3, [r7, #20]
+ 8001f2c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
+ 8001f30:	d10b      	bne.n	8001f4a <HAL_RCC_OscConfig+0x5e>
     {
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8001ec6:	4b87      	ldr	r3, [pc, #540]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001ec8:	681b      	ldr	r3, [r3, #0]
- 8001eca:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8001ece:	2b00      	cmp	r3, #0
- 8001ed0:	d06a      	beq.n	8001fa8 <HAL_RCC_OscConfig+0x128>
- 8001ed2:	687b      	ldr	r3, [r7, #4]
- 8001ed4:	685b      	ldr	r3, [r3, #4]
- 8001ed6:	2b00      	cmp	r3, #0
- 8001ed8:	d166      	bne.n	8001fa8 <HAL_RCC_OscConfig+0x128>
+ 8001f32:	4b87      	ldr	r3, [pc, #540]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f34:	681b      	ldr	r3, [r3, #0]
+ 8001f36:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8001f3a:	2b00      	cmp	r3, #0
+ 8001f3c:	d06a      	beq.n	8002014 <HAL_RCC_OscConfig+0x128>
+ 8001f3e:	687b      	ldr	r3, [r7, #4]
+ 8001f40:	685b      	ldr	r3, [r3, #4]
+ 8001f42:	2b00      	cmp	r3, #0
+ 8001f44:	d166      	bne.n	8002014 <HAL_RCC_OscConfig+0x128>
       {
         return HAL_ERROR;
- 8001eda:	2301      	movs	r3, #1
- 8001edc:	e2f7      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8001f46:	2301      	movs	r3, #1
+ 8001f48:	e2f7      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       }
     }
     else
     {
       /* Set the new HSE configuration ---------------------------------------*/
       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 8001ede:	687b      	ldr	r3, [r7, #4]
- 8001ee0:	685b      	ldr	r3, [r3, #4]
- 8001ee2:	2b01      	cmp	r3, #1
- 8001ee4:	d106      	bne.n	8001ef4 <HAL_RCC_OscConfig+0x74>
- 8001ee6:	4b7f      	ldr	r3, [pc, #508]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001ee8:	681b      	ldr	r3, [r3, #0]
- 8001eea:	4a7e      	ldr	r2, [pc, #504]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001eec:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
- 8001ef0:	6013      	str	r3, [r2, #0]
- 8001ef2:	e02d      	b.n	8001f50 <HAL_RCC_OscConfig+0xd0>
- 8001ef4:	687b      	ldr	r3, [r7, #4]
- 8001ef6:	685b      	ldr	r3, [r3, #4]
- 8001ef8:	2b00      	cmp	r3, #0
- 8001efa:	d10c      	bne.n	8001f16 <HAL_RCC_OscConfig+0x96>
- 8001efc:	4b79      	ldr	r3, [pc, #484]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001efe:	681b      	ldr	r3, [r3, #0]
- 8001f00:	4a78      	ldr	r2, [pc, #480]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f02:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
- 8001f06:	6013      	str	r3, [r2, #0]
- 8001f08:	4b76      	ldr	r3, [pc, #472]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f0a:	681b      	ldr	r3, [r3, #0]
- 8001f0c:	4a75      	ldr	r2, [pc, #468]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f0e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
- 8001f12:	6013      	str	r3, [r2, #0]
- 8001f14:	e01c      	b.n	8001f50 <HAL_RCC_OscConfig+0xd0>
- 8001f16:	687b      	ldr	r3, [r7, #4]
- 8001f18:	685b      	ldr	r3, [r3, #4]
- 8001f1a:	2b05      	cmp	r3, #5
- 8001f1c:	d10c      	bne.n	8001f38 <HAL_RCC_OscConfig+0xb8>
- 8001f1e:	4b71      	ldr	r3, [pc, #452]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f20:	681b      	ldr	r3, [r3, #0]
- 8001f22:	4a70      	ldr	r2, [pc, #448]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f24:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
- 8001f28:	6013      	str	r3, [r2, #0]
- 8001f2a:	4b6e      	ldr	r3, [pc, #440]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f2c:	681b      	ldr	r3, [r3, #0]
- 8001f2e:	4a6d      	ldr	r2, [pc, #436]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f30:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
- 8001f34:	6013      	str	r3, [r2, #0]
- 8001f36:	e00b      	b.n	8001f50 <HAL_RCC_OscConfig+0xd0>
- 8001f38:	4b6a      	ldr	r3, [pc, #424]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f3a:	681b      	ldr	r3, [r3, #0]
- 8001f3c:	4a69      	ldr	r2, [pc, #420]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f3e:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
- 8001f42:	6013      	str	r3, [r2, #0]
- 8001f44:	4b67      	ldr	r3, [pc, #412]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f46:	681b      	ldr	r3, [r3, #0]
- 8001f48:	4a66      	ldr	r2, [pc, #408]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f4a:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
- 8001f4e:	6013      	str	r3, [r2, #0]
+ 8001f4a:	687b      	ldr	r3, [r7, #4]
+ 8001f4c:	685b      	ldr	r3, [r3, #4]
+ 8001f4e:	2b01      	cmp	r3, #1
+ 8001f50:	d106      	bne.n	8001f60 <HAL_RCC_OscConfig+0x74>
+ 8001f52:	4b7f      	ldr	r3, [pc, #508]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f54:	681b      	ldr	r3, [r3, #0]
+ 8001f56:	4a7e      	ldr	r2, [pc, #504]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f58:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 8001f5c:	6013      	str	r3, [r2, #0]
+ 8001f5e:	e02d      	b.n	8001fbc <HAL_RCC_OscConfig+0xd0>
+ 8001f60:	687b      	ldr	r3, [r7, #4]
+ 8001f62:	685b      	ldr	r3, [r3, #4]
+ 8001f64:	2b00      	cmp	r3, #0
+ 8001f66:	d10c      	bne.n	8001f82 <HAL_RCC_OscConfig+0x96>
+ 8001f68:	4b79      	ldr	r3, [pc, #484]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f6a:	681b      	ldr	r3, [r3, #0]
+ 8001f6c:	4a78      	ldr	r2, [pc, #480]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f6e:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 8001f72:	6013      	str	r3, [r2, #0]
+ 8001f74:	4b76      	ldr	r3, [pc, #472]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f76:	681b      	ldr	r3, [r3, #0]
+ 8001f78:	4a75      	ldr	r2, [pc, #468]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f7a:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
+ 8001f7e:	6013      	str	r3, [r2, #0]
+ 8001f80:	e01c      	b.n	8001fbc <HAL_RCC_OscConfig+0xd0>
+ 8001f82:	687b      	ldr	r3, [r7, #4]
+ 8001f84:	685b      	ldr	r3, [r3, #4]
+ 8001f86:	2b05      	cmp	r3, #5
+ 8001f88:	d10c      	bne.n	8001fa4 <HAL_RCC_OscConfig+0xb8>
+ 8001f8a:	4b71      	ldr	r3, [pc, #452]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f8c:	681b      	ldr	r3, [r3, #0]
+ 8001f8e:	4a70      	ldr	r2, [pc, #448]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f90:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
+ 8001f94:	6013      	str	r3, [r2, #0]
+ 8001f96:	4b6e      	ldr	r3, [pc, #440]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f98:	681b      	ldr	r3, [r3, #0]
+ 8001f9a:	4a6d      	ldr	r2, [pc, #436]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001f9c:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 8001fa0:	6013      	str	r3, [r2, #0]
+ 8001fa2:	e00b      	b.n	8001fbc <HAL_RCC_OscConfig+0xd0>
+ 8001fa4:	4b6a      	ldr	r3, [pc, #424]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001fa6:	681b      	ldr	r3, [r3, #0]
+ 8001fa8:	4a69      	ldr	r2, [pc, #420]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001faa:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 8001fae:	6013      	str	r3, [r2, #0]
+ 8001fb0:	4b67      	ldr	r3, [pc, #412]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001fb2:	681b      	ldr	r3, [r3, #0]
+ 8001fb4:	4a66      	ldr	r2, [pc, #408]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001fb6:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
+ 8001fba:	6013      	str	r3, [r2, #0]
 
       /* Check the HSE State */
       if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 8001f50:	687b      	ldr	r3, [r7, #4]
- 8001f52:	685b      	ldr	r3, [r3, #4]
- 8001f54:	2b00      	cmp	r3, #0
- 8001f56:	d013      	beq.n	8001f80 <HAL_RCC_OscConfig+0x100>
+ 8001fbc:	687b      	ldr	r3, [r7, #4]
+ 8001fbe:	685b      	ldr	r3, [r3, #4]
+ 8001fc0:	2b00      	cmp	r3, #0
+ 8001fc2:	d013      	beq.n	8001fec <HAL_RCC_OscConfig+0x100>
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8001f58:	f7fe fce0 	bl	800091c <HAL_GetTick>
- 8001f5c:	6138      	str	r0, [r7, #16]
+ 8001fc4:	f7fe fce0 	bl	8000988 <HAL_GetTick>
+ 8001fc8:	6138      	str	r0, [r7, #16]
 
         /* Wait till HSE is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 8001f5e:	e008      	b.n	8001f72 <HAL_RCC_OscConfig+0xf2>
+ 8001fca:	e008      	b.n	8001fde <HAL_RCC_OscConfig+0xf2>
         {
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 8001f60:	f7fe fcdc 	bl	800091c <HAL_GetTick>
- 8001f64:	4602      	mov	r2, r0
- 8001f66:	693b      	ldr	r3, [r7, #16]
- 8001f68:	1ad3      	subs	r3, r2, r3
- 8001f6a:	2b64      	cmp	r3, #100	@ 0x64
- 8001f6c:	d901      	bls.n	8001f72 <HAL_RCC_OscConfig+0xf2>
+ 8001fcc:	f7fe fcdc 	bl	8000988 <HAL_GetTick>
+ 8001fd0:	4602      	mov	r2, r0
+ 8001fd2:	693b      	ldr	r3, [r7, #16]
+ 8001fd4:	1ad3      	subs	r3, r2, r3
+ 8001fd6:	2b64      	cmp	r3, #100	@ 0x64
+ 8001fd8:	d901      	bls.n	8001fde <HAL_RCC_OscConfig+0xf2>
           {
             return HAL_TIMEOUT;
- 8001f6e:	2303      	movs	r3, #3
- 8001f70:	e2ad      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8001fda:	2303      	movs	r3, #3
+ 8001fdc:	e2ad      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 8001f72:	4b5c      	ldr	r3, [pc, #368]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f74:	681b      	ldr	r3, [r3, #0]
- 8001f76:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8001f7a:	2b00      	cmp	r3, #0
- 8001f7c:	d0f0      	beq.n	8001f60 <HAL_RCC_OscConfig+0xe0>
- 8001f7e:	e014      	b.n	8001faa <HAL_RCC_OscConfig+0x12a>
+ 8001fde:	4b5c      	ldr	r3, [pc, #368]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8001fe0:	681b      	ldr	r3, [r3, #0]
+ 8001fe2:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8001fe6:	2b00      	cmp	r3, #0
+ 8001fe8:	d0f0      	beq.n	8001fcc <HAL_RCC_OscConfig+0xe0>
+ 8001fea:	e014      	b.n	8002016 <HAL_RCC_OscConfig+0x12a>
         }
       }
       else
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8001f80:	f7fe fccc 	bl	800091c <HAL_GetTick>
- 8001f84:	6138      	str	r0, [r7, #16]
+ 8001fec:	f7fe fccc 	bl	8000988 <HAL_GetTick>
+ 8001ff0:	6138      	str	r0, [r7, #16]
 
         /* Wait till HSE is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 8001f86:	e008      	b.n	8001f9a <HAL_RCC_OscConfig+0x11a>
+ 8001ff2:	e008      	b.n	8002006 <HAL_RCC_OscConfig+0x11a>
         {
            if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 8001f88:	f7fe fcc8 	bl	800091c <HAL_GetTick>
- 8001f8c:	4602      	mov	r2, r0
- 8001f8e:	693b      	ldr	r3, [r7, #16]
- 8001f90:	1ad3      	subs	r3, r2, r3
- 8001f92:	2b64      	cmp	r3, #100	@ 0x64
- 8001f94:	d901      	bls.n	8001f9a <HAL_RCC_OscConfig+0x11a>
+ 8001ff4:	f7fe fcc8 	bl	8000988 <HAL_GetTick>
+ 8001ff8:	4602      	mov	r2, r0
+ 8001ffa:	693b      	ldr	r3, [r7, #16]
+ 8001ffc:	1ad3      	subs	r3, r2, r3
+ 8001ffe:	2b64      	cmp	r3, #100	@ 0x64
+ 8002000:	d901      	bls.n	8002006 <HAL_RCC_OscConfig+0x11a>
           {
             return HAL_TIMEOUT;
- 8001f96:	2303      	movs	r3, #3
- 8001f98:	e299      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002002:	2303      	movs	r3, #3
+ 8002004:	e299      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 8001f9a:	4b52      	ldr	r3, [pc, #328]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001f9c:	681b      	ldr	r3, [r3, #0]
- 8001f9e:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8001fa2:	2b00      	cmp	r3, #0
- 8001fa4:	d1f0      	bne.n	8001f88 <HAL_RCC_OscConfig+0x108>
- 8001fa6:	e000      	b.n	8001faa <HAL_RCC_OscConfig+0x12a>
+ 8002006:	4b52      	ldr	r3, [pc, #328]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8002008:	681b      	ldr	r3, [r3, #0]
+ 800200a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 800200e:	2b00      	cmp	r3, #0
+ 8002010:	d1f0      	bne.n	8001ff4 <HAL_RCC_OscConfig+0x108>
+ 8002012:	e000      	b.n	8002016 <HAL_RCC_OscConfig+0x12a>
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8001fa8:	bf00      	nop
+ 8002014:	bf00      	nop
         }
       }
     }
   }
   /*----------------------------- HSI Configuration --------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 8001faa:	687b      	ldr	r3, [r7, #4]
- 8001fac:	681b      	ldr	r3, [r3, #0]
- 8001fae:	f003 0302 	and.w	r3, r3, #2
- 8001fb2:	2b00      	cmp	r3, #0
- 8001fb4:	d05a      	beq.n	800206c <HAL_RCC_OscConfig+0x1ec>
+ 8002016:	687b      	ldr	r3, [r7, #4]
+ 8002018:	681b      	ldr	r3, [r3, #0]
+ 800201a:	f003 0302 	and.w	r3, r3, #2
+ 800201e:	2b00      	cmp	r3, #0
+ 8002020:	d05a      	beq.n	80020d8 <HAL_RCC_OscConfig+0x1ec>
     /* Check the parameters */
     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 
     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
     if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
- 8001fb6:	69bb      	ldr	r3, [r7, #24]
- 8001fb8:	2b04      	cmp	r3, #4
- 8001fba:	d005      	beq.n	8001fc8 <HAL_RCC_OscConfig+0x148>
+ 8002022:	69bb      	ldr	r3, [r7, #24]
+ 8002024:	2b04      	cmp	r3, #4
+ 8002026:	d005      	beq.n	8002034 <HAL_RCC_OscConfig+0x148>
        || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
- 8001fbc:	69bb      	ldr	r3, [r7, #24]
- 8001fbe:	2b0c      	cmp	r3, #12
- 8001fc0:	d119      	bne.n	8001ff6 <HAL_RCC_OscConfig+0x176>
- 8001fc2:	697b      	ldr	r3, [r7, #20]
- 8001fc4:	2b00      	cmp	r3, #0
- 8001fc6:	d116      	bne.n	8001ff6 <HAL_RCC_OscConfig+0x176>
+ 8002028:	69bb      	ldr	r3, [r7, #24]
+ 800202a:	2b0c      	cmp	r3, #12
+ 800202c:	d119      	bne.n	8002062 <HAL_RCC_OscConfig+0x176>
+ 800202e:	697b      	ldr	r3, [r7, #20]
+ 8002030:	2b00      	cmp	r3, #0
+ 8002032:	d116      	bne.n	8002062 <HAL_RCC_OscConfig+0x176>
     {
       /* When HSI is used as system clock it will not disabled */
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8001fc8:	4b46      	ldr	r3, [pc, #280]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001fca:	681b      	ldr	r3, [r3, #0]
- 8001fcc:	f003 0302 	and.w	r3, r3, #2
- 8001fd0:	2b00      	cmp	r3, #0
- 8001fd2:	d005      	beq.n	8001fe0 <HAL_RCC_OscConfig+0x160>
- 8001fd4:	687b      	ldr	r3, [r7, #4]
- 8001fd6:	68db      	ldr	r3, [r3, #12]
- 8001fd8:	2b01      	cmp	r3, #1
- 8001fda:	d001      	beq.n	8001fe0 <HAL_RCC_OscConfig+0x160>
+ 8002034:	4b46      	ldr	r3, [pc, #280]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8002036:	681b      	ldr	r3, [r3, #0]
+ 8002038:	f003 0302 	and.w	r3, r3, #2
+ 800203c:	2b00      	cmp	r3, #0
+ 800203e:	d005      	beq.n	800204c <HAL_RCC_OscConfig+0x160>
+ 8002040:	687b      	ldr	r3, [r7, #4]
+ 8002042:	68db      	ldr	r3, [r3, #12]
+ 8002044:	2b01      	cmp	r3, #1
+ 8002046:	d001      	beq.n	800204c <HAL_RCC_OscConfig+0x160>
       {
         return HAL_ERROR;
- 8001fdc:	2301      	movs	r3, #1
- 8001fde:	e276      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002048:	2301      	movs	r3, #1
+ 800204a:	e276      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       }
       /* Otherwise, just the calibration is allowed */
       else
       {
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8001fe0:	4b40      	ldr	r3, [pc, #256]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001fe2:	685b      	ldr	r3, [r3, #4]
- 8001fe4:	f423 52f8 	bic.w	r2, r3, #7936	@ 0x1f00
- 8001fe8:	687b      	ldr	r3, [r7, #4]
- 8001fea:	691b      	ldr	r3, [r3, #16]
- 8001fec:	021b      	lsls	r3, r3, #8
- 8001fee:	493d      	ldr	r1, [pc, #244]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8001ff0:	4313      	orrs	r3, r2
- 8001ff2:	604b      	str	r3, [r1, #4]
+ 800204c:	4b40      	ldr	r3, [pc, #256]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800204e:	685b      	ldr	r3, [r3, #4]
+ 8002050:	f423 52f8 	bic.w	r2, r3, #7936	@ 0x1f00
+ 8002054:	687b      	ldr	r3, [r7, #4]
+ 8002056:	691b      	ldr	r3, [r3, #16]
+ 8002058:	021b      	lsls	r3, r3, #8
+ 800205a:	493d      	ldr	r1, [pc, #244]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800205c:	4313      	orrs	r3, r2
+ 800205e:	604b      	str	r3, [r1, #4]
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8001ff4:	e03a      	b.n	800206c <HAL_RCC_OscConfig+0x1ec>
+ 8002060:	e03a      	b.n	80020d8 <HAL_RCC_OscConfig+0x1ec>
       }
     }
     else
     {
       /* Check the HSI State */
       if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
- 8001ff6:	687b      	ldr	r3, [r7, #4]
- 8001ff8:	68db      	ldr	r3, [r3, #12]
- 8001ffa:	2b00      	cmp	r3, #0
- 8001ffc:	d020      	beq.n	8002040 <HAL_RCC_OscConfig+0x1c0>
+ 8002062:	687b      	ldr	r3, [r7, #4]
+ 8002064:	68db      	ldr	r3, [r3, #12]
+ 8002066:	2b00      	cmp	r3, #0
+ 8002068:	d020      	beq.n	80020ac <HAL_RCC_OscConfig+0x1c0>
       {
         /* Enable the Internal High Speed oscillator (HSI). */
         __HAL_RCC_HSI_ENABLE();
- 8001ffe:	4b3a      	ldr	r3, [pc, #232]	@ (80020e8 <HAL_RCC_OscConfig+0x268>)
- 8002000:	2201      	movs	r2, #1
- 8002002:	601a      	str	r2, [r3, #0]
+ 800206a:	4b3a      	ldr	r3, [pc, #232]	@ (8002154 <HAL_RCC_OscConfig+0x268>)
+ 800206c:	2201      	movs	r2, #1
+ 800206e:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002004:	f7fe fc8a 	bl	800091c <HAL_GetTick>
- 8002008:	6138      	str	r0, [r7, #16]
+ 8002070:	f7fe fc8a 	bl	8000988 <HAL_GetTick>
+ 8002074:	6138      	str	r0, [r7, #16]
 
         /* Wait till HSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800200a:	e008      	b.n	800201e <HAL_RCC_OscConfig+0x19e>
+ 8002076:	e008      	b.n	800208a <HAL_RCC_OscConfig+0x19e>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 800200c:	f7fe fc86 	bl	800091c <HAL_GetTick>
- 8002010:	4602      	mov	r2, r0
- 8002012:	693b      	ldr	r3, [r7, #16]
- 8002014:	1ad3      	subs	r3, r2, r3
- 8002016:	2b02      	cmp	r3, #2
- 8002018:	d901      	bls.n	800201e <HAL_RCC_OscConfig+0x19e>
+ 8002078:	f7fe fc86 	bl	8000988 <HAL_GetTick>
+ 800207c:	4602      	mov	r2, r0
+ 800207e:	693b      	ldr	r3, [r7, #16]
+ 8002080:	1ad3      	subs	r3, r2, r3
+ 8002082:	2b02      	cmp	r3, #2
+ 8002084:	d901      	bls.n	800208a <HAL_RCC_OscConfig+0x19e>
           {
             return HAL_TIMEOUT;
- 800201a:	2303      	movs	r3, #3
- 800201c:	e257      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002086:	2303      	movs	r3, #3
+ 8002088:	e257      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800201e:	4b31      	ldr	r3, [pc, #196]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8002020:	681b      	ldr	r3, [r3, #0]
- 8002022:	f003 0302 	and.w	r3, r3, #2
- 8002026:	2b00      	cmp	r3, #0
- 8002028:	d0f0      	beq.n	800200c <HAL_RCC_OscConfig+0x18c>
+ 800208a:	4b31      	ldr	r3, [pc, #196]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800208c:	681b      	ldr	r3, [r3, #0]
+ 800208e:	f003 0302 	and.w	r3, r3, #2
+ 8002092:	2b00      	cmp	r3, #0
+ 8002094:	d0f0      	beq.n	8002078 <HAL_RCC_OscConfig+0x18c>
           }
         }
 
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 800202a:	4b2e      	ldr	r3, [pc, #184]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 800202c:	685b      	ldr	r3, [r3, #4]
- 800202e:	f423 52f8 	bic.w	r2, r3, #7936	@ 0x1f00
- 8002032:	687b      	ldr	r3, [r7, #4]
- 8002034:	691b      	ldr	r3, [r3, #16]
- 8002036:	021b      	lsls	r3, r3, #8
- 8002038:	492a      	ldr	r1, [pc, #168]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 800203a:	4313      	orrs	r3, r2
- 800203c:	604b      	str	r3, [r1, #4]
- 800203e:	e015      	b.n	800206c <HAL_RCC_OscConfig+0x1ec>
+ 8002096:	4b2e      	ldr	r3, [pc, #184]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8002098:	685b      	ldr	r3, [r3, #4]
+ 800209a:	f423 52f8 	bic.w	r2, r3, #7936	@ 0x1f00
+ 800209e:	687b      	ldr	r3, [r7, #4]
+ 80020a0:	691b      	ldr	r3, [r3, #16]
+ 80020a2:	021b      	lsls	r3, r3, #8
+ 80020a4:	492a      	ldr	r1, [pc, #168]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 80020a6:	4313      	orrs	r3, r2
+ 80020a8:	604b      	str	r3, [r1, #4]
+ 80020aa:	e015      	b.n	80020d8 <HAL_RCC_OscConfig+0x1ec>
       }
       else
       {
         /* Disable the Internal High Speed oscillator (HSI). */
         __HAL_RCC_HSI_DISABLE();
- 8002040:	4b29      	ldr	r3, [pc, #164]	@ (80020e8 <HAL_RCC_OscConfig+0x268>)
- 8002042:	2200      	movs	r2, #0
- 8002044:	601a      	str	r2, [r3, #0]
+ 80020ac:	4b29      	ldr	r3, [pc, #164]	@ (8002154 <HAL_RCC_OscConfig+0x268>)
+ 80020ae:	2200      	movs	r2, #0
+ 80020b0:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002046:	f7fe fc69 	bl	800091c <HAL_GetTick>
- 800204a:	6138      	str	r0, [r7, #16]
+ 80020b2:	f7fe fc69 	bl	8000988 <HAL_GetTick>
+ 80020b6:	6138      	str	r0, [r7, #16]
 
         /* Wait till HSI is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 800204c:	e008      	b.n	8002060 <HAL_RCC_OscConfig+0x1e0>
+ 80020b8:	e008      	b.n	80020cc <HAL_RCC_OscConfig+0x1e0>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 800204e:	f7fe fc65 	bl	800091c <HAL_GetTick>
- 8002052:	4602      	mov	r2, r0
- 8002054:	693b      	ldr	r3, [r7, #16]
- 8002056:	1ad3      	subs	r3, r2, r3
- 8002058:	2b02      	cmp	r3, #2
- 800205a:	d901      	bls.n	8002060 <HAL_RCC_OscConfig+0x1e0>
+ 80020ba:	f7fe fc65 	bl	8000988 <HAL_GetTick>
+ 80020be:	4602      	mov	r2, r0
+ 80020c0:	693b      	ldr	r3, [r7, #16]
+ 80020c2:	1ad3      	subs	r3, r2, r3
+ 80020c4:	2b02      	cmp	r3, #2
+ 80020c6:	d901      	bls.n	80020cc <HAL_RCC_OscConfig+0x1e0>
           {
             return HAL_TIMEOUT;
- 800205c:	2303      	movs	r3, #3
- 800205e:	e236      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80020c8:	2303      	movs	r3, #3
+ 80020ca:	e236      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 8002060:	4b20      	ldr	r3, [pc, #128]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8002062:	681b      	ldr	r3, [r3, #0]
- 8002064:	f003 0302 	and.w	r3, r3, #2
- 8002068:	2b00      	cmp	r3, #0
- 800206a:	d1f0      	bne.n	800204e <HAL_RCC_OscConfig+0x1ce>
+ 80020cc:	4b20      	ldr	r3, [pc, #128]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 80020ce:	681b      	ldr	r3, [r3, #0]
+ 80020d0:	f003 0302 	and.w	r3, r3, #2
+ 80020d4:	2b00      	cmp	r3, #0
+ 80020d6:	d1f0      	bne.n	80020ba <HAL_RCC_OscConfig+0x1ce>
         }
       }
     }
   }
   /*----------------------------- MSI Configuration --------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
- 800206c:	687b      	ldr	r3, [r7, #4]
- 800206e:	681b      	ldr	r3, [r3, #0]
- 8002070:	f003 0310 	and.w	r3, r3, #16
- 8002074:	2b00      	cmp	r3, #0
- 8002076:	f000 80b8 	beq.w	80021ea <HAL_RCC_OscConfig+0x36a>
+ 80020d8:	687b      	ldr	r3, [r7, #4]
+ 80020da:	681b      	ldr	r3, [r3, #0]
+ 80020dc:	f003 0310 	and.w	r3, r3, #16
+ 80020e0:	2b00      	cmp	r3, #0
+ 80020e2:	f000 80b8 	beq.w	8002256 <HAL_RCC_OscConfig+0x36a>
   {
     /* When the MSI is used as system clock it will not be disabled */
     if(sysclk_source == RCC_CFGR_SWS_MSI)
- 800207a:	69bb      	ldr	r3, [r7, #24]
- 800207c:	2b00      	cmp	r3, #0
- 800207e:	d170      	bne.n	8002162 <HAL_RCC_OscConfig+0x2e2>
+ 80020e6:	69bb      	ldr	r3, [r7, #24]
+ 80020e8:	2b00      	cmp	r3, #0
+ 80020ea:	d170      	bne.n	80021ce <HAL_RCC_OscConfig+0x2e2>
     {
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
- 8002080:	4b18      	ldr	r3, [pc, #96]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 8002082:	681b      	ldr	r3, [r3, #0]
- 8002084:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 8002088:	2b00      	cmp	r3, #0
- 800208a:	d005      	beq.n	8002098 <HAL_RCC_OscConfig+0x218>
- 800208c:	687b      	ldr	r3, [r7, #4]
- 800208e:	699b      	ldr	r3, [r3, #24]
- 8002090:	2b00      	cmp	r3, #0
- 8002092:	d101      	bne.n	8002098 <HAL_RCC_OscConfig+0x218>
+ 80020ec:	4b18      	ldr	r3, [pc, #96]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 80020ee:	681b      	ldr	r3, [r3, #0]
+ 80020f0:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 80020f4:	2b00      	cmp	r3, #0
+ 80020f6:	d005      	beq.n	8002104 <HAL_RCC_OscConfig+0x218>
+ 80020f8:	687b      	ldr	r3, [r7, #4]
+ 80020fa:	699b      	ldr	r3, [r3, #24]
+ 80020fc:	2b00      	cmp	r3, #0
+ 80020fe:	d101      	bne.n	8002104 <HAL_RCC_OscConfig+0x218>
       {
         return HAL_ERROR;
- 8002094:	2301      	movs	r3, #1
- 8002096:	e21a      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002100:	2301      	movs	r3, #1
+ 8002102:	e21a      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
 
         /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
            must be correctly programmed according to the frequency of the CPU clock
            (HCLK) and the supply voltage of the device. */
         if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE())
- 8002098:	687b      	ldr	r3, [r7, #4]
- 800209a:	6a1a      	ldr	r2, [r3, #32]
- 800209c:	4b11      	ldr	r3, [pc, #68]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 800209e:	685b      	ldr	r3, [r3, #4]
- 80020a0:	f403 4360 	and.w	r3, r3, #57344	@ 0xe000
- 80020a4:	429a      	cmp	r2, r3
- 80020a6:	d921      	bls.n	80020ec <HAL_RCC_OscConfig+0x26c>
+ 8002104:	687b      	ldr	r3, [r7, #4]
+ 8002106:	6a1a      	ldr	r2, [r3, #32]
+ 8002108:	4b11      	ldr	r3, [pc, #68]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800210a:	685b      	ldr	r3, [r3, #4]
+ 800210c:	f403 4360 	and.w	r3, r3, #57344	@ 0xe000
+ 8002110:	429a      	cmp	r2, r3
+ 8002112:	d921      	bls.n	8002158 <HAL_RCC_OscConfig+0x26c>
         {
           /* First increase number of wait states update if necessary */
           if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
- 80020a8:	687b      	ldr	r3, [r7, #4]
- 80020aa:	6a1b      	ldr	r3, [r3, #32]
- 80020ac:	4618      	mov	r0, r3
- 80020ae:	f000 fc27 	bl	8002900 <RCC_SetFlashLatencyFromMSIRange>
- 80020b2:	4603      	mov	r3, r0
- 80020b4:	2b00      	cmp	r3, #0
- 80020b6:	d001      	beq.n	80020bc <HAL_RCC_OscConfig+0x23c>
+ 8002114:	687b      	ldr	r3, [r7, #4]
+ 8002116:	6a1b      	ldr	r3, [r3, #32]
+ 8002118:	4618      	mov	r0, r3
+ 800211a:	f000 fc27 	bl	800296c <RCC_SetFlashLatencyFromMSIRange>
+ 800211e:	4603      	mov	r3, r0
+ 8002120:	2b00      	cmp	r3, #0
+ 8002122:	d001      	beq.n	8002128 <HAL_RCC_OscConfig+0x23c>
           {
             return HAL_ERROR;
- 80020b8:	2301      	movs	r3, #1
- 80020ba:	e208      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002124:	2301      	movs	r3, #1
+ 8002126:	e208      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
           }
 
           /* Selects the Multiple Speed oscillator (MSI) clock range .*/
           __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
- 80020bc:	4b09      	ldr	r3, [pc, #36]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 80020be:	685b      	ldr	r3, [r3, #4]
- 80020c0:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
- 80020c4:	687b      	ldr	r3, [r7, #4]
- 80020c6:	6a1b      	ldr	r3, [r3, #32]
- 80020c8:	4906      	ldr	r1, [pc, #24]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 80020ca:	4313      	orrs	r3, r2
- 80020cc:	604b      	str	r3, [r1, #4]
+ 8002128:	4b09      	ldr	r3, [pc, #36]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800212a:	685b      	ldr	r3, [r3, #4]
+ 800212c:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
+ 8002130:	687b      	ldr	r3, [r7, #4]
+ 8002132:	6a1b      	ldr	r3, [r3, #32]
+ 8002134:	4906      	ldr	r1, [pc, #24]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 8002136:	4313      	orrs	r3, r2
+ 8002138:	604b      	str	r3, [r1, #4]
           /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
           __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
- 80020ce:	4b05      	ldr	r3, [pc, #20]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 80020d0:	685b      	ldr	r3, [r3, #4]
- 80020d2:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
- 80020d6:	687b      	ldr	r3, [r7, #4]
- 80020d8:	69db      	ldr	r3, [r3, #28]
- 80020da:	061b      	lsls	r3, r3, #24
- 80020dc:	4901      	ldr	r1, [pc, #4]	@ (80020e4 <HAL_RCC_OscConfig+0x264>)
- 80020de:	4313      	orrs	r3, r2
- 80020e0:	604b      	str	r3, [r1, #4]
- 80020e2:	e020      	b.n	8002126 <HAL_RCC_OscConfig+0x2a6>
- 80020e4:	40023800 	.word	0x40023800
- 80020e8:	42470000 	.word	0x42470000
+ 800213a:	4b05      	ldr	r3, [pc, #20]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800213c:	685b      	ldr	r3, [r3, #4]
+ 800213e:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
+ 8002142:	687b      	ldr	r3, [r7, #4]
+ 8002144:	69db      	ldr	r3, [r3, #28]
+ 8002146:	061b      	lsls	r3, r3, #24
+ 8002148:	4901      	ldr	r1, [pc, #4]	@ (8002150 <HAL_RCC_OscConfig+0x264>)
+ 800214a:	4313      	orrs	r3, r2
+ 800214c:	604b      	str	r3, [r1, #4]
+ 800214e:	e020      	b.n	8002192 <HAL_RCC_OscConfig+0x2a6>
+ 8002150:	40023800 	.word	0x40023800
+ 8002154:	42470000 	.word	0x42470000
         }
         else
         {
           /* Else, keep current flash latency while decreasing applies */
           /* Selects the Multiple Speed oscillator (MSI) clock range .*/
           __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
- 80020ec:	4b99      	ldr	r3, [pc, #612]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80020ee:	685b      	ldr	r3, [r3, #4]
- 80020f0:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
- 80020f4:	687b      	ldr	r3, [r7, #4]
- 80020f6:	6a1b      	ldr	r3, [r3, #32]
- 80020f8:	4996      	ldr	r1, [pc, #600]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80020fa:	4313      	orrs	r3, r2
- 80020fc:	604b      	str	r3, [r1, #4]
+ 8002158:	4b99      	ldr	r3, [pc, #612]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800215a:	685b      	ldr	r3, [r3, #4]
+ 800215c:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
+ 8002160:	687b      	ldr	r3, [r7, #4]
+ 8002162:	6a1b      	ldr	r3, [r3, #32]
+ 8002164:	4996      	ldr	r1, [pc, #600]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002166:	4313      	orrs	r3, r2
+ 8002168:	604b      	str	r3, [r1, #4]
           /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
           __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
- 80020fe:	4b95      	ldr	r3, [pc, #596]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002100:	685b      	ldr	r3, [r3, #4]
- 8002102:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
- 8002106:	687b      	ldr	r3, [r7, #4]
- 8002108:	69db      	ldr	r3, [r3, #28]
- 800210a:	061b      	lsls	r3, r3, #24
- 800210c:	4991      	ldr	r1, [pc, #580]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800210e:	4313      	orrs	r3, r2
- 8002110:	604b      	str	r3, [r1, #4]
+ 800216a:	4b95      	ldr	r3, [pc, #596]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800216c:	685b      	ldr	r3, [r3, #4]
+ 800216e:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
+ 8002172:	687b      	ldr	r3, [r7, #4]
+ 8002174:	69db      	ldr	r3, [r3, #28]
+ 8002176:	061b      	lsls	r3, r3, #24
+ 8002178:	4991      	ldr	r1, [pc, #580]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800217a:	4313      	orrs	r3, r2
+ 800217c:	604b      	str	r3, [r1, #4]
 
           /* Decrease number of wait states update if necessary */
           if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
- 8002112:	687b      	ldr	r3, [r7, #4]
- 8002114:	6a1b      	ldr	r3, [r3, #32]
- 8002116:	4618      	mov	r0, r3
- 8002118:	f000 fbf2 	bl	8002900 <RCC_SetFlashLatencyFromMSIRange>
- 800211c:	4603      	mov	r3, r0
- 800211e:	2b00      	cmp	r3, #0
- 8002120:	d001      	beq.n	8002126 <HAL_RCC_OscConfig+0x2a6>
+ 800217e:	687b      	ldr	r3, [r7, #4]
+ 8002180:	6a1b      	ldr	r3, [r3, #32]
+ 8002182:	4618      	mov	r0, r3
+ 8002184:	f000 fbf2 	bl	800296c <RCC_SetFlashLatencyFromMSIRange>
+ 8002188:	4603      	mov	r3, r0
+ 800218a:	2b00      	cmp	r3, #0
+ 800218c:	d001      	beq.n	8002192 <HAL_RCC_OscConfig+0x2a6>
           {
             return HAL_ERROR;
- 8002122:	2301      	movs	r3, #1
- 8002124:	e1d3      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 800218e:	2301      	movs	r3, #1
+ 8002190:	e1d3      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
           }
         }
 
         /* Update the SystemCoreClock global variable */
         SystemCoreClock =  (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
- 8002126:	687b      	ldr	r3, [r7, #4]
- 8002128:	6a1b      	ldr	r3, [r3, #32]
- 800212a:	0b5b      	lsrs	r3, r3, #13
- 800212c:	3301      	adds	r3, #1
- 800212e:	f44f 4200 	mov.w	r2, #32768	@ 0x8000
- 8002132:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002192:	687b      	ldr	r3, [r7, #4]
+ 8002194:	6a1b      	ldr	r3, [r3, #32]
+ 8002196:	0b5b      	lsrs	r3, r3, #13
+ 8002198:	3301      	adds	r3, #1
+ 800219a:	f44f 4200 	mov.w	r2, #32768	@ 0x8000
+ 800219e:	fa02 f303 	lsl.w	r3, r2, r3
                            >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
- 8002136:	4a87      	ldr	r2, [pc, #540]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002138:	6892      	ldr	r2, [r2, #8]
- 800213a:	0912      	lsrs	r2, r2, #4
- 800213c:	f002 020f 	and.w	r2, r2, #15
- 8002140:	4985      	ldr	r1, [pc, #532]	@ (8002358 <HAL_RCC_OscConfig+0x4d8>)
- 8002142:	5c8a      	ldrb	r2, [r1, r2]
- 8002144:	40d3      	lsrs	r3, r2
+ 80021a2:	4a87      	ldr	r2, [pc, #540]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80021a4:	6892      	ldr	r2, [r2, #8]
+ 80021a6:	0912      	lsrs	r2, r2, #4
+ 80021a8:	f002 020f 	and.w	r2, r2, #15
+ 80021ac:	4985      	ldr	r1, [pc, #532]	@ (80023c4 <HAL_RCC_OscConfig+0x4d8>)
+ 80021ae:	5c8a      	ldrb	r2, [r1, r2]
+ 80021b0:	40d3      	lsrs	r3, r2
         SystemCoreClock =  (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
- 8002146:	4a85      	ldr	r2, [pc, #532]	@ (800235c <HAL_RCC_OscConfig+0x4dc>)
- 8002148:	6013      	str	r3, [r2, #0]
+ 80021b2:	4a85      	ldr	r2, [pc, #532]	@ (80023c8 <HAL_RCC_OscConfig+0x4dc>)
+ 80021b4:	6013      	str	r3, [r2, #0]
 
         /* Configure the source of time base considering new system clocks settings*/
         status = HAL_InitTick(uwTickPrio);
- 800214a:	4b85      	ldr	r3, [pc, #532]	@ (8002360 <HAL_RCC_OscConfig+0x4e0>)
- 800214c:	681b      	ldr	r3, [r3, #0]
- 800214e:	4618      	mov	r0, r3
- 8002150:	f7fe fb98 	bl	8000884 <HAL_InitTick>
- 8002154:	4603      	mov	r3, r0
- 8002156:	73fb      	strb	r3, [r7, #15]
+ 80021b6:	4b85      	ldr	r3, [pc, #532]	@ (80023cc <HAL_RCC_OscConfig+0x4e0>)
+ 80021b8:	681b      	ldr	r3, [r3, #0]
+ 80021ba:	4618      	mov	r0, r3
+ 80021bc:	f7fe fb98 	bl	80008f0 <HAL_InitTick>
+ 80021c0:	4603      	mov	r3, r0
+ 80021c2:	73fb      	strb	r3, [r7, #15]
         if(status != HAL_OK)
- 8002158:	7bfb      	ldrb	r3, [r7, #15]
- 800215a:	2b00      	cmp	r3, #0
- 800215c:	d045      	beq.n	80021ea <HAL_RCC_OscConfig+0x36a>
+ 80021c4:	7bfb      	ldrb	r3, [r7, #15]
+ 80021c6:	2b00      	cmp	r3, #0
+ 80021c8:	d045      	beq.n	8002256 <HAL_RCC_OscConfig+0x36a>
         {
           return status;
- 800215e:	7bfb      	ldrb	r3, [r7, #15]
- 8002160:	e1b5      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80021ca:	7bfb      	ldrb	r3, [r7, #15]
+ 80021cc:	e1b5      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
     {
       /* Check MSI State */
       assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
 
       /* Check the MSI State */
       if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
- 8002162:	687b      	ldr	r3, [r7, #4]
- 8002164:	699b      	ldr	r3, [r3, #24]
- 8002166:	2b00      	cmp	r3, #0
- 8002168:	d029      	beq.n	80021be <HAL_RCC_OscConfig+0x33e>
+ 80021ce:	687b      	ldr	r3, [r7, #4]
+ 80021d0:	699b      	ldr	r3, [r3, #24]
+ 80021d2:	2b00      	cmp	r3, #0
+ 80021d4:	d029      	beq.n	800222a <HAL_RCC_OscConfig+0x33e>
       {
         /* Enable the Multi Speed oscillator (MSI). */
         __HAL_RCC_MSI_ENABLE();
- 800216a:	4b7e      	ldr	r3, [pc, #504]	@ (8002364 <HAL_RCC_OscConfig+0x4e4>)
- 800216c:	2201      	movs	r2, #1
- 800216e:	601a      	str	r2, [r3, #0]
+ 80021d6:	4b7e      	ldr	r3, [pc, #504]	@ (80023d0 <HAL_RCC_OscConfig+0x4e4>)
+ 80021d8:	2201      	movs	r2, #1
+ 80021da:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002170:	f7fe fbd4 	bl	800091c <HAL_GetTick>
- 8002174:	6138      	str	r0, [r7, #16]
+ 80021dc:	f7fe fbd4 	bl	8000988 <HAL_GetTick>
+ 80021e0:	6138      	str	r0, [r7, #16]
 
         /* Wait till MSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 8002176:	e008      	b.n	800218a <HAL_RCC_OscConfig+0x30a>
+ 80021e2:	e008      	b.n	80021f6 <HAL_RCC_OscConfig+0x30a>
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
- 8002178:	f7fe fbd0 	bl	800091c <HAL_GetTick>
- 800217c:	4602      	mov	r2, r0
- 800217e:	693b      	ldr	r3, [r7, #16]
- 8002180:	1ad3      	subs	r3, r2, r3
- 8002182:	2b02      	cmp	r3, #2
- 8002184:	d901      	bls.n	800218a <HAL_RCC_OscConfig+0x30a>
+ 80021e4:	f7fe fbd0 	bl	8000988 <HAL_GetTick>
+ 80021e8:	4602      	mov	r2, r0
+ 80021ea:	693b      	ldr	r3, [r7, #16]
+ 80021ec:	1ad3      	subs	r3, r2, r3
+ 80021ee:	2b02      	cmp	r3, #2
+ 80021f0:	d901      	bls.n	80021f6 <HAL_RCC_OscConfig+0x30a>
           {
             return HAL_TIMEOUT;
- 8002186:	2303      	movs	r3, #3
- 8002188:	e1a1      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80021f2:	2303      	movs	r3, #3
+ 80021f4:	e1a1      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 800218a:	4b72      	ldr	r3, [pc, #456]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800218c:	681b      	ldr	r3, [r3, #0]
- 800218e:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 8002192:	2b00      	cmp	r3, #0
- 8002194:	d0f0      	beq.n	8002178 <HAL_RCC_OscConfig+0x2f8>
+ 80021f6:	4b72      	ldr	r3, [pc, #456]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80021f8:	681b      	ldr	r3, [r3, #0]
+ 80021fa:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 80021fe:	2b00      	cmp	r3, #0
+ 8002200:	d0f0      	beq.n	80021e4 <HAL_RCC_OscConfig+0x2f8>
         /* Check MSICalibrationValue and MSIClockRange input parameters */
         assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
         assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
 
         /* Selects the Multiple Speed oscillator (MSI) clock range .*/
         __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
- 8002196:	4b6f      	ldr	r3, [pc, #444]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002198:	685b      	ldr	r3, [r3, #4]
- 800219a:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
- 800219e:	687b      	ldr	r3, [r7, #4]
- 80021a0:	6a1b      	ldr	r3, [r3, #32]
- 80021a2:	496c      	ldr	r1, [pc, #432]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80021a4:	4313      	orrs	r3, r2
- 80021a6:	604b      	str	r3, [r1, #4]
+ 8002202:	4b6f      	ldr	r3, [pc, #444]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002204:	685b      	ldr	r3, [r3, #4]
+ 8002206:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
+ 800220a:	687b      	ldr	r3, [r7, #4]
+ 800220c:	6a1b      	ldr	r3, [r3, #32]
+ 800220e:	496c      	ldr	r1, [pc, #432]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002210:	4313      	orrs	r3, r2
+ 8002212:	604b      	str	r3, [r1, #4]
          /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
         __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
- 80021a8:	4b6a      	ldr	r3, [pc, #424]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80021aa:	685b      	ldr	r3, [r3, #4]
- 80021ac:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
- 80021b0:	687b      	ldr	r3, [r7, #4]
- 80021b2:	69db      	ldr	r3, [r3, #28]
- 80021b4:	061b      	lsls	r3, r3, #24
- 80021b6:	4967      	ldr	r1, [pc, #412]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80021b8:	4313      	orrs	r3, r2
- 80021ba:	604b      	str	r3, [r1, #4]
- 80021bc:	e015      	b.n	80021ea <HAL_RCC_OscConfig+0x36a>
+ 8002214:	4b6a      	ldr	r3, [pc, #424]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002216:	685b      	ldr	r3, [r3, #4]
+ 8002218:	f023 427f 	bic.w	r2, r3, #4278190080	@ 0xff000000
+ 800221c:	687b      	ldr	r3, [r7, #4]
+ 800221e:	69db      	ldr	r3, [r3, #28]
+ 8002220:	061b      	lsls	r3, r3, #24
+ 8002222:	4967      	ldr	r1, [pc, #412]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002224:	4313      	orrs	r3, r2
+ 8002226:	604b      	str	r3, [r1, #4]
+ 8002228:	e015      	b.n	8002256 <HAL_RCC_OscConfig+0x36a>
 
       }
       else
       {
         /* Disable the Multi Speed oscillator (MSI). */
         __HAL_RCC_MSI_DISABLE();
- 80021be:	4b69      	ldr	r3, [pc, #420]	@ (8002364 <HAL_RCC_OscConfig+0x4e4>)
- 80021c0:	2200      	movs	r2, #0
- 80021c2:	601a      	str	r2, [r3, #0]
+ 800222a:	4b69      	ldr	r3, [pc, #420]	@ (80023d0 <HAL_RCC_OscConfig+0x4e4>)
+ 800222c:	2200      	movs	r2, #0
+ 800222e:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80021c4:	f7fe fbaa 	bl	800091c <HAL_GetTick>
- 80021c8:	6138      	str	r0, [r7, #16]
+ 8002230:	f7fe fbaa 	bl	8000988 <HAL_GetTick>
+ 8002234:	6138      	str	r0, [r7, #16]
 
         /* Wait till MSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
- 80021ca:	e008      	b.n	80021de <HAL_RCC_OscConfig+0x35e>
+ 8002236:	e008      	b.n	800224a <HAL_RCC_OscConfig+0x35e>
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
- 80021cc:	f7fe fba6 	bl	800091c <HAL_GetTick>
- 80021d0:	4602      	mov	r2, r0
- 80021d2:	693b      	ldr	r3, [r7, #16]
- 80021d4:	1ad3      	subs	r3, r2, r3
- 80021d6:	2b02      	cmp	r3, #2
- 80021d8:	d901      	bls.n	80021de <HAL_RCC_OscConfig+0x35e>
+ 8002238:	f7fe fba6 	bl	8000988 <HAL_GetTick>
+ 800223c:	4602      	mov	r2, r0
+ 800223e:	693b      	ldr	r3, [r7, #16]
+ 8002240:	1ad3      	subs	r3, r2, r3
+ 8002242:	2b02      	cmp	r3, #2
+ 8002244:	d901      	bls.n	800224a <HAL_RCC_OscConfig+0x35e>
           {
             return HAL_TIMEOUT;
- 80021da:	2303      	movs	r3, #3
- 80021dc:	e177      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002246:	2303      	movs	r3, #3
+ 8002248:	e177      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
- 80021de:	4b5d      	ldr	r3, [pc, #372]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80021e0:	681b      	ldr	r3, [r3, #0]
- 80021e2:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 80021e6:	2b00      	cmp	r3, #0
- 80021e8:	d1f0      	bne.n	80021cc <HAL_RCC_OscConfig+0x34c>
+ 800224a:	4b5d      	ldr	r3, [pc, #372]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800224c:	681b      	ldr	r3, [r3, #0]
+ 800224e:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 8002252:	2b00      	cmp	r3, #0
+ 8002254:	d1f0      	bne.n	8002238 <HAL_RCC_OscConfig+0x34c>
         }
       }
     }
   }
   /*------------------------------ LSI Configuration -------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 80021ea:	687b      	ldr	r3, [r7, #4]
- 80021ec:	681b      	ldr	r3, [r3, #0]
- 80021ee:	f003 0308 	and.w	r3, r3, #8
- 80021f2:	2b00      	cmp	r3, #0
- 80021f4:	d030      	beq.n	8002258 <HAL_RCC_OscConfig+0x3d8>
+ 8002256:	687b      	ldr	r3, [r7, #4]
+ 8002258:	681b      	ldr	r3, [r3, #0]
+ 800225a:	f003 0308 	and.w	r3, r3, #8
+ 800225e:	2b00      	cmp	r3, #0
+ 8002260:	d030      	beq.n	80022c4 <HAL_RCC_OscConfig+0x3d8>
   {
     /* Check the parameters */
     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 
     /* Check the LSI State */
     if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
- 80021f6:	687b      	ldr	r3, [r7, #4]
- 80021f8:	695b      	ldr	r3, [r3, #20]
- 80021fa:	2b00      	cmp	r3, #0
- 80021fc:	d016      	beq.n	800222c <HAL_RCC_OscConfig+0x3ac>
+ 8002262:	687b      	ldr	r3, [r7, #4]
+ 8002264:	695b      	ldr	r3, [r3, #20]
+ 8002266:	2b00      	cmp	r3, #0
+ 8002268:	d016      	beq.n	8002298 <HAL_RCC_OscConfig+0x3ac>
     {
       /* Enable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_ENABLE();
- 80021fe:	4b5a      	ldr	r3, [pc, #360]	@ (8002368 <HAL_RCC_OscConfig+0x4e8>)
- 8002200:	2201      	movs	r2, #1
- 8002202:	601a      	str	r2, [r3, #0]
+ 800226a:	4b5a      	ldr	r3, [pc, #360]	@ (80023d4 <HAL_RCC_OscConfig+0x4e8>)
+ 800226c:	2201      	movs	r2, #1
+ 800226e:	601a      	str	r2, [r3, #0]
 
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8002204:	f7fe fb8a 	bl	800091c <HAL_GetTick>
- 8002208:	6138      	str	r0, [r7, #16]
+ 8002270:	f7fe fb8a 	bl	8000988 <HAL_GetTick>
+ 8002274:	6138      	str	r0, [r7, #16]
 
       /* Wait till LSI is ready */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 800220a:	e008      	b.n	800221e <HAL_RCC_OscConfig+0x39e>
+ 8002276:	e008      	b.n	800228a <HAL_RCC_OscConfig+0x39e>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 800220c:	f7fe fb86 	bl	800091c <HAL_GetTick>
- 8002210:	4602      	mov	r2, r0
- 8002212:	693b      	ldr	r3, [r7, #16]
- 8002214:	1ad3      	subs	r3, r2, r3
- 8002216:	2b02      	cmp	r3, #2
- 8002218:	d901      	bls.n	800221e <HAL_RCC_OscConfig+0x39e>
+ 8002278:	f7fe fb86 	bl	8000988 <HAL_GetTick>
+ 800227c:	4602      	mov	r2, r0
+ 800227e:	693b      	ldr	r3, [r7, #16]
+ 8002280:	1ad3      	subs	r3, r2, r3
+ 8002282:	2b02      	cmp	r3, #2
+ 8002284:	d901      	bls.n	800228a <HAL_RCC_OscConfig+0x39e>
         {
           return HAL_TIMEOUT;
- 800221a:	2303      	movs	r3, #3
- 800221c:	e157      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002286:	2303      	movs	r3, #3
+ 8002288:	e157      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 800221e:	4b4d      	ldr	r3, [pc, #308]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002220:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 8002222:	f003 0302 	and.w	r3, r3, #2
- 8002226:	2b00      	cmp	r3, #0
- 8002228:	d0f0      	beq.n	800220c <HAL_RCC_OscConfig+0x38c>
- 800222a:	e015      	b.n	8002258 <HAL_RCC_OscConfig+0x3d8>
+ 800228a:	4b4d      	ldr	r3, [pc, #308]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800228c:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 800228e:	f003 0302 	and.w	r3, r3, #2
+ 8002292:	2b00      	cmp	r3, #0
+ 8002294:	d0f0      	beq.n	8002278 <HAL_RCC_OscConfig+0x38c>
+ 8002296:	e015      	b.n	80022c4 <HAL_RCC_OscConfig+0x3d8>
       }
     }
     else
     {
       /* Disable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_DISABLE();
- 800222c:	4b4e      	ldr	r3, [pc, #312]	@ (8002368 <HAL_RCC_OscConfig+0x4e8>)
- 800222e:	2200      	movs	r2, #0
- 8002230:	601a      	str	r2, [r3, #0]
+ 8002298:	4b4e      	ldr	r3, [pc, #312]	@ (80023d4 <HAL_RCC_OscConfig+0x4e8>)
+ 800229a:	2200      	movs	r2, #0
+ 800229c:	601a      	str	r2, [r3, #0]
 
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8002232:	f7fe fb73 	bl	800091c <HAL_GetTick>
- 8002236:	6138      	str	r0, [r7, #16]
+ 800229e:	f7fe fb73 	bl	8000988 <HAL_GetTick>
+ 80022a2:	6138      	str	r0, [r7, #16]
 
       /* Wait till LSI is disabled */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 8002238:	e008      	b.n	800224c <HAL_RCC_OscConfig+0x3cc>
+ 80022a4:	e008      	b.n	80022b8 <HAL_RCC_OscConfig+0x3cc>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 800223a:	f7fe fb6f 	bl	800091c <HAL_GetTick>
- 800223e:	4602      	mov	r2, r0
- 8002240:	693b      	ldr	r3, [r7, #16]
- 8002242:	1ad3      	subs	r3, r2, r3
- 8002244:	2b02      	cmp	r3, #2
- 8002246:	d901      	bls.n	800224c <HAL_RCC_OscConfig+0x3cc>
+ 80022a6:	f7fe fb6f 	bl	8000988 <HAL_GetTick>
+ 80022aa:	4602      	mov	r2, r0
+ 80022ac:	693b      	ldr	r3, [r7, #16]
+ 80022ae:	1ad3      	subs	r3, r2, r3
+ 80022b0:	2b02      	cmp	r3, #2
+ 80022b2:	d901      	bls.n	80022b8 <HAL_RCC_OscConfig+0x3cc>
         {
           return HAL_TIMEOUT;
- 8002248:	2303      	movs	r3, #3
- 800224a:	e140      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80022b4:	2303      	movs	r3, #3
+ 80022b6:	e140      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 800224c:	4b41      	ldr	r3, [pc, #260]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800224e:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 8002250:	f003 0302 	and.w	r3, r3, #2
- 8002254:	2b00      	cmp	r3, #0
- 8002256:	d1f0      	bne.n	800223a <HAL_RCC_OscConfig+0x3ba>
+ 80022b8:	4b41      	ldr	r3, [pc, #260]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80022ba:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 80022bc:	f003 0302 	and.w	r3, r3, #2
+ 80022c0:	2b00      	cmp	r3, #0
+ 80022c2:	d1f0      	bne.n	80022a6 <HAL_RCC_OscConfig+0x3ba>
         }
       }
     }
   }
   /*------------------------------ LSE Configuration -------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 8002258:	687b      	ldr	r3, [r7, #4]
- 800225a:	681b      	ldr	r3, [r3, #0]
- 800225c:	f003 0304 	and.w	r3, r3, #4
- 8002260:	2b00      	cmp	r3, #0
- 8002262:	f000 80b5 	beq.w	80023d0 <HAL_RCC_OscConfig+0x550>
+ 80022c4:	687b      	ldr	r3, [r7, #4]
+ 80022c6:	681b      	ldr	r3, [r3, #0]
+ 80022c8:	f003 0304 	and.w	r3, r3, #4
+ 80022cc:	2b00      	cmp	r3, #0
+ 80022ce:	f000 80b5 	beq.w	800243c <HAL_RCC_OscConfig+0x550>
   {
     FlagStatus       pwrclkchanged = RESET;
- 8002266:	2300      	movs	r3, #0
- 8002268:	77fb      	strb	r3, [r7, #31]
+ 80022d2:	2300      	movs	r3, #0
+ 80022d4:	77fb      	strb	r3, [r7, #31]
     /* Check the parameters */
     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 
     /* Update LSE configuration in Backup Domain control register    */
     /* Requires to enable write access to Backup Domain of necessary */
     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 800226a:	4b3a      	ldr	r3, [pc, #232]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800226c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800226e:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 8002272:	2b00      	cmp	r3, #0
- 8002274:	d10d      	bne.n	8002292 <HAL_RCC_OscConfig+0x412>
+ 80022d6:	4b3a      	ldr	r3, [pc, #232]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80022d8:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80022da:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 80022de:	2b00      	cmp	r3, #0
+ 80022e0:	d10d      	bne.n	80022fe <HAL_RCC_OscConfig+0x412>
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 8002276:	4b37      	ldr	r3, [pc, #220]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002278:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800227a:	4a36      	ldr	r2, [pc, #216]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800227c:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
- 8002280:	6253      	str	r3, [r2, #36]	@ 0x24
- 8002282:	4b34      	ldr	r3, [pc, #208]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002284:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002286:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 800228a:	60bb      	str	r3, [r7, #8]
- 800228c:	68bb      	ldr	r3, [r7, #8]
+ 80022e2:	4b37      	ldr	r3, [pc, #220]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80022e4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80022e6:	4a36      	ldr	r2, [pc, #216]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80022e8:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 80022ec:	6253      	str	r3, [r2, #36]	@ 0x24
+ 80022ee:	4b34      	ldr	r3, [pc, #208]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80022f0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80022f2:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 80022f6:	60bb      	str	r3, [r7, #8]
+ 80022f8:	68bb      	ldr	r3, [r7, #8]
       pwrclkchanged = SET;
- 800228e:	2301      	movs	r3, #1
- 8002290:	77fb      	strb	r3, [r7, #31]
+ 80022fa:	2301      	movs	r3, #1
+ 80022fc:	77fb      	strb	r3, [r7, #31]
     }
 
     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8002292:	4b36      	ldr	r3, [pc, #216]	@ (800236c <HAL_RCC_OscConfig+0x4ec>)
- 8002294:	681b      	ldr	r3, [r3, #0]
- 8002296:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 800229a:	2b00      	cmp	r3, #0
- 800229c:	d118      	bne.n	80022d0 <HAL_RCC_OscConfig+0x450>
+ 80022fe:	4b36      	ldr	r3, [pc, #216]	@ (80023d8 <HAL_RCC_OscConfig+0x4ec>)
+ 8002300:	681b      	ldr	r3, [r3, #0]
+ 8002302:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8002306:	2b00      	cmp	r3, #0
+ 8002308:	d118      	bne.n	800233c <HAL_RCC_OscConfig+0x450>
     {
       /* Enable write access to Backup domain */
       SET_BIT(PWR->CR, PWR_CR_DBP);
- 800229e:	4b33      	ldr	r3, [pc, #204]	@ (800236c <HAL_RCC_OscConfig+0x4ec>)
- 80022a0:	681b      	ldr	r3, [r3, #0]
- 80022a2:	4a32      	ldr	r2, [pc, #200]	@ (800236c <HAL_RCC_OscConfig+0x4ec>)
- 80022a4:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
- 80022a8:	6013      	str	r3, [r2, #0]
+ 800230a:	4b33      	ldr	r3, [pc, #204]	@ (80023d8 <HAL_RCC_OscConfig+0x4ec>)
+ 800230c:	681b      	ldr	r3, [r3, #0]
+ 800230e:	4a32      	ldr	r2, [pc, #200]	@ (80023d8 <HAL_RCC_OscConfig+0x4ec>)
+ 8002310:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 8002314:	6013      	str	r3, [r2, #0]
 
       /* Wait for Backup domain Write protection disable */
       tickstart = HAL_GetTick();
- 80022aa:	f7fe fb37 	bl	800091c <HAL_GetTick>
- 80022ae:	6138      	str	r0, [r7, #16]
+ 8002316:	f7fe fb37 	bl	8000988 <HAL_GetTick>
+ 800231a:	6138      	str	r0, [r7, #16]
 
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 80022b0:	e008      	b.n	80022c4 <HAL_RCC_OscConfig+0x444>
+ 800231c:	e008      	b.n	8002330 <HAL_RCC_OscConfig+0x444>
       {
         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 80022b2:	f7fe fb33 	bl	800091c <HAL_GetTick>
- 80022b6:	4602      	mov	r2, r0
- 80022b8:	693b      	ldr	r3, [r7, #16]
- 80022ba:	1ad3      	subs	r3, r2, r3
- 80022bc:	2b64      	cmp	r3, #100	@ 0x64
- 80022be:	d901      	bls.n	80022c4 <HAL_RCC_OscConfig+0x444>
+ 800231e:	f7fe fb33 	bl	8000988 <HAL_GetTick>
+ 8002322:	4602      	mov	r2, r0
+ 8002324:	693b      	ldr	r3, [r7, #16]
+ 8002326:	1ad3      	subs	r3, r2, r3
+ 8002328:	2b64      	cmp	r3, #100	@ 0x64
+ 800232a:	d901      	bls.n	8002330 <HAL_RCC_OscConfig+0x444>
         {
           return HAL_TIMEOUT;
- 80022c0:	2303      	movs	r3, #3
- 80022c2:	e104      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 800232c:	2303      	movs	r3, #3
+ 800232e:	e104      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 80022c4:	4b29      	ldr	r3, [pc, #164]	@ (800236c <HAL_RCC_OscConfig+0x4ec>)
- 80022c6:	681b      	ldr	r3, [r3, #0]
- 80022c8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 80022cc:	2b00      	cmp	r3, #0
- 80022ce:	d0f0      	beq.n	80022b2 <HAL_RCC_OscConfig+0x432>
+ 8002330:	4b29      	ldr	r3, [pc, #164]	@ (80023d8 <HAL_RCC_OscConfig+0x4ec>)
+ 8002332:	681b      	ldr	r3, [r3, #0]
+ 8002334:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8002338:	2b00      	cmp	r3, #0
+ 800233a:	d0f0      	beq.n	800231e <HAL_RCC_OscConfig+0x432>
         }
       }
     }
 
     /* Set the new LSE configuration -----------------------------------------*/
     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 80022d0:	687b      	ldr	r3, [r7, #4]
- 80022d2:	689b      	ldr	r3, [r3, #8]
- 80022d4:	2b01      	cmp	r3, #1
- 80022d6:	d106      	bne.n	80022e6 <HAL_RCC_OscConfig+0x466>
- 80022d8:	4b1e      	ldr	r3, [pc, #120]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80022da:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 80022dc:	4a1d      	ldr	r2, [pc, #116]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80022de:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
- 80022e2:	6353      	str	r3, [r2, #52]	@ 0x34
- 80022e4:	e02d      	b.n	8002342 <HAL_RCC_OscConfig+0x4c2>
- 80022e6:	687b      	ldr	r3, [r7, #4]
- 80022e8:	689b      	ldr	r3, [r3, #8]
- 80022ea:	2b00      	cmp	r3, #0
- 80022ec:	d10c      	bne.n	8002308 <HAL_RCC_OscConfig+0x488>
- 80022ee:	4b19      	ldr	r3, [pc, #100]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80022f0:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 80022f2:	4a18      	ldr	r2, [pc, #96]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80022f4:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
- 80022f8:	6353      	str	r3, [r2, #52]	@ 0x34
- 80022fa:	4b16      	ldr	r3, [pc, #88]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 80022fc:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 80022fe:	4a15      	ldr	r2, [pc, #84]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002300:	f423 6380 	bic.w	r3, r3, #1024	@ 0x400
- 8002304:	6353      	str	r3, [r2, #52]	@ 0x34
- 8002306:	e01c      	b.n	8002342 <HAL_RCC_OscConfig+0x4c2>
- 8002308:	687b      	ldr	r3, [r7, #4]
- 800230a:	689b      	ldr	r3, [r3, #8]
- 800230c:	2b05      	cmp	r3, #5
- 800230e:	d10c      	bne.n	800232a <HAL_RCC_OscConfig+0x4aa>
- 8002310:	4b10      	ldr	r3, [pc, #64]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002312:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 8002314:	4a0f      	ldr	r2, [pc, #60]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002316:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
- 800231a:	6353      	str	r3, [r2, #52]	@ 0x34
- 800231c:	4b0d      	ldr	r3, [pc, #52]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800231e:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 8002320:	4a0c      	ldr	r2, [pc, #48]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002322:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
- 8002326:	6353      	str	r3, [r2, #52]	@ 0x34
- 8002328:	e00b      	b.n	8002342 <HAL_RCC_OscConfig+0x4c2>
- 800232a:	4b0a      	ldr	r3, [pc, #40]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800232c:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 800232e:	4a09      	ldr	r2, [pc, #36]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002330:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
- 8002334:	6353      	str	r3, [r2, #52]	@ 0x34
- 8002336:	4b07      	ldr	r3, [pc, #28]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 8002338:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 800233a:	4a06      	ldr	r2, [pc, #24]	@ (8002354 <HAL_RCC_OscConfig+0x4d4>)
- 800233c:	f423 6380 	bic.w	r3, r3, #1024	@ 0x400
- 8002340:	6353      	str	r3, [r2, #52]	@ 0x34
+ 800233c:	687b      	ldr	r3, [r7, #4]
+ 800233e:	689b      	ldr	r3, [r3, #8]
+ 8002340:	2b01      	cmp	r3, #1
+ 8002342:	d106      	bne.n	8002352 <HAL_RCC_OscConfig+0x466>
+ 8002344:	4b1e      	ldr	r3, [pc, #120]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002346:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 8002348:	4a1d      	ldr	r2, [pc, #116]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800234a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 800234e:	6353      	str	r3, [r2, #52]	@ 0x34
+ 8002350:	e02d      	b.n	80023ae <HAL_RCC_OscConfig+0x4c2>
+ 8002352:	687b      	ldr	r3, [r7, #4]
+ 8002354:	689b      	ldr	r3, [r3, #8]
+ 8002356:	2b00      	cmp	r3, #0
+ 8002358:	d10c      	bne.n	8002374 <HAL_RCC_OscConfig+0x488>
+ 800235a:	4b19      	ldr	r3, [pc, #100]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800235c:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 800235e:	4a18      	ldr	r2, [pc, #96]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002360:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
+ 8002364:	6353      	str	r3, [r2, #52]	@ 0x34
+ 8002366:	4b16      	ldr	r3, [pc, #88]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002368:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 800236a:	4a15      	ldr	r2, [pc, #84]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800236c:	f423 6380 	bic.w	r3, r3, #1024	@ 0x400
+ 8002370:	6353      	str	r3, [r2, #52]	@ 0x34
+ 8002372:	e01c      	b.n	80023ae <HAL_RCC_OscConfig+0x4c2>
+ 8002374:	687b      	ldr	r3, [r7, #4]
+ 8002376:	689b      	ldr	r3, [r3, #8]
+ 8002378:	2b05      	cmp	r3, #5
+ 800237a:	d10c      	bne.n	8002396 <HAL_RCC_OscConfig+0x4aa>
+ 800237c:	4b10      	ldr	r3, [pc, #64]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800237e:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 8002380:	4a0f      	ldr	r2, [pc, #60]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002382:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
+ 8002386:	6353      	str	r3, [r2, #52]	@ 0x34
+ 8002388:	4b0d      	ldr	r3, [pc, #52]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800238a:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 800238c:	4a0c      	ldr	r2, [pc, #48]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800238e:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 8002392:	6353      	str	r3, [r2, #52]	@ 0x34
+ 8002394:	e00b      	b.n	80023ae <HAL_RCC_OscConfig+0x4c2>
+ 8002396:	4b0a      	ldr	r3, [pc, #40]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 8002398:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 800239a:	4a09      	ldr	r2, [pc, #36]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 800239c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
+ 80023a0:	6353      	str	r3, [r2, #52]	@ 0x34
+ 80023a2:	4b07      	ldr	r3, [pc, #28]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80023a4:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 80023a6:	4a06      	ldr	r2, [pc, #24]	@ (80023c0 <HAL_RCC_OscConfig+0x4d4>)
+ 80023a8:	f423 6380 	bic.w	r3, r3, #1024	@ 0x400
+ 80023ac:	6353      	str	r3, [r2, #52]	@ 0x34
     /* Check the LSE State */
     if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
- 8002342:	687b      	ldr	r3, [r7, #4]
- 8002344:	689b      	ldr	r3, [r3, #8]
- 8002346:	2b00      	cmp	r3, #0
- 8002348:	d024      	beq.n	8002394 <HAL_RCC_OscConfig+0x514>
+ 80023ae:	687b      	ldr	r3, [r7, #4]
+ 80023b0:	689b      	ldr	r3, [r3, #8]
+ 80023b2:	2b00      	cmp	r3, #0
+ 80023b4:	d024      	beq.n	8002400 <HAL_RCC_OscConfig+0x514>
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 800234a:	f7fe fae7 	bl	800091c <HAL_GetTick>
- 800234e:	6138      	str	r0, [r7, #16]
+ 80023b6:	f7fe fae7 	bl	8000988 <HAL_GetTick>
+ 80023ba:	6138      	str	r0, [r7, #16]
 
       /* Wait till LSE is ready */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 8002350:	e019      	b.n	8002386 <HAL_RCC_OscConfig+0x506>
- 8002352:	bf00      	nop
- 8002354:	40023800 	.word	0x40023800
- 8002358:	08002a3c 	.word	0x08002a3c
- 800235c:	20000000 	.word	0x20000000
- 8002360:	20000004 	.word	0x20000004
- 8002364:	42470020 	.word	0x42470020
- 8002368:	42470680 	.word	0x42470680
- 800236c:	40007000 	.word	0x40007000
+ 80023bc:	e019      	b.n	80023f2 <HAL_RCC_OscConfig+0x506>
+ 80023be:	bf00      	nop
+ 80023c0:	40023800 	.word	0x40023800
+ 80023c4:	08002aa8 	.word	0x08002aa8
+ 80023c8:	20000000 	.word	0x20000000
+ 80023cc:	20000004 	.word	0x20000004
+ 80023d0:	42470020 	.word	0x42470020
+ 80023d4:	42470680 	.word	0x42470680
+ 80023d8:	40007000 	.word	0x40007000
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8002370:	f7fe fad4 	bl	800091c <HAL_GetTick>
- 8002374:	4602      	mov	r2, r0
- 8002376:	693b      	ldr	r3, [r7, #16]
- 8002378:	1ad3      	subs	r3, r2, r3
- 800237a:	f241 3288 	movw	r2, #5000	@ 0x1388
- 800237e:	4293      	cmp	r3, r2
- 8002380:	d901      	bls.n	8002386 <HAL_RCC_OscConfig+0x506>
+ 80023dc:	f7fe fad4 	bl	8000988 <HAL_GetTick>
+ 80023e0:	4602      	mov	r2, r0
+ 80023e2:	693b      	ldr	r3, [r7, #16]
+ 80023e4:	1ad3      	subs	r3, r2, r3
+ 80023e6:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 80023ea:	4293      	cmp	r3, r2
+ 80023ec:	d901      	bls.n	80023f2 <HAL_RCC_OscConfig+0x506>
         {
           return HAL_TIMEOUT;
- 8002382:	2303      	movs	r3, #3
- 8002384:	e0a3      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80023ee:	2303      	movs	r3, #3
+ 80023f0:	e0a3      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 8002386:	4b54      	ldr	r3, [pc, #336]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 8002388:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 800238a:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 800238e:	2b00      	cmp	r3, #0
- 8002390:	d0ee      	beq.n	8002370 <HAL_RCC_OscConfig+0x4f0>
- 8002392:	e014      	b.n	80023be <HAL_RCC_OscConfig+0x53e>
+ 80023f2:	4b54      	ldr	r3, [pc, #336]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 80023f4:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 80023f6:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 80023fa:	2b00      	cmp	r3, #0
+ 80023fc:	d0ee      	beq.n	80023dc <HAL_RCC_OscConfig+0x4f0>
+ 80023fe:	e014      	b.n	800242a <HAL_RCC_OscConfig+0x53e>
       }
     }
     else
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8002394:	f7fe fac2 	bl	800091c <HAL_GetTick>
- 8002398:	6138      	str	r0, [r7, #16]
+ 8002400:	f7fe fac2 	bl	8000988 <HAL_GetTick>
+ 8002404:	6138      	str	r0, [r7, #16]
 
       /* Wait till LSE is disabled */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 800239a:	e00a      	b.n	80023b2 <HAL_RCC_OscConfig+0x532>
+ 8002406:	e00a      	b.n	800241e <HAL_RCC_OscConfig+0x532>
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 800239c:	f7fe fabe 	bl	800091c <HAL_GetTick>
- 80023a0:	4602      	mov	r2, r0
- 80023a2:	693b      	ldr	r3, [r7, #16]
- 80023a4:	1ad3      	subs	r3, r2, r3
- 80023a6:	f241 3288 	movw	r2, #5000	@ 0x1388
- 80023aa:	4293      	cmp	r3, r2
- 80023ac:	d901      	bls.n	80023b2 <HAL_RCC_OscConfig+0x532>
+ 8002408:	f7fe fabe 	bl	8000988 <HAL_GetTick>
+ 800240c:	4602      	mov	r2, r0
+ 800240e:	693b      	ldr	r3, [r7, #16]
+ 8002410:	1ad3      	subs	r3, r2, r3
+ 8002412:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8002416:	4293      	cmp	r3, r2
+ 8002418:	d901      	bls.n	800241e <HAL_RCC_OscConfig+0x532>
         {
           return HAL_TIMEOUT;
- 80023ae:	2303      	movs	r3, #3
- 80023b0:	e08d      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 800241a:	2303      	movs	r3, #3
+ 800241c:	e08d      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 80023b2:	4b49      	ldr	r3, [pc, #292]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 80023b4:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 80023b6:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 80023ba:	2b00      	cmp	r3, #0
- 80023bc:	d1ee      	bne.n	800239c <HAL_RCC_OscConfig+0x51c>
+ 800241e:	4b49      	ldr	r3, [pc, #292]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002420:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 8002422:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 8002426:	2b00      	cmp	r3, #0
+ 8002428:	d1ee      	bne.n	8002408 <HAL_RCC_OscConfig+0x51c>
         }
       }
     }
 
     /* Require to disable power clock if necessary */
     if(pwrclkchanged == SET)
- 80023be:	7ffb      	ldrb	r3, [r7, #31]
- 80023c0:	2b01      	cmp	r3, #1
- 80023c2:	d105      	bne.n	80023d0 <HAL_RCC_OscConfig+0x550>
+ 800242a:	7ffb      	ldrb	r3, [r7, #31]
+ 800242c:	2b01      	cmp	r3, #1
+ 800242e:	d105      	bne.n	800243c <HAL_RCC_OscConfig+0x550>
     {
       __HAL_RCC_PWR_CLK_DISABLE();
- 80023c4:	4b44      	ldr	r3, [pc, #272]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 80023c6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80023c8:	4a43      	ldr	r2, [pc, #268]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 80023ca:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
- 80023ce:	6253      	str	r3, [r2, #36]	@ 0x24
+ 8002430:	4b44      	ldr	r3, [pc, #272]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002432:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8002434:	4a43      	ldr	r2, [pc, #268]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002436:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
+ 800243a:	6253      	str	r3, [r2, #36]	@ 0x24
   }
 
   /*-------------------------------- PLL Configuration -----------------------*/
   /* Check the parameters */
   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 80023d0:	687b      	ldr	r3, [r7, #4]
- 80023d2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80023d4:	2b00      	cmp	r3, #0
- 80023d6:	d079      	beq.n	80024cc <HAL_RCC_OscConfig+0x64c>
+ 800243c:	687b      	ldr	r3, [r7, #4]
+ 800243e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8002440:	2b00      	cmp	r3, #0
+ 8002442:	d079      	beq.n	8002538 <HAL_RCC_OscConfig+0x64c>
   {
     /* Check if the PLL is used as system clock or not */
     if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80023d8:	69bb      	ldr	r3, [r7, #24]
- 80023da:	2b0c      	cmp	r3, #12
- 80023dc:	d056      	beq.n	800248c <HAL_RCC_OscConfig+0x60c>
+ 8002444:	69bb      	ldr	r3, [r7, #24]
+ 8002446:	2b0c      	cmp	r3, #12
+ 8002448:	d056      	beq.n	80024f8 <HAL_RCC_OscConfig+0x60c>
     {
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 80023de:	687b      	ldr	r3, [r7, #4]
- 80023e0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80023e2:	2b02      	cmp	r3, #2
- 80023e4:	d13b      	bne.n	800245e <HAL_RCC_OscConfig+0x5de>
+ 800244a:	687b      	ldr	r3, [r7, #4]
+ 800244c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800244e:	2b02      	cmp	r3, #2
+ 8002450:	d13b      	bne.n	80024ca <HAL_RCC_OscConfig+0x5de>
         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
         assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
         assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
 
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 80023e6:	4b3d      	ldr	r3, [pc, #244]	@ (80024dc <HAL_RCC_OscConfig+0x65c>)
- 80023e8:	2200      	movs	r2, #0
- 80023ea:	601a      	str	r2, [r3, #0]
+ 8002452:	4b3d      	ldr	r3, [pc, #244]	@ (8002548 <HAL_RCC_OscConfig+0x65c>)
+ 8002454:	2200      	movs	r2, #0
+ 8002456:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80023ec:	f7fe fa96 	bl	800091c <HAL_GetTick>
- 80023f0:	6138      	str	r0, [r7, #16]
+ 8002458:	f7fe fa96 	bl	8000988 <HAL_GetTick>
+ 800245c:	6138      	str	r0, [r7, #16]
 
         /* Wait till PLL is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 80023f2:	e008      	b.n	8002406 <HAL_RCC_OscConfig+0x586>
+ 800245e:	e008      	b.n	8002472 <HAL_RCC_OscConfig+0x586>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80023f4:	f7fe fa92 	bl	800091c <HAL_GetTick>
- 80023f8:	4602      	mov	r2, r0
- 80023fa:	693b      	ldr	r3, [r7, #16]
- 80023fc:	1ad3      	subs	r3, r2, r3
- 80023fe:	2b02      	cmp	r3, #2
- 8002400:	d901      	bls.n	8002406 <HAL_RCC_OscConfig+0x586>
+ 8002460:	f7fe fa92 	bl	8000988 <HAL_GetTick>
+ 8002464:	4602      	mov	r2, r0
+ 8002466:	693b      	ldr	r3, [r7, #16]
+ 8002468:	1ad3      	subs	r3, r2, r3
+ 800246a:	2b02      	cmp	r3, #2
+ 800246c:	d901      	bls.n	8002472 <HAL_RCC_OscConfig+0x586>
           {
             return HAL_TIMEOUT;
- 8002402:	2303      	movs	r3, #3
- 8002404:	e063      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 800246e:	2303      	movs	r3, #3
+ 8002470:	e063      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 8002406:	4b34      	ldr	r3, [pc, #208]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 8002408:	681b      	ldr	r3, [r3, #0]
- 800240a:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
- 800240e:	2b00      	cmp	r3, #0
- 8002410:	d1f0      	bne.n	80023f4 <HAL_RCC_OscConfig+0x574>
+ 8002472:	4b34      	ldr	r3, [pc, #208]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002474:	681b      	ldr	r3, [r3, #0]
+ 8002476:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 800247a:	2b00      	cmp	r3, #0
+ 800247c:	d1f0      	bne.n	8002460 <HAL_RCC_OscConfig+0x574>
           }
         }
 
         /* Configure the main PLL clock source, multiplication and division factors. */
         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 8002412:	4b31      	ldr	r3, [pc, #196]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 8002414:	689b      	ldr	r3, [r3, #8]
- 8002416:	f423 027d 	bic.w	r2, r3, #16580608	@ 0xfd0000
- 800241a:	687b      	ldr	r3, [r7, #4]
- 800241c:	6a99      	ldr	r1, [r3, #40]	@ 0x28
- 800241e:	687b      	ldr	r3, [r7, #4]
- 8002420:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
- 8002422:	4319      	orrs	r1, r3
- 8002424:	687b      	ldr	r3, [r7, #4]
- 8002426:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
- 8002428:	430b      	orrs	r3, r1
- 800242a:	492b      	ldr	r1, [pc, #172]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 800242c:	4313      	orrs	r3, r2
- 800242e:	608b      	str	r3, [r1, #8]
+ 800247e:	4b31      	ldr	r3, [pc, #196]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002480:	689b      	ldr	r3, [r3, #8]
+ 8002482:	f423 027d 	bic.w	r2, r3, #16580608	@ 0xfd0000
+ 8002486:	687b      	ldr	r3, [r7, #4]
+ 8002488:	6a99      	ldr	r1, [r3, #40]	@ 0x28
+ 800248a:	687b      	ldr	r3, [r7, #4]
+ 800248c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 800248e:	4319      	orrs	r1, r3
+ 8002490:	687b      	ldr	r3, [r7, #4]
+ 8002492:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8002494:	430b      	orrs	r3, r1
+ 8002496:	492b      	ldr	r1, [pc, #172]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002498:	4313      	orrs	r3, r2
+ 800249a:	608b      	str	r3, [r1, #8]
                              RCC_OscInitStruct->PLL.PLLMUL,
                              RCC_OscInitStruct->PLL.PLLDIV);
         /* Enable the main PLL. */
         __HAL_RCC_PLL_ENABLE();
- 8002430:	4b2a      	ldr	r3, [pc, #168]	@ (80024dc <HAL_RCC_OscConfig+0x65c>)
- 8002432:	2201      	movs	r2, #1
- 8002434:	601a      	str	r2, [r3, #0]
+ 800249c:	4b2a      	ldr	r3, [pc, #168]	@ (8002548 <HAL_RCC_OscConfig+0x65c>)
+ 800249e:	2201      	movs	r2, #1
+ 80024a0:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002436:	f7fe fa71 	bl	800091c <HAL_GetTick>
- 800243a:	6138      	str	r0, [r7, #16]
+ 80024a2:	f7fe fa71 	bl	8000988 <HAL_GetTick>
+ 80024a6:	6138      	str	r0, [r7, #16]
 
         /* Wait till PLL is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 800243c:	e008      	b.n	8002450 <HAL_RCC_OscConfig+0x5d0>
+ 80024a8:	e008      	b.n	80024bc <HAL_RCC_OscConfig+0x5d0>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 800243e:	f7fe fa6d 	bl	800091c <HAL_GetTick>
- 8002442:	4602      	mov	r2, r0
- 8002444:	693b      	ldr	r3, [r7, #16]
- 8002446:	1ad3      	subs	r3, r2, r3
- 8002448:	2b02      	cmp	r3, #2
- 800244a:	d901      	bls.n	8002450 <HAL_RCC_OscConfig+0x5d0>
+ 80024aa:	f7fe fa6d 	bl	8000988 <HAL_GetTick>
+ 80024ae:	4602      	mov	r2, r0
+ 80024b0:	693b      	ldr	r3, [r7, #16]
+ 80024b2:	1ad3      	subs	r3, r2, r3
+ 80024b4:	2b02      	cmp	r3, #2
+ 80024b6:	d901      	bls.n	80024bc <HAL_RCC_OscConfig+0x5d0>
           {
             return HAL_TIMEOUT;
- 800244c:	2303      	movs	r3, #3
- 800244e:	e03e      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80024b8:	2303      	movs	r3, #3
+ 80024ba:	e03e      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 8002450:	4b21      	ldr	r3, [pc, #132]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 8002452:	681b      	ldr	r3, [r3, #0]
- 8002454:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
- 8002458:	2b00      	cmp	r3, #0
- 800245a:	d0f0      	beq.n	800243e <HAL_RCC_OscConfig+0x5be>
- 800245c:	e036      	b.n	80024cc <HAL_RCC_OscConfig+0x64c>
+ 80024bc:	4b21      	ldr	r3, [pc, #132]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 80024be:	681b      	ldr	r3, [r3, #0]
+ 80024c0:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80024c4:	2b00      	cmp	r3, #0
+ 80024c6:	d0f0      	beq.n	80024aa <HAL_RCC_OscConfig+0x5be>
+ 80024c8:	e036      	b.n	8002538 <HAL_RCC_OscConfig+0x64c>
         }
       }
       else
       {
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 800245e:	4b1f      	ldr	r3, [pc, #124]	@ (80024dc <HAL_RCC_OscConfig+0x65c>)
- 8002460:	2200      	movs	r2, #0
- 8002462:	601a      	str	r2, [r3, #0]
+ 80024ca:	4b1f      	ldr	r3, [pc, #124]	@ (8002548 <HAL_RCC_OscConfig+0x65c>)
+ 80024cc:	2200      	movs	r2, #0
+ 80024ce:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002464:	f7fe fa5a 	bl	800091c <HAL_GetTick>
- 8002468:	6138      	str	r0, [r7, #16]
+ 80024d0:	f7fe fa5a 	bl	8000988 <HAL_GetTick>
+ 80024d4:	6138      	str	r0, [r7, #16]
 
         /* Wait till PLL is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800246a:	e008      	b.n	800247e <HAL_RCC_OscConfig+0x5fe>
+ 80024d6:	e008      	b.n	80024ea <HAL_RCC_OscConfig+0x5fe>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 800246c:	f7fe fa56 	bl	800091c <HAL_GetTick>
- 8002470:	4602      	mov	r2, r0
- 8002472:	693b      	ldr	r3, [r7, #16]
- 8002474:	1ad3      	subs	r3, r2, r3
- 8002476:	2b02      	cmp	r3, #2
- 8002478:	d901      	bls.n	800247e <HAL_RCC_OscConfig+0x5fe>
+ 80024d8:	f7fe fa56 	bl	8000988 <HAL_GetTick>
+ 80024dc:	4602      	mov	r2, r0
+ 80024de:	693b      	ldr	r3, [r7, #16]
+ 80024e0:	1ad3      	subs	r3, r2, r3
+ 80024e2:	2b02      	cmp	r3, #2
+ 80024e4:	d901      	bls.n	80024ea <HAL_RCC_OscConfig+0x5fe>
           {
             return HAL_TIMEOUT;
- 800247a:	2303      	movs	r3, #3
- 800247c:	e027      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 80024e6:	2303      	movs	r3, #3
+ 80024e8:	e027      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
- 800247e:	4b16      	ldr	r3, [pc, #88]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 8002480:	681b      	ldr	r3, [r3, #0]
- 8002482:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
- 8002486:	2b00      	cmp	r3, #0
- 8002488:	d1f0      	bne.n	800246c <HAL_RCC_OscConfig+0x5ec>
- 800248a:	e01f      	b.n	80024cc <HAL_RCC_OscConfig+0x64c>
+ 80024ea:	4b16      	ldr	r3, [pc, #88]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 80024ec:	681b      	ldr	r3, [r3, #0]
+ 80024ee:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80024f2:	2b00      	cmp	r3, #0
+ 80024f4:	d1f0      	bne.n	80024d8 <HAL_RCC_OscConfig+0x5ec>
+ 80024f6:	e01f      	b.n	8002538 <HAL_RCC_OscConfig+0x64c>
       }
     }
     else
     {
       /* Check if there is a request to disable the PLL used as System clock source */
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
- 800248c:	687b      	ldr	r3, [r7, #4]
- 800248e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002490:	2b01      	cmp	r3, #1
- 8002492:	d101      	bne.n	8002498 <HAL_RCC_OscConfig+0x618>
+ 80024f8:	687b      	ldr	r3, [r7, #4]
+ 80024fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80024fc:	2b01      	cmp	r3, #1
+ 80024fe:	d101      	bne.n	8002504 <HAL_RCC_OscConfig+0x618>
       {
         return HAL_ERROR;
- 8002494:	2301      	movs	r3, #1
- 8002496:	e01a      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002500:	2301      	movs	r3, #1
+ 8002502:	e01a      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
       }
       else
       {
         /* Do not return HAL_ERROR if request repeats the current configuration */
         pll_config = RCC->CFGR;
- 8002498:	4b0f      	ldr	r3, [pc, #60]	@ (80024d8 <HAL_RCC_OscConfig+0x658>)
- 800249a:	689b      	ldr	r3, [r3, #8]
- 800249c:	617b      	str	r3, [r7, #20]
+ 8002504:	4b0f      	ldr	r3, [pc, #60]	@ (8002544 <HAL_RCC_OscConfig+0x658>)
+ 8002506:	689b      	ldr	r3, [r3, #8]
+ 8002508:	617b      	str	r3, [r7, #20]
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800249e:	697b      	ldr	r3, [r7, #20]
- 80024a0:	f403 3280 	and.w	r2, r3, #65536	@ 0x10000
- 80024a4:	687b      	ldr	r3, [r7, #4]
- 80024a6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
- 80024a8:	429a      	cmp	r2, r3
- 80024aa:	d10d      	bne.n	80024c8 <HAL_RCC_OscConfig+0x648>
+ 800250a:	697b      	ldr	r3, [r7, #20]
+ 800250c:	f403 3280 	and.w	r2, r3, #65536	@ 0x10000
+ 8002510:	687b      	ldr	r3, [r7, #4]
+ 8002512:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 8002514:	429a      	cmp	r2, r3
+ 8002516:	d10d      	bne.n	8002534 <HAL_RCC_OscConfig+0x648>
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
- 80024ac:	697b      	ldr	r3, [r7, #20]
- 80024ae:	f403 1270 	and.w	r2, r3, #3932160	@ 0x3c0000
- 80024b2:	687b      	ldr	r3, [r7, #4]
- 80024b4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8002518:	697b      	ldr	r3, [r7, #20]
+ 800251a:	f403 1270 	and.w	r2, r3, #3932160	@ 0x3c0000
+ 800251e:	687b      	ldr	r3, [r7, #4]
+ 8002520:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 80024b6:	429a      	cmp	r2, r3
- 80024b8:	d106      	bne.n	80024c8 <HAL_RCC_OscConfig+0x648>
+ 8002522:	429a      	cmp	r2, r3
+ 8002524:	d106      	bne.n	8002534 <HAL_RCC_OscConfig+0x648>
            (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV))
- 80024ba:	697b      	ldr	r3, [r7, #20]
- 80024bc:	f403 0240 	and.w	r2, r3, #12582912	@ 0xc00000
- 80024c0:	687b      	ldr	r3, [r7, #4]
- 80024c2:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8002526:	697b      	ldr	r3, [r7, #20]
+ 8002528:	f403 0240 	and.w	r2, r3, #12582912	@ 0xc00000
+ 800252c:	687b      	ldr	r3, [r7, #4]
+ 800252e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
- 80024c4:	429a      	cmp	r2, r3
- 80024c6:	d001      	beq.n	80024cc <HAL_RCC_OscConfig+0x64c>
+ 8002530:	429a      	cmp	r2, r3
+ 8002532:	d001      	beq.n	8002538 <HAL_RCC_OscConfig+0x64c>
         {
           return HAL_ERROR;
- 80024c8:	2301      	movs	r3, #1
- 80024ca:	e000      	b.n	80024ce <HAL_RCC_OscConfig+0x64e>
+ 8002534:	2301      	movs	r3, #1
+ 8002536:	e000      	b.n	800253a <HAL_RCC_OscConfig+0x64e>
         }
       }
     }
   }
 
   return HAL_OK;
- 80024cc:	2300      	movs	r3, #0
+ 8002538:	2300      	movs	r3, #0
 }
- 80024ce:	4618      	mov	r0, r3
- 80024d0:	3720      	adds	r7, #32
- 80024d2:	46bd      	mov	sp, r7
- 80024d4:	bd80      	pop	{r7, pc}
- 80024d6:	bf00      	nop
- 80024d8:	40023800 	.word	0x40023800
- 80024dc:	42470060 	.word	0x42470060
+ 800253a:	4618      	mov	r0, r3
+ 800253c:	3720      	adds	r7, #32
+ 800253e:	46bd      	mov	sp, r7
+ 8002540:	bd80      	pop	{r7, pc}
+ 8002542:	bf00      	nop
+ 8002544:	40023800 	.word	0x40023800
+ 8002548:	42470060 	.word	0x42470060
 
-080024e0 <HAL_RCC_ClockConfig>:
+0800254c <HAL_RCC_ClockConfig>:
   *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
   *         (for more details refer to section above "Initialization/de-initialization functions")
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
- 80024e0:	b580      	push	{r7, lr}
- 80024e2:	b084      	sub	sp, #16
- 80024e4:	af00      	add	r7, sp, #0
- 80024e6:	6078      	str	r0, [r7, #4]
- 80024e8:	6039      	str	r1, [r7, #0]
+ 800254c:	b580      	push	{r7, lr}
+ 800254e:	b084      	sub	sp, #16
+ 8002550:	af00      	add	r7, sp, #0
+ 8002552:	6078      	str	r0, [r7, #4]
+ 8002554:	6039      	str	r1, [r7, #0]
   uint32_t tickstart;
   HAL_StatusTypeDef status;
 
   /* Check the parameters */
   if(RCC_ClkInitStruct == NULL)
- 80024ea:	687b      	ldr	r3, [r7, #4]
- 80024ec:	2b00      	cmp	r3, #0
- 80024ee:	d101      	bne.n	80024f4 <HAL_RCC_ClockConfig+0x14>
+ 8002556:	687b      	ldr	r3, [r7, #4]
+ 8002558:	2b00      	cmp	r3, #0
+ 800255a:	d101      	bne.n	8002560 <HAL_RCC_ClockConfig+0x14>
   {
     return HAL_ERROR;
- 80024f0:	2301      	movs	r3, #1
- 80024f2:	e11a      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 800255c:	2301      	movs	r3, #1
+ 800255e:	e11a      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
   must be correctly programmed according to the frequency of the CPU clock
   (HCLK) and the supply voltage of the device. */
 
   /* Increasing the number of wait states because of higher CPU frequency */
   if(FLatency > __HAL_FLASH_GET_LATENCY())
- 80024f4:	4b8f      	ldr	r3, [pc, #572]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 80024f6:	681b      	ldr	r3, [r3, #0]
- 80024f8:	f003 0301 	and.w	r3, r3, #1
- 80024fc:	683a      	ldr	r2, [r7, #0]
- 80024fe:	429a      	cmp	r2, r3
- 8002500:	d919      	bls.n	8002536 <HAL_RCC_ClockConfig+0x56>
+ 8002560:	4b8f      	ldr	r3, [pc, #572]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002562:	681b      	ldr	r3, [r3, #0]
+ 8002564:	f003 0301 	and.w	r3, r3, #1
+ 8002568:	683a      	ldr	r2, [r7, #0]
+ 800256a:	429a      	cmp	r2, r3
+ 800256c:	d919      	bls.n	80025a2 <HAL_RCC_ClockConfig+0x56>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 8002502:	683b      	ldr	r3, [r7, #0]
- 8002504:	2b01      	cmp	r3, #1
- 8002506:	d105      	bne.n	8002514 <HAL_RCC_ClockConfig+0x34>
- 8002508:	4b8a      	ldr	r3, [pc, #552]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 800250a:	681b      	ldr	r3, [r3, #0]
- 800250c:	4a89      	ldr	r2, [pc, #548]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 800250e:	f043 0304 	orr.w	r3, r3, #4
- 8002512:	6013      	str	r3, [r2, #0]
- 8002514:	4b87      	ldr	r3, [pc, #540]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 8002516:	681b      	ldr	r3, [r3, #0]
- 8002518:	f023 0201 	bic.w	r2, r3, #1
- 800251c:	4985      	ldr	r1, [pc, #532]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 800251e:	683b      	ldr	r3, [r7, #0]
- 8002520:	4313      	orrs	r3, r2
- 8002522:	600b      	str	r3, [r1, #0]
+ 800256e:	683b      	ldr	r3, [r7, #0]
+ 8002570:	2b01      	cmp	r3, #1
+ 8002572:	d105      	bne.n	8002580 <HAL_RCC_ClockConfig+0x34>
+ 8002574:	4b8a      	ldr	r3, [pc, #552]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002576:	681b      	ldr	r3, [r3, #0]
+ 8002578:	4a89      	ldr	r2, [pc, #548]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 800257a:	f043 0304 	orr.w	r3, r3, #4
+ 800257e:	6013      	str	r3, [r2, #0]
+ 8002580:	4b87      	ldr	r3, [pc, #540]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002582:	681b      	ldr	r3, [r3, #0]
+ 8002584:	f023 0201 	bic.w	r2, r3, #1
+ 8002588:	4985      	ldr	r1, [pc, #532]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 800258a:	683b      	ldr	r3, [r7, #0]
+ 800258c:	4313      	orrs	r3, r2
+ 800258e:	600b      	str	r3, [r1, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 8002524:	4b83      	ldr	r3, [pc, #524]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 8002526:	681b      	ldr	r3, [r3, #0]
- 8002528:	f003 0301 	and.w	r3, r3, #1
- 800252c:	683a      	ldr	r2, [r7, #0]
- 800252e:	429a      	cmp	r2, r3
- 8002530:	d001      	beq.n	8002536 <HAL_RCC_ClockConfig+0x56>
+ 8002590:	4b83      	ldr	r3, [pc, #524]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002592:	681b      	ldr	r3, [r3, #0]
+ 8002594:	f003 0301 	and.w	r3, r3, #1
+ 8002598:	683a      	ldr	r2, [r7, #0]
+ 800259a:	429a      	cmp	r2, r3
+ 800259c:	d001      	beq.n	80025a2 <HAL_RCC_ClockConfig+0x56>
     {
       return HAL_ERROR;
- 8002532:	2301      	movs	r3, #1
- 8002534:	e0f9      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 800259e:	2301      	movs	r3, #1
+ 80025a0:	e0f9      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
     }
   }
 
   /*-------------------------- HCLK Configuration --------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 8002536:	687b      	ldr	r3, [r7, #4]
- 8002538:	681b      	ldr	r3, [r3, #0]
- 800253a:	f003 0302 	and.w	r3, r3, #2
- 800253e:	2b00      	cmp	r3, #0
- 8002540:	d008      	beq.n	8002554 <HAL_RCC_ClockConfig+0x74>
+ 80025a2:	687b      	ldr	r3, [r7, #4]
+ 80025a4:	681b      	ldr	r3, [r3, #0]
+ 80025a6:	f003 0302 	and.w	r3, r3, #2
+ 80025aa:	2b00      	cmp	r3, #0
+ 80025ac:	d008      	beq.n	80025c0 <HAL_RCC_ClockConfig+0x74>
   {
     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 8002542:	4b7d      	ldr	r3, [pc, #500]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002544:	689b      	ldr	r3, [r3, #8]
- 8002546:	f023 02f0 	bic.w	r2, r3, #240	@ 0xf0
- 800254a:	687b      	ldr	r3, [r7, #4]
- 800254c:	689b      	ldr	r3, [r3, #8]
- 800254e:	497a      	ldr	r1, [pc, #488]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002550:	4313      	orrs	r3, r2
- 8002552:	608b      	str	r3, [r1, #8]
+ 80025ae:	4b7d      	ldr	r3, [pc, #500]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80025b0:	689b      	ldr	r3, [r3, #8]
+ 80025b2:	f023 02f0 	bic.w	r2, r3, #240	@ 0xf0
+ 80025b6:	687b      	ldr	r3, [r7, #4]
+ 80025b8:	689b      	ldr	r3, [r3, #8]
+ 80025ba:	497a      	ldr	r1, [pc, #488]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80025bc:	4313      	orrs	r3, r2
+ 80025be:	608b      	str	r3, [r1, #8]
   }
 
   /*------------------------- SYSCLK Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 8002554:	687b      	ldr	r3, [r7, #4]
- 8002556:	681b      	ldr	r3, [r3, #0]
- 8002558:	f003 0301 	and.w	r3, r3, #1
- 800255c:	2b00      	cmp	r3, #0
- 800255e:	f000 808e 	beq.w	800267e <HAL_RCC_ClockConfig+0x19e>
+ 80025c0:	687b      	ldr	r3, [r7, #4]
+ 80025c2:	681b      	ldr	r3, [r3, #0]
+ 80025c4:	f003 0301 	and.w	r3, r3, #1
+ 80025c8:	2b00      	cmp	r3, #0
+ 80025ca:	f000 808e 	beq.w	80026ea <HAL_RCC_ClockConfig+0x19e>
   {
     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 
     /* HSE is selected as System Clock Source */
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 8002562:	687b      	ldr	r3, [r7, #4]
- 8002564:	685b      	ldr	r3, [r3, #4]
- 8002566:	2b02      	cmp	r3, #2
- 8002568:	d107      	bne.n	800257a <HAL_RCC_ClockConfig+0x9a>
+ 80025ce:	687b      	ldr	r3, [r7, #4]
+ 80025d0:	685b      	ldr	r3, [r3, #4]
+ 80025d2:	2b02      	cmp	r3, #2
+ 80025d4:	d107      	bne.n	80025e6 <HAL_RCC_ClockConfig+0x9a>
     {
       /* Check the HSE ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 800256a:	4b73      	ldr	r3, [pc, #460]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 800256c:	681b      	ldr	r3, [r3, #0]
- 800256e:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8002572:	2b00      	cmp	r3, #0
- 8002574:	d121      	bne.n	80025ba <HAL_RCC_ClockConfig+0xda>
+ 80025d6:	4b73      	ldr	r3, [pc, #460]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80025d8:	681b      	ldr	r3, [r3, #0]
+ 80025da:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 80025de:	2b00      	cmp	r3, #0
+ 80025e0:	d121      	bne.n	8002626 <HAL_RCC_ClockConfig+0xda>
       {
         return HAL_ERROR;
- 8002576:	2301      	movs	r3, #1
- 8002578:	e0d7      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 80025e2:	2301      	movs	r3, #1
+ 80025e4:	e0d7      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       }
     }
     /* PLL is selected as System Clock Source */
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 800257a:	687b      	ldr	r3, [r7, #4]
- 800257c:	685b      	ldr	r3, [r3, #4]
- 800257e:	2b03      	cmp	r3, #3
- 8002580:	d107      	bne.n	8002592 <HAL_RCC_ClockConfig+0xb2>
+ 80025e6:	687b      	ldr	r3, [r7, #4]
+ 80025e8:	685b      	ldr	r3, [r3, #4]
+ 80025ea:	2b03      	cmp	r3, #3
+ 80025ec:	d107      	bne.n	80025fe <HAL_RCC_ClockConfig+0xb2>
     {
       /* Check the PLL ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 8002582:	4b6d      	ldr	r3, [pc, #436]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002584:	681b      	ldr	r3, [r3, #0]
- 8002586:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
- 800258a:	2b00      	cmp	r3, #0
- 800258c:	d115      	bne.n	80025ba <HAL_RCC_ClockConfig+0xda>
+ 80025ee:	4b6d      	ldr	r3, [pc, #436]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80025f0:	681b      	ldr	r3, [r3, #0]
+ 80025f2:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80025f6:	2b00      	cmp	r3, #0
+ 80025f8:	d115      	bne.n	8002626 <HAL_RCC_ClockConfig+0xda>
       {
         return HAL_ERROR;
- 800258e:	2301      	movs	r3, #1
- 8002590:	e0cb      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 80025fa:	2301      	movs	r3, #1
+ 80025fc:	e0cb      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       }
     }
     /* HSI is selected as System Clock Source */
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
- 8002592:	687b      	ldr	r3, [r7, #4]
- 8002594:	685b      	ldr	r3, [r3, #4]
- 8002596:	2b01      	cmp	r3, #1
- 8002598:	d107      	bne.n	80025aa <HAL_RCC_ClockConfig+0xca>
+ 80025fe:	687b      	ldr	r3, [r7, #4]
+ 8002600:	685b      	ldr	r3, [r3, #4]
+ 8002602:	2b01      	cmp	r3, #1
+ 8002604:	d107      	bne.n	8002616 <HAL_RCC_ClockConfig+0xca>
     {
       /* Check the HSI ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800259a:	4b67      	ldr	r3, [pc, #412]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 800259c:	681b      	ldr	r3, [r3, #0]
- 800259e:	f003 0302 	and.w	r3, r3, #2
- 80025a2:	2b00      	cmp	r3, #0
- 80025a4:	d109      	bne.n	80025ba <HAL_RCC_ClockConfig+0xda>
+ 8002606:	4b67      	ldr	r3, [pc, #412]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002608:	681b      	ldr	r3, [r3, #0]
+ 800260a:	f003 0302 	and.w	r3, r3, #2
+ 800260e:	2b00      	cmp	r3, #0
+ 8002610:	d109      	bne.n	8002626 <HAL_RCC_ClockConfig+0xda>
       {
         return HAL_ERROR;
- 80025a6:	2301      	movs	r3, #1
- 80025a8:	e0bf      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 8002612:	2301      	movs	r3, #1
+ 8002614:	e0bf      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
     }
     /* MSI is selected as System Clock Source */
     else
     {
       /* Check the MSI ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 80025aa:	4b63      	ldr	r3, [pc, #396]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80025ac:	681b      	ldr	r3, [r3, #0]
- 80025ae:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 80025b2:	2b00      	cmp	r3, #0
- 80025b4:	d101      	bne.n	80025ba <HAL_RCC_ClockConfig+0xda>
+ 8002616:	4b63      	ldr	r3, [pc, #396]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002618:	681b      	ldr	r3, [r3, #0]
+ 800261a:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 800261e:	2b00      	cmp	r3, #0
+ 8002620:	d101      	bne.n	8002626 <HAL_RCC_ClockConfig+0xda>
       {
         return HAL_ERROR;
- 80025b6:	2301      	movs	r3, #1
- 80025b8:	e0b7      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 8002622:	2301      	movs	r3, #1
+ 8002624:	e0b7      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       }
     }
     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 80025ba:	4b5f      	ldr	r3, [pc, #380]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80025bc:	689b      	ldr	r3, [r3, #8]
- 80025be:	f023 0203 	bic.w	r2, r3, #3
- 80025c2:	687b      	ldr	r3, [r7, #4]
- 80025c4:	685b      	ldr	r3, [r3, #4]
- 80025c6:	495c      	ldr	r1, [pc, #368]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80025c8:	4313      	orrs	r3, r2
- 80025ca:	608b      	str	r3, [r1, #8]
+ 8002626:	4b5f      	ldr	r3, [pc, #380]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002628:	689b      	ldr	r3, [r3, #8]
+ 800262a:	f023 0203 	bic.w	r2, r3, #3
+ 800262e:	687b      	ldr	r3, [r7, #4]
+ 8002630:	685b      	ldr	r3, [r3, #4]
+ 8002632:	495c      	ldr	r1, [pc, #368]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002634:	4313      	orrs	r3, r2
+ 8002636:	608b      	str	r3, [r1, #8]
 
     /* Get Start Tick */
     tickstart = HAL_GetTick();
- 80025cc:	f7fe f9a6 	bl	800091c <HAL_GetTick>
- 80025d0:	60f8      	str	r0, [r7, #12]
+ 8002638:	f7fe f9a6 	bl	8000988 <HAL_GetTick>
+ 800263c:	60f8      	str	r0, [r7, #12]
 
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 80025d2:	687b      	ldr	r3, [r7, #4]
- 80025d4:	685b      	ldr	r3, [r3, #4]
- 80025d6:	2b02      	cmp	r3, #2
- 80025d8:	d112      	bne.n	8002600 <HAL_RCC_ClockConfig+0x120>
+ 800263e:	687b      	ldr	r3, [r7, #4]
+ 8002640:	685b      	ldr	r3, [r3, #4]
+ 8002642:	2b02      	cmp	r3, #2
+ 8002644:	d112      	bne.n	800266c <HAL_RCC_ClockConfig+0x120>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
- 80025da:	e00a      	b.n	80025f2 <HAL_RCC_ClockConfig+0x112>
+ 8002646:	e00a      	b.n	800265e <HAL_RCC_ClockConfig+0x112>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80025dc:	f7fe f99e 	bl	800091c <HAL_GetTick>
- 80025e0:	4602      	mov	r2, r0
- 80025e2:	68fb      	ldr	r3, [r7, #12]
- 80025e4:	1ad3      	subs	r3, r2, r3
- 80025e6:	f241 3288 	movw	r2, #5000	@ 0x1388
- 80025ea:	4293      	cmp	r3, r2
- 80025ec:	d901      	bls.n	80025f2 <HAL_RCC_ClockConfig+0x112>
+ 8002648:	f7fe f99e 	bl	8000988 <HAL_GetTick>
+ 800264c:	4602      	mov	r2, r0
+ 800264e:	68fb      	ldr	r3, [r7, #12]
+ 8002650:	1ad3      	subs	r3, r2, r3
+ 8002652:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8002656:	4293      	cmp	r3, r2
+ 8002658:	d901      	bls.n	800265e <HAL_RCC_ClockConfig+0x112>
         {
           return HAL_TIMEOUT;
- 80025ee:	2303      	movs	r3, #3
- 80025f0:	e09b      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 800265a:	2303      	movs	r3, #3
+ 800265c:	e09b      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
- 80025f2:	4b51      	ldr	r3, [pc, #324]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80025f4:	689b      	ldr	r3, [r3, #8]
- 80025f6:	f003 030c 	and.w	r3, r3, #12
- 80025fa:	2b08      	cmp	r3, #8
- 80025fc:	d1ee      	bne.n	80025dc <HAL_RCC_ClockConfig+0xfc>
- 80025fe:	e03e      	b.n	800267e <HAL_RCC_ClockConfig+0x19e>
+ 800265e:	4b51      	ldr	r3, [pc, #324]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002660:	689b      	ldr	r3, [r3, #8]
+ 8002662:	f003 030c 	and.w	r3, r3, #12
+ 8002666:	2b08      	cmp	r3, #8
+ 8002668:	d1ee      	bne.n	8002648 <HAL_RCC_ClockConfig+0xfc>
+ 800266a:	e03e      	b.n	80026ea <HAL_RCC_ClockConfig+0x19e>
         }
       }
     }
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8002600:	687b      	ldr	r3, [r7, #4]
- 8002602:	685b      	ldr	r3, [r3, #4]
- 8002604:	2b03      	cmp	r3, #3
- 8002606:	d112      	bne.n	800262e <HAL_RCC_ClockConfig+0x14e>
+ 800266c:	687b      	ldr	r3, [r7, #4]
+ 800266e:	685b      	ldr	r3, [r3, #4]
+ 8002670:	2b03      	cmp	r3, #3
+ 8002672:	d112      	bne.n	800269a <HAL_RCC_ClockConfig+0x14e>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 8002608:	e00a      	b.n	8002620 <HAL_RCC_ClockConfig+0x140>
+ 8002674:	e00a      	b.n	800268c <HAL_RCC_ClockConfig+0x140>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 800260a:	f7fe f987 	bl	800091c <HAL_GetTick>
- 800260e:	4602      	mov	r2, r0
- 8002610:	68fb      	ldr	r3, [r7, #12]
- 8002612:	1ad3      	subs	r3, r2, r3
- 8002614:	f241 3288 	movw	r2, #5000	@ 0x1388
- 8002618:	4293      	cmp	r3, r2
- 800261a:	d901      	bls.n	8002620 <HAL_RCC_ClockConfig+0x140>
+ 8002676:	f7fe f987 	bl	8000988 <HAL_GetTick>
+ 800267a:	4602      	mov	r2, r0
+ 800267c:	68fb      	ldr	r3, [r7, #12]
+ 800267e:	1ad3      	subs	r3, r2, r3
+ 8002680:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8002684:	4293      	cmp	r3, r2
+ 8002686:	d901      	bls.n	800268c <HAL_RCC_ClockConfig+0x140>
         {
           return HAL_TIMEOUT;
- 800261c:	2303      	movs	r3, #3
- 800261e:	e084      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 8002688:	2303      	movs	r3, #3
+ 800268a:	e084      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 8002620:	4b45      	ldr	r3, [pc, #276]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002622:	689b      	ldr	r3, [r3, #8]
- 8002624:	f003 030c 	and.w	r3, r3, #12
- 8002628:	2b0c      	cmp	r3, #12
- 800262a:	d1ee      	bne.n	800260a <HAL_RCC_ClockConfig+0x12a>
- 800262c:	e027      	b.n	800267e <HAL_RCC_ClockConfig+0x19e>
+ 800268c:	4b45      	ldr	r3, [pc, #276]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 800268e:	689b      	ldr	r3, [r3, #8]
+ 8002690:	f003 030c 	and.w	r3, r3, #12
+ 8002694:	2b0c      	cmp	r3, #12
+ 8002696:	d1ee      	bne.n	8002676 <HAL_RCC_ClockConfig+0x12a>
+ 8002698:	e027      	b.n	80026ea <HAL_RCC_ClockConfig+0x19e>
         }
       }
     }
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
- 800262e:	687b      	ldr	r3, [r7, #4]
- 8002630:	685b      	ldr	r3, [r3, #4]
- 8002632:	2b01      	cmp	r3, #1
- 8002634:	d11d      	bne.n	8002672 <HAL_RCC_ClockConfig+0x192>
+ 800269a:	687b      	ldr	r3, [r7, #4]
+ 800269c:	685b      	ldr	r3, [r3, #4]
+ 800269e:	2b01      	cmp	r3, #1
+ 80026a0:	d11d      	bne.n	80026de <HAL_RCC_ClockConfig+0x192>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
- 8002636:	e00a      	b.n	800264e <HAL_RCC_ClockConfig+0x16e>
+ 80026a2:	e00a      	b.n	80026ba <HAL_RCC_ClockConfig+0x16e>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8002638:	f7fe f970 	bl	800091c <HAL_GetTick>
- 800263c:	4602      	mov	r2, r0
- 800263e:	68fb      	ldr	r3, [r7, #12]
- 8002640:	1ad3      	subs	r3, r2, r3
- 8002642:	f241 3288 	movw	r2, #5000	@ 0x1388
- 8002646:	4293      	cmp	r3, r2
- 8002648:	d901      	bls.n	800264e <HAL_RCC_ClockConfig+0x16e>
+ 80026a4:	f7fe f970 	bl	8000988 <HAL_GetTick>
+ 80026a8:	4602      	mov	r2, r0
+ 80026aa:	68fb      	ldr	r3, [r7, #12]
+ 80026ac:	1ad3      	subs	r3, r2, r3
+ 80026ae:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 80026b2:	4293      	cmp	r3, r2
+ 80026b4:	d901      	bls.n	80026ba <HAL_RCC_ClockConfig+0x16e>
         {
           return HAL_TIMEOUT;
- 800264a:	2303      	movs	r3, #3
- 800264c:	e06d      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 80026b6:	2303      	movs	r3, #3
+ 80026b8:	e06d      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
- 800264e:	4b3a      	ldr	r3, [pc, #232]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002650:	689b      	ldr	r3, [r3, #8]
- 8002652:	f003 030c 	and.w	r3, r3, #12
- 8002656:	2b04      	cmp	r3, #4
- 8002658:	d1ee      	bne.n	8002638 <HAL_RCC_ClockConfig+0x158>
- 800265a:	e010      	b.n	800267e <HAL_RCC_ClockConfig+0x19e>
+ 80026ba:	4b3a      	ldr	r3, [pc, #232]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80026bc:	689b      	ldr	r3, [r3, #8]
+ 80026be:	f003 030c 	and.w	r3, r3, #12
+ 80026c2:	2b04      	cmp	r3, #4
+ 80026c4:	d1ee      	bne.n	80026a4 <HAL_RCC_ClockConfig+0x158>
+ 80026c6:	e010      	b.n	80026ea <HAL_RCC_ClockConfig+0x19e>
     }
     else
     {
       while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 800265c:	f7fe f95e 	bl	800091c <HAL_GetTick>
- 8002660:	4602      	mov	r2, r0
- 8002662:	68fb      	ldr	r3, [r7, #12]
- 8002664:	1ad3      	subs	r3, r2, r3
- 8002666:	f241 3288 	movw	r2, #5000	@ 0x1388
- 800266a:	4293      	cmp	r3, r2
- 800266c:	d901      	bls.n	8002672 <HAL_RCC_ClockConfig+0x192>
+ 80026c8:	f7fe f95e 	bl	8000988 <HAL_GetTick>
+ 80026cc:	4602      	mov	r2, r0
+ 80026ce:	68fb      	ldr	r3, [r7, #12]
+ 80026d0:	1ad3      	subs	r3, r2, r3
+ 80026d2:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 80026d6:	4293      	cmp	r3, r2
+ 80026d8:	d901      	bls.n	80026de <HAL_RCC_ClockConfig+0x192>
         {
           return HAL_TIMEOUT;
- 800266e:	2303      	movs	r3, #3
- 8002670:	e05b      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 80026da:	2303      	movs	r3, #3
+ 80026dc:	e05b      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
       while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
- 8002672:	4b31      	ldr	r3, [pc, #196]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002674:	689b      	ldr	r3, [r3, #8]
- 8002676:	f003 030c 	and.w	r3, r3, #12
- 800267a:	2b00      	cmp	r3, #0
- 800267c:	d1ee      	bne.n	800265c <HAL_RCC_ClockConfig+0x17c>
+ 80026de:	4b31      	ldr	r3, [pc, #196]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 80026e0:	689b      	ldr	r3, [r3, #8]
+ 80026e2:	f003 030c 	and.w	r3, r3, #12
+ 80026e6:	2b00      	cmp	r3, #0
+ 80026e8:	d1ee      	bne.n	80026c8 <HAL_RCC_ClockConfig+0x17c>
         }
       }
     }
   }
   /* Decreasing the number of wait states because of lower CPU frequency */
   if(FLatency < __HAL_FLASH_GET_LATENCY())
- 800267e:	4b2d      	ldr	r3, [pc, #180]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 8002680:	681b      	ldr	r3, [r3, #0]
- 8002682:	f003 0301 	and.w	r3, r3, #1
- 8002686:	683a      	ldr	r2, [r7, #0]
- 8002688:	429a      	cmp	r2, r3
- 800268a:	d219      	bcs.n	80026c0 <HAL_RCC_ClockConfig+0x1e0>
+ 80026ea:	4b2d      	ldr	r3, [pc, #180]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 80026ec:	681b      	ldr	r3, [r3, #0]
+ 80026ee:	f003 0301 	and.w	r3, r3, #1
+ 80026f2:	683a      	ldr	r2, [r7, #0]
+ 80026f4:	429a      	cmp	r2, r3
+ 80026f6:	d219      	bcs.n	800272c <HAL_RCC_ClockConfig+0x1e0>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 800268c:	683b      	ldr	r3, [r7, #0]
- 800268e:	2b01      	cmp	r3, #1
- 8002690:	d105      	bne.n	800269e <HAL_RCC_ClockConfig+0x1be>
- 8002692:	4b28      	ldr	r3, [pc, #160]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 8002694:	681b      	ldr	r3, [r3, #0]
- 8002696:	4a27      	ldr	r2, [pc, #156]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 8002698:	f043 0304 	orr.w	r3, r3, #4
- 800269c:	6013      	str	r3, [r2, #0]
- 800269e:	4b25      	ldr	r3, [pc, #148]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 80026a0:	681b      	ldr	r3, [r3, #0]
- 80026a2:	f023 0201 	bic.w	r2, r3, #1
- 80026a6:	4923      	ldr	r1, [pc, #140]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 80026a8:	683b      	ldr	r3, [r7, #0]
- 80026aa:	4313      	orrs	r3, r2
- 80026ac:	600b      	str	r3, [r1, #0]
+ 80026f8:	683b      	ldr	r3, [r7, #0]
+ 80026fa:	2b01      	cmp	r3, #1
+ 80026fc:	d105      	bne.n	800270a <HAL_RCC_ClockConfig+0x1be>
+ 80026fe:	4b28      	ldr	r3, [pc, #160]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002700:	681b      	ldr	r3, [r3, #0]
+ 8002702:	4a27      	ldr	r2, [pc, #156]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002704:	f043 0304 	orr.w	r3, r3, #4
+ 8002708:	6013      	str	r3, [r2, #0]
+ 800270a:	4b25      	ldr	r3, [pc, #148]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 800270c:	681b      	ldr	r3, [r3, #0]
+ 800270e:	f023 0201 	bic.w	r2, r3, #1
+ 8002712:	4923      	ldr	r1, [pc, #140]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 8002714:	683b      	ldr	r3, [r7, #0]
+ 8002716:	4313      	orrs	r3, r2
+ 8002718:	600b      	str	r3, [r1, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 80026ae:	4b21      	ldr	r3, [pc, #132]	@ (8002734 <HAL_RCC_ClockConfig+0x254>)
- 80026b0:	681b      	ldr	r3, [r3, #0]
- 80026b2:	f003 0301 	and.w	r3, r3, #1
- 80026b6:	683a      	ldr	r2, [r7, #0]
- 80026b8:	429a      	cmp	r2, r3
- 80026ba:	d001      	beq.n	80026c0 <HAL_RCC_ClockConfig+0x1e0>
+ 800271a:	4b21      	ldr	r3, [pc, #132]	@ (80027a0 <HAL_RCC_ClockConfig+0x254>)
+ 800271c:	681b      	ldr	r3, [r3, #0]
+ 800271e:	f003 0301 	and.w	r3, r3, #1
+ 8002722:	683a      	ldr	r2, [r7, #0]
+ 8002724:	429a      	cmp	r2, r3
+ 8002726:	d001      	beq.n	800272c <HAL_RCC_ClockConfig+0x1e0>
     {
       return HAL_ERROR;
- 80026bc:	2301      	movs	r3, #1
- 80026be:	e034      	b.n	800272a <HAL_RCC_ClockConfig+0x24a>
+ 8002728:	2301      	movs	r3, #1
+ 800272a:	e034      	b.n	8002796 <HAL_RCC_ClockConfig+0x24a>
     }
   }
 
   /*-------------------------- PCLK1 Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 80026c0:	687b      	ldr	r3, [r7, #4]
- 80026c2:	681b      	ldr	r3, [r3, #0]
- 80026c4:	f003 0304 	and.w	r3, r3, #4
- 80026c8:	2b00      	cmp	r3, #0
- 80026ca:	d008      	beq.n	80026de <HAL_RCC_ClockConfig+0x1fe>
+ 800272c:	687b      	ldr	r3, [r7, #4]
+ 800272e:	681b      	ldr	r3, [r3, #0]
+ 8002730:	f003 0304 	and.w	r3, r3, #4
+ 8002734:	2b00      	cmp	r3, #0
+ 8002736:	d008      	beq.n	800274a <HAL_RCC_ClockConfig+0x1fe>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 80026cc:	4b1a      	ldr	r3, [pc, #104]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80026ce:	689b      	ldr	r3, [r3, #8]
- 80026d0:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
- 80026d4:	687b      	ldr	r3, [r7, #4]
- 80026d6:	68db      	ldr	r3, [r3, #12]
- 80026d8:	4917      	ldr	r1, [pc, #92]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80026da:	4313      	orrs	r3, r2
- 80026dc:	608b      	str	r3, [r1, #8]
+ 8002738:	4b1a      	ldr	r3, [pc, #104]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 800273a:	689b      	ldr	r3, [r3, #8]
+ 800273c:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
+ 8002740:	687b      	ldr	r3, [r7, #4]
+ 8002742:	68db      	ldr	r3, [r3, #12]
+ 8002744:	4917      	ldr	r1, [pc, #92]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002746:	4313      	orrs	r3, r2
+ 8002748:	608b      	str	r3, [r1, #8]
   }
 
   /*-------------------------- PCLK2 Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 80026de:	687b      	ldr	r3, [r7, #4]
- 80026e0:	681b      	ldr	r3, [r3, #0]
- 80026e2:	f003 0308 	and.w	r3, r3, #8
- 80026e6:	2b00      	cmp	r3, #0
- 80026e8:	d009      	beq.n	80026fe <HAL_RCC_ClockConfig+0x21e>
+ 800274a:	687b      	ldr	r3, [r7, #4]
+ 800274c:	681b      	ldr	r3, [r3, #0]
+ 800274e:	f003 0308 	and.w	r3, r3, #8
+ 8002752:	2b00      	cmp	r3, #0
+ 8002754:	d009      	beq.n	800276a <HAL_RCC_ClockConfig+0x21e>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
- 80026ea:	4b13      	ldr	r3, [pc, #76]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80026ec:	689b      	ldr	r3, [r3, #8]
- 80026ee:	f423 5260 	bic.w	r2, r3, #14336	@ 0x3800
- 80026f2:	687b      	ldr	r3, [r7, #4]
- 80026f4:	691b      	ldr	r3, [r3, #16]
- 80026f6:	00db      	lsls	r3, r3, #3
- 80026f8:	490f      	ldr	r1, [pc, #60]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 80026fa:	4313      	orrs	r3, r2
- 80026fc:	608b      	str	r3, [r1, #8]
+ 8002756:	4b13      	ldr	r3, [pc, #76]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002758:	689b      	ldr	r3, [r3, #8]
+ 800275a:	f423 5260 	bic.w	r2, r3, #14336	@ 0x3800
+ 800275e:	687b      	ldr	r3, [r7, #4]
+ 8002760:	691b      	ldr	r3, [r3, #16]
+ 8002762:	00db      	lsls	r3, r3, #3
+ 8002764:	490f      	ldr	r1, [pc, #60]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002766:	4313      	orrs	r3, r2
+ 8002768:	608b      	str	r3, [r1, #8]
   }
 
   /* Update the SystemCoreClock global variable */
   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 80026fe:	f000 f823 	bl	8002748 <HAL_RCC_GetSysClockFreq>
- 8002702:	4602      	mov	r2, r0
- 8002704:	4b0c      	ldr	r3, [pc, #48]	@ (8002738 <HAL_RCC_ClockConfig+0x258>)
- 8002706:	689b      	ldr	r3, [r3, #8]
- 8002708:	091b      	lsrs	r3, r3, #4
- 800270a:	f003 030f 	and.w	r3, r3, #15
- 800270e:	490b      	ldr	r1, [pc, #44]	@ (800273c <HAL_RCC_ClockConfig+0x25c>)
- 8002710:	5ccb      	ldrb	r3, [r1, r3]
- 8002712:	fa22 f303 	lsr.w	r3, r2, r3
- 8002716:	4a0a      	ldr	r2, [pc, #40]	@ (8002740 <HAL_RCC_ClockConfig+0x260>)
- 8002718:	6013      	str	r3, [r2, #0]
+ 800276a:	f000 f823 	bl	80027b4 <HAL_RCC_GetSysClockFreq>
+ 800276e:	4602      	mov	r2, r0
+ 8002770:	4b0c      	ldr	r3, [pc, #48]	@ (80027a4 <HAL_RCC_ClockConfig+0x258>)
+ 8002772:	689b      	ldr	r3, [r3, #8]
+ 8002774:	091b      	lsrs	r3, r3, #4
+ 8002776:	f003 030f 	and.w	r3, r3, #15
+ 800277a:	490b      	ldr	r1, [pc, #44]	@ (80027a8 <HAL_RCC_ClockConfig+0x25c>)
+ 800277c:	5ccb      	ldrb	r3, [r1, r3]
+ 800277e:	fa22 f303 	lsr.w	r3, r2, r3
+ 8002782:	4a0a      	ldr	r2, [pc, #40]	@ (80027ac <HAL_RCC_ClockConfig+0x260>)
+ 8002784:	6013      	str	r3, [r2, #0]
 
   /* Configure the source of time base considering new system clocks settings*/
   status = HAL_InitTick(uwTickPrio);
- 800271a:	4b0a      	ldr	r3, [pc, #40]	@ (8002744 <HAL_RCC_ClockConfig+0x264>)
- 800271c:	681b      	ldr	r3, [r3, #0]
- 800271e:	4618      	mov	r0, r3
- 8002720:	f7fe f8b0 	bl	8000884 <HAL_InitTick>
- 8002724:	4603      	mov	r3, r0
- 8002726:	72fb      	strb	r3, [r7, #11]
+ 8002786:	4b0a      	ldr	r3, [pc, #40]	@ (80027b0 <HAL_RCC_ClockConfig+0x264>)
+ 8002788:	681b      	ldr	r3, [r3, #0]
+ 800278a:	4618      	mov	r0, r3
+ 800278c:	f7fe f8b0 	bl	80008f0 <HAL_InitTick>
+ 8002790:	4603      	mov	r3, r0
+ 8002792:	72fb      	strb	r3, [r7, #11]
 
   return status;
- 8002728:	7afb      	ldrb	r3, [r7, #11]
+ 8002794:	7afb      	ldrb	r3, [r7, #11]
 }
- 800272a:	4618      	mov	r0, r3
- 800272c:	3710      	adds	r7, #16
- 800272e:	46bd      	mov	sp, r7
- 8002730:	bd80      	pop	{r7, pc}
- 8002732:	bf00      	nop
- 8002734:	40023c00 	.word	0x40023c00
- 8002738:	40023800 	.word	0x40023800
- 800273c:	08002a3c 	.word	0x08002a3c
- 8002740:	20000000 	.word	0x20000000
- 8002744:	20000004 	.word	0x20000004
+ 8002796:	4618      	mov	r0, r3
+ 8002798:	3710      	adds	r7, #16
+ 800279a:	46bd      	mov	sp, r7
+ 800279c:	bd80      	pop	{r7, pc}
+ 800279e:	bf00      	nop
+ 80027a0:	40023c00 	.word	0x40023c00
+ 80027a4:	40023800 	.word	0x40023800
+ 80027a8:	08002aa8 	.word	0x08002aa8
+ 80027ac:	20000000 	.word	0x20000000
+ 80027b0:	20000004 	.word	0x20000004
 
-08002748 <HAL_RCC_GetSysClockFreq>:
+080027b4 <HAL_RCC_GetSysClockFreq>:
   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
   *
   * @retval SYSCLK frequency
   */
 uint32_t HAL_RCC_GetSysClockFreq(void)
 {
- 8002748:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
- 800274c:	b08e      	sub	sp, #56	@ 0x38
- 800274e:	af00      	add	r7, sp, #0
+ 80027b4:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 80027b8:	b08e      	sub	sp, #56	@ 0x38
+ 80027ba:	af00      	add	r7, sp, #0
   uint32_t tmpreg, pllm, plld, pllvco, msiclkrange, sysclockfreq;
 
   tmpreg = RCC->CFGR;
- 8002750:	4b58      	ldr	r3, [pc, #352]	@ (80028b4 <HAL_RCC_GetSysClockFreq+0x16c>)
- 8002752:	689b      	ldr	r3, [r3, #8]
- 8002754:	62fb      	str	r3, [r7, #44]	@ 0x2c
+ 80027bc:	4b58      	ldr	r3, [pc, #352]	@ (8002920 <HAL_RCC_GetSysClockFreq+0x16c>)
+ 80027be:	689b      	ldr	r3, [r3, #8]
+ 80027c0:	62fb      	str	r3, [r7, #44]	@ 0x2c
 
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (tmpreg & RCC_CFGR_SWS)
- 8002756:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
- 8002758:	f003 030c 	and.w	r3, r3, #12
- 800275c:	2b0c      	cmp	r3, #12
- 800275e:	d00d      	beq.n	800277c <HAL_RCC_GetSysClockFreq+0x34>
- 8002760:	2b0c      	cmp	r3, #12
- 8002762:	f200 8092 	bhi.w	800288a <HAL_RCC_GetSysClockFreq+0x142>
- 8002766:	2b04      	cmp	r3, #4
- 8002768:	d002      	beq.n	8002770 <HAL_RCC_GetSysClockFreq+0x28>
- 800276a:	2b08      	cmp	r3, #8
- 800276c:	d003      	beq.n	8002776 <HAL_RCC_GetSysClockFreq+0x2e>
- 800276e:	e08c      	b.n	800288a <HAL_RCC_GetSysClockFreq+0x142>
+ 80027c2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 80027c4:	f003 030c 	and.w	r3, r3, #12
+ 80027c8:	2b0c      	cmp	r3, #12
+ 80027ca:	d00d      	beq.n	80027e8 <HAL_RCC_GetSysClockFreq+0x34>
+ 80027cc:	2b0c      	cmp	r3, #12
+ 80027ce:	f200 8092 	bhi.w	80028f6 <HAL_RCC_GetSysClockFreq+0x142>
+ 80027d2:	2b04      	cmp	r3, #4
+ 80027d4:	d002      	beq.n	80027dc <HAL_RCC_GetSysClockFreq+0x28>
+ 80027d6:	2b08      	cmp	r3, #8
+ 80027d8:	d003      	beq.n	80027e2 <HAL_RCC_GetSysClockFreq+0x2e>
+ 80027da:	e08c      	b.n	80028f6 <HAL_RCC_GetSysClockFreq+0x142>
   {
     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
     {
       sysclockfreq = HSI_VALUE;
- 8002770:	4b51      	ldr	r3, [pc, #324]	@ (80028b8 <HAL_RCC_GetSysClockFreq+0x170>)
- 8002772:	633b      	str	r3, [r7, #48]	@ 0x30
+ 80027dc:	4b51      	ldr	r3, [pc, #324]	@ (8002924 <HAL_RCC_GetSysClockFreq+0x170>)
+ 80027de:	633b      	str	r3, [r7, #48]	@ 0x30
       break;
- 8002774:	e097      	b.n	80028a6 <HAL_RCC_GetSysClockFreq+0x15e>
+ 80027e0:	e097      	b.n	8002912 <HAL_RCC_GetSysClockFreq+0x15e>
     }
     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
     {
       sysclockfreq = HSE_VALUE;
- 8002776:	4b51      	ldr	r3, [pc, #324]	@ (80028bc <HAL_RCC_GetSysClockFreq+0x174>)
- 8002778:	633b      	str	r3, [r7, #48]	@ 0x30
+ 80027e2:	4b51      	ldr	r3, [pc, #324]	@ (8002928 <HAL_RCC_GetSysClockFreq+0x174>)
+ 80027e4:	633b      	str	r3, [r7, #48]	@ 0x30
       break;
- 800277a:	e094      	b.n	80028a6 <HAL_RCC_GetSysClockFreq+0x15e>
+ 80027e6:	e094      	b.n	8002912 <HAL_RCC_GetSysClockFreq+0x15e>
     }
     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
     {
       pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos];
- 800277c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
- 800277e:	0c9b      	lsrs	r3, r3, #18
- 8002780:	f003 020f 	and.w	r2, r3, #15
- 8002784:	4b4e      	ldr	r3, [pc, #312]	@ (80028c0 <HAL_RCC_GetSysClockFreq+0x178>)
- 8002786:	5c9b      	ldrb	r3, [r3, r2]
- 8002788:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 80027e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 80027ea:	0c9b      	lsrs	r3, r3, #18
+ 80027ec:	f003 020f 	and.w	r2, r3, #15
+ 80027f0:	4b4e      	ldr	r3, [pc, #312]	@ (800292c <HAL_RCC_GetSysClockFreq+0x178>)
+ 80027f2:	5c9b      	ldrb	r3, [r3, r2]
+ 80027f4:	62bb      	str	r3, [r7, #40]	@ 0x28
       plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U;
- 800278a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
- 800278c:	0d9b      	lsrs	r3, r3, #22
- 800278e:	f003 0303 	and.w	r3, r3, #3
- 8002792:	3301      	adds	r3, #1
- 8002794:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80027f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 80027f8:	0d9b      	lsrs	r3, r3, #22
+ 80027fa:	f003 0303 	and.w	r3, r3, #3
+ 80027fe:	3301      	adds	r3, #1
+ 8002800:	627b      	str	r3, [r7, #36]	@ 0x24
       if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
- 8002796:	4b47      	ldr	r3, [pc, #284]	@ (80028b4 <HAL_RCC_GetSysClockFreq+0x16c>)
- 8002798:	689b      	ldr	r3, [r3, #8]
- 800279a:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 800279e:	2b00      	cmp	r3, #0
- 80027a0:	d021      	beq.n	80027e6 <HAL_RCC_GetSysClockFreq+0x9e>
+ 8002802:	4b47      	ldr	r3, [pc, #284]	@ (8002920 <HAL_RCC_GetSysClockFreq+0x16c>)
+ 8002804:	689b      	ldr	r3, [r3, #8]
+ 8002806:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
+ 800280a:	2b00      	cmp	r3, #0
+ 800280c:	d021      	beq.n	8002852 <HAL_RCC_GetSysClockFreq+0x9e>
       {
         /* HSE used as PLL clock source */
         pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld);
- 80027a2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
- 80027a4:	2200      	movs	r2, #0
- 80027a6:	61bb      	str	r3, [r7, #24]
- 80027a8:	61fa      	str	r2, [r7, #28]
- 80027aa:	4b44      	ldr	r3, [pc, #272]	@ (80028bc <HAL_RCC_GetSysClockFreq+0x174>)
- 80027ac:	e9d7 8906 	ldrd	r8, r9, [r7, #24]
- 80027b0:	464a      	mov	r2, r9
- 80027b2:	fb03 f202 	mul.w	r2, r3, r2
- 80027b6:	2300      	movs	r3, #0
- 80027b8:	4644      	mov	r4, r8
- 80027ba:	fb04 f303 	mul.w	r3, r4, r3
- 80027be:	4413      	add	r3, r2
- 80027c0:	4a3e      	ldr	r2, [pc, #248]	@ (80028bc <HAL_RCC_GetSysClockFreq+0x174>)
- 80027c2:	4644      	mov	r4, r8
- 80027c4:	fba4 0102 	umull	r0, r1, r4, r2
- 80027c8:	440b      	add	r3, r1
- 80027ca:	4619      	mov	r1, r3
- 80027cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 80027ce:	2200      	movs	r2, #0
- 80027d0:	613b      	str	r3, [r7, #16]
- 80027d2:	617a      	str	r2, [r7, #20]
- 80027d4:	e9d7 2304 	ldrd	r2, r3, [r7, #16]
- 80027d8:	f7fd fcd0 	bl	800017c <__aeabi_uldivmod>
- 80027dc:	4602      	mov	r2, r0
- 80027de:	460b      	mov	r3, r1
- 80027e0:	4613      	mov	r3, r2
- 80027e2:	637b      	str	r3, [r7, #52]	@ 0x34
- 80027e4:	e04e      	b.n	8002884 <HAL_RCC_GetSysClockFreq+0x13c>
+ 800280e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
+ 8002810:	2200      	movs	r2, #0
+ 8002812:	61bb      	str	r3, [r7, #24]
+ 8002814:	61fa      	str	r2, [r7, #28]
+ 8002816:	4b44      	ldr	r3, [pc, #272]	@ (8002928 <HAL_RCC_GetSysClockFreq+0x174>)
+ 8002818:	e9d7 8906 	ldrd	r8, r9, [r7, #24]
+ 800281c:	464a      	mov	r2, r9
+ 800281e:	fb03 f202 	mul.w	r2, r3, r2
+ 8002822:	2300      	movs	r3, #0
+ 8002824:	4644      	mov	r4, r8
+ 8002826:	fb04 f303 	mul.w	r3, r4, r3
+ 800282a:	4413      	add	r3, r2
+ 800282c:	4a3e      	ldr	r2, [pc, #248]	@ (8002928 <HAL_RCC_GetSysClockFreq+0x174>)
+ 800282e:	4644      	mov	r4, r8
+ 8002830:	fba4 0102 	umull	r0, r1, r4, r2
+ 8002834:	440b      	add	r3, r1
+ 8002836:	4619      	mov	r1, r3
+ 8002838:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 800283a:	2200      	movs	r2, #0
+ 800283c:	613b      	str	r3, [r7, #16]
+ 800283e:	617a      	str	r2, [r7, #20]
+ 8002840:	e9d7 2304 	ldrd	r2, r3, [r7, #16]
+ 8002844:	f7fd fc9a 	bl	800017c <__aeabi_uldivmod>
+ 8002848:	4602      	mov	r2, r0
+ 800284a:	460b      	mov	r3, r1
+ 800284c:	4613      	mov	r3, r2
+ 800284e:	637b      	str	r3, [r7, #52]	@ 0x34
+ 8002850:	e04e      	b.n	80028f0 <HAL_RCC_GetSysClockFreq+0x13c>
       }
       else
       {
         /* HSI used as PLL clock source */
         pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld);
- 80027e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
- 80027e8:	2200      	movs	r2, #0
- 80027ea:	469a      	mov	sl, r3
- 80027ec:	4693      	mov	fp, r2
- 80027ee:	4652      	mov	r2, sl
- 80027f0:	465b      	mov	r3, fp
- 80027f2:	f04f 0000 	mov.w	r0, #0
- 80027f6:	f04f 0100 	mov.w	r1, #0
- 80027fa:	0159      	lsls	r1, r3, #5
- 80027fc:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
- 8002800:	0150      	lsls	r0, r2, #5
- 8002802:	4602      	mov	r2, r0
- 8002804:	460b      	mov	r3, r1
- 8002806:	ebb2 080a 	subs.w	r8, r2, sl
- 800280a:	eb63 090b 	sbc.w	r9, r3, fp
- 800280e:	f04f 0200 	mov.w	r2, #0
- 8002812:	f04f 0300 	mov.w	r3, #0
- 8002816:	ea4f 1389 	mov.w	r3, r9, lsl #6
- 800281a:	ea43 6398 	orr.w	r3, r3, r8, lsr #26
- 800281e:	ea4f 1288 	mov.w	r2, r8, lsl #6
- 8002822:	ebb2 0408 	subs.w	r4, r2, r8
- 8002826:	eb63 0509 	sbc.w	r5, r3, r9
- 800282a:	f04f 0200 	mov.w	r2, #0
- 800282e:	f04f 0300 	mov.w	r3, #0
- 8002832:	00eb      	lsls	r3, r5, #3
- 8002834:	ea43 7354 	orr.w	r3, r3, r4, lsr #29
- 8002838:	00e2      	lsls	r2, r4, #3
- 800283a:	4614      	mov	r4, r2
- 800283c:	461d      	mov	r5, r3
- 800283e:	eb14 030a 	adds.w	r3, r4, sl
- 8002842:	603b      	str	r3, [r7, #0]
- 8002844:	eb45 030b 	adc.w	r3, r5, fp
- 8002848:	607b      	str	r3, [r7, #4]
- 800284a:	f04f 0200 	mov.w	r2, #0
- 800284e:	f04f 0300 	mov.w	r3, #0
- 8002852:	e9d7 4500 	ldrd	r4, r5, [r7]
- 8002856:	4629      	mov	r1, r5
- 8002858:	028b      	lsls	r3, r1, #10
- 800285a:	4620      	mov	r0, r4
- 800285c:	4629      	mov	r1, r5
- 800285e:	4604      	mov	r4, r0
- 8002860:	ea43 5394 	orr.w	r3, r3, r4, lsr #22
- 8002864:	4601      	mov	r1, r0
- 8002866:	028a      	lsls	r2, r1, #10
- 8002868:	4610      	mov	r0, r2
- 800286a:	4619      	mov	r1, r3
- 800286c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 800286e:	2200      	movs	r2, #0
- 8002870:	60bb      	str	r3, [r7, #8]
- 8002872:	60fa      	str	r2, [r7, #12]
- 8002874:	e9d7 2302 	ldrd	r2, r3, [r7, #8]
- 8002878:	f7fd fc80 	bl	800017c <__aeabi_uldivmod>
- 800287c:	4602      	mov	r2, r0
- 800287e:	460b      	mov	r3, r1
- 8002880:	4613      	mov	r3, r2
- 8002882:	637b      	str	r3, [r7, #52]	@ 0x34
+ 8002852:	6abb      	ldr	r3, [r7, #40]	@ 0x28
+ 8002854:	2200      	movs	r2, #0
+ 8002856:	469a      	mov	sl, r3
+ 8002858:	4693      	mov	fp, r2
+ 800285a:	4652      	mov	r2, sl
+ 800285c:	465b      	mov	r3, fp
+ 800285e:	f04f 0000 	mov.w	r0, #0
+ 8002862:	f04f 0100 	mov.w	r1, #0
+ 8002866:	0159      	lsls	r1, r3, #5
+ 8002868:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
+ 800286c:	0150      	lsls	r0, r2, #5
+ 800286e:	4602      	mov	r2, r0
+ 8002870:	460b      	mov	r3, r1
+ 8002872:	ebb2 080a 	subs.w	r8, r2, sl
+ 8002876:	eb63 090b 	sbc.w	r9, r3, fp
+ 800287a:	f04f 0200 	mov.w	r2, #0
+ 800287e:	f04f 0300 	mov.w	r3, #0
+ 8002882:	ea4f 1389 	mov.w	r3, r9, lsl #6
+ 8002886:	ea43 6398 	orr.w	r3, r3, r8, lsr #26
+ 800288a:	ea4f 1288 	mov.w	r2, r8, lsl #6
+ 800288e:	ebb2 0408 	subs.w	r4, r2, r8
+ 8002892:	eb63 0509 	sbc.w	r5, r3, r9
+ 8002896:	f04f 0200 	mov.w	r2, #0
+ 800289a:	f04f 0300 	mov.w	r3, #0
+ 800289e:	00eb      	lsls	r3, r5, #3
+ 80028a0:	ea43 7354 	orr.w	r3, r3, r4, lsr #29
+ 80028a4:	00e2      	lsls	r2, r4, #3
+ 80028a6:	4614      	mov	r4, r2
+ 80028a8:	461d      	mov	r5, r3
+ 80028aa:	eb14 030a 	adds.w	r3, r4, sl
+ 80028ae:	603b      	str	r3, [r7, #0]
+ 80028b0:	eb45 030b 	adc.w	r3, r5, fp
+ 80028b4:	607b      	str	r3, [r7, #4]
+ 80028b6:	f04f 0200 	mov.w	r2, #0
+ 80028ba:	f04f 0300 	mov.w	r3, #0
+ 80028be:	e9d7 4500 	ldrd	r4, r5, [r7]
+ 80028c2:	4629      	mov	r1, r5
+ 80028c4:	028b      	lsls	r3, r1, #10
+ 80028c6:	4620      	mov	r0, r4
+ 80028c8:	4629      	mov	r1, r5
+ 80028ca:	4604      	mov	r4, r0
+ 80028cc:	ea43 5394 	orr.w	r3, r3, r4, lsr #22
+ 80028d0:	4601      	mov	r1, r0
+ 80028d2:	028a      	lsls	r2, r1, #10
+ 80028d4:	4610      	mov	r0, r2
+ 80028d6:	4619      	mov	r1, r3
+ 80028d8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80028da:	2200      	movs	r2, #0
+ 80028dc:	60bb      	str	r3, [r7, #8]
+ 80028de:	60fa      	str	r2, [r7, #12]
+ 80028e0:	e9d7 2302 	ldrd	r2, r3, [r7, #8]
+ 80028e4:	f7fd fc4a 	bl	800017c <__aeabi_uldivmod>
+ 80028e8:	4602      	mov	r2, r0
+ 80028ea:	460b      	mov	r3, r1
+ 80028ec:	4613      	mov	r3, r2
+ 80028ee:	637b      	str	r3, [r7, #52]	@ 0x34
       }
       sysclockfreq = pllvco;
- 8002884:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
- 8002886:	633b      	str	r3, [r7, #48]	@ 0x30
+ 80028f0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
+ 80028f2:	633b      	str	r3, [r7, #48]	@ 0x30
       break;
- 8002888:	e00d      	b.n	80028a6 <HAL_RCC_GetSysClockFreq+0x15e>
+ 80028f4:	e00d      	b.n	8002912 <HAL_RCC_GetSysClockFreq+0x15e>
     }
     case RCC_SYSCLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
     default: /* MSI used as system clock */
     {
       msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos;
- 800288a:	4b0a      	ldr	r3, [pc, #40]	@ (80028b4 <HAL_RCC_GetSysClockFreq+0x16c>)
- 800288c:	685b      	ldr	r3, [r3, #4]
- 800288e:	0b5b      	lsrs	r3, r3, #13
- 8002890:	f003 0307 	and.w	r3, r3, #7
- 8002894:	623b      	str	r3, [r7, #32]
+ 80028f6:	4b0a      	ldr	r3, [pc, #40]	@ (8002920 <HAL_RCC_GetSysClockFreq+0x16c>)
+ 80028f8:	685b      	ldr	r3, [r3, #4]
+ 80028fa:	0b5b      	lsrs	r3, r3, #13
+ 80028fc:	f003 0307 	and.w	r3, r3, #7
+ 8002900:	623b      	str	r3, [r7, #32]
       sysclockfreq = (32768U * (1UL << (msiclkrange + 1U)));
- 8002896:	6a3b      	ldr	r3, [r7, #32]
- 8002898:	3301      	adds	r3, #1
- 800289a:	f44f 4200 	mov.w	r2, #32768	@ 0x8000
- 800289e:	fa02 f303 	lsl.w	r3, r2, r3
- 80028a2:	633b      	str	r3, [r7, #48]	@ 0x30
+ 8002902:	6a3b      	ldr	r3, [r7, #32]
+ 8002904:	3301      	adds	r3, #1
+ 8002906:	f44f 4200 	mov.w	r2, #32768	@ 0x8000
+ 800290a:	fa02 f303 	lsl.w	r3, r2, r3
+ 800290e:	633b      	str	r3, [r7, #48]	@ 0x30
       break;
- 80028a4:	bf00      	nop
+ 8002910:	bf00      	nop
     }
   }
   return sysclockfreq;
- 80028a6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8002912:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 }
- 80028a8:	4618      	mov	r0, r3
- 80028aa:	3738      	adds	r7, #56	@ 0x38
- 80028ac:	46bd      	mov	sp, r7
- 80028ae:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
- 80028b2:	bf00      	nop
- 80028b4:	40023800 	.word	0x40023800
- 80028b8:	00f42400 	.word	0x00f42400
- 80028bc:	016e3600 	.word	0x016e3600
- 80028c0:	08002a30 	.word	0x08002a30
+ 8002914:	4618      	mov	r0, r3
+ 8002916:	3738      	adds	r7, #56	@ 0x38
+ 8002918:	46bd      	mov	sp, r7
+ 800291a:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
+ 800291e:	bf00      	nop
+ 8002920:	40023800 	.word	0x40023800
+ 8002924:	00f42400 	.word	0x00f42400
+ 8002928:	016e3600 	.word	0x016e3600
+ 800292c:	08002a9c 	.word	0x08002a9c
 
-080028c4 <HAL_RCC_GetHCLKFreq>:
+08002930 <HAL_RCC_GetHCLKFreq>:
   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
   *         and updated within this function
   * @retval HCLK frequency
   */
 uint32_t HAL_RCC_GetHCLKFreq(void)
 {
- 80028c4:	b480      	push	{r7}
- 80028c6:	af00      	add	r7, sp, #0
+ 8002930:	b480      	push	{r7}
+ 8002932:	af00      	add	r7, sp, #0
   return SystemCoreClock;
- 80028c8:	4b02      	ldr	r3, [pc, #8]	@ (80028d4 <HAL_RCC_GetHCLKFreq+0x10>)
- 80028ca:	681b      	ldr	r3, [r3, #0]
+ 8002934:	4b02      	ldr	r3, [pc, #8]	@ (8002940 <HAL_RCC_GetHCLKFreq+0x10>)
+ 8002936:	681b      	ldr	r3, [r3, #0]
 }
- 80028cc:	4618      	mov	r0, r3
- 80028ce:	46bd      	mov	sp, r7
- 80028d0:	bc80      	pop	{r7}
- 80028d2:	4770      	bx	lr
- 80028d4:	20000000 	.word	0x20000000
+ 8002938:	4618      	mov	r0, r3
+ 800293a:	46bd      	mov	sp, r7
+ 800293c:	bc80      	pop	{r7}
+ 800293e:	4770      	bx	lr
+ 8002940:	20000000 	.word	0x20000000
 
-080028d8 <HAL_RCC_GetPCLK1Freq>:
+08002944 <HAL_RCC_GetPCLK1Freq>:
   * @note   Each time PCLK1 changes, this function must be called to update the
   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
   * @retval PCLK1 frequency
   */
 uint32_t HAL_RCC_GetPCLK1Freq(void)
 {
- 80028d8:	b580      	push	{r7, lr}
- 80028da:	af00      	add	r7, sp, #0
+ 8002944:	b580      	push	{r7, lr}
+ 8002946:	af00      	add	r7, sp, #0
   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
- 80028dc:	f7ff fff2 	bl	80028c4 <HAL_RCC_GetHCLKFreq>
- 80028e0:	4602      	mov	r2, r0
- 80028e2:	4b05      	ldr	r3, [pc, #20]	@ (80028f8 <HAL_RCC_GetPCLK1Freq+0x20>)
- 80028e4:	689b      	ldr	r3, [r3, #8]
- 80028e6:	0a1b      	lsrs	r3, r3, #8
- 80028e8:	f003 0307 	and.w	r3, r3, #7
- 80028ec:	4903      	ldr	r1, [pc, #12]	@ (80028fc <HAL_RCC_GetPCLK1Freq+0x24>)
- 80028ee:	5ccb      	ldrb	r3, [r1, r3]
- 80028f0:	fa22 f303 	lsr.w	r3, r2, r3
+ 8002948:	f7ff fff2 	bl	8002930 <HAL_RCC_GetHCLKFreq>
+ 800294c:	4602      	mov	r2, r0
+ 800294e:	4b05      	ldr	r3, [pc, #20]	@ (8002964 <HAL_RCC_GetPCLK1Freq+0x20>)
+ 8002950:	689b      	ldr	r3, [r3, #8]
+ 8002952:	0a1b      	lsrs	r3, r3, #8
+ 8002954:	f003 0307 	and.w	r3, r3, #7
+ 8002958:	4903      	ldr	r1, [pc, #12]	@ (8002968 <HAL_RCC_GetPCLK1Freq+0x24>)
+ 800295a:	5ccb      	ldrb	r3, [r1, r3]
+ 800295c:	fa22 f303 	lsr.w	r3, r2, r3
 }
- 80028f4:	4618      	mov	r0, r3
- 80028f6:	bd80      	pop	{r7, pc}
- 80028f8:	40023800 	.word	0x40023800
- 80028fc:	08002a4c 	.word	0x08002a4c
+ 8002960:	4618      	mov	r0, r3
+ 8002962:	bd80      	pop	{r7, pc}
+ 8002964:	40023800 	.word	0x40023800
+ 8002968:	08002ab8 	.word	0x08002ab8
 
-08002900 <RCC_SetFlashLatencyFromMSIRange>:
+0800296c <RCC_SetFlashLatencyFromMSIRange>:
             voltage range
   * @param  MSIrange  MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_6
   * @retval HAL status
   */
 static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange)
 {
- 8002900:	b480      	push	{r7}
- 8002902:	b087      	sub	sp, #28
- 8002904:	af00      	add	r7, sp, #0
- 8002906:	6078      	str	r0, [r7, #4]
+ 800296c:	b480      	push	{r7}
+ 800296e:	b087      	sub	sp, #28
+ 8002970:	af00      	add	r7, sp, #0
+ 8002972:	6078      	str	r0, [r7, #4]
   uint32_t vos;
   uint32_t latency = FLASH_LATENCY_0;  /* default value 0WS */
- 8002908:	2300      	movs	r3, #0
- 800290a:	613b      	str	r3, [r7, #16]
+ 8002974:	2300      	movs	r3, #0
+ 8002976:	613b      	str	r3, [r7, #16]
 
   /* HCLK can reach 4 MHz only if AHB prescaler = 1 */
   if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)
- 800290c:	4b29      	ldr	r3, [pc, #164]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 800290e:	689b      	ldr	r3, [r3, #8]
- 8002910:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
- 8002914:	2b00      	cmp	r3, #0
- 8002916:	d12c      	bne.n	8002972 <RCC_SetFlashLatencyFromMSIRange+0x72>
+ 8002978:	4b29      	ldr	r3, [pc, #164]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 800297a:	689b      	ldr	r3, [r3, #8]
+ 800297c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
+ 8002980:	2b00      	cmp	r3, #0
+ 8002982:	d12c      	bne.n	80029de <RCC_SetFlashLatencyFromMSIRange+0x72>
   {
     if(__HAL_RCC_PWR_IS_CLK_ENABLED())
- 8002918:	4b26      	ldr	r3, [pc, #152]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 800291a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800291c:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 8002920:	2b00      	cmp	r3, #0
- 8002922:	d005      	beq.n	8002930 <RCC_SetFlashLatencyFromMSIRange+0x30>
+ 8002984:	4b26      	ldr	r3, [pc, #152]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 8002986:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8002988:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 800298c:	2b00      	cmp	r3, #0
+ 800298e:	d005      	beq.n	800299c <RCC_SetFlashLatencyFromMSIRange+0x30>
     {
       vos = READ_BIT(PWR->CR, PWR_CR_VOS);
- 8002924:	4b24      	ldr	r3, [pc, #144]	@ (80029b8 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
- 8002926:	681b      	ldr	r3, [r3, #0]
- 8002928:	f403 53c0 	and.w	r3, r3, #6144	@ 0x1800
- 800292c:	617b      	str	r3, [r7, #20]
- 800292e:	e016      	b.n	800295e <RCC_SetFlashLatencyFromMSIRange+0x5e>
+ 8002990:	4b24      	ldr	r3, [pc, #144]	@ (8002a24 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
+ 8002992:	681b      	ldr	r3, [r3, #0]
+ 8002994:	f403 53c0 	and.w	r3, r3, #6144	@ 0x1800
+ 8002998:	617b      	str	r3, [r7, #20]
+ 800299a:	e016      	b.n	80029ca <RCC_SetFlashLatencyFromMSIRange+0x5e>
     }
     else
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 8002930:	4b20      	ldr	r3, [pc, #128]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 8002932:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002934:	4a1f      	ldr	r2, [pc, #124]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 8002936:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
- 800293a:	6253      	str	r3, [r2, #36]	@ 0x24
- 800293c:	4b1d      	ldr	r3, [pc, #116]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 800293e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002940:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 8002944:	60fb      	str	r3, [r7, #12]
- 8002946:	68fb      	ldr	r3, [r7, #12]
+ 800299c:	4b20      	ldr	r3, [pc, #128]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 800299e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80029a0:	4a1f      	ldr	r2, [pc, #124]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 80029a2:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 80029a6:	6253      	str	r3, [r2, #36]	@ 0x24
+ 80029a8:	4b1d      	ldr	r3, [pc, #116]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 80029aa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80029ac:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 80029b0:	60fb      	str	r3, [r7, #12]
+ 80029b2:	68fb      	ldr	r3, [r7, #12]
       vos = READ_BIT(PWR->CR, PWR_CR_VOS);
- 8002948:	4b1b      	ldr	r3, [pc, #108]	@ (80029b8 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
- 800294a:	681b      	ldr	r3, [r3, #0]
- 800294c:	f403 53c0 	and.w	r3, r3, #6144	@ 0x1800
- 8002950:	617b      	str	r3, [r7, #20]
+ 80029b4:	4b1b      	ldr	r3, [pc, #108]	@ (8002a24 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
+ 80029b6:	681b      	ldr	r3, [r3, #0]
+ 80029b8:	f403 53c0 	and.w	r3, r3, #6144	@ 0x1800
+ 80029bc:	617b      	str	r3, [r7, #20]
       __HAL_RCC_PWR_CLK_DISABLE();
- 8002952:	4b18      	ldr	r3, [pc, #96]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 8002954:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002956:	4a17      	ldr	r2, [pc, #92]	@ (80029b4 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
- 8002958:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
- 800295c:	6253      	str	r3, [r2, #36]	@ 0x24
+ 80029be:	4b18      	ldr	r3, [pc, #96]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 80029c0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80029c2:	4a17      	ldr	r2, [pc, #92]	@ (8002a20 <RCC_SetFlashLatencyFromMSIRange+0xb4>)
+ 80029c4:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
+ 80029c8:	6253      	str	r3, [r2, #36]	@ 0x24
     }
 
     /* Check if need to set latency 1 only for Range 3 & HCLK = 4MHz */
     if((vos == PWR_REGULATOR_VOLTAGE_SCALE3) && (MSIrange == RCC_MSIRANGE_6))
- 800295e:	697b      	ldr	r3, [r7, #20]
- 8002960:	f5b3 5fc0 	cmp.w	r3, #6144	@ 0x1800
- 8002964:	d105      	bne.n	8002972 <RCC_SetFlashLatencyFromMSIRange+0x72>
- 8002966:	687b      	ldr	r3, [r7, #4]
- 8002968:	f5b3 4f40 	cmp.w	r3, #49152	@ 0xc000
- 800296c:	d101      	bne.n	8002972 <RCC_SetFlashLatencyFromMSIRange+0x72>
+ 80029ca:	697b      	ldr	r3, [r7, #20]
+ 80029cc:	f5b3 5fc0 	cmp.w	r3, #6144	@ 0x1800
+ 80029d0:	d105      	bne.n	80029de <RCC_SetFlashLatencyFromMSIRange+0x72>
+ 80029d2:	687b      	ldr	r3, [r7, #4]
+ 80029d4:	f5b3 4f40 	cmp.w	r3, #49152	@ 0xc000
+ 80029d8:	d101      	bne.n	80029de <RCC_SetFlashLatencyFromMSIRange+0x72>
     {
       latency = FLASH_LATENCY_1; /* 1WS */
- 800296e:	2301      	movs	r3, #1
- 8002970:	613b      	str	r3, [r7, #16]
+ 80029da:	2301      	movs	r3, #1
+ 80029dc:	613b      	str	r3, [r7, #16]
     }
   }
 
   __HAL_FLASH_SET_LATENCY(latency);
- 8002972:	693b      	ldr	r3, [r7, #16]
- 8002974:	2b01      	cmp	r3, #1
- 8002976:	d105      	bne.n	8002984 <RCC_SetFlashLatencyFromMSIRange+0x84>
- 8002978:	4b10      	ldr	r3, [pc, #64]	@ (80029bc <RCC_SetFlashLatencyFromMSIRange+0xbc>)
- 800297a:	681b      	ldr	r3, [r3, #0]
- 800297c:	4a0f      	ldr	r2, [pc, #60]	@ (80029bc <RCC_SetFlashLatencyFromMSIRange+0xbc>)
- 800297e:	f043 0304 	orr.w	r3, r3, #4
- 8002982:	6013      	str	r3, [r2, #0]
- 8002984:	4b0d      	ldr	r3, [pc, #52]	@ (80029bc <RCC_SetFlashLatencyFromMSIRange+0xbc>)
- 8002986:	681b      	ldr	r3, [r3, #0]
- 8002988:	f023 0201 	bic.w	r2, r3, #1
- 800298c:	490b      	ldr	r1, [pc, #44]	@ (80029bc <RCC_SetFlashLatencyFromMSIRange+0xbc>)
- 800298e:	693b      	ldr	r3, [r7, #16]
- 8002990:	4313      	orrs	r3, r2
- 8002992:	600b      	str	r3, [r1, #0]
+ 80029de:	693b      	ldr	r3, [r7, #16]
+ 80029e0:	2b01      	cmp	r3, #1
+ 80029e2:	d105      	bne.n	80029f0 <RCC_SetFlashLatencyFromMSIRange+0x84>
+ 80029e4:	4b10      	ldr	r3, [pc, #64]	@ (8002a28 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
+ 80029e6:	681b      	ldr	r3, [r3, #0]
+ 80029e8:	4a0f      	ldr	r2, [pc, #60]	@ (8002a28 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
+ 80029ea:	f043 0304 	orr.w	r3, r3, #4
+ 80029ee:	6013      	str	r3, [r2, #0]
+ 80029f0:	4b0d      	ldr	r3, [pc, #52]	@ (8002a28 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
+ 80029f2:	681b      	ldr	r3, [r3, #0]
+ 80029f4:	f023 0201 	bic.w	r2, r3, #1
+ 80029f8:	490b      	ldr	r1, [pc, #44]	@ (8002a28 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
+ 80029fa:	693b      	ldr	r3, [r7, #16]
+ 80029fc:	4313      	orrs	r3, r2
+ 80029fe:	600b      	str	r3, [r1, #0]
 
   /* Check that the new number of wait states is taken into account to access the Flash
      memory by reading the FLASH_ACR register */
   if(__HAL_FLASH_GET_LATENCY() != latency)
- 8002994:	4b09      	ldr	r3, [pc, #36]	@ (80029bc <RCC_SetFlashLatencyFromMSIRange+0xbc>)
- 8002996:	681b      	ldr	r3, [r3, #0]
- 8002998:	f003 0301 	and.w	r3, r3, #1
- 800299c:	693a      	ldr	r2, [r7, #16]
- 800299e:	429a      	cmp	r2, r3
- 80029a0:	d001      	beq.n	80029a6 <RCC_SetFlashLatencyFromMSIRange+0xa6>
+ 8002a00:	4b09      	ldr	r3, [pc, #36]	@ (8002a28 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
+ 8002a02:	681b      	ldr	r3, [r3, #0]
+ 8002a04:	f003 0301 	and.w	r3, r3, #1
+ 8002a08:	693a      	ldr	r2, [r7, #16]
+ 8002a0a:	429a      	cmp	r2, r3
+ 8002a0c:	d001      	beq.n	8002a12 <RCC_SetFlashLatencyFromMSIRange+0xa6>
   {
     return HAL_ERROR;
- 80029a2:	2301      	movs	r3, #1
- 80029a4:	e000      	b.n	80029a8 <RCC_SetFlashLatencyFromMSIRange+0xa8>
+ 8002a0e:	2301      	movs	r3, #1
+ 8002a10:	e000      	b.n	8002a14 <RCC_SetFlashLatencyFromMSIRange+0xa8>
   }
 
   return HAL_OK;
- 80029a6:	2300      	movs	r3, #0
+ 8002a12:	2300      	movs	r3, #0
 }
- 80029a8:	4618      	mov	r0, r3
- 80029aa:	371c      	adds	r7, #28
- 80029ac:	46bd      	mov	sp, r7
- 80029ae:	bc80      	pop	{r7}
- 80029b0:	4770      	bx	lr
- 80029b2:	bf00      	nop
- 80029b4:	40023800 	.word	0x40023800
- 80029b8:	40007000 	.word	0x40007000
- 80029bc:	40023c00 	.word	0x40023c00
+ 8002a14:	4618      	mov	r0, r3
+ 8002a16:	371c      	adds	r7, #28
+ 8002a18:	46bd      	mov	sp, r7
+ 8002a1a:	bc80      	pop	{r7}
+ 8002a1c:	4770      	bx	lr
+ 8002a1e:	bf00      	nop
+ 8002a20:	40023800 	.word	0x40023800
+ 8002a24:	40007000 	.word	0x40007000
+ 8002a28:	40023c00 	.word	0x40023c00
 
-080029c0 <memset>:
- 80029c0:	4603      	mov	r3, r0
- 80029c2:	4402      	add	r2, r0
- 80029c4:	4293      	cmp	r3, r2
- 80029c6:	d100      	bne.n	80029ca <memset+0xa>
- 80029c8:	4770      	bx	lr
- 80029ca:	f803 1b01 	strb.w	r1, [r3], #1
- 80029ce:	e7f9      	b.n	80029c4 <memset+0x4>
+08002a2c <memset>:
+ 8002a2c:	4603      	mov	r3, r0
+ 8002a2e:	4402      	add	r2, r0
+ 8002a30:	4293      	cmp	r3, r2
+ 8002a32:	d100      	bne.n	8002a36 <memset+0xa>
+ 8002a34:	4770      	bx	lr
+ 8002a36:	f803 1b01 	strb.w	r1, [r3], #1
+ 8002a3a:	e7f9      	b.n	8002a30 <memset+0x4>
 
-080029d0 <__libc_init_array>:
- 80029d0:	b570      	push	{r4, r5, r6, lr}
- 80029d2:	2600      	movs	r6, #0
- 80029d4:	4d0c      	ldr	r5, [pc, #48]	@ (8002a08 <__libc_init_array+0x38>)
- 80029d6:	4c0d      	ldr	r4, [pc, #52]	@ (8002a0c <__libc_init_array+0x3c>)
- 80029d8:	1b64      	subs	r4, r4, r5
- 80029da:	10a4      	asrs	r4, r4, #2
- 80029dc:	42a6      	cmp	r6, r4
- 80029de:	d109      	bne.n	80029f4 <__libc_init_array+0x24>
- 80029e0:	f000 f81a 	bl	8002a18 <_init>
- 80029e4:	2600      	movs	r6, #0
- 80029e6:	4d0a      	ldr	r5, [pc, #40]	@ (8002a10 <__libc_init_array+0x40>)
- 80029e8:	4c0a      	ldr	r4, [pc, #40]	@ (8002a14 <__libc_init_array+0x44>)
- 80029ea:	1b64      	subs	r4, r4, r5
- 80029ec:	10a4      	asrs	r4, r4, #2
- 80029ee:	42a6      	cmp	r6, r4
- 80029f0:	d105      	bne.n	80029fe <__libc_init_array+0x2e>
- 80029f2:	bd70      	pop	{r4, r5, r6, pc}
- 80029f4:	f855 3b04 	ldr.w	r3, [r5], #4
- 80029f8:	4798      	blx	r3
- 80029fa:	3601      	adds	r6, #1
- 80029fc:	e7ee      	b.n	80029dc <__libc_init_array+0xc>
- 80029fe:	f855 3b04 	ldr.w	r3, [r5], #4
- 8002a02:	4798      	blx	r3
- 8002a04:	3601      	adds	r6, #1
- 8002a06:	e7f2      	b.n	80029ee <__libc_init_array+0x1e>
- 8002a08:	08002a5c 	.word	0x08002a5c
- 8002a0c:	08002a5c 	.word	0x08002a5c
- 8002a10:	08002a5c 	.word	0x08002a5c
- 8002a14:	08002a60 	.word	0x08002a60
+08002a3c <__libc_init_array>:
+ 8002a3c:	b570      	push	{r4, r5, r6, lr}
+ 8002a3e:	2600      	movs	r6, #0
+ 8002a40:	4d0c      	ldr	r5, [pc, #48]	@ (8002a74 <__libc_init_array+0x38>)
+ 8002a42:	4c0d      	ldr	r4, [pc, #52]	@ (8002a78 <__libc_init_array+0x3c>)
+ 8002a44:	1b64      	subs	r4, r4, r5
+ 8002a46:	10a4      	asrs	r4, r4, #2
+ 8002a48:	42a6      	cmp	r6, r4
+ 8002a4a:	d109      	bne.n	8002a60 <__libc_init_array+0x24>
+ 8002a4c:	f000 f81a 	bl	8002a84 <_init>
+ 8002a50:	2600      	movs	r6, #0
+ 8002a52:	4d0a      	ldr	r5, [pc, #40]	@ (8002a7c <__libc_init_array+0x40>)
+ 8002a54:	4c0a      	ldr	r4, [pc, #40]	@ (8002a80 <__libc_init_array+0x44>)
+ 8002a56:	1b64      	subs	r4, r4, r5
+ 8002a58:	10a4      	asrs	r4, r4, #2
+ 8002a5a:	42a6      	cmp	r6, r4
+ 8002a5c:	d105      	bne.n	8002a6a <__libc_init_array+0x2e>
+ 8002a5e:	bd70      	pop	{r4, r5, r6, pc}
+ 8002a60:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8002a64:	4798      	blx	r3
+ 8002a66:	3601      	adds	r6, #1
+ 8002a68:	e7ee      	b.n	8002a48 <__libc_init_array+0xc>
+ 8002a6a:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8002a6e:	4798      	blx	r3
+ 8002a70:	3601      	adds	r6, #1
+ 8002a72:	e7f2      	b.n	8002a5a <__libc_init_array+0x1e>
+ 8002a74:	08002ac8 	.word	0x08002ac8
+ 8002a78:	08002ac8 	.word	0x08002ac8
+ 8002a7c:	08002ac8 	.word	0x08002ac8
+ 8002a80:	08002acc 	.word	0x08002acc
 
-08002a18 <_init>:
- 8002a18:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8002a1a:	bf00      	nop
- 8002a1c:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8002a1e:	bc08      	pop	{r3}
- 8002a20:	469e      	mov	lr, r3
- 8002a22:	4770      	bx	lr
+08002a84 <_init>:
+ 8002a84:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8002a86:	bf00      	nop
+ 8002a88:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8002a8a:	bc08      	pop	{r3}
+ 8002a8c:	469e      	mov	lr, r3
+ 8002a8e:	4770      	bx	lr
 
-08002a24 <_fini>:
- 8002a24:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8002a26:	bf00      	nop
- 8002a28:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8002a2a:	bc08      	pop	{r3}
- 8002a2c:	469e      	mov	lr, r3
- 8002a2e:	4770      	bx	lr
+08002a90 <_fini>:
+ 8002a90:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8002a92:	bf00      	nop
+ 8002a94:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8002a96:	bc08      	pop	{r3}
+ 8002a98:	469e      	mov	lr, r3
+ 8002a9a:	4770      	bx	lr
diff --git a/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.map b/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.map
index 08bbc4f..5e31964 100644
--- a/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.map
+++ b/TP6_ACCELEROMETRE/Debug/TP6_ACCELEROMETRE.map
@@ -2282,7 +2282,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
                 0x08000000                g_pfnVectors
                 0x0800013c                        . = ALIGN (0x4)
 
-.text           0x0800013c     0x28f4
+.text           0x0800013c     0x2960
                 0x0800013c                        . = ALIGN (0x4)
  *(.text)
  .text          0x0800013c       0x40 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
@@ -2294,290 +2294,290 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
                 0x080004ac                __aeabi_ldiv0
                 0x080004ac                __aeabi_idiv0
  *(.text*)
- .text.main     0x080004b0       0xa0 ./Core/Src/main.o
+ .text.main     0x080004b0      0x10c ./Core/Src/main.o
                 0x080004b0                main
  .text.SystemClock_Config
-                0x08000550       0x8c ./Core/Src/main.o
-                0x08000550                SystemClock_Config
+                0x080005bc       0x8c ./Core/Src/main.o
+                0x080005bc                SystemClock_Config
  .text.MX_I2C1_Init
-                0x080005dc       0x5c ./Core/Src/main.o
+                0x08000648       0x5c ./Core/Src/main.o
  .text.MX_GPIO_Init
-                0x08000638       0x7c ./Core/Src/main.o
+                0x080006a4       0x7c ./Core/Src/main.o
  .text.Error_Handler
-                0x080006b4        0xc ./Core/Src/main.o
-                0x080006b4                Error_Handler
+                0x08000720        0xc ./Core/Src/main.o
+                0x08000720                Error_Handler
  .text.HAL_MspInit
-                0x080006c0       0x5c ./Core/Src/stm32l1xx_hal_msp.o
-                0x080006c0                HAL_MspInit
+                0x0800072c       0x5c ./Core/Src/stm32l1xx_hal_msp.o
+                0x0800072c                HAL_MspInit
  .text.HAL_I2C_MspInit
-                0x0800071c       0x88 ./Core/Src/stm32l1xx_hal_msp.o
-                0x0800071c                HAL_I2C_MspInit
+                0x08000788       0x88 ./Core/Src/stm32l1xx_hal_msp.o
+                0x08000788                HAL_I2C_MspInit
  .text.NMI_Handler
-                0x080007a4        0x8 ./Core/Src/stm32l1xx_it.o
-                0x080007a4                NMI_Handler
+                0x08000810        0x8 ./Core/Src/stm32l1xx_it.o
+                0x08000810                NMI_Handler
  .text.HardFault_Handler
-                0x080007ac        0x8 ./Core/Src/stm32l1xx_it.o
-                0x080007ac                HardFault_Handler
+                0x08000818        0x8 ./Core/Src/stm32l1xx_it.o
+                0x08000818                HardFault_Handler
  .text.MemManage_Handler
-                0x080007b4        0x8 ./Core/Src/stm32l1xx_it.o
-                0x080007b4                MemManage_Handler
+                0x08000820        0x8 ./Core/Src/stm32l1xx_it.o
+                0x08000820                MemManage_Handler
  .text.BusFault_Handler
-                0x080007bc        0x8 ./Core/Src/stm32l1xx_it.o
-                0x080007bc                BusFault_Handler
+                0x08000828        0x8 ./Core/Src/stm32l1xx_it.o
+                0x08000828                BusFault_Handler
  .text.UsageFault_Handler
-                0x080007c4        0x8 ./Core/Src/stm32l1xx_it.o
-                0x080007c4                UsageFault_Handler
+                0x08000830        0x8 ./Core/Src/stm32l1xx_it.o
+                0x08000830                UsageFault_Handler
  .text.SVC_Handler
-                0x080007cc        0xc ./Core/Src/stm32l1xx_it.o
-                0x080007cc                SVC_Handler
+                0x08000838        0xc ./Core/Src/stm32l1xx_it.o
+                0x08000838                SVC_Handler
  .text.DebugMon_Handler
-                0x080007d8        0xc ./Core/Src/stm32l1xx_it.o
-                0x080007d8                DebugMon_Handler
+                0x08000844        0xc ./Core/Src/stm32l1xx_it.o
+                0x08000844                DebugMon_Handler
  .text.PendSV_Handler
-                0x080007e4        0xc ./Core/Src/stm32l1xx_it.o
-                0x080007e4                PendSV_Handler
+                0x08000850        0xc ./Core/Src/stm32l1xx_it.o
+                0x08000850                PendSV_Handler
  .text.SysTick_Handler
-                0x080007f0        0xc ./Core/Src/stm32l1xx_it.o
-                0x080007f0                SysTick_Handler
+                0x0800085c        0xc ./Core/Src/stm32l1xx_it.o
+                0x0800085c                SysTick_Handler
  .text.SystemInit
-                0x080007fc        0xc ./Core/Src/system_stm32l1xx.o
-                0x080007fc                SystemInit
+                0x08000868        0xc ./Core/Src/system_stm32l1xx.o
+                0x08000868                SystemInit
  .text.Reset_Handler
-                0x08000808       0x48 ./Core/Startup/startup_stm32l152retx.o
-                0x08000808                Reset_Handler
+                0x08000874       0x48 ./Core/Startup/startup_stm32l152retx.o
+                0x08000874                Reset_Handler
  .text.Default_Handler
-                0x08000850        0x2 ./Core/Startup/startup_stm32l152retx.o
-                0x08000850                DMA2_Channel3_IRQHandler
-                0x08000850                EXTI2_IRQHandler
-                0x08000850                COMP_ACQ_IRQHandler
-                0x08000850                TIM10_IRQHandler
-                0x08000850                USB_HP_IRQHandler
-                0x08000850                TIM6_IRQHandler
-                0x08000850                PVD_IRQHandler
-                0x08000850                EXTI3_IRQHandler
-                0x08000850                EXTI0_IRQHandler
-                0x08000850                I2C2_EV_IRQHandler
-                0x08000850                SPI1_IRQHandler
-                0x08000850                USB_FS_WKUP_IRQHandler
-                0x08000850                DMA2_Channel2_IRQHandler
-                0x08000850                DMA1_Channel4_IRQHandler
-                0x08000850                ADC1_IRQHandler
-                0x08000850                USART3_IRQHandler
-                0x08000850                DMA1_Channel7_IRQHandler
-                0x08000850                LCD_IRQHandler
-                0x08000850                UART5_IRQHandler
-                0x08000850                TIM4_IRQHandler
-                0x08000850                DMA2_Channel1_IRQHandler
-                0x08000850                I2C1_EV_IRQHandler
-                0x08000850                DMA1_Channel6_IRQHandler
-                0x08000850                UART4_IRQHandler
-                0x08000850                DMA2_Channel4_IRQHandler
-                0x08000850                TIM3_IRQHandler
-                0x08000850                RCC_IRQHandler
-                0x08000850                DMA1_Channel1_IRQHandler
-                0x08000850                Default_Handler
-                0x08000850                EXTI15_10_IRQHandler
-                0x08000850                TIM7_IRQHandler
-                0x08000850                TIM5_IRQHandler
-                0x08000850                EXTI9_5_IRQHandler
-                0x08000850                TIM9_IRQHandler
-                0x08000850                TAMPER_STAMP_IRQHandler
-                0x08000850                RTC_WKUP_IRQHandler
-                0x08000850                SPI2_IRQHandler
-                0x08000850                DMA2_Channel5_IRQHandler
-                0x08000850                DMA1_Channel5_IRQHandler
-                0x08000850                USB_LP_IRQHandler
-                0x08000850                EXTI4_IRQHandler
-                0x08000850                DMA1_Channel3_IRQHandler
-                0x08000850                COMP_IRQHandler
-                0x08000850                WWDG_IRQHandler
-                0x08000850                TIM2_IRQHandler
-                0x08000850                DAC_IRQHandler
-                0x08000850                EXTI1_IRQHandler
-                0x08000850                TIM11_IRQHandler
-                0x08000850                USART2_IRQHandler
-                0x08000850                I2C2_ER_IRQHandler
-                0x08000850                DMA1_Channel2_IRQHandler
-                0x08000850                FLASH_IRQHandler
-                0x08000850                USART1_IRQHandler
-                0x08000850                SPI3_IRQHandler
-                0x08000850                I2C1_ER_IRQHandler
-                0x08000850                RTC_Alarm_IRQHandler
+                0x080008bc        0x2 ./Core/Startup/startup_stm32l152retx.o
+                0x080008bc                DMA2_Channel3_IRQHandler
+                0x080008bc                EXTI2_IRQHandler
+                0x080008bc                COMP_ACQ_IRQHandler
+                0x080008bc                TIM10_IRQHandler
+                0x080008bc                USB_HP_IRQHandler
+                0x080008bc                TIM6_IRQHandler
+                0x080008bc                PVD_IRQHandler
+                0x080008bc                EXTI3_IRQHandler
+                0x080008bc                EXTI0_IRQHandler
+                0x080008bc                I2C2_EV_IRQHandler
+                0x080008bc                SPI1_IRQHandler
+                0x080008bc                USB_FS_WKUP_IRQHandler
+                0x080008bc                DMA2_Channel2_IRQHandler
+                0x080008bc                DMA1_Channel4_IRQHandler
+                0x080008bc                ADC1_IRQHandler
+                0x080008bc                USART3_IRQHandler
+                0x080008bc                DMA1_Channel7_IRQHandler
+                0x080008bc                LCD_IRQHandler
+                0x080008bc                UART5_IRQHandler
+                0x080008bc                TIM4_IRQHandler
+                0x080008bc                DMA2_Channel1_IRQHandler
+                0x080008bc                I2C1_EV_IRQHandler
+                0x080008bc                DMA1_Channel6_IRQHandler
+                0x080008bc                UART4_IRQHandler
+                0x080008bc                DMA2_Channel4_IRQHandler
+                0x080008bc                TIM3_IRQHandler
+                0x080008bc                RCC_IRQHandler
+                0x080008bc                DMA1_Channel1_IRQHandler
+                0x080008bc                Default_Handler
+                0x080008bc                EXTI15_10_IRQHandler
+                0x080008bc                TIM7_IRQHandler
+                0x080008bc                TIM5_IRQHandler
+                0x080008bc                EXTI9_5_IRQHandler
+                0x080008bc                TIM9_IRQHandler
+                0x080008bc                TAMPER_STAMP_IRQHandler
+                0x080008bc                RTC_WKUP_IRQHandler
+                0x080008bc                SPI2_IRQHandler
+                0x080008bc                DMA2_Channel5_IRQHandler
+                0x080008bc                DMA1_Channel5_IRQHandler
+                0x080008bc                USB_LP_IRQHandler
+                0x080008bc                EXTI4_IRQHandler
+                0x080008bc                DMA1_Channel3_IRQHandler
+                0x080008bc                COMP_IRQHandler
+                0x080008bc                WWDG_IRQHandler
+                0x080008bc                TIM2_IRQHandler
+                0x080008bc                DAC_IRQHandler
+                0x080008bc                EXTI1_IRQHandler
+                0x080008bc                TIM11_IRQHandler
+                0x080008bc                USART2_IRQHandler
+                0x080008bc                I2C2_ER_IRQHandler
+                0x080008bc                DMA1_Channel2_IRQHandler
+                0x080008bc                FLASH_IRQHandler
+                0x080008bc                USART1_IRQHandler
+                0x080008bc                SPI3_IRQHandler
+                0x080008bc                I2C1_ER_IRQHandler
+                0x080008bc                RTC_Alarm_IRQHandler
  .text.HAL_Init
-                0x08000852       0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x08000852                HAL_Init
- *fill*         0x08000882        0x2 
+                0x080008be       0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x080008be                HAL_Init
+ *fill*         0x080008ee        0x2 
  .text.HAL_InitTick
-                0x08000884       0x74 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x08000884                HAL_InitTick
+                0x080008f0       0x74 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x080008f0                HAL_InitTick
  .text.HAL_IncTick
-                0x080008f8       0x24 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x080008f8                HAL_IncTick
+                0x08000964       0x24 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x08000964                HAL_IncTick
  .text.HAL_GetTick
-                0x0800091c       0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x0800091c                HAL_GetTick
+                0x08000988       0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x08000988                HAL_GetTick
  .text.HAL_Delay
-                0x08000930       0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x08000930                HAL_Delay
+                0x0800099c       0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x0800099c                HAL_Delay
  .text.__NVIC_SetPriorityGrouping
-                0x08000974       0x48 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x080009e0       0x48 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  .text.__NVIC_GetPriorityGrouping
-                0x080009bc       0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000a28       0x1c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  .text.__NVIC_SetPriority
-                0x080009d8       0x54 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000a44       0x54 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  .text.NVIC_EncodePriority
-                0x08000a2c       0x64 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000a98       0x64 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  .text.SysTick_Config
-                0x08000a90       0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000afc       0x44 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  .text.HAL_NVIC_SetPriorityGrouping
-                0x08000ad4       0x16 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
-                0x08000ad4                HAL_NVIC_SetPriorityGrouping
+                0x08000b40       0x16 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000b40                HAL_NVIC_SetPriorityGrouping
  .text.HAL_NVIC_SetPriority
-                0x08000aea       0x38 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
-                0x08000aea                HAL_NVIC_SetPriority
+                0x08000b56       0x38 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000b56                HAL_NVIC_SetPriority
  .text.HAL_SYSTICK_Config
-                0x08000b22       0x18 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
-                0x08000b22                HAL_SYSTICK_Config
- *fill*         0x08000b3a        0x2 
+                0x08000b8e       0x18 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+                0x08000b8e                HAL_SYSTICK_Config
+ *fill*         0x08000ba6        0x2 
  .text.HAL_GPIO_Init
-                0x08000b3c      0x320 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
-                0x08000b3c                HAL_GPIO_Init
+                0x08000ba8      0x320 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+                0x08000ba8                HAL_GPIO_Init
  .text.HAL_GPIO_WritePin
-                0x08000e5c       0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
-                0x08000e5c                HAL_GPIO_WritePin
+                0x08000ec8       0x30 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+                0x08000ec8                HAL_GPIO_WritePin
  .text.HAL_I2C_Init
-                0x08000e8c      0x288 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
-                0x08000e8c                HAL_I2C_Init
+                0x08000ef8      0x288 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08000ef8                HAL_I2C_Init
  .text.HAL_I2C_Master_Transmit
-                0x08001114      0x1fc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
-                0x08001114                HAL_I2C_Master_Transmit
+                0x08001180      0x1fc ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001180                HAL_I2C_Master_Transmit
  .text.HAL_I2C_Master_Receive
-                0x08001310      0x464 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
-                0x08001310                HAL_I2C_Master_Receive
+                0x0800137c      0x464 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x0800137c                HAL_I2C_Master_Receive
  .text.I2C_MasterRequestWrite
-                0x08001774      0x104 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x080017e0      0x104 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_MasterRequestRead
-                0x08001878      0x19c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x080018e4      0x19c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_WaitOnFlagUntilTimeout
-                0x08001a14       0xf4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001a80       0xf4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_WaitOnMasterAddressFlagUntilTimeout
-                0x08001b08      0x140 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001b74      0x140 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_WaitOnTXEFlagUntilTimeout
-                0x08001c48       0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001cb4       0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_WaitOnBTFFlagUntilTimeout
-                0x08001cd8       0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001d44       0x90 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_WaitOnRXNEFlagUntilTimeout
-                0x08001d68       0xba ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+                0x08001dd4       0xba ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .text.I2C_IsAcknowledgeFailed
-                0x08001e22       0x5c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
- *fill*         0x08001e7e        0x2 
+                0x08001e8e       0x5c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+ *fill*         0x08001eea        0x2 
  .text.HAL_RCC_OscConfig
-                0x08001e80      0x660 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
-                0x08001e80                HAL_RCC_OscConfig
+                0x08001eec      0x660 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+                0x08001eec                HAL_RCC_OscConfig
  .text.HAL_RCC_ClockConfig
-                0x080024e0      0x268 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
-                0x080024e0                HAL_RCC_ClockConfig
+                0x0800254c      0x268 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+                0x0800254c                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x08002748      0x17c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
-                0x08002748                HAL_RCC_GetSysClockFreq
+                0x080027b4      0x17c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+                0x080027b4                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_GetHCLKFreq
-                0x080028c4       0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
-                0x080028c4                HAL_RCC_GetHCLKFreq
+                0x08002930       0x14 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+                0x08002930                HAL_RCC_GetHCLKFreq
  .text.HAL_RCC_GetPCLK1Freq
-                0x080028d8       0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
-                0x080028d8                HAL_RCC_GetPCLK1Freq
+                0x08002944       0x28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+                0x08002944                HAL_RCC_GetPCLK1Freq
  .text.RCC_SetFlashLatencyFromMSIRange
-                0x08002900       0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
- .text.memset   0x080029c0       0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o)
-                0x080029c0                memset
+                0x0800296c       0xc0 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+ .text.memset   0x08002a2c       0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-memset.o)
+                0x08002a2c                memset
  .text.__libc_init_array
-                0x080029d0       0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o)
-                0x080029d0                __libc_init_array
+                0x08002a3c       0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(libc_a-init.o)
+                0x08002a3c                __libc_init_array
  *(.glue_7)
- .glue_7        0x08002a18        0x0 linker stubs
+ .glue_7        0x08002a84        0x0 linker stubs
  *(.glue_7t)
- .glue_7t       0x08002a18        0x0 linker stubs
+ .glue_7t       0x08002a84        0x0 linker stubs
  *(.eh_frame)
- .eh_frame      0x08002a18        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
+ .eh_frame      0x08002a84        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
  *(.init)
- .init          0x08002a18        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o
-                0x08002a18                _init
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+ .init          0x08002a84        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o
+                0x08002a84                _init
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  *(.fini)
- .fini          0x08002a24        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o
-                0x08002a24                _fini
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-                0x08002a30                        . = ALIGN (0x4)
-                0x08002a30                        _etext = .
+ .fini          0x08002a90        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crti.o
+                0x08002a90                _fini
+ .fini          0x08002a94        0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtn.o
+                0x08002a9c                        . = ALIGN (0x4)
+                0x08002a9c                        _etext = .
 
-.vfp11_veneer   0x08002a30        0x0
- .vfp11_veneer  0x08002a30        0x0 linker stubs
+.vfp11_veneer   0x08002a9c        0x0
+ .vfp11_veneer  0x08002a9c        0x0 linker stubs
 
-.v4_bx          0x08002a30        0x0
- .v4_bx         0x08002a30        0x0 linker stubs
+.v4_bx          0x08002a9c        0x0
+ .v4_bx         0x08002a9c        0x0 linker stubs
 
-.iplt           0x08002a30        0x0
- .iplt          0x08002a30        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
+.iplt           0x08002a9c        0x0
+ .iplt          0x08002a9c        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
 
-.rodata         0x08002a30       0x24
-                0x08002a30                        . = ALIGN (0x4)
+.rodata         0x08002a9c       0x24
+                0x08002a9c                        . = ALIGN (0x4)
  *(.rodata)
  *(.rodata*)
  .rodata.PLLMulTable
-                0x08002a30        0x9 ./Core/Src/system_stm32l1xx.o
-                0x08002a30                PLLMulTable
- *fill*         0x08002a39        0x3 
+                0x08002a9c        0x9 ./Core/Src/system_stm32l1xx.o
+                0x08002a9c                PLLMulTable
+ *fill*         0x08002aa5        0x3 
  .rodata.AHBPrescTable
-                0x08002a3c       0x10 ./Core/Src/system_stm32l1xx.o
-                0x08002a3c                AHBPrescTable
+                0x08002aa8       0x10 ./Core/Src/system_stm32l1xx.o
+                0x08002aa8                AHBPrescTable
  .rodata.APBPrescTable
-                0x08002a4c        0x8 ./Core/Src/system_stm32l1xx.o
-                0x08002a4c                APBPrescTable
-                0x08002a54                        . = ALIGN (0x4)
+                0x08002ab8        0x8 ./Core/Src/system_stm32l1xx.o
+                0x08002ab8                APBPrescTable
+                0x08002ac0                        . = ALIGN (0x4)
 
-.ARM.extab      0x08002a54        0x0
-                0x08002a54                        . = ALIGN (0x4)
+.ARM.extab      0x08002ac0        0x0
+                0x08002ac0                        . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x08002a54                        . = ALIGN (0x4)
+                0x08002ac0                        . = ALIGN (0x4)
 
-.ARM            0x08002a54        0x8
-                0x08002a54                        . = ALIGN (0x4)
-                0x08002a54                        __exidx_start = .
+.ARM            0x08002ac0        0x8
+                0x08002ac0                        . = ALIGN (0x4)
+                0x08002ac0                        __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x08002a54        0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o)
-                0x08002a5c                        __exidx_end = .
-                0x08002a5c                        . = ALIGN (0x4)
+ .ARM.exidx     0x08002ac0        0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a(_udivmoddi4.o)
+                0x08002ac8                        __exidx_end = .
+                0x08002ac8                        . = ALIGN (0x4)
 
-.preinit_array  0x08002a5c        0x0
-                0x08002a5c                        . = ALIGN (0x4)
-                0x08002a5c                        PROVIDE (__preinit_array_start = .)
+.preinit_array  0x08002ac8        0x0
+                0x08002ac8                        . = ALIGN (0x4)
+                0x08002ac8                        PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x08002a5c                        PROVIDE (__preinit_array_end = .)
-                0x08002a5c                        . = ALIGN (0x4)
+                0x08002ac8                        PROVIDE (__preinit_array_end = .)
+                0x08002ac8                        . = ALIGN (0x4)
 
-.init_array     0x08002a5c        0x4
-                0x08002a5c                        . = ALIGN (0x4)
-                0x08002a5c                        PROVIDE (__init_array_start = .)
+.init_array     0x08002ac8        0x4
+                0x08002ac8                        . = ALIGN (0x4)
+                0x08002ac8                        PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x08002a5c        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
-                0x08002a60                        PROVIDE (__init_array_end = .)
-                0x08002a60                        . = ALIGN (0x4)
+ .init_array    0x08002ac8        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
+                0x08002acc                        PROVIDE (__init_array_end = .)
+                0x08002acc                        . = ALIGN (0x4)
 
-.fini_array     0x08002a60        0x4
-                0x08002a60                        . = ALIGN (0x4)
+.fini_array     0x08002acc        0x4
+                0x08002acc                        . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x08002a60        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
+ .fini_array    0x08002acc        0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x08002a64                        . = ALIGN (0x4)
-                0x08002a64                        _sidata = LOADADDR (.data)
+                0x08002ad0                        . = ALIGN (0x4)
+                0x08002ad0                        _sidata = LOADADDR (.data)
 
-.rel.dyn        0x08002a64        0x0
- .rel.iplt      0x08002a64        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
+.rel.dyn        0x08002ad0        0x0
+ .rel.iplt      0x08002ad0        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
 
-.data           0x20000000        0xc load address 0x08002a64
+.data           0x20000000        0xc load address 0x08002ad0
                 0x20000000                        . = ALIGN (0x4)
                 0x20000000                        _sdata = .
  *(.data)
@@ -2596,11 +2596,11 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
                 0x2000000c                        . = ALIGN (0x4)
                 0x2000000c                        _edata = .
 
-.igot.plt       0x2000000c        0x0 load address 0x08002a70
+.igot.plt       0x2000000c        0x0 load address 0x08002adc
  .igot.plt      0x2000000c        0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/crtbegin.o
                 0x2000000c                        . = ALIGN (0x4)
 
-.bss            0x2000000c       0x74 load address 0x08002a70
+.bss            0x2000000c       0x78 load address 0x08002adc
                 0x2000000c                        _sbss = .
                 0x2000000c                        __bss_start__ = _sbss
  *(.bss)
@@ -2608,23 +2608,31 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
  *(.bss*)
  .bss.hi2c1     0x20000028       0x54 ./Core/Src/main.o
                 0x20000028                hi2c1
- .bss.uwTick    0x2000007c        0x4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
-                0x2000007c                uwTick
+ .bss.Z_VALUE   0x2000007c        0x1 ./Core/Src/main.o
+                0x2000007c                Z_VALUE
+ .bss.Y_VALUE   0x2000007d        0x1 ./Core/Src/main.o
+                0x2000007d                Y_VALUE
+ .bss.X_VALUE   0x2000007e        0x1 ./Core/Src/main.o
+                0x2000007e                X_VALUE
+ *fill*         0x2000007f        0x1 
+ .bss.uwTick    0x20000080        0x4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+                0x20000080                uwTick
  *(COMMON)
-                0x20000080                        . = ALIGN (0x4)
-                0x20000080                        _ebss = .
-                0x20000080                        __bss_end__ = _ebss
+                0x20000084                        . = ALIGN (0x4)
+                0x20000084                        _ebss = .
+                0x20000084                        __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x20000080      0x600 load address 0x08002a70
-                0x20000080                        . = ALIGN (0x8)
+                0x20000084      0x604 load address 0x08002adc
+                0x20000088                        . = ALIGN (0x8)
+ *fill*         0x20000084        0x4 
                 [!provide]                        PROVIDE (end = .)
-                0x20000080                        PROVIDE (_end = .)
-                0x20000280                        . = (. + _Min_Heap_Size)
- *fill*         0x20000080      0x200 
-                0x20000680                        . = (. + _Min_Stack_Size)
- *fill*         0x20000280      0x400 
-                0x20000680                        . = ALIGN (0x8)
+                0x20000088                        PROVIDE (_end = .)
+                0x20000288                        . = (. + _Min_Heap_Size)
+ *fill*         0x20000088      0x200 
+                0x20000688                        . = (. + _Min_Stack_Size)
+ *fill*         0x20000288      0x400 
+                0x20000688                        . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -2676,29 +2684,29 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
 LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libm.a
 LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.macos64_1.0.0.202411102158/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7-m/nofp/libgcc.a
 
-.debug_info     0x00000000     0x5e7d
- .debug_info    0x00000000      0xba7 ./Core/Src/main.o
- .debug_info    0x00000ba7      0x843 ./Core/Src/stm32l1xx_hal_msp.o
- .debug_info    0x000013ea      0x113 ./Core/Src/stm32l1xx_it.o
- .debug_info    0x000014fd      0x27c ./Core/Src/system_stm32l1xx.o
- .debug_info    0x00001779       0x30 ./Core/Startup/startup_stm32l152retx.o
- .debug_info    0x000017a9      0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
- .debug_info    0x00001e98      0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
- .debug_info    0x00002b7d      0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
- .debug_info    0x0000312f     0x23b3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
- .debug_info    0x000054e2      0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+.debug_info     0x00000000     0x5eb0
+ .debug_info    0x00000000      0xbda ./Core/Src/main.o
+ .debug_info    0x00000bda      0x843 ./Core/Src/stm32l1xx_hal_msp.o
+ .debug_info    0x0000141d      0x113 ./Core/Src/stm32l1xx_it.o
+ .debug_info    0x00001530      0x27c ./Core/Src/system_stm32l1xx.o
+ .debug_info    0x000017ac       0x30 ./Core/Startup/startup_stm32l152retx.o
+ .debug_info    0x000017dc      0x6ef ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+ .debug_info    0x00001ecb      0xce5 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+ .debug_info    0x00002bb0      0x5b2 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+ .debug_info    0x00003162     0x23b3 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+ .debug_info    0x00005515      0x99b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
 
-.debug_abbrev   0x00000000     0x124c
- .debug_abbrev  0x00000000      0x240 ./Core/Src/main.o
- .debug_abbrev  0x00000240      0x1a4 ./Core/Src/stm32l1xx_hal_msp.o
- .debug_abbrev  0x000003e4       0x73 ./Core/Src/stm32l1xx_it.o
- .debug_abbrev  0x00000457      0x11c ./Core/Src/system_stm32l1xx.o
- .debug_abbrev  0x00000573       0x24 ./Core/Startup/startup_stm32l152retx.o
- .debug_abbrev  0x00000597      0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
- .debug_abbrev  0x0000080c      0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
- .debug_abbrev  0x00000b28      0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
- .debug_abbrev  0x00000cfc      0x298 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
- .debug_abbrev  0x00000f94      0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+.debug_abbrev   0x00000000     0x124d
+ .debug_abbrev  0x00000000      0x241 ./Core/Src/main.o
+ .debug_abbrev  0x00000241      0x1a4 ./Core/Src/stm32l1xx_hal_msp.o
+ .debug_abbrev  0x000003e5       0x73 ./Core/Src/stm32l1xx_it.o
+ .debug_abbrev  0x00000458      0x11c ./Core/Src/system_stm32l1xx.o
+ .debug_abbrev  0x00000574       0x24 ./Core/Startup/startup_stm32l152retx.o
+ .debug_abbrev  0x00000598      0x275 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+ .debug_abbrev  0x0000080d      0x31c ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+ .debug_abbrev  0x00000b29      0x1d4 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+ .debug_abbrev  0x00000cfd      0x298 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+ .debug_abbrev  0x00000f95      0x2b8 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
 
 .debug_aranges  0x00000000      0x6b8
  .debug_aranges
@@ -2805,30 +2813,30 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id
  .debug_macro   0x00014d83      0x1e9 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
  .debug_macro   0x00014f6c      0x1ad ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
 
-.debug_line     0x00000000     0x86cf
- .debug_line    0x00000000      0x8f9 ./Core/Src/main.o
- .debug_line    0x000008f9      0x6de ./Core/Src/stm32l1xx_hal_msp.o
- .debug_line    0x00000fd7      0x73e ./Core/Src/stm32l1xx_it.o
- .debug_line    0x00001715      0x730 ./Core/Src/system_stm32l1xx.o
- .debug_line    0x00001e45       0x79 ./Core/Startup/startup_stm32l152retx.o
- .debug_line    0x00001ebe      0x95b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
- .debug_line    0x00002819      0xc2a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
- .debug_line    0x00003443      0x99f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
- .debug_line    0x00003de2     0x39cf ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
- .debug_line    0x000077b1      0xf1e ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+.debug_line     0x00000000     0x86f1
+ .debug_line    0x00000000      0x91b ./Core/Src/main.o
+ .debug_line    0x0000091b      0x6de ./Core/Src/stm32l1xx_hal_msp.o
+ .debug_line    0x00000ff9      0x73e ./Core/Src/stm32l1xx_it.o
+ .debug_line    0x00001737      0x730 ./Core/Src/system_stm32l1xx.o
+ .debug_line    0x00001e67       0x79 ./Core/Startup/startup_stm32l152retx.o
+ .debug_line    0x00001ee0      0x95b ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+ .debug_line    0x0000283b      0xc2a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+ .debug_line    0x00003465      0x99f ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+ .debug_line    0x00003e04     0x39cf ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+ .debug_line    0x000077d3      0xf1e ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
 
-.debug_str      0x00000000    0x84ad6
- .debug_str     0x00000000    0x84ad6 ./Core/Src/main.o
-                              0x8329b (size before relaxing)
- .debug_str     0x00084ad6    0x7fe72 ./Core/Src/stm32l1xx_hal_msp.o
- .debug_str     0x00084ad6    0x7f966 ./Core/Src/stm32l1xx_it.o
- .debug_str     0x00084ad6    0x7f9b7 ./Core/Src/system_stm32l1xx.o
- .debug_str     0x00084ad6       0x8d ./Core/Startup/startup_stm32l152retx.o
- .debug_str     0x00084ad6    0x800df ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
- .debug_str     0x00084ad6    0x801eb ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
- .debug_str     0x00084ad6    0x7fb4a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
- .debug_str     0x00084ad6    0x80a28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
- .debug_str     0x00084ad6    0x7fe73 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
+.debug_str      0x00000000    0x84aee
+ .debug_str     0x00000000    0x84aee ./Core/Src/main.o
+                              0x832b3 (size before relaxing)
+ .debug_str     0x00084aee    0x7fe72 ./Core/Src/stm32l1xx_hal_msp.o
+ .debug_str     0x00084aee    0x7f966 ./Core/Src/stm32l1xx_it.o
+ .debug_str     0x00084aee    0x7f9b7 ./Core/Src/system_stm32l1xx.o
+ .debug_str     0x00084aee       0x8d ./Core/Startup/startup_stm32l152retx.o
+ .debug_str     0x00084aee    0x800df ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
+ .debug_str     0x00084aee    0x801eb ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
+ .debug_str     0x00084aee    0x7fb4a ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
+ .debug_str     0x00084aee    0x80a28 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.o
+ .debug_str     0x00084aee    0x7fe73 ./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
 
 .comment        0x00000000       0x43
  .comment       0x00000000       0x43 ./Core/Src/main.o
diff --git a/TP6_ACCELEROMETRE/TP6_ACCELEROMETRE Debug.launch b/TP6_ACCELEROMETRE/TP6_ACCELEROMETRE Debug.launch
index 0a19d13..2b6e8e6 100644
--- a/TP6_ACCELEROMETRE/TP6_ACCELEROMETRE Debug.launch	
+++ b/TP6_ACCELEROMETRE/TP6_ACCELEROMETRE Debug.launch	
@@ -9,7 +9,7 @@
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.debug_auth_permission" value=""/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.debug_auth_pwd_file" value=""/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_live_expr" value="true"/>
-    <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_swv" value="false"/>
+    <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_swv" value="true"/>
     <intAttribute key="com.st.stm32cube.ide.mcu.debug.launch.formatVersion" value="2"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.ip_address_local" value="localhost"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.limit_swo_clock.enabled" value="false"/>
@@ -22,8 +22,9 @@
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.exception.unaligned" value="false"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.haltonexception" value="true"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swd_mode" value="true"/>
+    <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_config_enabled" value="false"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_port" value="61235"/>
-    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_hclk" value="2097000"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_hclk" value="16000000"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.useRemoteTarget" value="true"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.vector_table" value=""/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.verify_flash_download" value="true"/>
@@ -43,6 +44,15 @@
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fVersion&quot;:1,&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Software system reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Software system reset&quot;,&quot;fLaunchAttribute&quot;:&quot;system_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Hardware reset&quot;,&quot;fLaunchAttribute&quot;:&quot;hardware_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset hardware\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Core reset&quot;,&quot;fLaunchAttribute&quot;:&quot;core_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset core\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[&quot;-g&quot;]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]},&quot;fStartApplication&quot;:true}]}"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_0" value="Enabled=true:Address=X_VALUE:Access=Read/Write:Size=Word:Function=Data Value"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_1" value="Enabled=true:Address=Y_VALUE:Access=Read/Write:Size=Word:Function=Data Value"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_2" value="Enabled=true:Address=Z_VALUE:Access=Read/Write:Size=Word:Function=Data Value"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_3" value="Enabled=false:Address=0x0:Access=Read/Write:Size=Word:Function=Data Value"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.itmports" value="0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.itmports_priv" value="0:0:0:0"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.pc_sample" value="0:16384"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.timestamps" value="1:1"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.trace_events" value="Cpi=0:Exc=0:Sleep=0:Lsu=0:Fold=0:Exetrc=0"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>