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https://github.com/UpsilonNumworks/Upsilon.git
synced 2026-03-26 01:00:50 +01:00
[python] Upgrade to micropython 1.11
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@@ -197,7 +197,16 @@ void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) {
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emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src));
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}
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void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
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size_t asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
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// Insert immediate into code and jump over it
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emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
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emit_al(as, 0xa000000); // b pc
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size_t loc = mp_asm_base_get_code_pos(&as->base);
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emit(as, imm);
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return loc;
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}
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void asm_arm_mov_reg_i32_optimised(asm_arm_t *as, uint rd, int imm) {
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// TODO: There are more variants of immediate values
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if ((imm & 0xFF) == imm) {
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emit_al(as, asm_arm_op_mov_imm(rd, imm));
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@@ -205,10 +214,7 @@ void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
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// mvn is "move not", not "move negative"
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emit_al(as, asm_arm_op_mvn_imm(rd, ~imm));
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} else {
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//Insert immediate into code and jump over it
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emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
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emit_al(as, 0xa000000); // b pc
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emit(as, imm);
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asm_arm_mov_reg_i32(as, rd, imm);
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}
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}
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@@ -273,6 +279,21 @@ void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) {
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emit_al(as, asm_arm_op_add_imm(rd, ASM_ARM_REG_SP, local_num << 2));
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}
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void asm_arm_mov_reg_pcrel(asm_arm_t *as, uint reg_dest, uint label) {
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assert(label < as->base.max_num_labels);
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mp_uint_t dest = as->base.label_offsets[label];
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mp_int_t rel = dest - as->base.code_offset;
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rel -= 12 + 8; // adjust for load of rel, and then PC+8 prefetch of add_reg_reg_reg
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// To load rel int reg_dest, insert immediate into code and jump over it
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emit_al(as, 0x59f0000 | (reg_dest << 12)); // ldr rd, [pc]
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emit_al(as, 0xa000000); // b pc
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emit(as, rel);
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// Do reg_dest += PC
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asm_arm_add_reg_reg_reg(as, reg_dest, reg_dest, ASM_ARM_REG_PC);
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}
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void asm_arm_lsl_reg_reg(asm_arm_t *as, uint rd, uint rs) {
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// mov rd, rd, lsl rs
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emit_al(as, 0x1a00010 | (rd << 12) | (rs << 8) | rd);
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@@ -347,19 +368,15 @@ void asm_arm_b_label(asm_arm_t *as, uint label) {
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asm_arm_bcc_label(as, ASM_ARM_CC_AL, label);
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}
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void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp) {
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// If the table offset fits into the ldr instruction
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if (fun_id < (0x1000 / 4)) {
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emit_al(as, asm_arm_op_mov_reg(ASM_ARM_REG_LR, ASM_ARM_REG_PC)); // mov lr, pc
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emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4]
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return;
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}
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void asm_arm_bl_ind(asm_arm_t *as, uint fun_id, uint reg_temp) {
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// The table offset should fit into the ldr instruction
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assert(fun_id < (0x1000 / 4));
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emit_al(as, asm_arm_op_mov_reg(ASM_ARM_REG_LR, ASM_ARM_REG_PC)); // mov lr, pc
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emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4]
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}
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emit_al(as, 0x59f0004 | (reg_temp << 12)); // ldr rd, [pc, #4]
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// Set lr after fun_ptr
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emit_al(as, asm_arm_op_add_imm(ASM_ARM_REG_LR, ASM_ARM_REG_PC, 4)); // add lr, pc, #4
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emit_al(as, asm_arm_op_mov_reg(ASM_ARM_REG_PC, reg_temp)); // mov pc, reg_temp
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emit(as, (uint) fun_ptr);
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void asm_arm_bx_reg(asm_arm_t *as, uint reg_src) {
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emit_al(as, 0x012fff10 | reg_src);
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}
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#endif // MICROPY_EMIT_ARM
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