From a6b681acd0ca1120eadddc5f2e7804fda79c1d54 Mon Sep 17 00:00:00 2001
From: Romain Goyet <romain.goyet@numworks.com>
Date: Wed, 13 Feb 2019 15:57:23 +0100
Subject: [PATCH] [ion/device/regs] Use macros to configure the registers

---
 ion/src/device/n0100/regs/config/usart.h | 21 ++++++---------------
 ion/src/device/n0101/regs/config/usart.h | 21 ++++++---------------
 ion/src/device/shared/regs/usart.h       | 12 ++++++------
 3 files changed, 18 insertions(+), 36 deletions(-)

diff --git a/ion/src/device/n0100/regs/config/usart.h b/ion/src/device/n0100/regs/config/usart.h
index 5171cc4c3..ecaac4d12 100644
--- a/ion/src/device/n0100/regs/config/usart.h
+++ b/ion/src/device/n0100/regs/config/usart.h
@@ -1,21 +1,12 @@
 #ifndef ION_DEVICE_N0100_REGS_CONFIG_USART_H
 #define ION_DEVICE_N0100_REGS_CONFIG_USART_H
 
-namespace Ion {
-namespace Device {
-namespace USART {
-namespace Config {
+#define REGS_USART_SR_OFFSET 0x00
+#define REGS_USART_RDR_OFFSET 0x04
+#define REGS_USART_TDR_OFFSET 0x04
+#define REGS_USART_BRR_OFFSET 0x08
+#define REGS_USART_CR1_OFFSET 0x0C
 
-constexpr static int SROffset = 0x00;
-constexpr static int RDROffset = 0x04;
-constexpr static int TDROffset = 0x04;
-constexpr static int BRROffset = 0x08;
-constexpr static int CR1Offset = 0x0C;
-constexpr static int UEOffset = 13;
-
-}
-}
-}
-}
+#define REGS_USART_CR1_UE_BIT 13
 
 #endif
diff --git a/ion/src/device/n0101/regs/config/usart.h b/ion/src/device/n0101/regs/config/usart.h
index 058a744a6..a7a7442b1 100644
--- a/ion/src/device/n0101/regs/config/usart.h
+++ b/ion/src/device/n0101/regs/config/usart.h
@@ -1,21 +1,12 @@
 #ifndef ION_DEVICE_N0101_REGS_CONFIG_USART_H
 #define ION_DEVICE_N0101_REGS_CONFIG_USART_H
 
-namespace Ion {
-namespace Device {
-namespace USART {
-namespace Config {
+#define REGS_USART_SR_OFFSET 0x1C
+#define REGS_USART_RDR_OFFSET 0x24
+#define REGS_USART_TDR_OFFSET 0x28
+#define REGS_USART_BRR_OFFSET 0x0C
+#define REGS_USART_CR1_OFFSET 0x00
 
-constexpr static int SROffset = 0x1C;
-constexpr static int RDROffset = 0x24;
-constexpr static int TDROffset = 0x28;
-constexpr static int BRROffset = 0x0C;
-constexpr static int CR1Offset = 0x00;
-constexpr static int UEOffset = 0;
-
-}
-}
-}
-}
+#define REGS_USART_CR1_UE_BIT 0
 
 #endif
diff --git a/ion/src/device/shared/regs/usart.h b/ion/src/device/shared/regs/usart.h
index 1b4850ac5..58b5a35cc 100644
--- a/ion/src/device/shared/regs/usart.h
+++ b/ion/src/device/shared/regs/usart.h
@@ -40,18 +40,18 @@ public:
 
   class CR1 : Register32 {
   public:
-    REGS_BOOL_FIELD(UE, Ion::Device::USART::Config::UEOffset);
+    REGS_BOOL_FIELD(UE, REGS_USART_CR1_UE_BIT);
     REGS_BOOL_FIELD(TE, 3);
     REGS_BOOL_FIELD(RE, 2);
   };
 
   constexpr USART(int i) : m_index(i) {}
   constexpr operator int() const { return m_index; }
-  REGS_REGISTER_AT(SR, Ion::Device::USART::Config::SROffset);
-  REGS_REGISTER_AT(RDR, Ion::Device::USART::Config::RDROffset);
-  REGS_REGISTER_AT(TDR, Ion::Device::USART::Config::TDROffset);
-  REGS_REGISTER_AT(BRR, Ion::Device::USART::Config::BRROffset);
-  REGS_REGISTER_AT(CR1, Ion::Device::USART::Config::CR1Offset);
+  REGS_REGISTER_AT(SR, REGS_USART_SR_OFFSET);
+  REGS_REGISTER_AT(RDR, REGS_USART_RDR_OFFSET);
+  REGS_REGISTER_AT(TDR, REGS_USART_TDR_OFFSET);
+  REGS_REGISTER_AT(BRR, REGS_USART_BRR_OFFSET);
+  REGS_REGISTER_AT(CR1, REGS_USART_CR1_OFFSET);
 private:
   constexpr uint32_t Base() const {
     return ((uint32_t []){0x40011000, 0x40004400, 0x40004800, 0x40004C00, 0x40005000, 0x40011400})[m_index-1];