From b3d3cb5204a85370fd4a084a96ea76a1b4500a17 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?L=C3=A9a=20Saviot?= Date: Wed, 10 Apr 2019 11:28:37 +0200 Subject: [PATCH] [bench] Disblae the Cache before the CRC test --- ion/src/device/bench/command/crc.cpp | 7 +++++++ ion/src/device/n0100/drivers/cache.h | 3 +++ ion/src/device/n0101/drivers/board.cpp | 7 +------ ion/src/device/n0101/drivers/cache.cpp | 10 ++++++++++ ion/src/device/n0101/drivers/cache.h | 3 +++ 5 files changed, 24 insertions(+), 6 deletions(-) diff --git a/ion/src/device/bench/command/crc.cpp b/ion/src/device/bench/command/crc.cpp index f5c3c5dfc..e136e5064 100644 --- a/ion/src/device/bench/command/crc.cpp +++ b/ion/src/device/bench/command/crc.cpp @@ -1,6 +1,7 @@ #include "command.h" #include #include +#include namespace Ion { namespace Device { @@ -41,8 +42,14 @@ void CRC(const char * input) { } uint32_t length = numberBase10(input + lengthStart, lengthEnd - lengthStart); + + // Disable the cache to make many cache accesses + Ion::Device::Cache::disable(); + uint32_t crc = Ion::crc32PaddedString(reinterpret_cast(internal ? 0x08000000 : 0x90000000), length); + Ion::Device::Cache::enable(); + constexpr int bufferSize = 4+10+1; // crc is a uint32_t so 10 digits long. char buffer[bufferSize] = {'C', 'R', 'C', '=', 0}; constexpr int precision = 10; diff --git a/ion/src/device/n0100/drivers/cache.h b/ion/src/device/n0100/drivers/cache.h index 276e6b93c..66d2a3200 100644 --- a/ion/src/device/n0100/drivers/cache.h +++ b/ion/src/device/n0100/drivers/cache.h @@ -13,6 +13,9 @@ using namespace Regs; inline void dsb() {} +inline void enable() {} +inline void disable() {} + inline void invalidateDCache() {} inline void cleanDCache() {} inline void enableDCache() {} diff --git a/ion/src/device/n0101/drivers/board.cpp b/ion/src/device/n0101/drivers/board.cpp index 6469d91be..4efd95ee0 100644 --- a/ion/src/device/n0101/drivers/board.cpp +++ b/ion/src/device/n0101/drivers/board.cpp @@ -20,11 +20,6 @@ namespace Board { using namespace Regs; -void initL1Cache() { - Cache::enableICache(); - Cache::enableDCache(); -} - void initMPU() { // 1. Disable the MPU // 1.1 Memory barrier @@ -113,7 +108,7 @@ void init() { initPeripherals(); // Initiate L1 cache after initiating the external flash - initL1Cache(); + Cache::enable(); // TODO if EPSILON_DEVICE_BENCH, run bench? See n0100 } diff --git a/ion/src/device/n0101/drivers/cache.cpp b/ion/src/device/n0101/drivers/cache.cpp index e4be16935..1614d528b 100644 --- a/ion/src/device/n0101/drivers/cache.cpp +++ b/ion/src/device/n0101/drivers/cache.cpp @@ -48,6 +48,16 @@ void privateCleanInvalidateDisableDCache(bool clean, bool invalidate, bool disab isb(); } +void enable() { + enableICache(); + enableDCache(); +} + +void disable() { + disableICache(); + disableDCache(); +} + void invalidateDCache() { privateCleanInvalidateDisableDCache(false, true, false); } diff --git a/ion/src/device/n0101/drivers/cache.h b/ion/src/device/n0101/drivers/cache.h index cc074008a..5368f162d 100644 --- a/ion/src/device/n0101/drivers/cache.h +++ b/ion/src/device/n0101/drivers/cache.h @@ -27,6 +27,9 @@ inline void isb() { asm volatile("isb 0xF":::"memory"); } +void enable(); +void disable(); + void invalidateDCache(); void cleanDCache(); void enableDCache();