diff --git a/ion/src/device/external_flash.cpp b/ion/src/device/external_flash.cpp
index cc4dbc3c7..1f6a5c4b2 100644
--- a/ion/src/device/external_flash.cpp
+++ b/ion/src/device/external_flash.cpp
@@ -178,7 +178,7 @@ void initQSPI() {
   // Enable QUADSPI AHB3 peripheral clocks
   RCC.AHB3ENR()->setQSPIEN(true);
   // Configure controller for target device
-  QUADSPI.DCR()->setFSIZE(FlashNumberOfAddressBits-1);
+  QUADSPI.DCR()->setFSIZE(NumberOfAddressBitsInChip - 1);
 
   QUADSPI.DCR()->setCSHT(7); // Highest value. TODO: make it optimal
   QUADSPI.CR()->setPRESCALER(255); // Highest value. TODO: make it optimal
@@ -202,16 +202,27 @@ void initChip() {
   set_as_memory_mapped();
 }
 
+int SectorAtAddress(uint32_t address) {
+  int i = address >> NumberOfAddressBitsIn64KbyteBlock;
+  if (i >= NumberOfSectors) {
+    return -1;
+  }
+  return i;
+}
+
 void MassErase() {
   send_command(Command::WriteEnable);
+  wait();
   send_command(Command::ChipErase);
   wait();
   set_as_memory_mapped();
 }
 
-void EraseSector() {
+void EraseSector(int i) {
+  assert(i >= 0 && i < NumberOfSectors);
   send_command(Command::WriteEnable);
-  //send_command(Command::BlockErase /* PICK SIZE */, addressOfSector);
+  wait();
+  send_write_command(Command::Erase64KbyteBlock, reinterpret_cast<uint8_t *>(i << NumberOfAddressBitsIn64KbyteBlock), nullptr, 0);
   wait();
   set_as_memory_mapped();
 }
diff --git a/ion/src/device/external_flash.h b/ion/src/device/external_flash.h
index 1c12a7f19..ff4d9e7b8 100644
--- a/ion/src/device/external_flash.h
+++ b/ion/src/device/external_flash.h
@@ -40,7 +40,11 @@ void initQSPI();
 void initChip();
 
 void MassErase();
-void EraseSector(int sector);
+
+constexpr int NumberOfSectors = 128;
+int SectorAtAddress(uint32_t address);
+void EraseSector(int i);
+
 void WriteMemory(uint8_t * source, uint8_t * destination, size_t length);
 
 enum class Command : uint8_t {
@@ -53,12 +57,15 @@ enum class Command : uint8_t {
   PageProgram = 0x02,
   QuadPageProgram = 0x33,
   EnableQPI = 0x38,
-  ChipErase = 0xC7
+  // Erase the whole chip or a 64-Kbyte block as being "1"
+  ChipErase = 0xC7,
+  Erase64KbyteBlock = 0xD8,
 };
 
 constexpr static uint32_t QSPIBaseAddress = 0x90000000;
-constexpr static uint8_t FlashNumberOfAddressBits = 23;
-constexpr static uint32_t FlashAddressSpaceSize = 1 << FlashNumberOfAddressBits;
+constexpr static uint8_t NumberOfAddressBitsInChip = 23;
+constexpr static uint8_t NumberOfAddressBitsIn64KbyteBlock = 16;
+constexpr static uint32_t FlashAddressSpaceSize = 1 << NumberOfAddressBitsInChip;
 
 constexpr static GPIOPin QSPIPins[] = {
   GPIOPin(GPIOB, 2), GPIOPin(GPIOB, 6), GPIOPin(GPIOC, 9), GPIOPin(GPIOD,12),