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https://github.com/UpsilonNumworks/Upsilon.git
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61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
#include "../registers/registers.h"
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#include "../framebuffer.h"
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// DMA 1, channel 0, stream 4 = SPI2_TX
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#define LCD_DMA_CHANNEL 0
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#define LCD_DMA_STREAM 4
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void display_dma_init() {
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// 0 - ENable DMA clock!
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RCC_AHB1ENR |= DMA1EN;
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// 1 - Reset DMA
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// Stuff like this, and a wait loop...
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//DMA_SCR(DMA1,4) |= DMA_EN;
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//DMA_SCR(DMA1,4) ~= DMA_EN;
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// 2 - Set the peripheral address
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DMA_SPAR(DMA1,LCD_DMA_STREAM) = (uint32_t)&SPI_DR(SPI2);
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// 3 - Set the memory address
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DMA_SMA0R(DMA1,LCD_DMA_STREAM) = (uint32_t)FRAMEBUFFER_ADDRESS;
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// 4 - Number of data items
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REGISTER_SET_VALUE(DMA_SNDTR(DMA1,LCD_DMA_STREAM), DMA_SNDTR, FRAMEBUFFER_LENGTH);
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// 5 - Select the DMA channel
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REGISTER_SET_VALUE(DMA_SCR(DMA1,LCD_DMA_STREAM), DMA_CHSEL, LCD_DMA_CHANNEL);
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// 6 - Set peripheral flow control
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// Does not apply, only for SD/MMC
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// 7 - Stream priority
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// We don't care yet
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// 8 - Configure FIFO usage
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// I think we don't care
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// 9 - Data transfer direction, peripheral/memory increment, single burst or transaction, peripheral and memory data width
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REGISTER_SET_VALUE(DMA_SCR(DMA1,LCD_DMA_STREAM), DMA_DIR, DMA_DIR_MEMORY_TO_PERIPHERAL);
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DMA_SCR(DMA1,LCD_DMA_STREAM) |= DMA_CIRC;
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// Memory address is incremented
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DMA_SCR(DMA1,LCD_DMA_STREAM) |= DMA_MINC;
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// Peripheral expects 8 bits values, default
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//REGISTER_SET_VALUE(DMA_SCR(DMA1,LCD_DMA_STREAM), DMA_DIR, DMA_DIR_MEMORY_TO_PERIPHERAL);
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// 10 - Enable DMA transfer!
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DMA_SCR(DMA1,LCD_DMA_STREAM) |= DMA_EN;
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// 11 - Bonux: enable DMA requests on SPI
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SPI_CR2(SPI2) |= SPI_TXDMAEN;
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/*while (DMA_SCR(DMA1,LCD_DMA_STREAM) & DMA_EN) {
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}
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DMA_SCR(DMA1,LCD_DMA_STREAM) |= DMA_EN;
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*/
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}
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