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https://github.com/UpsilonNumworks/Upsilon.git
synced 2026-03-19 05:40:38 +01:00
106 lines
1.7 KiB
C++
106 lines
1.7 KiB
C++
#include "cache.h"
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namespace Ion {
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namespace Device {
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namespace Cache {
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using namespace Regs;
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void privateCleanInvalidateDisableDCache(bool clean, bool invalidate, bool disable) {
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CORTEX.CSSELR()->set(0);
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dsb();
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// Associativity = 6
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uint32_t sets = CORTEX.CCSIDR()->getNUMSETS();
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uint32_t ways = CORTEX.CCSIDR()->getASSOCIATIVITY();
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if (disable) {
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CORTEX.CCR()->setDC(false);
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dsb();
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}
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do {
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uint32_t w = ways;
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do {
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if (clean) {
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if (invalidate) {
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class CORTEX::DCCISW dccisw;
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dccisw.setSET(sets);
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dccisw.setWAY(w);
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CORTEX.DCCISW()->set(dccisw);
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} else {
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class CORTEX::DCCSW dccsw;
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dccsw.setSET(sets);
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dccsw.setWAY(w);
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CORTEX.DCCSW()->set(dccsw);
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}
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} else if (invalidate) {
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class CORTEX::DCISW dcisw;
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dcisw.setSET(sets);
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dcisw.setWAY(w);
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CORTEX.DCISW()->set(dcisw);
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}
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} while (w-- != 0);
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} while (sets-- != 0);
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dsb();
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isb();
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}
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void enable() {
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enableICache();
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enableDCache();
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}
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void disable() {
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disableICache();
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disableDCache();
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}
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void invalidateDCache() {
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privateCleanInvalidateDisableDCache(false, true, false);
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}
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void cleanDCache() {
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privateCleanInvalidateDisableDCache(true, false, false);
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}
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void enableDCache() {
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invalidateDCache();
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CORTEX.CCR()->setDC(true);
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dsb();
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isb();
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}
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void disableDCache() {
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privateCleanInvalidateDisableDCache(true, true, true);
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}
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void invalidateICache() {
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dsb();
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isb();
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CORTEX.ICIALLU()->set(0);
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dsb();
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isb();
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}
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void enableICache() {
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invalidateICache();
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CORTEX.CCR()->setIC(true);
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dsb();
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isb();
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}
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void disableICache() {
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dsb();
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isb();
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CORTEX.CCR()->setIC(false);
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invalidateICache();
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}
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}
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}
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}
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