diff --git a/Core/Inc/modelec.h b/Core/Inc/modelec.h index 5a3d6a9..6a8ef4b 100644 --- a/Core/Inc/modelec.h +++ b/Core/Inc/modelec.h @@ -18,9 +18,9 @@ #define MAX_WAYPOINTS 16 #define PWM_MAX 626.0f #define ENCODER_RES 2400.0f -#define WHEEL_DIAMETER 0.0972f +#define WHEEL_DIAMETER 0.081f #define WHEEL_RADIUS (WHEEL_DIAMETER/2.0f) -#define WHEEL_BASE 0.28470f +#define WHEEL_BASE 0.29c f #define WHEEL_BASE_2 (WHEEL_BASE/2.0f) #define V_MAX 0.643f // m/s diff --git a/Core/Src/stm32g4xx_hal_msp.c b/Core/Src/stm32g4xx_hal_msp.c index 5fe1381..3332c22 100644 --- a/Core/Src/stm32g4xx_hal_msp.c +++ b/Core/Src/stm32g4xx_hal_msp.c @@ -17,7 +17,6 @@ ****************************************************************************** */ /* USER CODE END Header */ - /* Includes ------------------------------------------------------------------*/ #include "main.h" /* USER CODE BEGIN Includes */ diff --git a/Core/Src/tim.c b/Core/Src/tim.c index 0122c8b..41ed689 100644 --- a/Core/Src/tim.c +++ b/Core/Src/tim.c @@ -498,3 +498,4 @@ void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* tim_encoderHandle) /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ + diff --git a/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h b/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h index b10e01c..77f36e0 100644 --- a/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h +++ b/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h @@ -3253,7 +3253,7 @@ typedef struct /******************** Bits definition for DMAMUX_CxCR register **************/ #define DMAMUX_CxCR_DMAREQ_ID_Pos (0U) -#define DMAMUX_CxCR_DMAREQ_ID_Msk (0xFFUL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x000000FF */ +#define DMAMUX_CxCR_DMAREQ_ID_Msk (0x7FUL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x0000007F */ #define DMAMUX_CxCR_DMAREQ_ID DMAMUX_CxCR_DMAREQ_ID_Msk #define DMAMUX_CxCR_DMAREQ_ID_0 (0x01UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000001 */ #define DMAMUX_CxCR_DMAREQ_ID_1 (0x02UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000002 */ @@ -3262,6 +3262,8 @@ typedef struct #define DMAMUX_CxCR_DMAREQ_ID_4 (0x10UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000010 */ #define DMAMUX_CxCR_DMAREQ_ID_5 (0x20UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000020 */ #define DMAMUX_CxCR_DMAREQ_ID_6 (0x40UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000040 */ + +/* Legacy defines */ #define DMAMUX_CxCR_DMAREQ_ID_7 (0x80UL << DMAMUX_CxCR_DMAREQ_ID_Pos)/*!< 0x00000080 */ #define DMAMUX_CxCR_SOIE_Pos (8U) @@ -8622,8 +8624,8 @@ typedef struct #define RNG_CR_IE_Msk (0x1UL << RNG_CR_IE_Pos) /*!< 0x00000008 */ #define RNG_CR_IE RNG_CR_IE_Msk #define RNG_CR_CED_Pos (5U) -#define RNG_CR_CED_Msk (0x1UL << RNG_CR_IE_Pos) /*!< 0x00000020 */ -#define RNG_CR_CED RNG_CR_IE_Msk +#define RNG_CR_CED_Msk (0x1UL << RNG_CR_CED_Pos) /*!< 0x00000020 */ +#define RNG_CR_CED RNG_CR_CED_Msk /******************** Bits definition for RNG_SR register *******************/ #define RNG_SR_DRDY_Pos (0U) @@ -11049,27 +11051,27 @@ typedef struct /******************* Bit definition for TIM_CCR1 register *******************/ #define TIM_CCR1_CCR1_Pos (0U) -#define TIM_CCR1_CCR1_Msk (0xFFFFUL << TIM_CCR1_CCR1_Pos) /*!< 0x0000FFFF */ +#define TIM_CCR1_CCR1_Msk (0xFFFFFFFFUL << TIM_CCR1_CCR1_Pos) /*!< 0xFFFFFFFF */ #define TIM_CCR1_CCR1 TIM_CCR1_CCR1_Msk /*!ChannelState[4] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelState[0] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[1] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[2] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[3] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[4] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[5] = \ - (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__); \ + } while(0) #define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\ (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\ @@ -2316,16 +2312,13 @@ mode. ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) :\ ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) -#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelNState[0] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[1] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[2] = \ - (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[3] = \ - (__CHANNEL_STATE__); \ - } while(0) +#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\ + do {\ + (__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__); \ + } while(0) /** * @} diff --git a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h index fcd3e5a..e9c9a15 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h +++ b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h @@ -6,7 +6,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2018 STMicroelectronics. + * Copyright (c) 2019 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file @@ -17,8 +17,8 @@ */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32G4xx_LL_CRS_H -#define __STM32G4xx_LL_CRS_H +#ifndef STM32G4xx_LL_CRS_H +#define STM32G4xx_LL_CRS_H #ifdef __cplusplus extern "C" { @@ -41,7 +41,6 @@ extern "C" { /* Private variables ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ - /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /** @defgroup CRS_LL_Exported_Constants CRS Exported Constants @@ -78,7 +77,7 @@ extern "C" { /** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider * @{ */ -#define LL_CRS_SYNC_DIV_1 ((uint32_t)0x00U) /*!< Synchro Signal not divided (default) */ +#define LL_CRS_SYNC_DIV_1 0x00000000U /*!< Synchro Signal not divided (default) */ #define LL_CRS_SYNC_DIV_2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ #define LL_CRS_SYNC_DIV_4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ #define LL_CRS_SYNC_DIV_8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ @@ -93,7 +92,7 @@ extern "C" { /** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source * @{ */ -#define LL_CRS_SYNC_SOURCE_GPIO ((uint32_t)0x00U) /*!< Synchro Signal source GPIO */ +#define LL_CRS_SYNC_SOURCE_GPIO 0x00000000U /*!< Synchro Signal source GPIO */ #define LL_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ #define LL_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ /** @@ -103,7 +102,7 @@ extern "C" { /** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity * @{ */ -#define LL_CRS_SYNC_POLARITY_RISING ((uint32_t)0x00U) /*!< Synchro Active on rising edge (default) */ +#define LL_CRS_SYNC_POLARITY_RISING 0x00000000U /*!< Synchro Active on rising edge (default) */ #define LL_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ /** * @} @@ -112,8 +111,8 @@ extern "C" { /** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction * @{ */ -#define LL_CRS_FREQ_ERROR_DIR_UP ((uint32_t)0x00U) /*!< Upcounting direction, the actual frequency is above the target */ -#define LL_CRS_FREQ_ERROR_DIR_DOWN ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */ +#define LL_CRS_FREQ_ERROR_DIR_UP 0x00000000U /*!< Upcounting direction, the actual frequency is above the target */ +#define LL_CRS_FREQ_ERROR_DIR_DOWN CRS_ISR_FEDIR /*!< Downcounting direction, the actual frequency is below the target */ /** * @} */ @@ -126,23 +125,25 @@ extern "C" { * @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz * and a synchronization signal frequency of 1 kHz (SOF signal from USB) */ -#define LL_CRS_RELOADVALUE_DEFAULT ((uint32_t)0xBB7FU) +#define LL_CRS_RELOADVALUE_DEFAULT 0x0000BB7FU /** * @brief Reset value of Frequency error limit. */ -#define LL_CRS_ERRORLIMIT_DEFAULT ((uint32_t)0x22U) +#define LL_CRS_ERRORLIMIT_DEFAULT 0x00000022U /** * @brief Reset value of the HSI48 Calibration field - * @note The default value is 64, which corresponds to the middle of the trimming interval. + * @note The default value is 64, + * which corresponds to the middle of the trimming interval. * The trimming step is specified in the product datasheet. - * A higher TRIM value corresponds to a higher output frequency + * A higher TRIM value corresponds to a higher output frequency. */ -#define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x40U) +#define LL_CRS_HSI48CALIBRATION_DEFAULT 0x00000040U /** * @} */ + /** * @} */ @@ -440,8 +441,9 @@ __STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void) * @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF * @param ReloadValue a number between Min_Data = 0 and Max_Data = 255 * @param Settings This parameter can be a combination of the following values: - * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8 - * or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128 + * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 + * or @ref LL_CRS_SYNC_DIV_8 or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 + * or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128 * @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB * @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING * @retval None @@ -449,7 +451,8 @@ __STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void) __STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings) { - MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); + MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue << CRS_CR_TRIM_Pos); + MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL, ReloadValue | (ErrorLimitValue << CRS_CFGR_FELIM_Pos) | Settings); @@ -777,5 +780,4 @@ ErrorStatus LL_CRS_DeInit(void); } #endif -#endif /* __STM32G4xx_LL_CRS_H */ - +#endif /* STM32G4xx_LL_CRS_H */ diff --git a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h index 28c640c..c7a9ed1 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h +++ b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h @@ -554,7 +554,7 @@ extern "C" { * (*) Not on all G4 devices * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request) +__STATIC_INLINE void LL_DMAMUX_SetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request) { (void)(DMAMUXx); MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request); @@ -704,7 +704,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uin * @arg @ref LL_DMAMUX_REQ_UCPD1_TX * (*) Not on all G4 devices */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID)); @@ -734,7 +734,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb) +__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb) { (void)(DMAMUXx); MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos)); @@ -763,7 +763,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval Between Min_Data = 1 and Max_Data = 32 */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U); @@ -797,7 +797,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAM * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity) +__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity) { (void)(DMAMUXx); MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity); @@ -830,7 +830,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, * @arg @ref LL_DMAMUX_SYNC_POL_FALLING * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL)); @@ -859,7 +859,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMU * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); @@ -888,7 +888,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMA * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); @@ -917,7 +917,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DM * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE))? 1UL : 0UL); @@ -946,7 +946,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeD * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_EnableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); @@ -975,7 +975,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint3 * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_DisableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); @@ -1004,7 +1004,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE))? 1UL : 0UL); @@ -1055,7 +1055,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID) +__STATIC_INLINE void LL_DMAMUX_SetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID) { (void)(DMAMUXx); MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID); @@ -1105,7 +1105,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID)); @@ -1122,7 +1122,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, ui * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { (void)(DMAMUXx); SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); @@ -1139,7 +1139,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { (void)(DMAMUXx); CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); @@ -1156,7 +1156,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { (void)(DMAMUXx); return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE))? 1UL : 0UL); @@ -1178,7 +1178,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *D * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, +__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t Polarity) { UNUSED(DMAMUXx); @@ -1201,7 +1201,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMA * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * @@ -1221,7 +1221,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, +__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestNb) { UNUSED(DMAMUXx); @@ -1240,7 +1240,7 @@ __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval Between Min_Data = 1 and Max_Data = 32 */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * @@ -1280,7 +1280,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMU * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT * @retval None */ -__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, +__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestSignalID) { UNUSED(DMAMUXx); @@ -1320,7 +1320,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUX * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT */ -__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * @@ -1341,7 +1341,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL); @@ -1353,7 +1353,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL); @@ -1365,7 +1365,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL); @@ -1377,7 +1377,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL); @@ -1389,7 +1389,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL); @@ -1401,7 +1401,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL); @@ -1413,7 +1413,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL); @@ -1425,7 +1425,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL); @@ -1437,7 +1437,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL); @@ -1449,7 +1449,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL); @@ -1461,7 +1461,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAM * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL); @@ -1473,7 +1473,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL); @@ -1486,7 +1486,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL); @@ -1500,7 +1500,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL); @@ -1514,7 +1514,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF14) == (DMAMUX_CSR_SOF14)) ? 1UL : 0UL); @@ -1528,7 +1528,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF15) == (DMAMUX_CSR_SOF15)) ? 1UL : 0UL); @@ -1541,7 +1541,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL); @@ -1553,7 +1553,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL); @@ -1565,7 +1565,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL); @@ -1577,7 +1577,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL); @@ -1589,7 +1589,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMA * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0); @@ -1601,7 +1601,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1); @@ -1613,7 +1613,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2); @@ -1625,7 +1625,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3); @@ -1637,7 +1637,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4); @@ -1649,7 +1649,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5); @@ -1661,7 +1661,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6); @@ -1673,7 +1673,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7); @@ -1685,7 +1685,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8); @@ -1697,7 +1697,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9); @@ -1709,7 +1709,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10); @@ -1721,7 +1721,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11); @@ -1734,7 +1734,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12); @@ -1748,7 +1748,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13); @@ -1762,7 +1762,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF14); @@ -1776,7 +1776,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF15); @@ -1789,7 +1789,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0); @@ -1801,7 +1801,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1); @@ -1813,7 +1813,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2); @@ -1825,7 +1825,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) * @param DMAMUXx DMAMUXx DMAMUXx Instance * @retval None */ -__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) +__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx) { UNUSED(DMAMUXx); SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3); @@ -1862,7 +1862,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); @@ -1891,7 +1891,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); @@ -1920,7 +1920,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uin * @arg @ref LL_DMAMUX_CHANNEL_15 * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) { (void)(DMAMUXx); return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE))? 1UL : 0UL); @@ -1937,7 +1937,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUX * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * @@ -1955,7 +1955,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uin * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval None */ -__STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * @@ -1973,7 +1973,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, ui * @arg @ref LL_DMAMUX_REQ_GEN_3 * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) +__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) { UNUSED(DMAMUXx); return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * diff --git a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h index 804bd05..29f1f85 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h +++ b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h @@ -316,7 +316,7 @@ __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint3 * @arg @ref LL_GPIO_MODE_ALTERNATE * @arg @ref LL_GPIO_MODE_ANALOG */ -__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->MODER, (GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); @@ -385,7 +385,7 @@ __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinM * @arg @ref LL_GPIO_OUTPUT_PUSHPULL * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN */ -__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin)); } @@ -459,7 +459,7 @@ __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint * @arg @ref LL_GPIO_SPEED_FREQ_HIGH * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH */ -__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, (GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); @@ -525,7 +525,7 @@ __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint3 * @arg @ref LL_GPIO_PULL_UP * @arg @ref LL_GPIO_PULL_DOWN */ -__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->PUPDR, (GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U)); @@ -602,7 +602,7 @@ __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uin * @arg @ref LL_GPIO_AF_14 * @arg @ref LL_GPIO_AF_15 */ -__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U)); @@ -680,7 +680,7 @@ __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, ui * @arg @ref LL_GPIO_AF_14 * @arg @ref LL_GPIO_AF_15 */ -__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin) +__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef const *GPIOx, uint32_t Pin) { return (uint32_t)(READ_BIT(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U)); @@ -751,7 +751,7 @@ __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) * @arg @ref LL_GPIO_PIN_ALL * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask) +__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef const *GPIOx, uint32_t PinMask) { return ((READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)) ? 1UL : 0UL); } @@ -762,7 +762,7 @@ __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMa * @param GPIOx GPIO Port * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx) +__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef const *GPIOx) { return ((READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)) ? 1UL : 0UL); } @@ -781,7 +781,7 @@ __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx) * @param GPIOx GPIO Port * @retval Input data register value of port */ -__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) +__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef const *GPIOx) { return (uint32_t)(READ_REG(GPIOx->IDR)); } @@ -810,7 +810,7 @@ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) * @arg @ref LL_GPIO_PIN_ALL * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) +__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef const *GPIOx, uint32_t PinMask) { return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL); } @@ -833,7 +833,7 @@ __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortV * @param GPIOx GPIO Port * @retval Output data register value of port */ -__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx) +__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef const *GPIOx) { return (uint32_t)(READ_REG(GPIOx->ODR)); } @@ -862,7 +862,7 @@ __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx) * @arg @ref LL_GPIO_PIN_ALL * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) +__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef const *GPIOx, uint32_t PinMask) { return ((READ_BIT(GPIOx->ODR, PinMask) == (PinMask)) ? 1UL : 0UL); } @@ -964,7 +964,7 @@ __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask) * @{ */ -ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx); +ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef const *GPIOx); ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct); void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct); diff --git a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h index ac10472..af2e647 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h +++ b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h @@ -149,7 +149,7 @@ static const uint8_t SHIFT_TAB_OISx[] = */ #define OCREF_CLEAR_SELECT_Pos (28U) -#define OCREF_CLEAR_SELECT_Msk (0x1U << OCREF_CLEAR_SELECT_Pos) /*!< 0x10000000 */ +#define OCREF_CLEAR_SELECT_Msk (0x1UL << OCREF_CLEAR_SELECT_Pos) /*!< 0x10000000 */ /** * @} */ diff --git a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h index adced15..8d3a884 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h +++ b/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h @@ -75,6 +75,7 @@ typedef struct uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */ } USB_CfgTypeDef; +#if defined (HAL_PCD_MODULE_ENABLED) typedef struct { uint8_t num; /*!< Endpoint number @@ -119,6 +120,7 @@ typedef struct uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */ } USB_EPTypeDef; +#endif /* defined (HAL_PCD_MODULE_ENABLED) */ /* Exported constants --------------------------------------------------------*/ @@ -161,7 +163,7 @@ typedef struct #define PMA_ACCESS 1U #ifndef USB_EP_RX_STRX -#define USB_EP_RX_STRX (0x3U << 12) +#define USB_EP_RX_STRX (0x3UL << 12) #endif /* USB_EP_RX_STRX */ #define EP_ADDR_MSK 0x7U @@ -186,11 +188,11 @@ typedef struct */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); +HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg); HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); +HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode); HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx); HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num); @@ -239,5 +241,4 @@ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, } #endif /* __cplusplus */ - #endif /* STM32G4xx_LL_USB_H */ diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c index 563b90d..f4c1343 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c @@ -48,11 +48,11 @@ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /** - * @brief STM32G4xx HAL Driver version number V1.2.5 + * @brief STM32G4xx HAL Driver version number V1.2.6 */ #define __STM32G4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32G4xx_HAL_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */ -#define __STM32G4xx_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */ +#define __STM32G4xx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */ #define __STM32G4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32G4xx_HAL_VERSION ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\ |(__STM32G4xx_HAL_VERSION_SUB1 << 16U)\ diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c index 66b80b5..4f0638f 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c @@ -492,7 +492,13 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; - if(hdma->State != HAL_DMA_STATE_BUSY) + /* Check the DMA peripheral handle parameter */ + if (hdma == NULL) + { + return HAL_ERROR; + } + + if (hdma->State != HAL_DMA_STATE_BUSY) { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; @@ -501,31 +507,31 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) } else { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - - /* disable the DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU)); - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if (hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ - /* disable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - } + /* Disable the channel */ + __HAL_DMA_DISABLE(hdma); + + /* Disable DMA IT */ + __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); + + /* disable the DMAMUX sync overrun IT*/ + hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; + + /* Clear all flags */ + hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU)); + + /* Clear the DMAMUX synchro overrun flag */ + hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; + + if (hdma->DMAmuxRequestGen != 0U) + { + /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ + /* disable the request gen overrun IT*/ + hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; + + /* Clear the DMAMUX request generator overrun flag */ + hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; + } + } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; @@ -560,12 +566,13 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) } else { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); /* Disable the channel */ __HAL_DMA_DISABLE(hdma); + /* Disable DMA IT */ + __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); + /* disable the DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; @@ -938,7 +945,6 @@ HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Ca */ - /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions * @brief Peripheral State and Errors functions * @@ -1053,20 +1059,24 @@ static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) { /* DMA1 */ DMAMUX1_ChannelBase = DMAMUX1_Channel0; + channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; } else { /* DMA2 */ #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G414xx) || defined (STM32G483xx) || defined (STM32G484xx) || defined (STM32G491xx) || defined (STM32G4A1xx) || defined (STM32G411xC) DMAMUX1_ChannelBase = DMAMUX1_Channel8; + channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 8U; #elif defined (STM32G411xB) || defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1CB) DMAMUX1_ChannelBase = DMAMUX1_Channel6; + channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 6U; #else DMAMUX1_ChannelBase = DMAMUX1_Channel7; + channel_number = ((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U; #endif /* STM32G4x1xx) */ } + dmamux_base_addr = (uint32_t)DMAMUX1_ChannelBase; - channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelIndex >> 2U) * ((uint32_t)DMAMUX1_Channel1 - (uint32_t)DMAMUX1_Channel0))); hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c index 1f2e000..5780c68 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c @@ -92,7 +92,7 @@ * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters * @retval HAL status */ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) +HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, const HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) { /* Check the parameters */ assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); @@ -139,7 +139,7 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSy * @retval HAL status */ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, - HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) + const HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) { /* Check the parameters */ assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c index 871928c..3838693 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c @@ -141,7 +141,7 @@ * @param pExtiConfig Pointer on EXTI configuration to be set. * @retval HAL Status. */ -HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig) +HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef const *pExtiConfig) { __IO uint32_t *regaddr; uint32_t regval; @@ -265,9 +265,9 @@ HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT * @param pExtiConfig Pointer on structure to store Exti configuration. * @retval HAL Status. */ -HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig) +HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef const *hexti, EXTI_ConfigTypeDef *pExtiConfig) { - __IO uint32_t *regaddr; + const __IO uint32_t *regaddr; uint32_t regval; uint32_t linepos; uint32_t maskline; @@ -361,7 +361,7 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT * @param hexti Exti handle. * @retval HAL Status. */ -HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) +HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef const *hexti) { __IO uint32_t *regaddr; uint32_t regval; @@ -501,7 +501,7 @@ HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLin * @param hexti Exti handle. * @retval none. */ -void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) +void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef const *hexti) { __IO uint32_t *regaddr; uint32_t regval; @@ -536,9 +536,9 @@ void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) * @param Edge unused * @retval 1 if interrupt is pending else 0. */ -uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) +uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge) { - __IO uint32_t *regaddr; + const __IO uint32_t *regaddr; uint32_t regval; uint32_t linepos; uint32_t maskline; @@ -571,7 +571,7 @@ uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) * @param Edge unused * @retval None. */ -void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) +void HAL_EXTI_ClearPending(EXTI_HandleTypeDef const *hexti, uint32_t Edge) { __IO uint32_t *regaddr; uint32_t maskline; @@ -600,7 +600,7 @@ void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) * @param hexti Exti handle. * @retval None. */ -void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) +void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef const *hexti) { __IO uint32_t *regaddr; uint32_t maskline; diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c index cd8876a..184c278 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c @@ -159,7 +159,7 @@ * the configuration information for the specified GPIO peripheral. * @retval None */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) +void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef const *GPIO_Init) { uint32_t position = 0x00U; uint32_t iocurrent; @@ -198,7 +198,8 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) GPIOx->OTYPER = temp; } - if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + if (((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) || + (((GPIO_Init->Mode & GPIO_MODE) == MODE_ANALOG) && (GPIO_Init->Pull != GPIO_PULLUP))) { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); @@ -370,7 +371,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) +GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef const *GPIOx, uint16_t GPIO_Pin) { GPIO_PinState bitstatus; diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c index 6f021c3..b6856a0 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c @@ -49,6 +49,9 @@ (#)Enable PCD transmission and reception: (##) HAL_PCD_Start(); + (#)NOTE: For applications not using double buffer mode, define the symbol + 'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint. + @endverbatim ****************************************************************************** */ @@ -311,8 +314,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); if (hpcd->State == HAL_PCD_STATE_READY) { @@ -390,8 +391,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); return status; } @@ -416,9 +415,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_Ca { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - /* Setup Legacy weak Callbacks */ if (hpcd->State == HAL_PCD_STATE_READY) { @@ -499,8 +495,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_Ca status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); return status; } @@ -524,9 +518,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->DataOutStageCallback = pCallback; @@ -540,9 +531,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -556,9 +544,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->DataOutStageCallback = HAL_PCD_DataOutStageCallback; /* Legacy weak DataOutStageCallback */ @@ -572,9 +557,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -598,9 +580,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->DataInStageCallback = pCallback; @@ -614,9 +593,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -630,9 +606,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->DataInStageCallback = HAL_PCD_DataInStageCallback; /* Legacy weak DataInStageCallback */ @@ -646,9 +619,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -672,9 +642,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->ISOOUTIncompleteCallback = pCallback; @@ -688,9 +655,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -705,9 +669,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->ISOOUTIncompleteCallback = HAL_PCD_ISOOUTIncompleteCallback; /* Legacy weak ISOOUTIncompleteCallback */ @@ -721,9 +682,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -747,9 +705,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->ISOINIncompleteCallback = pCallback; @@ -763,9 +718,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -780,9 +732,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->ISOINIncompleteCallback = HAL_PCD_ISOINIncompleteCallback; /* Legacy weak ISOINIncompleteCallback */ @@ -796,10 +745,7 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; + return status; } /** @@ -821,9 +767,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdC return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->BCDCallback = pCallback; @@ -837,9 +780,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdC status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -853,9 +793,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->BCDCallback = HAL_PCDEx_BCD_Callback; /* Legacy weak HAL_PCDEx_BCD_Callback */ @@ -869,9 +806,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -894,9 +828,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmC return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->LPMCallback = pCallback; @@ -910,9 +841,6 @@ HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmC status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } @@ -926,9 +854,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(hpcd); - if (hpcd->State == HAL_PCD_STATE_READY) { hpcd->LPMCallback = HAL_PCDEx_LPM_Callback; /* Legacy weak HAL_PCDEx_LPM_Callback */ @@ -942,9 +867,6 @@ HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; } #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ @@ -1726,6 +1648,11 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); + if (epindex >= 8U) + { + return HAL_ERROR; + } + if (epindex == 0U) { /* Decode and service control endpoint interrupt */ @@ -1770,6 +1697,18 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); + if (ep->xfer_count != 8U) + { + /* Set Stall condition for EP0 IN/OUT */ + PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_STALL); + PCD_SET_EP_TX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_TX_STALL); + + /* SETUP bit kept frozen while CTR_RX = 1 */ + PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); + + return HAL_OK; + } + USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, ep->pmaadress, (uint16_t)ep->xfer_count); @@ -1790,27 +1729,28 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - ep->pmaadress, (uint16_t)ep->xfer_count); - - ep->xfer_buff += ep->xfer_count; - - /* Process Control Data OUT Packet */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, 0U); -#else - HAL_PCD_DataOutStageCallback(hpcd, 0U); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) + if (ep->xfer_count == 0U) { + /* Status phase re-arm for next setup */ PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); } + else + { + if (ep->xfer_buff != 0U) + { + USB_ReadPMA(hpcd->Instance, ep->xfer_buff, + ep->pmaadress, (uint16_t)ep->xfer_count); /* max 64bytes */ + + ep->xfer_buff += ep->xfer_count; + + /* Process Control Data OUT Packet */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + hpcd->DataOutStageCallback(hpcd, 0U); +#else + HAL_PCD_DataOutStageCallback(hpcd, 0U); +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + } + } } } } @@ -1875,7 +1815,6 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; - ep->xfer_buff += count; if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) { @@ -1888,6 +1827,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) } else { + ep->xfer_buff += count; (void)USB_EPStartXfer(hpcd->Instance, ep); } } diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c index 96064ae..03db2db 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c @@ -82,7 +82,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr { PCD_EPTypeDef *ep; - /* initialize ep structure*/ + /* Initialize ep structure */ if ((0x80U & ep_addr) == 0x80U) { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; @@ -97,6 +97,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr { /* Single Buffer */ ep->doublebuffer = 0U; + /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; } @@ -105,6 +106,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; + /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); @@ -124,13 +126,11 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) USB_TypeDef *USBx = hpcd->Instance; hpcd->battery_charging_active = 1U; - /* Enable BCD feature */ - USBx->BCDR |= USB_BCDR_BCDEN; - - /* Enable DCD : Data Contact Detect */ USBx->BCDR &= ~(USB_BCDR_PDEN); USBx->BCDR &= ~(USB_BCDR_SDEN); - USBx->BCDR |= USB_BCDR_DCDEN; + + /* Enable BCD feature */ + USBx->BCDR |= USB_BCDR_BCDEN; return HAL_OK; } @@ -162,21 +162,10 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) uint32_t tickstart = HAL_GetTick(); /* Wait for Min DCD Timeout */ - HAL_Delay(300U); + HAL_Delay(350U); - /* Data Pin Contact ? Check Detect flag */ - if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } /* Primary detection: checks if connected to Standard Downstream Port (without charging capability) */ - USBx->BCDR &= ~(USB_BCDR_DCDEN); - HAL_Delay(50U); USBx->BCDR |= (USB_BCDR_PDEN); HAL_Delay(50U); diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c index 4ba4a38..f333d7c 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c @@ -305,7 +305,7 @@ void HAL_PWR_DisableBkUpAccess(void) * detection level. * @retval None */ -HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) +HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef const *sConfigPVD) { /* Check the parameters */ assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c index f53c929..987fa66 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c @@ -671,7 +671,7 @@ void HAL_PWREx_DisablePVM4(void) * detection level and to each monitored supply. * @retval HAL status */ -HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM) +HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef const *sConfigPVM) { HAL_StatusTypeDef status = HAL_OK; diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c index 884a75c..dce8ccc 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c @@ -309,7 +309,7 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void) * first and then HSE On or HSE Bypass. * @retval HAL status */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { uint32_t tickstart; uint32_t temp_sysclksrc; @@ -763,7 +763,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { uint32_t tickstart; uint32_t pllfreq; diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c index 593e984..9eb703c 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c @@ -120,7 +120,7 @@ * * @retval HAL status */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) +HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef const *PeriphClkInit) { uint32_t tmpregister; uint32_t tickstart; @@ -1405,7 +1405,7 @@ __weak void HAL_RCCEx_LSECSS_Callback(void) */ void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource) { - GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitTypeDef GPIO_InitStruct = {0}; FlagStatus pwrclkchanged = RESET; FlagStatus backupchanged = RESET; @@ -1558,7 +1558,7 @@ void HAL_RCCEx_DisableLSCO(void) * @param pInit Pointer on RCC_CRSInitTypeDef structure * @retval None */ -void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) +void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef const *pInit) { uint32_t value; diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c index 7225437..2cb3e33 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c @@ -4644,7 +4644,6 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t ((BurstLength) >> 8U) + 1U); - return status; } @@ -7128,8 +7127,6 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - TIMx->CR1 = tmpcr1; - /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; @@ -7142,16 +7139,15 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure TIMx->RCR = Structure->RepetitionCounter; } + /* Disable Update Event (UEV) with Update Generation (UG) + by changing Update Request Source (URS) to avoid Update flag (UIF) */ + SET_BIT(TIMx->CR1, TIM_CR1_URS); + /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ - if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - { - /* Clear the update flag */ - CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - } + TIMx->CR1 = tmpcr1; } /** @@ -7194,12 +7190,13 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + /* Disable the Channel 1N: Reset the CC1NE Bit */ + TIMx->CCER &= ~TIM_CCER_CC1NE; + /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -7270,12 +7267,13 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + /* Disable the Channel 2N: Reset the CC2NE Bit */ + TIMx->CCER &= ~TIM_CCER_CC2NE; + /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -7345,12 +7343,13 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + /* Disable the Channel 3N: Reset the CC3NE Bit */ + TIMx->CCER &= ~TIM_CCER_CC3NE; + /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -7421,12 +7420,13 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + /* Disable the Channel 4N: Reset the CC4NE Bit */ + TIMx->CCER &= ~TIM_CCER_CC4NE; + /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC4NP; /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 12U); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC4NE; } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -7729,9 +7729,18 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ uint32_t tmpccmr1; uint32_t tmpccer; - /* Disable the Channel 1: Reset the CC1E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; + /* Disable the Channel 1N: Reset the CC1NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + { + TIMx->CCER &= ~TIM_CCER_CC1NE; + } + + /* Get the TIMx CCMR1 register value */ tmpccmr1 = TIMx->CCMR1; /* Select the Input */ @@ -7775,9 +7784,18 @@ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t tmpccmr1; uint32_t tmpccer; - /* Disable the Channel 1: Reset the CC1E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; + /* Disable the Channel 1N: Reset the CC1NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + { + TIMx->CCER &= ~TIM_CCER_CC1NE; + } + + /* Get the TIMx CCMR1 register value */ tmpccmr1 = TIMx->CCMR1; /* Set the filter */ @@ -7819,9 +7837,18 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccmr1; uint32_t tmpccer; - /* Disable the Channel 2: Reset the CC2E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; + /* Disable the Channel 2N: Reset the CC2NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) + { + TIMx->CCER &= ~TIM_CCER_CC2NE; + } + + /* Get the TIMx CCMR1 register value */ tmpccmr1 = TIMx->CCMR1; /* Select the Input */ @@ -7858,9 +7885,18 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t tmpccmr1; uint32_t tmpccer; - /* Disable the Channel 2: Reset the CC2E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; + /* Disable the Channel 2N: Reset the CC2NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) + { + TIMx->CCER &= ~TIM_CCER_CC2NE; + } + + /* Get the TIMx CCMR1 register value */ tmpccmr1 = TIMx->CCMR1; /* Set the filter */ @@ -7902,9 +7938,18 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccmr2; uint32_t tmpccer; - /* Disable the Channel 3: Reset the CC3E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 3: Reset the CC3E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; + /* Disable the Channel 3N: Reset the CC3NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) + { + TIMx->CCER &= ~TIM_CCER_CC3NE; + } + + /* Get the TIMx CCMR2 register value */ tmpccmr2 = TIMx->CCMR2; /* Select the Input */ @@ -7950,9 +7995,18 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccmr2; uint32_t tmpccer; - /* Disable the Channel 4: Reset the CC4E Bit */ + /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; + + /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; + /* Disable the Channel 4N: Reset the CC4NE Bit */ + if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_4)) + { + TIMx->CCER &= ~TIM_CCER_CC4NE; + } + + /* Get the TIMx CCMR2 register value */ tmpccmr2 = TIMx->CCMR2; /* Select the Input */ @@ -8050,10 +8104,10 @@ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, * @param TIMx to select the TIM peripheral * @param Channel specifies the TIM Channel * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 + * @arg TIM_CHANNEL_1: TIM Channel 1 selected + * @arg TIM_CHANNEL_2: TIM Channel 2 selected + * @arg TIM_CHANNEL_3: TIM Channel 3 selected + * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @arg TIM_CHANNEL_5: TIM Channel 5 selected * @arg TIM_CHANNEL_6: TIM Channel 6 selected * @param ChannelState specifies the TIM Channel CCxE bit new state. diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c index 972616a..c739b31 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c @@ -3476,10 +3476,10 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim * @param htim TIM handle * @param ChannelN TIM Complementary channel * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 + * @arg TIM_CHANNEL_1: TIM Channel 1 selected + * @arg TIM_CHANNEL_2: TIM Channel 2 selected + * @arg TIM_CHANNEL_3: TIM Channel 3 selected + * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval TIM Complementary channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN) @@ -3652,10 +3652,10 @@ static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma) * @param TIMx to select the TIM peripheral * @param Channel specifies the TIM Channel * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 + * @arg TIM_CHANNEL_1: TIM Channel 1 selected + * @arg TIM_CHANNEL_2: TIM Channel 2 selected + * @arg TIM_CHANNEL_3: TIM Channel 3 selected + * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @param ChannelNState specifies the TIM Channel CCxNE bit new state. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. * @retval None diff --git a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c index ad8909f..6bc364e 100644 --- a/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c +++ b/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c @@ -33,6 +33,9 @@ (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. + (#)NOTE: For applications not using double buffer mode, define the symbol + 'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint. + @endverbatim ****************************************************************************** @@ -61,7 +64,7 @@ * the configuration information for the specified USBx peripheral. * @retval HAL status */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) +HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg) { /* Prevent unused argument(s) compilation warning */ UNUSED(USBx); @@ -130,7 +133,7 @@ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) +HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode) { /* Prevent unused argument(s) compilation warning */ UNUSED(USBx); diff --git a/STM32G491XX_FLASH.ld b/STM32G491XX_FLASH.ld index 02ebdf7..8f0be36 100644 --- a/STM32G491XX_FLASH.ld +++ b/STM32G491XX_FLASH.ld @@ -61,6 +61,7 @@ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +_sstack = _estack - _Min_Stack_Size; /* Generate a link error if heap and stack don't fit into RAM */ _Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Stack_Size = 0x400; /* required amount of stack */ diff --git a/pcb_odo.ioc b/pcb_odo.ioc index e4819e4..c1371f2 100644 --- a/pcb_odo.ioc +++ b/pcb_odo.ioc @@ -1,7 +1,7 @@ #MicroXplorer Configuration settings - do not modify CAD.formats=[] CAD.pinconfig=Dual -CAD.provider= +CAD.provider=Component Search Engine File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false @@ -39,8 +39,8 @@ Mcu.PinsNb=16 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32G491KEUx -MxCube.Version=6.15.0 -MxDb.Version=DB.6.0.150 +MxCube.Version=6.17.0 +MxDb.Version=DB.6.0.170 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.ForceEnableDMAVector=true @@ -99,7 +99,7 @@ ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32G491KEUx -ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.6.1 +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.6.2 ProjectManager.FreePins=false ProjectManager.FreePinsContext= ProjectManager.HalAssertFull=false