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https://github.com/modelec/pcb_puissance.git
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29 lines
1.4 KiB
Plaintext
29 lines
1.4 KiB
Plaintext
(footprint "porte fusible E44" (version 20221018) (generator pcbnew)
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(layer "F.Cu")
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(attr smd)
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(fp_text reference "REF**" (at 7.7 0 90 unlocked) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.1)))
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(tstamp 6e9dcdf1-18bc-4c85-9d78-a67dfde05550)
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)
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(fp_text value "porte fusible E44" (at 9.2 0 90 unlocked) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 2c725095-c870-449b-a62f-43186140b024)
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)
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(fp_text user "GND" (at -1.2 8.2 unlocked) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.1)) (justify left bottom))
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(tstamp 4b25f3a5-b5ed-42e2-a92a-88f171f9605b)
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)
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(fp_text user "VIN" (at 1.5 -8.1 180 unlocked) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.1)) (justify left bottom))
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(tstamp db393b73-d4bc-4d46-a844-c93276bc38da)
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)
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(fp_text user "${REFERENCE}" (at 11.1 0 90 unlocked) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 63a354a6-0b16-473f-9018-d162dcd474cf)
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)
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(fp_circle (center 0 0) (end 6.6 0)
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(stroke (width 0.3) (type default)) (fill none) (layer "F.SilkS") (tstamp dd37bf4d-a338-4257-be7b-e19b07dec85e))
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(pad "1" thru_hole circle (at 0 -4.85) (size 3.5 3.5) (drill 1.5) (layers "*.Cu" "*.Mask") (tstamp 0753d3a0-c71e-42b3-8a4d-6b176d4837ea))
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(pad "2" thru_hole circle (at 0 4.85) (size 3.5 3.5) (drill 1.5) (layers "*.Cu" "*.Mask") (tstamp 00848d10-26e8-4978-9dd0-26a30c35b26b))
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)
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