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TP4 Exo 4 (Affichage d'une chaîne de caractères sur l’écran graphique TFT)

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Félix MARQUET
2025-06-25 16:28:41 +02:00
parent 9ba9cbc6a6
commit d45aafa4a2
210 changed files with 190509 additions and 0 deletions
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TP4_TFT_CHAIN_CHAR/.cproject Normal file
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25
TP4_TFT_CHAIN_CHAR/.mxproject Normal file
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[PreviousLibFiles]
LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_spi.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_bus.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_crs.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_system.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_utils.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_ll_exti.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;
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TP4_TFT_CHAIN_CHAR/.project Normal file
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<?xml version="1.0" encoding="UTF-8"?>
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2
TP4_TFT_CHAIN_CHAR/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs Normal file
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TP4_TFT_CHAIN_CHAR/.settings/language.settings.xml Normal file
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6
TP4_TFT_CHAIN_CHAR/.settings/org.eclipse.cdt.core.prefs Normal file
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2
TP4_TFT_CHAIN_CHAR/.settings/org.eclipse.core.resources.prefs Normal file
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TP4_TFT_CHAIN_CHAR/.settings/stm32cubeide.project.prefs Normal file
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TP4_TFT_CHAIN_CHAR/Core/Inc/main.h Normal file
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */

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TP4_TFT_CHAIN_CHAR/Core/Inc/stm32l1xx_hal_conf.h Normal file
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_HAL_CONF_H
#define __STM32L1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_OPAMP_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_TIM_MODULE_ENABLED */
/*#define HAL_UART_MODULE_ENABLED */
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal Multiple Speed oscillator (MSI) default value.
* This value is the default MSI range value after Reset.
*/
#if !defined (MSI_VALUE)
#define MSI_VALUE ((uint32_t)2097000) /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)15) /*!< tick interrupt priority */
#define USE_RTOS 0
#define PREFETCH_ENABLE 0
#define INSTRUCTION_CACHE_ENABLE 1
#define DATA_CACHE_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Register callback feature configuration ############### */
/**
* @brief Set below the peripheral configuration to "1U" to add the support
* of HAL callback registration/deregistration feature for the HAL
* driver(s). This allows user application to provide specific callback
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
* the default weak callback functions (see each stm32l0xx_hal_ppp.h file
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
* for each PPP peripheral).
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32l1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32l1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32l1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32l1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32l1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32l1xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32l1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32l1xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32l1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32l1xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32l1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32l1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32l1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32l1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32l1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LCD_MODULE_ENABLED
#include "stm32l1xx_hal_lcd.h"
#endif /* HAL_LCD_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32l1xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32l1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32l1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32l1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32l1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32l1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32l1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l1xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32l1xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1xx_HAL_CONF_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_IT_H
#define __STM32L1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1xx_IT_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "max7219.h"
#include "fonc_tft.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
SPI_HandleTypeDef hspi1;
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_SPI1_Init(void);
/* USER CODE BEGIN PFP */
void affiche_mot(uint8_t* mot, uint8_t col, uint8_t ligne);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void affiche_mot(uint8_t* mot, uint8_t col, uint8_t ligne) {
uint8_t i = 0;
while (mot[i] != '\0') {
displayChar_TFT(col + (i * 12), ligne, mot[i], ST7735_RED, ST7735_BLACK, 2);
i++;
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */
MAX7219_Init();
init_TFT();
MAX7219_Clear();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
uint8_t mot[] = "HELLO ISEN";
affiche_mot(mot, 10, 100);
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_SET);
/*Configure GPIO pins : PC0 PC1 PC2 PC3 */
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pin : PB15 */
GPIO_InitStruct.Pin = GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF3_TIM11;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pin : PD2 */
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/*Configure GPIO pin : PB7 */
GPIO_InitStruct.Pin = GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_COMP_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32L1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32l1xx.s). */
/******************************************************************************/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}

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/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}

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/**
******************************************************************************
* @file system_stm32l1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32l1xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32l1xx_system
* @{
*/
/** @addtogroup STM32L1xx_System_Private_Includes
* @{
*/
#include "stm32l1xx.h"
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM mounted
on STM32L152D_EVAL board as data memory */
/* #define DATA_IN_ExtSRAM */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#if !defined(VECT_TAB_OFFSET)
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_OFFSET */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 2097000U;
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit (void)
{
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
* value as defined by the MSI range.
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
case 0x04: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
pllmul = PLLMulTable[(pllmul >> 18)];
plldiv = (plldiv >> 22) + 1;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
if (pllsource == 0x00)
{
/* HSI oscillator clock selected as PLL clock entry */
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
}
else
{
/* HSE selected as PLL clock entry */
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
}
break;
default: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in SystemInit() function before jump to main.
* This function configures the external SRAM mounted on STM32L152D_EVAL board
* This SRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg = 0;
/* Flash 1 wait state */
FLASH->ACR |= FLASH_ACR_LATENCY;
/* Power enable */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
/* Select the Voltage Range 1 (1.8 V) */
PWR->CR = PWR_CR_VOS_0;
/* Wait Until the Voltage Regulator is ready */
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
{
}
/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
+ SRAM pins assignment +
+-------------------+--------------------+------------------+------------------+
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
| PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
| PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
| PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
| PD15 <-> FSMC_D1 |--------------------+
+-------------------+
*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHBENR = 0x000080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
/* Connect PDx pins to FSMC Alternate function */
GPIOD->AFR[0] = 0x00CC00CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A0A;
/* Configure PDx pins speed to 40 MHz */
GPIOD->OSPEEDR = 0xFFFF0F0F;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FSMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 40 MHz */
GPIOE->OSPEEDR = 0xFFFFC00F;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FSMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 40 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FSMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x00000C00;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00200AAA;
/* Configure PGx pins speed to 40 MHz */
GPIOG->OSPEEDR = 0x00300FFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FSMC Configuration ------------------------------------------------------*/
/* Enable the FSMC interface clock */
RCC->AHBENR = 0x400080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
(void)(tmpreg);
/* Configure and enable Bank1_SRAM3 */
FSMC_Bank1->BTCR[4] = 0x00001011;
FSMC_Bank1->BTCR[5] = 0x00000300;
FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
/*
Bank1_SRAM3 is configured as follow:
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 3;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
*/
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

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/**
******************************************************************************
* @file startup_stm32l152xe.s
* @author MCD Application Team
* @brief STM32L152XE Devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* Copyright (c) 2017-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMPER_STAMP_IRQHandler
.word RTC_WKUP_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_IRQHandler
.word USB_HP_IRQHandler
.word USB_LP_IRQHandler
.word DAC_IRQHandler
.word COMP_IRQHandler
.word EXTI9_5_IRQHandler
.word LCD_IRQHandler
.word TIM9_IRQHandler
.word TIM10_IRQHandler
.word TIM11_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USB_FS_WKUP_IRQHandler
.word TIM6_IRQHandler
.word TIM7_IRQHandler
.word 0
.word TIM5_IRQHandler
.word SPI3_IRQHandler
.word UART4_IRQHandler
.word UART5_IRQHandler
.word DMA2_Channel1_IRQHandler
.word DMA2_Channel2_IRQHandler
.word DMA2_Channel3_IRQHandler
.word DMA2_Channel4_IRQHandler
.word DMA2_Channel5_IRQHandler
.word 0
.word COMP_ACQ_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32L152XE devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMPER_STAMP_IRQHandler
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_IRQHandler
.thumb_set ADC1_IRQHandler,Default_Handler
.weak USB_HP_IRQHandler
.thumb_set USB_HP_IRQHandler,Default_Handler
.weak USB_LP_IRQHandler
.thumb_set USB_LP_IRQHandler,Default_Handler
.weak DAC_IRQHandler
.thumb_set DAC_IRQHandler,Default_Handler
.weak COMP_IRQHandler
.thumb_set COMP_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler,Default_Handler
.weak TIM9_IRQHandler
.thumb_set TIM9_IRQHandler,Default_Handler
.weak TIM10_IRQHandler
.thumb_set TIM10_IRQHandler,Default_Handler
.weak TIM11_IRQHandler
.thumb_set TIM11_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USB_FS_WKUP_IRQHandler
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
.weak TIM6_IRQHandler
.thumb_set TIM6_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak DMA2_Channel1_IRQHandler
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
.weak DMA2_Channel2_IRQHandler
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
.weak DMA2_Channel3_IRQHandler
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
.weak DMA2_Channel4_IRQHandler
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
.weak DMA2_Channel5_IRQHandler
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler

6
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@@ -0,0 +1,6 @@
../Core/Src/main.c:63:6:affiche_mot 2
../Core/Src/main.c:78:5:main 1
../Core/Src/main.c:130:6:SystemClock_Config 3
../Core/Src/main.c:171:13:MX_SPI1_Init 2
../Core/Src/main.c:209:13:MX_GPIO_Init 1
../Core/Src/main.c:274:6:Error_Handler 1

55
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@@ -0,0 +1,55 @@
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
../Drivers/7Seg_MAX7219/max7219.h ../Drivers/TFT_ST7735/fonc_tft.h
../Core/Inc/main.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
../Drivers/7Seg_MAX7219/max7219.h:
../Drivers/TFT_ST7735/fonc_tft.h:

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TP4_TFT_CHAIN_CHAR/Debug/Core/Src/main.su Normal file
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@@ -0,0 +1,6 @@
../Core/Src/main.c:63:6:affiche_mot 32 static
../Core/Src/main.c:78:5:main 24 static
../Core/Src/main.c:130:6:SystemClock_Config 80 static
../Core/Src/main.c:171:13:MX_SPI1_Init 8 static
../Core/Src/main.c:209:13:MX_GPIO_Init 48 static
../Core/Src/main.c:274:6:Error_Handler 4 static,ignoring_inline_asm

3
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@@ -0,0 +1,3 @@
../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 1
../Core/Src/stm32l1xx_hal_msp.c:87:6:HAL_SPI_MspInit 2
../Core/Src/stm32l1xx_hal_msp.c:125:6:HAL_SPI_MspDeInit 2

52
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/stm32l1xx_hal_msp.d Normal file
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@@ -0,0 +1,52 @@
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c \
../Core/Inc/main.h ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Core/Inc/main.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:

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TP4_TFT_CHAIN_CHAR/Debug/Core/Src/stm32l1xx_hal_msp.su Normal file
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@@ -0,0 +1,3 @@
../Core/Src/stm32l1xx_hal_msp.c:63:6:HAL_MspInit 24 static
../Core/Src/stm32l1xx_hal_msp.c:87:6:HAL_SPI_MspInit 48 static
../Core/Src/stm32l1xx_hal_msp.c:125:6:HAL_SPI_MspDeInit 16 static

9
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/stm32l1xx_it.cyclo Normal file
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@@ -0,0 +1,9 @@
../Core/Src/stm32l1xx_it.c:69:6:NMI_Handler 1
../Core/Src/stm32l1xx_it.c:84:6:HardFault_Handler 1
../Core/Src/stm32l1xx_it.c:99:6:MemManage_Handler 1
../Core/Src/stm32l1xx_it.c:114:6:BusFault_Handler 1
../Core/Src/stm32l1xx_it.c:129:6:UsageFault_Handler 1
../Core/Src/stm32l1xx_it.c:144:6:SVC_Handler 1
../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 1
../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 1
../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 1

54
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/stm32l1xx_it.d Normal file
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@@ -0,0 +1,54 @@
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c ../Core/Inc/main.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
../Core/Inc/stm32l1xx_it.h
../Core/Inc/main.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
../Core/Inc/stm32l1xx_it.h:

BIN
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9
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/stm32l1xx_it.su Normal file
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@@ -0,0 +1,9 @@
../Core/Src/stm32l1xx_it.c:69:6:NMI_Handler 4 static
../Core/Src/stm32l1xx_it.c:84:6:HardFault_Handler 4 static
../Core/Src/stm32l1xx_it.c:99:6:MemManage_Handler 4 static
../Core/Src/stm32l1xx_it.c:114:6:BusFault_Handler 4 static
../Core/Src/stm32l1xx_it.c:129:6:UsageFault_Handler 4 static
../Core/Src/stm32l1xx_it.c:144:6:SVC_Handler 4 static
../Core/Src/stm32l1xx_it.c:157:6:DebugMon_Handler 4 static
../Core/Src/stm32l1xx_it.c:170:6:PendSV_Handler 4 static
../Core/Src/stm32l1xx_it.c:183:6:SysTick_Handler 8 static

42
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/subdir.mk Normal file
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@@ -0,0 +1,42 @@
################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (13.3.rel1)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/main.c \
../Core/Src/stm32l1xx_hal_msp.c \
../Core/Src/stm32l1xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32l1xx.c
OBJS += \
./Core/Src/main.o \
./Core/Src/stm32l1xx_hal_msp.o \
./Core/Src/stm32l1xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32l1xx.o
C_DEPS += \
./Core/Src/main.d \
./Core/Src/stm32l1xx_hal_msp.d \
./Core/Src/stm32l1xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32l1xx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32L152xE -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/7Seg_MAX7219 -I../Drivers/TFT_ST7735 -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-Core-2f-Src
clean-Core-2f-Src:
-$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32l1xx_hal_msp.cyclo ./Core/Src/stm32l1xx_hal_msp.d ./Core/Src/stm32l1xx_hal_msp.o ./Core/Src/stm32l1xx_hal_msp.su ./Core/Src/stm32l1xx_it.cyclo ./Core/Src/stm32l1xx_it.d ./Core/Src/stm32l1xx_it.o ./Core/Src/stm32l1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32l1xx.cyclo ./Core/Src/system_stm32l1xx.d ./Core/Src/system_stm32l1xx.o ./Core/Src/system_stm32l1xx.su
.PHONY: clean-Core-2f-Src

18
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/syscalls.cyclo Normal file
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@@ -0,0 +1,18 @@
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
../Core/Src/syscalls.c:48:5:_getpid 1
../Core/Src/syscalls.c:53:5:_kill 1
../Core/Src/syscalls.c:61:6:_exit 1
../Core/Src/syscalls.c:67:27:_read 2
../Core/Src/syscalls.c:80:27:_write 2
../Core/Src/syscalls.c:92:5:_close 1
../Core/Src/syscalls.c:99:5:_fstat 1
../Core/Src/syscalls.c:106:5:_isatty 1
../Core/Src/syscalls.c:112:5:_lseek 1
../Core/Src/syscalls.c:120:5:_open 1
../Core/Src/syscalls.c:128:5:_wait 1
../Core/Src/syscalls.c:135:5:_unlink 1
../Core/Src/syscalls.c:142:5:_times 1
../Core/Src/syscalls.c:148:5:_stat 1
../Core/Src/syscalls.c:155:5:_link 1
../Core/Src/syscalls.c:163:5:_fork 1
../Core/Src/syscalls.c:169:5:_execve 1

1
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/syscalls.d Normal file
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@@ -0,0 +1 @@
Core/Src/syscalls.o: ../Core/Src/syscalls.c

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18
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/syscalls.su Normal file
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@@ -0,0 +1,18 @@
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
../Core/Src/syscalls.c:48:5:_getpid 4 static
../Core/Src/syscalls.c:53:5:_kill 16 static
../Core/Src/syscalls.c:61:6:_exit 16 static
../Core/Src/syscalls.c:67:27:_read 32 static
../Core/Src/syscalls.c:80:27:_write 32 static
../Core/Src/syscalls.c:92:5:_close 16 static
../Core/Src/syscalls.c:99:5:_fstat 16 static
../Core/Src/syscalls.c:106:5:_isatty 16 static
../Core/Src/syscalls.c:112:5:_lseek 24 static
../Core/Src/syscalls.c:120:5:_open 12 static
../Core/Src/syscalls.c:128:5:_wait 16 static
../Core/Src/syscalls.c:135:5:_unlink 16 static
../Core/Src/syscalls.c:142:5:_times 16 static
../Core/Src/syscalls.c:148:5:_stat 16 static
../Core/Src/syscalls.c:155:5:_link 16 static
../Core/Src/syscalls.c:163:5:_fork 8 static
../Core/Src/syscalls.c:169:5:_execve 24 static

1
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/sysmem.cyclo Normal file
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@@ -0,0 +1 @@
../Core/Src/sysmem.c:53:7:_sbrk 3

1
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/sysmem.d Normal file
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@@ -0,0 +1 @@
Core/Src/sysmem.o: ../Core/Src/sysmem.c

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1
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/sysmem.su Normal file
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@@ -0,0 +1 @@
../Core/Src/sysmem.c:53:7:_sbrk 32 static

2
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/system_stm32l1xx.cyclo Normal file
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@@ -0,0 +1,2 @@
../Core/Src/system_stm32l1xx.c:161:6:SystemInit 1
../Core/Src/system_stm32l1xx.c:211:6:SystemCoreClockUpdate 6

51
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/system_stm32l1xx.d Normal file
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@@ -0,0 +1,51 @@
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:

BIN
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2
TP4_TFT_CHAIN_CHAR/Debug/Core/Src/system_stm32l1xx.su Normal file
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@@ -0,0 +1,2 @@
../Core/Src/system_stm32l1xx.c:161:6:SystemInit 4 static
../Core/Src/system_stm32l1xx.c:211:6:SystemCoreClockUpdate 32 static

2
TP4_TFT_CHAIN_CHAR/Debug/Core/Startup/startup_stm32l152retx.d Normal file
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@@ -0,0 +1,2 @@
Core/Startup/startup_stm32l152retx.o: \
../Core/Startup/startup_stm32l152retx.s

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27
TP4_TFT_CHAIN_CHAR/Debug/Core/Startup/subdir.mk Normal file
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@@ -0,0 +1,27 @@
################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (13.3.rel1)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32l152retx.s
OBJS += \
./Core/Startup/startup_stm32l152retx.o
S_DEPS += \
./Core/Startup/startup_stm32l152retx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
clean: clean-Core-2f-Startup
clean-Core-2f-Startup:
-$(RM) ./Core/Startup/startup_stm32l152retx.d ./Core/Startup/startup_stm32l152retx.o
.PHONY: clean-Core-2f-Startup

12
TP4_TFT_CHAIN_CHAR/Debug/Drivers/7Seg_MAX7219/max7219.cyclo Normal file
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@@ -0,0 +1,12 @@
../Drivers/7Seg_MAX7219/max7219.c:100:6:MAX7219_Init 1
../Drivers/7Seg_MAX7219/max7219.c:121:6:MAX7219_ShutdownStart 1
../Drivers/7Seg_MAX7219/max7219.c:136:6:MAX7219_ShutdownStop 1
../Drivers/7Seg_MAX7219/max7219.c:149:6:MAX7219_DisplayTestStart 1
../Drivers/7Seg_MAX7219/max7219.c:165:6:MAX7219_DisplayTestStop 1
../Drivers/7Seg_MAX7219/max7219.c:180:6:MAX7219_SetBrightness 1
../Drivers/7Seg_MAX7219/max7219.c:196:6:MAX7219_Clear 2
../Drivers/7Seg_MAX7219/max7219.c:214:6:MAX7219_DisplayChar 1
../Drivers/7Seg_MAX7219/max7219.c:220:6:MAX7219_DisplayCharPointOff 1
../Drivers/7Seg_MAX7219/max7219.c:225:6:MAX7219_DisplayCharPointOn 1
../Drivers/7Seg_MAX7219/max7219.c:243:6:MAX7219_Write 1
../Drivers/7Seg_MAX7219/max7219.c:262:13:MAX7219_SendByte 1

54
TP4_TFT_CHAIN_CHAR/Debug/Drivers/7Seg_MAX7219/max7219.d Normal file
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@@ -0,0 +1,54 @@
Drivers/7Seg_MAX7219/max7219.o: ../Drivers/7Seg_MAX7219/max7219.c \
../Core/Inc/main.h ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
../Drivers/7Seg_MAX7219/max7219.h
../Core/Inc/main.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
../Drivers/7Seg_MAX7219/max7219.h:

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12
TP4_TFT_CHAIN_CHAR/Debug/Drivers/7Seg_MAX7219/max7219.su Normal file
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@@ -0,0 +1,12 @@
../Drivers/7Seg_MAX7219/max7219.c:100:6:MAX7219_Init 8 static
../Drivers/7Seg_MAX7219/max7219.c:121:6:MAX7219_ShutdownStart 8 static
../Drivers/7Seg_MAX7219/max7219.c:136:6:MAX7219_ShutdownStop 8 static
../Drivers/7Seg_MAX7219/max7219.c:149:6:MAX7219_DisplayTestStart 8 static
../Drivers/7Seg_MAX7219/max7219.c:165:6:MAX7219_DisplayTestStop 8 static
../Drivers/7Seg_MAX7219/max7219.c:180:6:MAX7219_SetBrightness 16 static
../Drivers/7Seg_MAX7219/max7219.c:196:6:MAX7219_Clear 16 static
../Drivers/7Seg_MAX7219/max7219.c:214:6:MAX7219_DisplayChar 16 static
../Drivers/7Seg_MAX7219/max7219.c:220:6:MAX7219_DisplayCharPointOff 16 static
../Drivers/7Seg_MAX7219/max7219.c:225:6:MAX7219_DisplayCharPointOn 16 static
../Drivers/7Seg_MAX7219/max7219.c:243:6:MAX7219_Write 16 static
../Drivers/7Seg_MAX7219/max7219.c:262:13:MAX7219_SendByte 16 static

27
TP4_TFT_CHAIN_CHAR/Debug/Drivers/7Seg_MAX7219/subdir.mk Normal file
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@@ -0,0 +1,27 @@
################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (13.3.rel1)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Drivers/7Seg_MAX7219/max7219.c
OBJS += \
./Drivers/7Seg_MAX7219/max7219.o
C_DEPS += \
./Drivers/7Seg_MAX7219/max7219.d
# Each subdirectory must supply rules for building sources it contributes
Drivers/7Seg_MAX7219/%.o Drivers/7Seg_MAX7219/%.su Drivers/7Seg_MAX7219/%.cyclo: ../Drivers/7Seg_MAX7219/%.c Drivers/7Seg_MAX7219/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32L152xE -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/7Seg_MAX7219 -I../Drivers/TFT_ST7735 -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-Drivers-2f-7Seg_MAX7219
clean-Drivers-2f-7Seg_MAX7219:
-$(RM) ./Drivers/7Seg_MAX7219/max7219.cyclo ./Drivers/7Seg_MAX7219/max7219.d ./Drivers/7Seg_MAX7219/max7219.o ./Drivers/7Seg_MAX7219/max7219.su
.PHONY: clean-Drivers-2f-7Seg_MAX7219

25
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.cyclo Normal file
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@@ -0,0 +1,25 @@
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:140:19:HAL_Init 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:173:19:HAL_DeInit 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:196:13:HAL_MspInit 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:207:13:HAL_MspDeInit 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:230:26:HAL_InitTick 4
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:298:13:HAL_IncTick 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:309:17:HAL_GetTick 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:318:10:HAL_GetTickPrio 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:328:19:HAL_SetTickFreq 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:361:10:HAL_GetTickFreq 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:377:13:HAL_Delay 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:403:13:HAL_SuspendTick 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:419:13:HAL_ResumeTick 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:429:10:HAL_GetHalVersion 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:438:10:HAL_GetREVID 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:447:10:HAL_GetDEVID 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:456:10:HAL_GetUIDw0 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:465:10:HAL_GetUIDw1 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:474:10:HAL_GetUIDw2 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:503:6:HAL_DBGMCU_EnableDBGSleepMode 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:512:6:HAL_DBGMCU_DisableDBGSleepMode 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:521:6:HAL_DBGMCU_EnableDBGStopMode 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:530:6:HAL_DBGMCU_DisableDBGStopMode 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:539:6:HAL_DBGMCU_EnableDBGStandbyMode 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:548:6:HAL_DBGMCU_DisableDBGStandbyMode 1

52
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d Normal file
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@@ -0,0 +1,52 @@
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:

BIN
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Binary file not shown.

25
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su Normal file
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@@ -0,0 +1,25 @@
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:140:19:HAL_Init 16 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:173:19:HAL_DeInit 8 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:196:13:HAL_MspInit 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:207:13:HAL_MspDeInit 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:230:26:HAL_InitTick 24 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:298:13:HAL_IncTick 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:309:17:HAL_GetTick 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:318:10:HAL_GetTickPrio 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:328:19:HAL_SetTickFreq 24 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:361:10:HAL_GetTickFreq 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:377:13:HAL_Delay 24 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:403:13:HAL_SuspendTick 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:419:13:HAL_ResumeTick 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:429:10:HAL_GetHalVersion 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:438:10:HAL_GetREVID 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:447:10:HAL_GetDEVID 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:456:10:HAL_GetUIDw0 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:465:10:HAL_GetUIDw1 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:474:10:HAL_GetUIDw2 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:503:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:512:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:521:6:HAL_DBGMCU_EnableDBGStopMode 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:530:6:HAL_DBGMCU_DisableDBGStopMode 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:539:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c:548:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static

34
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.cyclo Normal file
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../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 1
../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 1
../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ 2
../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ 2
../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ 2
../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ 2
../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 2
../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive 2
../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority 2
../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority 2
../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority 2
../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority 2
../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 1
../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:212:6:HAL_NVIC_EnableIRQ 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:228:6:HAL_NVIC_DisableIRQ 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:241:6:HAL_NVIC_SystemReset 0
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:254:10:HAL_SYSTICK_Config 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:290:6:HAL_MPU_Enable 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:304:6:HAL_MPU_Disable 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:317:6:HAL_MPU_EnableRegion 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:333:6:HAL_MPU_DisableRegion 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:351:6:HAL_MPU_ConfigRegion 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:389:10:HAL_NVIC_GetPriorityGrouping 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:416:6:HAL_NVIC_GetPriority 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:431:6:HAL_NVIC_SetPendingIRQ 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:446:10:HAL_NVIC_GetPendingIRQ 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:459:6:HAL_NVIC_ClearPendingIRQ 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:473:10:HAL_NVIC_GetActive 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:487:6:HAL_SYSTICK_CLKSourceConfig 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:505:6:HAL_SYSTICK_IRQHandler 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:514:13:HAL_SYSTICK_Callback 1

52
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d Normal file
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@@ -0,0 +1,52 @@
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o: \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_spi.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:

BIN
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34
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su Normal file
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@@ -0,0 +1,34 @@
../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 24 static
../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 4 static
../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ 16 static
../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ 16 static
../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ 16 static
../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 16 static
../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive 16 static
../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority 16 static
../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority 16 static
../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority 40 static
../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority 40 static
../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config 16 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 16 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 32 static
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13
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9
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13
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../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:586:37:FLASHRAM_WaitForLastOperation 16 static
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c:540:37:FLASHRAM_SetErrorCode 16 static

8
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@@ -0,0 +1,8 @@
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:170:6:HAL_GPIO_Init 19
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:301:6:HAL_GPIO_DeInit 11
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:381:15:HAL_GPIO_ReadPin 2
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../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:469:19:HAL_GPIO_LockPin 2
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../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c:519:13:HAL_GPIO_EXTI_Callback 1

52
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Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o: \
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@@ -0,0 +1,8 @@
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17
TP4_TFT_CHAIN_CHAR/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.cyclo Normal file
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@@ -0,0 +1,17 @@
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c:84:6:HAL_PWR_DeInit 1
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52
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@@ -0,0 +1,52 @@
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o: \
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7
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@@ -0,0 +1,7 @@
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c:65:10:HAL_PWREx_GetVoltageRange 1
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52
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@@ -0,0 +1,52 @@
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o: \
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15
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8
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../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3010:13:SPI_DMAAbortOnError 1
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3032:13:SPI_DMATxAbortCallback 6
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3099:13:SPI_DMARxAbortCallback 5
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3160:13:SPI_2linesRxISR_8BIT 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3223:13:SPI_2linesTxISR_8BIT 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3259:13:SPI_2linesRxISR_16BIT 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3315:13:SPI_2linesTxISR_16BIT 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3375:13:SPI_RxISR_8BIT 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3431:13:SPI_RxISR_16BIT 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3464:13:SPI_TxISR_8BIT 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3489:13:SPI_TxISR_16BIT 2
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3519:26:SPI_WaitFlagStateUntilTimeout 10
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3586:26:SPI_EndRxTransaction 9
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3636:26:SPI_EndRxTxTransaction 6
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3683:13:SPI_CloseRxTx_ISR 7
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3778:13:SPI_CloseRx_ISR 4
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3841:13:SPI_CloseTx_ISR 6
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3902:13:SPI_AbortRx_ISR 3
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.c:3938:13:SPI_AbortTx_ISR 1

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