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[ion/device] Optimize external flash initQSPI

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This commit is contained in:
Ruben Dashyan
2018-12-10 10:00:26 +01:00
committed by Romain Goyet
parent 409edb923d
commit 4f1eba412d
1 changed files with 13 additions and 8 deletions
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21
ion/src/device/external_flash.cpp
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@@ -64,7 +64,8 @@ public:
};
static constexpr QUADSPI::CCR::OperatingMode DefaultOperatingMode = QUADSPI::CCR::OperatingMode::Quad;
static constexpr int ClockFrequencyDivisor = 256;
static constexpr int ClockFrequencyDivisor = 2;
static constexpr int ChipSelectHighTime = (ClockFrequencyDivisor == 1) ? 3 : (ClockFrequencyDivisor == 2) ? 2 : 1;
static void send_command_full(QUADSPI::CCR::FunctionalMode functionalMode, QUADSPI::CCR::OperatingMode operatingMode, Command c, uint8_t * address, uint8_t dummyCycles, uint8_t * data, size_t dataLength);
@@ -170,21 +171,25 @@ void init() {
void initGPIO() {
for(const GPIOPin & g : QSPIPins) {
g.group().OSPEEDR()->setOutputSpeed(g.pin(), GPIO::OSPEEDR::OutputSpeed::High);
g.group().MODER()->setMode(g.pin(), GPIO::MODER::Mode::AlternateFunction);
g.group().AFR()->setAlternateFunction(g.pin(), (g.pin() == 6 ? GPIO::AFR::AlternateFunction::AF10 : GPIO::AFR::AlternateFunction::AF9));
}
}
void initQSPI() {
// Enable QUADSPI AHB3 peripheral clocks
// Enable QUADSPI AHB3 peripheral clock
RCC.AHB3ENR()->setQSPIEN(true);
// Configure controller for target device
QUADSPI.DCR()->setFSIZE(NumberOfAddressBitsInChip - 1);
QUADSPI.DCR()->setCSHT(7); // Highest value. TODO: make it optimal
QUADSPI.CR()->setPRESCALER(ClockFrequencyDivisor - 1); // Highest value. TODO: make it optimal
QUADSPI.CR()->setEN(true);
class QUADSPI::DCR dcr(0);
dcr.setFSIZE(NumberOfAddressBitsInChip - 1);
dcr.setCSHT(ChipSelectHighTime - 1);
dcr.setCKMODE(true);
QUADSPI.DCR()->set(dcr);
class QUADSPI::CR cr(0);
cr.setPRESCALER(ClockFrequencyDivisor - 1);
cr.setEN(true);
QUADSPI.CR()->set(cr);
}
void initChip() {