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https://github.com/UpsilonNumworks/Upsilon.git
synced 2026-03-18 21:30:38 +01:00
[ion/crc] Fix crc: n0100 does not have 8-bits hardware implementation
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@@ -22,6 +22,7 @@ initializer_list = $(shell echo $(1) | sed "s/\(.\)/'\1',/g")0
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$(call object_for,ion/src/shared/platform_info.cpp): SFLAGS += -DPATCH_LEVEL="$(call initializer_list,$(PATCH_LEVEL))" -DEPSILON_VERSION="$(call initializer_list,$(EPSILON_VERSION))"
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src += $(addprefix ion/src/shared/, \
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crc32_eat_byte.cpp \
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decompress.cpp \
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events.cpp \
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led.cpp \
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@@ -35,6 +35,8 @@ const char * fccId();
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// CRC32 : non xor-ed, non reversed, direct, polynomial 4C11DB7
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uint32_t crc32Word(const uint32_t * data, size_t length); // Only accepts whole 32bit values
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uint32_t crc32Byte(const uint8_t * data, size_t length);
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uint32_t crc32EatByte(uint32_t previousCRC, uint8_t data);
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// Provides a true random number
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uint32_t random();
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6
ion/src/device/n0100/regs/config/crc.h
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6
ion/src/device/n0100/regs/config/crc.h
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@@ -0,0 +1,6 @@
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#ifndef ION_DEVICE_N0100_REGS_CONFIG_CRC_H
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#define ION_DEVICE_N0100_REGS_CONFIG_CRC_H
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#define REGS_CRC_CONFIG_BYTE_ACCESS 0
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#endif
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6
ion/src/device/n0110/regs/config/crc.h
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6
ion/src/device/n0110/regs/config/crc.h
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@@ -0,0 +1,6 @@
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#ifndef ION_DEVICE_N0110_REGS_CONFIG_CRC_H
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#define ION_DEVICE_N0110_REGS_CONFIG_CRC_H
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#define REGS_CRC_CONFIG_BYTE_ACCESS 1
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#endif
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@@ -6,6 +6,7 @@ namespace Ion {
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using namespace Device::Regs;
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uint32_t crc32Byte(const uint8_t * data, size_t length) {
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uint32_t result = 0;
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bool initialCRCEngineState = RCC.AHB1ENR()->getCRCEN();
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RCC.AHB1ENR()->setCRCEN(true);
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CRC.CR()->setRESET(true);
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@@ -18,12 +19,20 @@ uint32_t crc32Byte(const uint8_t * data, size_t length) {
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CRC.DR_WordAccess()->set(*((uint32_t *)data));
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data += 4;
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}
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// Scanning the remaining data with byte accesses
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#if REGS_CRC_CONFIG_BYTE_ACCESS
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// Scan the remaining data with byte accesses
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while (data < end) {
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CRC.DR_ByteAccess()->set(*data++);
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}
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result = CRC.DR_WordAccess()->get();
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#else
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result = CRC.DR_WordAccess()->get();
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while (data < end) {
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result = Ion::crc32EatByte(result, *data++);
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}
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#endif
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uint32_t result = CRC.DR_WordAccess()->get();
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RCC.AHB1ENR()->setCRCEN(initialCRCEngineState);
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return result;
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}
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@@ -9,8 +9,10 @@ namespace Regs {
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class CRC {
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public:
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#if REGS_CRC_CONFIG_BYTE_ACCESS
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class DR_ByteAccess : public Register8 {
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};
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#endif
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class DR_WordAccess : public Register32 {
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};
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@@ -20,7 +22,9 @@ public:
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};
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constexpr CRC() {};
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#if REGS_CRC_CONFIG_BYTE_ACCESS
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REGS_REGISTER_AT(DR_ByteAccess, 0x00);
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#endif
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REGS_REGISTER_AT(DR_WordAccess, 0x00);
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REGS_REGISTER_AT(CR, 0x08);
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private:
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@@ -1,15 +1,5 @@
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#include <ion.h>
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constexpr uint32_t polynomial = 0x04C11DB7;
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static uint32_t crc32(uint32_t crc, uint8_t data) {
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crc ^= data << 24;
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for (int i=8; i--;) {
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crc = crc & 0x80000000 ? ((crc<<1)^polynomial) : (crc << 1);
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}
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return crc;
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}
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uint32_t crc32Helper(const uint8_t * data, size_t length, bool wordAccess) {
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size_t uint32ByteLength = sizeof(uint32_t)/sizeof(uint8_t);
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uint32_t crc = 0xFFFFFFFF;
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@@ -20,11 +10,11 @@ uint32_t crc32Helper(const uint8_t * data, size_t length, bool wordAccess) {
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// FIXME: Assumes little-endian byte order!
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for (int j = uint32ByteLength-1; j >= 0; j--) {
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// scan byte by byte to avoid alignment issue when building for emscripten platform
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crc = crc32(crc, data[i*uint32ByteLength+j]);
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crc = Ion::crc32EatByte(crc, data[i*uint32ByteLength+j]);
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}
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}
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for (int i = (int) wordLength * uint32ByteLength; i < byteLength; i++) {
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crc = crc32(crc, data[i]);
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crc = Ion::crc32EatByte(crc, data[i]);
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}
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return crc;
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}
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11
ion/src/shared/crc32_eat_byte.cpp
Normal file
11
ion/src/shared/crc32_eat_byte.cpp
Normal file
@@ -0,0 +1,11 @@
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#include <ion.h>
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constexpr uint32_t polynomial = 0x04C11DB7;
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uint32_t Ion::crc32EatByte(uint32_t crc, uint8_t data) {
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crc ^= data << 24;
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for (int i=8; i--;) {
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crc = crc & 0x80000000 ? ((crc<<1)^polynomial) : (crc << 1);
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}
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return crc;
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}
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