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LTDC_GCR

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This commit is contained in:
Romain Goyet
2015-05-09 20:30:54 +02:00
parent 83d422d3d8
commit 7baeb0ce30
2 changed files with 18 additions and 24 deletions
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6
platform/stm32f429/init_lcd.c
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@@ -228,15 +228,11 @@ static void init_rgb_timings() {
LTDC_TOTALH(lcd_panel_vsync+lcd_panel_vbp+lcd_panel_vadr+lcd_panel_vfp-1) |
LTDC_TOTALW(lcd_panel_hsync+lcd_panel_hbp+lcd_panel_hadr+lcd_panel_hfp-1);
#if 0
/* STEP 4 : Configure the synchronous signals and clock polarity in the LTDC_GCR register */
long * LTDC_GCR = (long *)(LCD_TFT_BASE + 0x18);
//*LTDC_GCR = set_bits(*LTDC_GCR, 0, 0, 0x1); // Enable LTDC (Bit 0 is LTDCEN)
LTDC_GCR = LTDC_LTDCEN;
// Not setting the "Active low" bits since they are 0 by default, which we want
// Same for the pixel clock, we don't want it inverted
#endif
}
// Panel

36
platform/stm32f429/registers/ltdc.h
View File

@@ -51,27 +51,25 @@
#define HIGH_BIT_TOTALW 27
#define LTDC_TOTALW(v) REGISTER_FIELD_VALUE(TOTALW, v)
// LTDC global control register
#define LTDC_GCR LTDC_REGISTER_AT(0x18)
#define LTDC_LTDCEN (1<<0) //FIXME: Prefix in RCC too!
#define LOW_BIT_DBW 4
#define HIGH_BIT_DBW 6
#define LOW_BIT_DGW 8
#define HIGH_BIT_DGW 10
#define LOW_BIT_DRW 12
#define HIGH_BIT_DRW 14
#define LTDC_DEN (1<<16)
#define LTDC_PCPOL (1<<28)
#define LTDC_DEPOL (1<<29)
#define LTDC_VSPOL (1<<30)
#define LTDC_HSPOL (1<<31)
#if 0
typedef struct {
unsigned int LTDCEN:1;
unsigned int :3;
unsigned int DBW:3;
unsigned int :1;
unsigned int DGW:3;
unsigned int :1;
unsigned int DRW:3;
unsigned int :1;
unsigned int DEN:1;
unsigned int :11;
unsigned int PCPOL:1;
unsigned int DEPOL:1;
unsigned int VSPOL:1;
unsigned int HPOL:1;
} LTDC_GCR_t;
extern LTDC_GCR_t * LTDC_GCR;
typedef struct {
unsigned int IMR:1;
unsigned int VBR:1;