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Nicer registers headers

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This commit is contained in:
Romain Goyet
2015-05-03 11:52:14 +02:00
parent 4088ff554f
commit c91293ee51
9 changed files with 147 additions and 33 deletions
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1
.gitignore vendored Normal file
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*.o

2
Makefile
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@@ -4,7 +4,7 @@ GDB=arm-none-eabi-gdb
OBJCOPY=arm-none-eabi-objcopy
CFLAGS=-march=armv7e-m -mcpu=cortex-m4 -mthumb -std=c99 -g -Iarch/stm32f429
objs := boot/crt0.o src/blinky.o arch/stm32f429/registers.o
objs := boot/crt0.o src/blinky.o arch/stm32f429/registers/rcc.o arch/stm32f429/registers/gpio.o
run: boot.elf
$(GDB) -x gdb_script.gdb boot.elf

2
arch/stm32f429/registers.c
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#define RCC_BASE 0x40023800
void * RCC_AHB1ENR = (void *)(RCC_BASE + 0x30);

32
arch/stm32f429/registers.h
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@@ -1,30 +1,2 @@
extern struct {
unsigned int GPIOAEN:1;
unsigned int GPIOBEN:1;
unsigned int GPIOCEN:1;
unsigned int GPIODEN:1;
unsigned int GPIOEEN:1;
unsigned int GPIOFEN:1;
unsigned int GPIOGEN:1;
unsigned int GPIOHEN:1;
unsigned int GPIOIEN:1;
unsigned int GPIOJEN:1;
unsigned int GPIOKEN:1;
unsigned int :1;
unsigned int CRCEN:1;
unsigned int :5;
unsigned int BKPSRAMEN:1;
unsigned int :1;
unsigned int CCMDATARAMEN:1;
unsigned int DMA1EN:1;
unsigned int DMA2EN:1;
unsigned int DMA2DEN:1;
unsigned int :1;
unsigned int ETHMACEN:1;
unsigned int ETHMACTXEN:1;
unsigned int ETHMACRXEN:1;
unsigned int ETHMACPTPEN:1;
unsigned int OTGHSEN:1;
unsigned int OTGHSULPIEN:1;
unsigned int :1;
} * RCC_AHB1ENR;
#include <registers/rcc.h>
#include <registers/gpio.h>

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arch/stm32f429/registers.o
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51
arch/stm32f429/registers/gpio.c Normal file
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#include <registers/gpio.h>
#define GPIOA_BASE 0x40020000
GPIO_MODER_t * GPIOA_MODER = (void *)(GPIOA_BASE);
#define GPIOB_BASE 0x40020400
GPIO_MODER_t * GPIOB_MODER = (GPIO_MODER_t *)(GPIOB_BASE);
#define GPIOC_BASE 0x40020800
GPIO_MODER_t * GPIOC_MODER = (GPIO_MODER_t *)(GPIOC_BASE);
#define GPIOD_BASE 0x40020C00
GPIO_MODER_t * GPIOD_MODER = (GPIO_MODER_t *)(GPIOD_BASE);
#define GPIOE_BASE 0x40021000
GPIO_MODER_t * GPIOE_MODER = (GPIO_MODER_t *)(GPIOE_BASE);
#define GPIOF_BASE 0x40021400
GPIO_MODER_t * GPIOF_MODER = (GPIO_MODER_t *)(GPIOF_BASE);
#define GPIOG_BASE 0x40021800
GPIO_MODER_t * GPIOG_MODER = (GPIO_MODER_t *)(GPIOG_BASE);
#define GPIOH_BASE 0x40021C00
GPIO_MODER_t * GPIOH_MODER = (GPIO_MODER_t *)(GPIOH_BASE);
#define GPIOI_BASE 0x40022000
GPIO_MODER_t * GPIOI_MODER = (GPIO_MODER_t *)(GPIOI_BASE);
#define GPIOJ_BASE 0x40022400
GPIO_MODER_t * GPIOJ_MODER = (GPIO_MODER_t *)(GPIOJ_BASE);
#define GPIOK_BASE 0x40022800
GPIO_MODER_t * GPIOK_MODER = (GPIO_MODER_t *)(GPIOK_BASE);
GPIO_MODER_t * GPIO_MODER(GPIO_t gpio) {
GPIO_MODER_t * gpioModeRegisters[11] = {
GPIOA_MODER,
GPIOB_MODER,
GPIOC_MODER,
GPIOD_MODER,
GPIOE_MODER,
GPIOF_MODER,
GPIOG_MODER,
GPIOH_MODER,
GPIOI_MODER,
GPIOJ_MODER,
GPIOK_MODER
};
return gpioModeRegisters[gpio];
}

53
arch/stm32f429/registers/gpio.h Normal file
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typedef enum {
GPIO_MODE_INPUT = 0,
GPIO_MODE_OUTPUT = 1,
GPIO_MODE_ALTERNATE_FUNCTION = 2,
GPIO_MODE_ANALOG = 3
} GPIO_MODE_t;
typedef struct {
GPIO_MODE_t MODER0:2;
unsigned int MODER1:2;
unsigned int MODER2:2;
unsigned int MODER3:2;
unsigned int MODER4:2;
unsigned int MODER5:2;
unsigned int MODER6:2;
unsigned int MODER7:2;
unsigned int MODER8:2;
unsigned int MODER9:2;
unsigned int MODER10:2;
unsigned int MODER11:2;
unsigned int MODER12:2;
unsigned int MODER13:2;
unsigned int MODER14:2;
unsigned int MODER15:2;
} GPIO_MODER_t;
typedef enum {
GPIOA = 0,
GPIOB = 1,
GPIOC = 2,
GPIOD = 3,
GPIOE = 4,
GPIOF = 5,
GPIOG = 6,
GPIOH = 7,
GPIOI = 8,
GPIOJ = 9,
GPIOK = 10
} GPIO_t;
GPIO_MODER_t * GPIO_MODER(GPIO_t gpio);
extern GPIO_MODER_t * GPIOA_MODER;
extern GPIO_MODER_t * GPIOB_MODER;
extern GPIO_MODER_t * GPIOC_MODER;
extern GPIO_MODER_t * GPIOD_MODER;
extern GPIO_MODER_t * GPIOE_MODER;
extern GPIO_MODER_t * GPIOF_MODER;
extern GPIO_MODER_t * GPIOG_MODER;
extern GPIO_MODER_t * GPIOH_MODER;
extern GPIO_MODER_t * GPIOI_MODER;
extern GPIO_MODER_t * GPIOJ_MODER;
extern GPIO_MODER_t * GPIOK_MODER;

7
arch/stm32f429/registers/rcc.c Normal file
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// The non-inclusion of rcc.h here is voluntary.
// Since we didn't define a type for RCC_AHB1ENR, we cannot implement it here
// If we don't include rcc.h, we declare a "new" symbol which will happen to match...
//#include <registers/rcc.h>
#define RCC_BASE 0x40023800
void * RCC_AHB1ENR = (void *)(RCC_BASE + 0x30);

32
arch/stm32f429/registers/rcc.h Normal file
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/* Sample usage : "RCC_AHB1ENR->GPIOAEN = 1;" will enable the clock on GPIOA.*/
extern struct {
unsigned int GPIOAEN:1;
unsigned int GPIOBEN:1;
unsigned int GPIOCEN:1;
unsigned int GPIODEN:1;
unsigned int GPIOEEN:1;
unsigned int GPIOFEN:1;
unsigned int GPIOGEN:1;
unsigned int GPIOHEN:1;
unsigned int GPIOIEN:1;
unsigned int GPIOJEN:1;
unsigned int GPIOKEN:1;
unsigned int :1;
unsigned int CRCEN:1;
unsigned int :5;
unsigned int BKPSRAMEN:1;
unsigned int :1;
unsigned int CCMDATARAMEN:1;
unsigned int DMA1EN:1;
unsigned int DMA2EN:1;
unsigned int DMA2DEN:1;
unsigned int :1;
unsigned int ETHMACEN:1;
unsigned int ETHMACTXEN:1;
unsigned int ETHMACRXEN:1;
unsigned int ETHMACPTPEN:1;
unsigned int OTGHSEN:1;
unsigned int OTGHSULPIEN:1;
unsigned int :1;
} * RCC_AHB1ENR;