[bench] Disblae the Cache before the CRC test

This commit is contained in:
Léa Saviot
2019-04-10 11:28:37 +02:00
parent e53a37073f
commit b3d3cb5204
5 changed files with 24 additions and 6 deletions

View File

@@ -1,6 +1,7 @@
#include "command.h"
#include <ion.h>
#include <poincare/print_float.h>
#include <drivers/cache.h>
namespace Ion {
namespace Device {
@@ -41,8 +42,14 @@ void CRC(const char * input) {
}
uint32_t length = numberBase10(input + lengthStart, lengthEnd - lengthStart);
// Disable the cache to make many cache accesses
Ion::Device::Cache::disable();
uint32_t crc = Ion::crc32PaddedString(reinterpret_cast<const char *>(internal ? 0x08000000 : 0x90000000), length);
Ion::Device::Cache::enable();
constexpr int bufferSize = 4+10+1; // crc is a uint32_t so 10 digits long.
char buffer[bufferSize] = {'C', 'R', 'C', '=', 0};
constexpr int precision = 10;

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@@ -13,6 +13,9 @@ using namespace Regs;
inline void dsb() {}
inline void enable() {}
inline void disable() {}
inline void invalidateDCache() {}
inline void cleanDCache() {}
inline void enableDCache() {}

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@@ -20,11 +20,6 @@ namespace Board {
using namespace Regs;
void initL1Cache() {
Cache::enableICache();
Cache::enableDCache();
}
void initMPU() {
// 1. Disable the MPU
// 1.1 Memory barrier
@@ -113,7 +108,7 @@ void init() {
initPeripherals();
// Initiate L1 cache after initiating the external flash
initL1Cache();
Cache::enable();
// TODO if EPSILON_DEVICE_BENCH, run bench? See n0100
}

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@@ -48,6 +48,16 @@ void privateCleanInvalidateDisableDCache(bool clean, bool invalidate, bool disab
isb();
}
void enable() {
enableICache();
enableDCache();
}
void disable() {
disableICache();
disableDCache();
}
void invalidateDCache() {
privateCleanInvalidateDisableDCache(false, true, false);
}

View File

@@ -27,6 +27,9 @@ inline void isb() {
asm volatile("isb 0xF":::"memory");
}
void enable();
void disable();
void invalidateDCache();
void cleanDCache();
void enableDCache();