UpsilonNumworks/Upsilon
1
0
Fork 0
mirror of https://github.com/UpsilonNumworks/Upsilon.git synced 2026-03-30 04:00:02 +02:00
Code Issues Packages Projects Releases Wiki Activity

Enable the FPU

Browse Source
This commit is contained in:
Romain Goyet
2015-09-17 12:15:38 +02:00
parent 98b3080062
commit cb77e758a7
1 changed files with 9 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
boot/device/crt0.c
View File

@@ -8,6 +8,13 @@ extern char _data_section_end_ram;
extern char _bss_section_start_ram;
extern char _bss_section_end_ram;
#define CPACR (*(volatile uint32_t *)(0xE000ED88))
void enable_fpu() {
// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/BABDBFBJ.html
CPACR |= (0xF << 20); // Set the bits 20-23 to enable CP10 and CP11 coprocessors
}
void abort() {
// TODO: #ifdef NDEBUG, maybe trigger a reset?
while (1) {
@@ -31,6 +38,8 @@ void _start(void) {
size_t bssSectionLength = (&_bss_section_end_ram - &_bss_section_start_ram);
memset(&_bss_section_start_ram, 0, bssSectionLength);
enable_fpu();
boot();
abort();