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[ion/device] Add SPI registers
Change-Id: I5e91a31e0c4bfc11057714e57e7daad0eba41da3
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@@ -74,6 +74,7 @@ public:
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class APB1ENR : Register32 {
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public:
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REGS_BOOL_FIELD(TIM3EN, 1);
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REGS_BOOL_FIELD(SPI3EN, 15);
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REGS_BOOL_FIELD(PWREN, 28);
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};
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@@ -13,6 +13,7 @@
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#include "rcc.h"
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#include "rng.h"
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#include "sdio.h"
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#include "spi.h"
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#include "syscfg.h"
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#include "tim.h"
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35
ion/src/device/regs/spi.h
Normal file
35
ion/src/device/regs/spi.h
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@@ -0,0 +1,35 @@
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#ifndef REGS_SPI_H
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#define REGS_SPI_H
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#include "register.h"
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class SPI {
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public:
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class CR1 : Register16 {
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public:
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REGS_BOOL_FIELD(SPE, 6);
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REGS_BOOL_FIELD(LSBFIRST, 7);
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REGS_BOOL_FIELD(SSI, 8);
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REGS_BOOL_FIELD(SSM, 9);
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};
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class SR : Register16 {
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public:
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REGS_BOOL_FIELD(RXNE, 0);
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REGS_BOOL_FIELD(TXE, 1);
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};
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class DR : public Register16 {
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};
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constexpr SPI(int i) : m_index(i) {}
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constexpr operator int() const { return m_index; }
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REGS_REGISTER_AT(CR1, 0x00);
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REGS_REGISTER_AT(SR, 0x08);
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REGS_REGISTER_AT(DR, 0x0C);
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private:
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constexpr uint32_t Base() const {
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return ((uint32_t []){0x40013000, 0x40003800, 0x40003C00})[m_index-1];
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};
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int m_index;
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};
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#endif
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